JP2006078911A - Active drive type display device and driving method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To realize low power consumption of an active drive type display device and contrast improvement of a display image. <P>SOLUTION: The active drive type display device is equipped with a diode-operable transistor T4 which has its source connected to a power line Vp and its drain connected to an organic EL element 107 as an electrooptical element and a transistor T6 which has its source connected to the drain of the transistor T4 and its drain connected to a power line Vo and its drain , and a current during threshold correction of the transistor T4 is supplied from the power line Vp to the power line Vo. Consequently, the current during the threshold correction is prevented from flowing to the organic EL element 107. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an active drive type display device and a drive method for driving an electro-optic element, and is suitable for an active drive type organic EL display device and a drive method thereof, for example.

  In recent years, display devices using organic EL (Electro Luminescence) elements have been researched and developed as self-luminous elements. Among these display devices, the active drive type organic EL display device has an advantage that it is suitable for high luminance, low power consumption, large screen, and the like, and therefore its development is actively performed.

  As the above-described active drive type organic EL display device (hereinafter referred to as “organic EL display device” as appropriate), for example, a threshold variation of a drive transistor that drives an organic EL element with a constant current is corrected, and a luminance difference between pixels is corrected. Has been proposed that has a circuit configuration for the purpose of enabling uniform display with a small (see Patent Document 1). The pixel circuit configuration disclosed in Patent Document 1 will be briefly described below based on FIGS. 12 and 13.

  FIG. 12 is a circuit configuration diagram of a conventional active drive organic EL display device disclosed in Patent Document 1. In FIG. Of the reference numerals shown in the circuit configuration diagram, 500 is a pixel portion of an active drive organic EL display device, 501 to 504 are transistors, 505 to 506 are capacitors, 507 is an organic EL element, and 508 is 509 is a display data input line for inputting display data, 510 is a control line for controlling on / off of the transistor 505, 511 is a control line for controlling on / off of the transistor 503, 512 is on / off of the transistor 501 Control lines for controlling are respectively shown.

  FIG. 13 is a timing chart showing the operation of the active drive type organic EL display device of FIG. In the timing chart, a Data signal indicated by Data is a signal input to the display data input line 509, an AZ signal indicated by AZ is a signal input by the control line 510, and an AZB signal indicated by AZB. Is a signal input to the control line 511, and a Select signal indicated as Select is a signal input to the control line 512. As shown in the figure, the driving of the pixel 500 includes an address period including an auto-zero period and a load data period, and a light emission period.

  Of the three periods, the auto-zero period will be described first. The auto zero period starts by setting the high level Select signal to the low level. The select signal is set to low level to turn on the transistor 501, and then the AZ signal is set to low level to turn on the transistor 504. By turning on the transistor 504, the gate and drain of the transistor 502 are connected. At this time, an arbitrary reference voltage larger than the “highest data voltage” is set in the Data signal. Here, the “highest data voltage” is a voltage at the maximum level that is output by the Data signal during the load data period, and is a Data signal in which the luminance of the organic EL element is the darkest.

  As described above, after the AZ signal is set to the low level, the transistor 503 is turned off by setting the AZB signal to the high level. As a result, the gate voltage of the transistor 502 is set to the threshold voltage of the transistor 502, and the capacitor 505 holds a voltage difference between the reference voltage and the threshold voltage. Next, by setting the AZ signal to a high level, the transistor 504 is turned off, and the auto-zero period ends.

  Next, the load data period will be described below. The load data period starts when the data signal of the reference voltage is switched to the data voltage, and ends when the low level Select signal is set to the high level. Thus, during the load data period, the Select signal is at a low level, and thus the transistor 501 is in an on state. Therefore, in the load data period, the data voltage is sent to the gate of the transistor 502 through the transistor 501 and the capacitor 505. Thereafter, the Select signal is set to the high level to turn off the transistor 501, and the load data period is ended. Through the above operation of the active drive organic EL display device 500, a voltage for causing a constant current to flow through the organic EL element is set between the gate and source of the transistor 502 and both ends of the capacitor 506 during the load data period. It becomes.

  Next, the light emission period will be described below. The light emission period is started by setting the AZB signal to a low level and turning on the transistor 503. At this point, the address period ends. When the transistor 503 is turned on, a constant current corresponding to the voltage set between the gate and the source of the transistor 502 flows to the organic EL element 507, and the organic EL element 507 emits light. The light emission of the organic EL element 507 is held until the start of the next address period.

  As shown in FIG. 13, the Data signal of the data voltage is switched to the reference voltage between the time when the select signal at the low level is set at the high level and the time when the AZB signal is set at the low level. That is, the switching of the Data signal to the reference voltage is performed in the address period after the end of the load data period.

  Next, another pixel circuit configuration example proposed in Patent Document 2 is shown in FIG. In the figure, parts having the same connection relationship as in FIG. The pixel circuit in FIG. 14 is different from the pixel circuit shown in FIG. 12 in that a transistor 513 is added. The configuration of Patent Document 2 is effective for improving display unevenness.

That is, in the pixel circuit configuration of FIG. 12, the transistor 501 is turned on and a reference voltage is output from the Data line to the capacitor 505, whereas in the pixel circuit configuration of FIG. 513 is turned on, and the reference voltage is output from the VDD line to the capacitor 505. In this way, instead of supplying the reference voltage and the data voltage using the Data line which is one supply path, these voltages are supplied from separate supply paths (Data line and VDD line). Yes. For this reason, the pixel circuit configuration of FIG. 14 ensures a correction period sufficient to correct the threshold variation of the drive transistor even when, for example, the wiring load increases due to the large screen and the address period decreases due to high definition. Can do. Therefore, the configuration of the pixel circuit in FIG. 14 is effective in suppressing display unevenness depending on the threshold voltage, that is, occurrence of luminance unevenness in the organic EL element 507 due to variation in characteristics of the transistor 502 in the pixel circuit. .
Special Table 2002-514320 (announced on May 14, 2002) JP2003-173165 (released on June 20, 2003)

  However, the conventional technique described in Patent Document 2 has the following problems. That is, the configuration of the pixel circuit shown in FIG. 14 corrects the threshold voltage of the transistor 502 that drives the organic EL element 507 for each pixel circuit. For this reason, it is necessary to turn on the transistor 503 and flow a current unrelated to the display data to the organic EL element 507 within the address period, that is, the period during which no display is performed on the organic EL element 507. As a result of the current flowing, the organic EL emits light, resulting in a problem that the display contrast is lowered. The present invention aims to solve this problem.

  In order to solve the above problems, the present invention provides a plurality of transistors including first to fourth and sixth transistors each having a gate and two terminals, and first and second capacitors. And an active drive display device including a pixel including an electro-optic element, a data line, and first to third power supply lines, one terminal of the first transistor being connected to the data line, Is connected to one end of the second capacitor, and the other end of the second capacitor is one end of the first capacitor, one terminal of the second transistor, the gate of the fourth transistor, and the sixth capacitor. One terminal of the transistor is connected, the other end of the first capacitor is connected to one terminal of the fourth transistor, and one terminal of the fourth transistor is connected to the first power line. The other terminal of the second transistor is connected to one terminal of the third transistor and the other terminal of the fourth transistor, and the other terminal of the third transistor is electro-optic. The other end of the electro-optic element is connected to the third power supply line, and the other terminal of the sixth transistor is connected to the second power supply line.

  With the above structure, the threshold value of the fourth transistor can be corrected without causing a current to flow through the electro-optic element, so that low power consumption of the active drive display device can be realized. Further, when the threshold value of the fourth transistor is corrected, it is possible to prevent a current unrelated to display from flowing through the electro-optic element and unnecessary light emission, thereby improving the contrast of the active drive display device. Can be realized.

  That is, with the above configuration, when the threshold value of the fourth transistor is corrected, a current can flow from the first power supply line to the second power supply line via the fourth and sixth transistors. It is possible to prevent unnecessary current from flowing to the electro-optic element when the threshold value is corrected.

  In addition, since the active drive display device of the present invention includes the first transistor and the second capacitor, the threshold value of the fourth transistor is corrected after the fourth transistor is corrected as described above. Data voltage can be written between the source and gate. The first capacitor is for holding the data voltage written between the source and gate of the fourth transistor.

  A second transistor is provided between the gate of each transistor and one of two terminals (source or drain) other than the gate, and the two terminals other than the gate of the second transistor are the fourth terminals. Because it is connected between the gate of the transistor and the source or drain. The fourth transistor can operate as a diode. Note that being able to perform diode operation means performing an operation equivalent to a two-terminal diode. In the present invention, “connected” means being electrically connected.

  The active drive display device of the present invention includes a third transistor in which one terminal is connected to the other terminal of the second transistor and the other terminal is connected to one end of the electro-optic element. Therefore, the light emission of the electro-optical element can be controlled by controlling the third transistor.

  The active drive display device of the present invention further includes a fifth transistor having a gate and two terminals, and one terminal of the fifth transistor is the other terminal of the first transistor. And the other terminal of the fifth transistor is connected to one terminal of the fourth transistor and the second capacitor of the first capacitor. It may be configured to be connected to one end on the non-side and the first power supply line.

  With the above structure, by turning on the second and sixth transistors, a current flows through the fourth transistor, and then the sixth transistor is turned off and a threshold voltage is written to the gate of the fourth transistor. it can. At the same time, by turning on the fifth transistor, the difference between the voltage from the first power supply line and the threshold voltage is charged at both ends of C2. After writing the threshold voltage to the gate of the fourth transistor, the second and fifth transistors are turned off and the first transistor is turned on to correspond to the display data output from the data line to the gate of the fourth transistor. Write the data signal voltage. Then, after writing the data signal voltage to the gate of the fourth transistor as described above, the electro-optic element can be operated by turning off the first transistor and turning on the third transistor. .

  An active drive display device of the present invention includes a plurality of transistors including first to fourth and sixth transistors each having a gate and two terminals, first and second capacitors, In an active drive display device including a pixel including an optical element, a data line, and first to third power supply lines, one terminal of the first transistor is connected to the data line, and the other terminal is The other end of the second capacitor is connected to one end of the second capacitor, and the other end of the second capacitor is connected to one end of the first capacitor, one terminal of the second transistor, and the gate of the fourth transistor. The other end of the capacitor is connected to one terminal of the fourth transistor, one terminal of the third transistor, and one terminal of the sixth transistor. One terminal of the first transistor is connected to the first power supply line and the other terminal of the second transistor, and the other terminal of the third transistor is connected to one end of the electro-optical element. The other end of the second transistor is connected to the third power supply line, and the other terminal of the sixth transistor is connected to the second power supply line.

  According to the above configuration, for the same reason as the above-described active drive display device of the present invention, the threshold value of the fourth transistor can be corrected without passing a current through the electro-optic element. And improvement of contrast can be realized.

  The active drive display device of the present invention further includes a fifth transistor having a gate and two terminals, and one terminal of the fifth transistor is the other terminal of the first transistor. And the other terminal of the fifth transistor is connected to the other terminal of the second transistor, the one terminal of the fourth transistor, and the first power source. The structure connected with the line may be sufficient.

  According to the above configuration, the electro-optical element can be operated in the same manner as the active drive type display device of the present invention having the fifth transistor.

  The active drive display device of the present invention may be configured such that the plurality of transistors are all N-channel transistors or all P-channel transistors. In this case, since all of the plurality of transistors can be formed using a TFT formation process using amorphous silicon technology, an active drive display device that can be manufactured at low cost can be realized.

  The active drive display device of the present invention may be configured such that the gates of the second transistor and the third transistor are connected to the same control line. Accordingly, in the active drive display device, the number of control lines can be reduced as compared with the case where the gates of the second and third transistors are connected to different control lines. It becomes possible to improve the reliability.

  The electro-optical element of the active drive type display device of the present invention can be composed of an organic EL element.

  The drive method of the active drive type display device of the present invention is the above-described drive method of the active drive type display device of the present invention, in which the sixth transistor and the second transistor are turned on to supply current to the fourth transistor. In this method, the sixth transistor is turned off and the threshold voltage is written to the gate of the fourth transistor after flowing.

  According to the above method, by turning on the sixth transistor and the second transistor, the current for writing the threshold voltage to the fourth transistor can be passed to the sixth transistor without flowing to the electro-optic element. . As a result, the power consumption of the active drive display device can be reduced and the contrast of the display can be improved.

  The drive method of the active drive type display device of the present invention is the above-described drive method of the active drive type display device of the present invention, wherein the sixth transistor and the second transistor are turned on and the current is supplied to the fourth transistor. Is applied, the sixth transistor is turned off, the threshold voltage is written to the gate of the fourth transistor, and then the third transistor is turned on to operate the electro-optic element.

  According to the above driving method, by turning on the sixth transistor and the second transistor, the current for writing the threshold voltage to the fourth transistor can be passed to the sixth transistor without flowing to the electro-optic element. it can. Further, by turning on the third transistor, the light emission of the electro-optical element can be controlled by the fourth transistor after the threshold voltage is corrected. Accordingly, it is possible to reduce the power consumption of the active drive display device and improve the display contrast while suppressing the occurrence of display unevenness due to the threshold unevenness of the fourth transistor.

  Note that the writing of the data signal voltage to the fourth transistor for controlling the light emission of the electro-optical element is performed by writing the threshold voltage to the gate of the fourth transistor as described above and then turning on the first transistor. Then, a data signal voltage corresponding to display data output from the data line may be written to the gate of the fourth transistor.

  In the active drive display device according to the present invention, as described above, one terminal of the first transistor is connected to the data line, and the other terminal is connected to one end of the second capacitor. The other end of the capacitor is connected to one end of the first capacitor, one terminal of the second transistor, the gate of the fourth transistor, and one terminal of the sixth transistor. One end is connected to one terminal of the fourth transistor, one terminal of the fourth transistor is connected to the first power supply line, and the other terminal of the second transistor is connected to the third terminal. The other terminal of the third transistor is connected to one end of the electro-optic element, and the other terminal of the third transistor is connected to one end of the electro-optic element. One end of the first transistor is connected to the third power supply line, and the other terminal of the sixth transistor is connected to the second power supply line, or one terminal of the first transistor is connected to the data line. The other terminal is connected to one end of the second capacitor, and the other end of the second capacitor is connected to one end of the first capacitor, one terminal of the second transistor, and the gate of the fourth transistor. The other end of the first capacitor is connected to one terminal of the fourth transistor, one terminal of the third transistor, and one terminal of the sixth transistor. One terminal of the first transistor is connected to the first power supply line and the other terminal of the second transistor, and the other terminal of the third transistor is connected to one end of the electro-optical element. The remaining end is connected to a third power supply line, the other terminal of the sixth transistor is configured to be connected to the second power supply line.

  For this reason, it is not necessary to flow an unnecessary current directly to the electro-optic element in the address period for correcting the threshold voltage variation in the fourth transistor, and the fourth transistor in the address period is the first power source that is an external power source. The current determined by the first and second power supplies is passed. As a result, the current consumption of the active drive display device can be reduced. In addition, since the electro-optic element does not emit light regardless of display during the address period, the display contrast can be improved as compared with the conventional case.

[Embodiment 1]
An embodiment of the present invention will be described below with reference to FIGS. FIG. 1 is a circuit configuration diagram showing an embodiment of one pixel circuit constituting an active drive type display device according to the present invention, and FIG. 2 is a timing chart showing the operation of the pixel circuit of FIG. In the present embodiment, an active drive organic EL display device will be described as an example of the active drive display device.

  Among the reference numerals attached to the respective parts of the circuit configuration shown in FIG. 1, 100 is a pixel portion of the active drive organic EL display device, T1 to T6 are transistors, C1 and C2 are capacitors, and 107 is Each of the organic EL elements is shown. In the figure, Vp is a power supply line, Tj is a display data input line for inputting a data signal (Data signal) connected to the data line driving circuit to the pixel circuit, and Vo is connected to the drain of the transistor T6. Ei is a control line connected to the gate of the transistor T3, Gi is a control line connected to the gate of the transistor T2, Pi is a control line connected to the gate of the transistor T6, Wi is a transistor Ri indicates a control line connected to the gate of T1, and Ri indicates a control line connected to the gate of the transistor T5.

  The active drive display device of this embodiment includes a plurality of pixels, and the configuration of each pixel is as shown in FIG. Specifically, the gate of the transistor T1 is connected to the control line Wi, the source of the transistor T1 is connected to the display data input line Tj, the drain of the transistor T1 is the drain of the transistor T5, and the capacitor C2 Connected to one end. The other end of the capacitor C2, that is, one end not connected to the drain of the transistor T1, is connected to one end of the capacitor C1, the drain of the transistor T2, the gate of the transistor T4, and the source of the transistor T6. The other end of the capacitor C1 is connected to the source of the transistor T4 and the source of the transistor T5. The gate of the transistor T5 is connected to the control line Ri, the source of the transistor T5 is the other end of the capacitor C1, that is, one end not connected to the capacitor C2, the source of the transistor T4, and the power supply line (first power supply line) Vp. It is connected to the. The gate of the transistor T2 is connected to the control line Gi, and the source of the transistor T2 is connected to the drain of the transistor T4 and the source of the transistor T3. The gate of the transistor T6 is connected to the control line Pi, the source of the transistor T6 is connected to the drain of the transistor T2, and the drain of the transistor T6 is connected to the power supply line (second power supply line) Vo. The gate of the transistor T3 is connected to the control line Ei, the source of the transistor T3 is connected to the drain of the transistor T4, and the drain of the transistor T3 is connected to one end of the organic EL element (electro-optical element) 107. The remaining one end of the organic EL element 107 is connected to a power supply line Vcom which is a third power supply line.

  A driving method of the active drive display device of this embodiment mode, that is, a method of operating the pixel circuit of the pixel 100 illustrated in FIG. 1 will be described below.

  First, while outputting display data to the display data input line Tj, by turning on the transistors T2, T5, and T6, a current is passed through the transistor T4, and then the transistor T6 is turned off and a threshold voltage is applied to the gate of the transistor T4. Write. After the threshold voltage is written to the gate of the transistor T4 in this way, the transistors T2 and T5 are turned off and the transistor T1 is turned on, and the data corresponding to the display data output from the display data input line Tj to the gate of the transistor T4. Write the signal voltage. Then, after writing the data signal voltage to the gate of the transistor T4 as described above, the transistor T1 is turned off and the transistor T3 is turned on. As described above, the driving method of this embodiment drives the pixel circuit of the pixel 100 and operates the organic EL element 107.

  FIG. 2 is a timing chart showing a driving method of the pixel circuit of the active drive type display device of the present embodiment shown in FIG. As shown in the figure, the timing chart includes an address period including a Vth writing period and a data writing period, and a light emission period.

  As indicated by x in the figure, the display data input line Tj outputs a data signal voltage to be written to the pixel 100 during the period from the start to the end of the address period. In the figure, “X” indicates switching of data signals that do not particularly specify a low level, a high level, an intermediate level, or the like. The same applies to FIGS. 5 and 7 described later.

  At the start of the address period, the control line Ei outputs a high level control signal, thereby turning off the transistor T3 and closing the path through which current flows to the organic EL element 107. As a result, the organic EL element 107 is in a non-light emitting state. become. Further, at the start of the address period, the transistors T2, T5, and T6 are changed by changing the respective control signals to the high level on the control line Gi, the low level on the control line Ri, and the low level on the control line Pi. Turn on.

  Here, if the voltage of the power supply line Vo is set to a voltage smaller than the voltage of the power supply line Vp minus the threshold value of the transistor T4, current flows from the power supply line Vp to the power supply line Vo through the transistors T4 and T6. It will flow. That is, if the relationship of the voltage of the power supply line Vp> (the voltage of the power supply line Vo + the threshold voltage of the transistor T4) is satisfied, the gate and drain of the transistor T4 are short-circuited by the transistor T2 in the on state. The transistor T4 becomes a diode operation, and a current flows from the power supply of the power supply line Vp to the power supply line Vo through the transistors T4 and T6. At this time, since the control signal of the control line Wi is at a low level and the transistor T1 is not turned on, the data signal voltage of the display data input line Tj is not transmitted into the circuit of the pixel 100.

  Next, during the Vth writing period, the control line Pi is set to the high level to turn off the transistor T6, thereby stopping the current flowing from the power supply line Vp to the power supply line Vo via the transistors T4 and T6. .

  FIG. 3 is a graph showing drain-source voltage (Vds) -drain current (Id) characteristics when the transistor T4 of the present embodiment is diode-operated. As shown in the figure, by moving the operating point of the transistor T4 from the point A where the current flows to the drain to the point B where the drain current becomes zero, a threshold voltage is generated between the gate and the drain of the transistor T4. Vth is generated.

  That is, in this embodiment, the transistor T6 is turned on, and the transistor T4 is diode-operated at the operating point A (FIG. 3). After the diode operation as described above, the transistor T4 is moved to the operating point B by turning off the transistor T6, and the threshold correction of the transistor T4 is completed.

  Here, in the case of a conventional circuit that does not include the transistor T6 (see FIGS. 12 and 14), in order to correct the threshold value of the transistor T4, it is necessary to temporarily pass a current to the organic EL element 507 through the transistor T3. . On the other hand, the threshold voltage Vth of the transistor T4 can be corrected without flowing current through the organic EL element 107 by adopting the configuration including the transistor T6 as in the active drive display device of the present embodiment. As a result, it is possible to suppress unnecessary current from flowing through the organic EL element 107 and reduce its power consumption, and to suppress unnecessary light emission unrelated to display by the organic EL element 107 and to display the display screen ( It is possible to improve the contrast of the display image).

  The active drive display device according to the present embodiment can correct the threshold voltage Vth of the transistor T4 as described above. The voltage across the capacitors C1 and C2 in the corrected Vth write period is a value Vt (= Vp−Vth) obtained by subtracting the value of the threshold voltage Vth of T4 from the voltage values Vp and Vp of the power supply line Vp. .

  Next, the transistor T2 and the transistor T5 are turned off by setting the control signal of the control line Gi to a low level and the control signal of the control line Ri to a high level. At this point, the Vth write period ends.

Simultaneously with the end of the Vth writing period, the control signal on the control line Wi is set to the high level to turn on the transistor T1, thereby inputting the Data signal to the circuit of the pixel 100 through the capacitor C2. The data writing period starts from this point. By turning on the transistor T1, a voltage Vgs represented by the following formula (1) is input to the circuit of the pixel 100 as a gate signal of the transistor T4.
Vgs = (Vp−Vt) + (Vo−Vdata) B (1)
here,
B = C2 / (C1 + C2)
Here, C1: the capacitance value of the capacitor C1, and C2: the capacitance value of the capacitor C2.
The current Id flowing through the transistor T4 is
Id = (1/2) u (Cin) (W / L) (Vgs−Vth) ²
By substituting the above equation (1) and Vth = Vp−Vt into (Vgs−Vth) in this equation, the following equation (2) is obtained.
Id = (1/2) u (Cin) (W / L) [(Vo-Vdata) B] ² (2)
here,
u: mobility, Cin: gate input capacitance of transistor T4, W: gate width of transistor T4, L: gate length of transistor T4, Vdata: value of data signal voltage from display data input line Tj (2) Thus, it can be seen that the current Id flowing through the transistor T4 can be expressed without using Vth, that is, Id does not depend on the threshold voltage Vth of the transistor T4.

  At the end of the address period, the control signal on the control line Wi is set to low level to turn off the transistor T1, and at the same time, the control signal on the control line Ei is set to low level to turn on the transistor T3. As a result, the current Id expressed by the above equation (2) flows from the power supply of the power supply line Vp, and the organic EL element 107 emits light. That is, the light emission period starts simultaneously with the end of the address period.

  By the operation of the active drive type display device during the address period described above, a voltage for causing a constant current to flow through the organic EL element 107 is set between the gate and source of the transistor T4 and both ends of the capacitor C1.

  Subsequently, the light emission period will be described. As described above, the light emission period starts when the transistor T3 is turned on at the same time as the transistor T1 is turned off. When the transistor T3 is turned on, a constant current corresponding to the voltage set between the gate and the source of the transistor T4 flows to the organic EL element 107, and the organic EL element 107 emits light. The light emission of the organic EL element 107 is held until the next address period starts.

  As described above, since the active drive display device according to the present embodiment includes the transistor T2, the transistor T3, and the transistor T6, an address for correcting variation in the threshold voltage Vth of the transistor T4 that drives the organic EL element 107. During the period, unnecessary current does not flow through the organic EL element 107. On the other hand, in the conventional active drive display device (see FIG. 14), unevenness in luminance occurs in the organic EL element 507 due to variations in threshold characteristics of the transistor 502 in the pixel circuit that drives the organic EL element 507. Although a sufficient correction period for prevention can be ensured, when the threshold voltage of the transistor 502 is corrected, a current unrelated to display necessarily flows through the organic EL element 507. For this reason, the conventional active drive type display device has the problems that the power consumption increases and the display contrast decreases. However, the active drive type display device according to the present embodiment does not cause the problem. .

  That is, in the active drive display device of this embodiment, when correcting the variation in the threshold voltage of the transistor, it is not necessary to directly flow the organic EL element with a current unrelated to the display, and the voltages of the power supply lines Vp and Vo A current determined by the value is passed through the pixel circuit. For this reason, the active drive type display device of this embodiment consumes less current than the conventional one. In addition, the active drive type display device of the present embodiment prevents the organic EL element from emitting light regardless of the display data in the address period, so that the contrast of the display image is improved as compared with the conventional case. Can do.

  In the present embodiment, the power source line Vp is connected to the source of the transistor T5, but the power source line may be connected to other power source lines. In addition, the transistors T1, T2, T3, T5, and T6, except the transistor T4, are all intended for switching operation, and therefore are either N-channel type (Nch type) or P-channel type (Pch type). However, the control signal may be changed in accordance with the polarity of the transistor used. When all of the transistors T1, T2, T3, T5, and T6 except for the transistor T4 are P-channel type, a TFT formation process using amorphous silicon technology can be used. Can be provided.

[Embodiment 2]
Another embodiment of the present invention will be described below with reference to FIGS. 4 and 5. FIG. 4 is a circuit configuration diagram showing another embodiment of the pixel circuit constituting the active drive type display device of this embodiment, and FIG. 5 is a timing chart showing the operation of the pixel circuit of FIG. . In the pixel 120 constituting the active drive display device of this embodiment, all of the transistors T1 to T6 are N-channel type, and the gates of the transistors T2 and T5 are connected to the control line Gi, and a common control signal is used. It is different from the pixel 100 (see FIG. 1) described in the above embodiment in that it is controlled. 4 and 5, members having the same functions as those described in the above embodiment are denoted by the same reference numerals, and description thereof is omitted.

  The circuit configuration of the pixel 120 in the active drive display device of this embodiment is as shown in FIG. Specifically, the gate of the transistor T1 is connected to the control line Wi, the source of the transistor T1 is connected to the display data input line Tj, the drain of the transistor T1 is the source of the transistor T5 and one end of the capacitor C2. It is connected to the. The other end of the capacitor C2, that is, one end not connected to the drain of the transistor T1, is connected to one end of the capacitor C1, the source of the transistor T2, and the gate of the transistor T4. The other end of the capacitor C1 is connected to the source of the transistor T4 and the drain of the transistor T3. The gate of the transistor T5 is connected to the control line Gi, and the drain of the transistor T5 is connected to the drain of the transistor T2, the drain of the transistor T4, and the power supply line Vp. The gate of the transistor T2 is connected to the control line Gi, and the drain of the transistor T2 is connected to the drain of the transistor T4 and the drain of the transistor T5. The gate of the transistor T6 is connected to the control line Pi, the drain of the transistor T6 is connected to the source of the transistor T4, and the source of the transistor T6 is connected to the power supply line Vo. The gate of the transistor T3 is connected to the control line Ei, the drain of the transistor T3 is connected to the source of the transistor T4, the drain of the transistor T3 is connected to one end of the organic EL element 107, and the organic EL element 107 Is connected to the third power supply line Vcom.

  FIG. 5 shows a timing chart showing a driving method of the pixel circuit when the pixel 120 shown in FIG. 4 is operated. In this embodiment, the operation of the pixel 120 is the same as that of the pixel 100 except that all of the transistors T1 to T6 are N-channel transistors. Therefore, in this embodiment, description of the driving method of the pixel circuit is omitted. .

  By making all of the transistors T1 to T6 N-channel type like the pixel 120, a TFT formation process using amorphous silicon technology can be used, so that an active drive display device that can be manufactured at low cost is provided. It becomes possible to provide.

[Embodiment 3]
Another embodiment of the present invention will be described below with reference to FIGS. FIG. 6 is a circuit configuration diagram showing another embodiment of the pixel circuit constituting the active drive type display device according to the present invention, and FIG. 7 is a timing chart showing the operation of the pixel circuit of FIG. The pixel 140 constituting the active drive type display device of the present embodiment has the pixel 100 in that the gates of the transistors T2, T3, and T5 are connected to a common control line Gi and these control signals are shared. (See FIG. 1). 6 and 7, members having the same functions as those described in the above embodiment are denoted by the same reference numerals, and description thereof is omitted.

  The circuit configuration of the pixel 140 in the active drive type display device of this embodiment is as shown in FIG. 6, and the gates of the transistors T2, T3, and T5 are all connected to the control line Gi, and the transistor 1 is different from the configuration of the pixel 100 shown in FIG. 1 in that T5 and T6 are n-type.

  FIG. 7 shows a timing chart showing a driving method of the pixel circuit when the pixel 140 shown in FIG. 6 is operated. Hereinafter, only differences from the operation of the pixel 100 (FIG. 2) due to the configuration in which the transistors T2, T3, and T5 are controlled by a common control signal will be described, and the same description will be omitted.

  As shown in FIG. 7, by changing the control signal of the control line Gi to a high level at the start of the address period, the transistors T2 and T5 are turned on and the transistor T3 is turned off. As a result, a current flows from the power supply line Vp to the power supply line Vo through the transistors T4 and T6. The correction of the threshold voltage of the transistor T4 is as described in the above embodiment based on FIG.

  Subsequently, by setting the control signal of the control line Gi to a low level, the transistors T2 and T5 are turned off and the transistor T3 is turned on. At this point, the Vth write period ends. Next, the control signal of the control line Wi is set to the high level and the transistor T1 is turned on, whereby the data signal is input to the circuit of the pixel 140 through the capacitor C2, and the data writing period starts. In the pixel 140 of the active drive type display device of this embodiment, since the transistor T3 is on during the data writing period, a data signal is written to the transistor T4 and at the same time, a current flows to the organic EL element 107. The organic EL element 107 emits light within the data writing period. By turning the transistor T1 off by setting the control signal of the control line Wi to the low level, the address period ends, and the light emission period for holding the light emission state is started without writing the data signal.

  As described above, in the active drive display device of this embodiment, the number of control lines for controlling the transistor of the pixel is smaller than that of the pixel 100 illustrated in FIG. 1, and thus active drive that can be manufactured at low cost. A type display device can be provided. Further, by reducing the number of control lines, the aperture ratio of the pixel can be increased and the light emission luminance of the organic EL element can be lowered, so that the reliability of the active drive display device is improved.

[Embodiment 4]
Another embodiment of the present invention will be described below with reference to FIGS. FIG. 8 is a circuit configuration diagram showing another embodiment of the pixel circuit of the active drive type display device according to this embodiment, and FIG. 9 is a timing chart showing the operation of the pixel circuit of FIG.

  The pixel 160 of this embodiment is different from the pixel 100 described in the above-described embodiment (see FIG. 1) in that the transistor T5 is not provided and the transistor T2 is a P-channel type. In comparison with the technology, the pixel 160 corresponds to a configuration in which the transistor T6 is added to FIG. 8 and 9, members having the same functions as those described in the above embodiment are denoted by the same reference numerals, and description thereof is omitted.

  FIG. 9 shows a timing chart showing a driving method of the pixel circuit when the pixel 160 shown in FIG. 8 is operated. The operation of the pixel 160 is almost the same as that of the conventional active drive display device shown in FIG. 12, but by turning on the transistor T6 instead of turning on the transistor T3 in the address period, a current is supplied to the organic EL element 107. The difference is that it does not flow.

  The timing chart shown in FIG. 9 includes an address period including a Vth writing period and a data writing period, and a light emission period. First, the Vth writing period will be described below. By turning on the transistor T6, the transistor T2, and the transistor T1 by the control signals of the control line Pi, the control line Gi, and the control line Wi, the Vth writing period (address period) is started. Thereafter, the control signal on the control line Pi is set to the high level to turn off the transistor T6. By turning on the transistor T2, the gate and drain of the transistor T4 are connected. At this time, an arbitrary reference voltage larger than the maximum data voltage is set to the display data input line Tj. Here, the “maximum data voltage” means the maximum level at which the data signal is output during the data writing period, and the luminance of the light emitted from the organic EL element 107 is the darkest (darkest) state. A data signal.

  As described above, the control signal on the control line Pi is set to the high level, and then the control line Gi is set to the high level to turn off the transistor T2 and complete the connection between the gate and the drain of the transistor T4. The threshold voltage Vth is written, and the Vth writing period ends. In addition, the display data input line Tj is connected to the pixel 160 during a period from when the transistor T2 is turned off to when the control line Wi is set to low level to turn off the transistor T1 and turn on the transistor T3. Outputs the data signal voltage. As a result, a voltage for supplying a constant current to the organic EL element 107 is set between the gate and the source of the transistor T4 and the capacitor C1.

  The light emission period starts when the control line Wi is set to the low level to turn off the transistor T1 and turn on the transistor T3. A constant current corresponding to the voltage set between the gate and the source of the transistor T4 is applied to the organic EL element. The organic EL element 107 emits light. The light emission of the organic EL element 107 is held until the start of the next address period.

  As described above, since the active drive display device of this embodiment includes the transistor T6, the transistor T3 can be turned off throughout the address period. For this reason, it is possible to prevent a current related to display from flowing through the organic EL element 107, and to realize lower power consumption and improved display contrast as compared with the conventional active drive display device. .

  In addition, since the number of transistors is small as compared with the circuit of the pixel 100 shown in FIG. 1 described above, defects during the manufacturing of the panel of the active drive display device are reduced, and a low cost active drive display device is provided. Can do. Further, since the aperture ratio of each pixel is increased by configuring the circuit with a small number of transistors, the light emission luminance of the organic EL element can be decreased, and the reliability of the active drive display device is improved.

[Embodiment 5]
Another embodiment of the present invention will be described below with reference to FIGS. FIG. 10 is a circuit configuration diagram showing another embodiment of the pixel circuit constituting the active drive type display device of this embodiment, and FIG. 11 is a timing chart showing the operation of the pixel circuit of FIG. In the pixel 180 of this embodiment, all of the transistors T1 to T4 and T6 are N-channel type, and the transistor T3 is connected to a control line Wi different from the transistor T1. 8). 10 and 11, members having the same functions as those described in the above embodiment are denoted by the same reference numerals, and description thereof is omitted.

  The circuit configuration of the pixel 180 in the active drive display device of this embodiment is as shown in FIG. Specifically, the gate of the transistor T1 is connected to the control line Wi, the source of the transistor T1 is connected to the display data input line Tj, and the drain of the transistor T1 is connected to one end of the capacitor C2. . The remaining one end of the capacitor C2, that is, one end not connected to the drain of the transistor T1, is connected to one end of the capacitor C1, the source of the transistor T2, and the gate of the transistor T4. The other end of the capacitor C1 is connected to the source of the transistor T4. The gate of the transistor T2 is connected to the control line Gi, and the drain of the transistor T2 is connected to the drain of the transistor T4. The gate of the transistor T6 is connected to the control line Pi, the drain of the transistor T6 is connected to the source of the transistor T4, and the source of the transistor T6 is connected to the power supply line Vo. The gate of the transistor T3 is connected to the control line Ei, the drain of the transistor T3 is connected to the source of the transistor T4, the source of the transistor T3 is connected to one end of the organic EL element 107, and the organic EL element 107 Is connected to the third power supply line Vcom.

  FIG. 11 shows a timing chart showing a driving method of the pixel circuit when the pixel 180 shown in FIG. 10 is operated. In this embodiment mode, the operation of the pixel 180 is the same as that of the pixel 160 except that all of the transistors T1 to T6 are N-channel transistors. Therefore, the description of the driving method of the pixel circuit is omitted in this embodiment mode. .

  By using all N-channel transistors T1 to T6 as in the pixel 180, a TFT formation process using amorphous silicon technology can be used, so that an active drive display that can be manufactured at low cost. An apparatus can be provided.

  Further, all of the transistors T1 to T6 may be P-channel transistors, and in this case as well, a TFT formation process using amorphous silicon technology can be used in the same manner. It is possible to provide an active drive type display device that can be used.

  The present invention is not limited to the above-described embodiments, and various modifications are possible within the scope shown in the claims, and embodiments obtained by appropriately combining technical means disclosed in different embodiments. Is also included in the technical scope of the present invention.

  The present invention relates to an active driving display device and a driving method capable of realizing low power consumption and improvement in contrast, and can be used for an active driving organic EL display device and a driving method thereof, for example.

1 is a circuit configuration diagram showing an embodiment of a one-pixel circuit in an active drive display device according to the present invention. 2 is a timing chart showing a method for driving the pixel circuit of FIG. 1. It is a graph which shows the relationship between drain-source voltage (Vds) and drain current (Id) when a transistor is diode-operated. It is a circuit block diagram which shows another one Embodiment of 1 pixel circuit in the active drive type display apparatus which concerns on this invention. 5 is a timing chart showing a method for driving the pixel circuit of FIG. 4. It is a circuit block diagram which shows another one Embodiment of 1 pixel circuit in the active drive type display apparatus which concerns on this invention. 7 is a timing chart illustrating a method for driving the pixel circuit of FIG. 6. It is a circuit block diagram which shows another one Embodiment of 1 pixel circuit in the active drive type display apparatus which concerns on this invention. 9 is a timing chart illustrating a method for driving the pixel circuit of FIG. 8. It is a circuit block diagram which shows another one Embodiment of 1 pixel circuit in the active drive type display apparatus which concerns on this invention. 11 is a timing chart illustrating a method for driving the pixel circuit of FIG. 10. It is a circuit block diagram of the conventional active drive type organic electroluminescence display. 13 is a timing chart showing an operation of the active drive type organic EL display device of FIG. It is a circuit block diagram of the other conventional active drive type organic electroluminescence display.

Explanation of symbols

T1 transistor (first transistor)
T2 transistor (second transistor)
T3 transistor (third transistor)
T4 transistor (fourth transistor)
T5 transistor (fifth transistor)
T6 transistor (sixth transistor)
C1 capacitor (first capacitor)
C2 capacitor (second capacitor)
Vp power line (first power line)
Vo power line (second power line)
Vcom power line (third power line)
Wi, Ei, Gi, Pi, Ri Control line Tj Display data input line (data line)
100, 120, 140, 160, 180, 200 pixels 107 organic EL element (electro-optic element)

Claims (9)

A plurality of transistors including first to fourth and sixth transistors each having a gate and two terminals, first and second capacitors, an electro-optic element, a data line, and a first line In an active drive type display device comprising a pixel comprising ˜3 power lines,
One terminal of the first transistor is connected to the data line, and the other terminal is connected to one end of the second capacitor;
The other end of the second capacitor is connected to one end of the first capacitor, one terminal of the second transistor, the gate of the fourth transistor, and one terminal of the sixth transistor.
The other end of the first capacitor is connected to one terminal of the fourth transistor,
One terminal of the fourth transistor is connected to the first power line,
The other terminal of the second transistor is connected to one terminal of the third transistor and the other terminal of the fourth transistor,
The other terminal of the third transistor is connected to one end of the electro-optical element, and the other end of the electro-optical element is connected to the third power supply line.
An active drive display device, wherein the other terminal of the sixth transistor is connected to the second power supply line. A fifth transistor having a gate and two terminals;
One terminal of the fifth transistor is connected to the other terminal of the first transistor and one terminal of the second capacitor,
The other terminal of the fifth transistor is connected to one terminal of the fourth transistor, one end of the first capacitor not connected to the second capacitor, and the first power supply line. The active drive display device according to claim 1, wherein: A plurality of transistors including first to fourth and sixth transistors each having a gate and two terminals, first and second capacitors, an electro-optic element, a data line, and a first line In an active drive type display device comprising a pixel comprising ˜3 power lines,
One terminal of the first transistor is connected to the data line, and the other terminal is connected to one end of the second capacitor;
The other end of the second capacitor is connected to one end of the first capacitor, one terminal of the second transistor, and the gate of the fourth transistor.
The other end of the first capacitor is connected to one terminal of the fourth transistor, one terminal of the third transistor, and one terminal of the sixth transistor.
One terminal of the fourth transistor is connected to the first power supply line and the other terminal of the second transistor,
The other terminal of the third transistor is connected to one end of the electro-optical element, and the other end of the electro-optical element is connected to the third power supply line.
An active drive display device, wherein the other terminal of the sixth transistor is connected to the second power supply line. A fifth transistor having a gate and two terminals;
One terminal of the fifth transistor is connected to the other terminal of the first transistor and one terminal of the second capacitor,
The other terminal of the fifth transistor is connected to the other terminal of the second transistor, one terminal of the fourth transistor, and the first power supply line. Active drive type display device.   5. The active drive type display device according to claim 1, wherein the plurality of transistors are all N-channel transistors or all P-channel transistors. 6.   5. The active drive display device according to claim 1, wherein gates of the second transistor and the third transistor are connected to the same control line. 6.   The active drive display device according to claim 1, wherein the electro-optical element is an organic EL element. A drive method for an active drive type display device according to any one of claims 1 to 7,
An active drive characterized in that after the sixth transistor and the second transistor are turned on and a current flows through the fourth transistor, the sixth transistor is turned off and a threshold voltage is written to the gate of the fourth transistor. Type display device driving method. A drive method for an active drive type display device according to any one of claims 1 to 7,
After the sixth transistor and the second transistor are turned on to pass a current through the fourth transistor, the sixth transistor is turned off and a threshold voltage is written to the gate of the fourth transistor, and then the third transistor A driving method of an active driving display device, wherein an electro-optical element is operated by turning on a transistor.

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