TWI639285B - Surge protection circuit with timely switching off circuit - Google Patents

Surge protection circuit with timely switching off circuit Download PDF

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Publication number
TWI639285B
TWI639285B TW106146632A TW106146632A TWI639285B TW I639285 B TWI639285 B TW I639285B TW 106146632 A TW106146632 A TW 106146632A TW 106146632 A TW106146632 A TW 106146632A TW I639285 B TWI639285 B TW I639285B
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switch
voltage
electrically connected
resistor
circuit
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TW106146632A
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TW201931712A (en
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楊瑞全
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咸瑞科技股份有限公司
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Abstract

本發明係一種具及時開關截止迴路的突波保護電路,包含有一第一開關,電連接於一電源輸入端及一負載連接端之間,且具有一第一控制端;一電容,電連接於該電源輸入端及該第一開關的控制端之間;一第一電阻,電連接於該第一控制端及一接地端之間;一第二電阻,電連接於該電源輸入端及該接地端之間;當一電連接該電源輸入端的輸入電源產生一高壓突波時,該電容的兩端等同短路,使得該第一開關及時截止,達到避免該高壓突波進入該負載電路之目的。The invention is a surge protection circuit with a timely switch-off circuit, comprising a first switch electrically connected between a power input end and a load connection end, and having a first control end; a capacitor electrically connected to a first resistor electrically connected between the first control terminal and a ground terminal; a second resistor electrically connected to the power input terminal and the ground Between the terminals; when an input power source electrically connected to the power input terminal generates a high voltage surge, both ends of the capacitor are equally short-circuited, so that the first switch is turned off in time to avoid the purpose of the high voltage surge entering the load circuit.

Description

具及時開關截止迴路的突波保護電路Surge protection circuit with timely switching off circuit

一種突波保護電路,尤指一種具及時開關截止迴路的突波保護電路。A surge protection circuit, especially a surge protection circuit with a timely switch-off circuit.

突波保護電路係一般電子裝置在實做上均會設置之電路,其目的在於避免該當電子裝置40的輸入電源產生一異常高壓時,例如一啟動突波,該異常高壓直接通入該電子裝置導致損壞。一般來說,該突波保電路包含有一開關Q及一驅動電路30,該開關Q電連接於該輸入電源VIN及該電子裝置40之間,且具有一控制端,該驅動電路30電連接於該輸入電源VIN及該開關Q的控制端之間,以接受一輸入電壓並根據該輸入電壓驅動該開關Q。當該輸入電源VIN產生一正常工作電壓時,該驅動電路30控制該開關Q導通,使得該電子裝置40接受該輸入電壓以進行工作;當該輸入電源VIN產生一異常高壓,例如一啟動突波時,該驅動電路30控制該開關Q形成開路,以斷開該輸入電源VIN及該電子裝置40間之電性連接,避免該輸入電源的異常高壓進入該電子裝置,達到保護該電子裝置40不受異常高壓損壞之目的。The surge protection circuit is a circuit that is generally provided by the electronic device in order to avoid an abnormal high voltage when the input power of the electronic device 40 generates an abnormal high voltage, for example, a start surge, and the abnormal high voltage directly enters the electronic device. Cause damage. Generally, the surge protection circuit includes a switch Q and a driving circuit 30. The switch Q is electrically connected between the input power source VIN and the electronic device 40, and has a control terminal. The driving circuit 30 is electrically connected to the circuit. The input power source VIN and the control terminal of the switch Q receive an input voltage and drive the switch Q according to the input voltage. When the input power source VIN generates a normal operating voltage, the driving circuit 30 controls the switch Q to be turned on, so that the electronic device 40 accepts the input voltage to operate; when the input power source VIN generates an abnormal high voltage, for example, a start surge The driving circuit 30 controls the switch Q to form an open circuit to disconnect the electrical connection between the input power source VIN and the electronic device 40 to prevent abnormal high voltage of the input power source from entering the electronic device, so as to protect the electronic device 40. Subject to abnormal high voltage damage.

由於該驅動電路30一般來說係由複數驅動開關組成,也就是說,該突波保護電路的運作機制包含複數個開關的交互動作,且每個驅動開關有各自的反應時間,因此從該輸入電源產生異常高壓,至該突波保護電路做動並切斷該輸入電源VIN及該負載電40路的導通,需要一特定的總反應時間,當驅動開關的數量越多時,該總反應時間也會越長。在該總反應時間內,該電子裝置40有可能已受該異常電壓的進入而導致損壞。因此,現有的突波保護電路勢必須進行進一步的改良。Since the driving circuit 30 is generally composed of a plurality of driving switches, that is, the operating mechanism of the surge protection circuit includes the interaction of a plurality of switches, and each of the driving switches has a respective reaction time, so from the input The power supply generates an abnormally high voltage. When the surge protection circuit operates and cuts off the input power supply VIN and the conduction of the load power 40, a specific total reaction time is required. When the number of the drive switches is increased, the total reaction time is obtained. It will be longer. During the total reaction time, the electronic device 40 may have been damaged by the entry of the abnormal voltage. Therefore, the existing surge protection circuit must be further improved.

有鑑於現有的驅動電路在輸入電源產生一高壓突波時,須要一較長的反應時間才能將該開關截止,使得透過該開關連接該輸入電源的負載電路在開關截止之前可能已受該高壓突波通入而損壞,本發明提供一種具及時開關截止迴路的突波保護電路,包含有一電源輸入端、一負載連接端、一第一開關、一電容、一第一電阻、一第二電阻。其中,該電源輸入端係供電連接至該輸入電源,且該負載連接端係供電連接至該負載電路;該第一開關電連接於該電源輸入端及該負載連接端之間,且該開關具有一第一控制端,該電容電連接於該電源輸入端及該第一開關的第一控制端之間,該第一電阻電連接於該第一開關的控制端及一接地端之間,該第二電阻電連接於該電源輸入端及該接地端之間。In view of the fact that the existing driving circuit generates a high voltage surge at the input power source, it takes a long reaction time to turn off the switch, so that the load circuit connected to the input power source through the switch may have been subjected to the high voltage before the switch is turned off. The invention provides a surge protection circuit with a timely switch-off circuit, comprising a power input terminal, a load connection terminal, a first switch, a capacitor, a first resistor and a second resistor. The power input terminal is electrically connected to the input power source, and the load connection end is connected to the load circuit; the first switch is electrically connected between the power input end and the load connection end, and the switch has a first control terminal, the capacitor is electrically connected between the power input end and the first control end of the first switch, the first resistor is electrically connected between the control end of the first switch and a ground end, The second resistor is electrically connected between the power input end and the ground.

當該輸入電源產生一高壓突波時,利用該電容及該第一電阻形成一微分電路,當該第一開關的第一控制端形成一電壓突波,該電容兩端的跨壓接近0V,電容兩端等同短路,使得該第一開關迅速截止,因此達到避免該高壓突波通過該第一開關進入該負載電路導致該負載電路的損壞之目的。When the input power source generates a high voltage surge, the capacitor and the first resistor form a differential circuit. When the first control terminal of the first switch forms a voltage surge, the voltage across the capacitor is close to 0V, and the capacitor The two ends are equally short-circuited, so that the first switch is quickly turned off, so that the purpose of avoiding damage of the high-voltage surge wave entering the load circuit through the first switch is achieved.

請參閱圖1所示,本發明的具及時開關截止迴路的突波保護電路係供電連接於一輸入電源VIN及一負載電路20之間,該具及時開關截止迴路的突波保護電路包含有一電源輸入端I/P、一負載連接端O/P、一第一開關Q1、一電容C、一第一電阻R1、一第二電阻R2。其中,該電源輸入端I/P係供電連接該輸入電源VIN,該負載連接端O/P係供電連接該負載電路20。Referring to FIG. 1 , the surge protection circuit with a timely switch-off circuit is connected between an input power supply VIN and a load circuit 20 , and the surge protection circuit with a timely switch-off circuit includes a power supply. The input terminal I/P, a load connection terminal O/P, a first switch Q1, a capacitor C, a first resistor R1, and a second resistor R2. The power input terminal I/P is connected to the input power source VIN, and the load connector O/P is connected to the load circuit 20.

該開關Q1電連接於該電源輸入端I/P及該負載連接端O/P之間,且具有一第一控制端,該電容C電連接於該電源輸入端I/P及該第一開關Q1的第一控制端之間;該第一電阻R1電連接於該第一開關Q1的第一控制端及一接地端之間,且該第二電阻R2電連接於該電源輸入端I/P及該接地端之間。The switch Q1 is electrically connected between the power input terminal I/P and the load connection terminal O/P, and has a first control terminal. The capacitor C is electrically connected to the power input terminal I/P and the first switch. The first resistor R1 is electrically connected between the first control terminal of the first switch Q1 and a ground terminal, and the second resistor R2 is electrically connected to the power input terminal I/P. And between the ground terminals.

當該輸入電源VIN提供一穩定電壓時,例如一穩定之工作電壓時,該第二電阻R2兩端之跨壓等同輸入VIN之電壓,且該電容C等同開路,也就是說,該第一電阻R1的跨壓為零,因此該電容C在該電源輸入端I/P及該第一開關Q1的第一控制端間形成一穩定之跨壓,使得該第一開關Q1導通該電源輸入端I/P及該負載連接端O/P;當該輸入電源VIN的電壓快速上升,使得該電源輸入端I/P在短時間內迅速升高時,由於該電容C無法透過該第一電阻R1及時的充電,該電容C上之電壓無法產生突然之變化,在該輸入電源快速升高時的一瞬間該電容C兩端等同於短路,該電容C兩端之跨壓為零,使得該第一開關Q1在該電壓突波發生時及時截止,並在該電源輸入端I/P及該負載連接端O/P間形成一開路,及時地避免該電壓突波進入負載電路20。進一步來說,該電容C與該第一電阻R1形成一微分電路,當該電源輸入端I/P的電壓快速上升時,該電容C與該第一電阻R1的連接端,也就是該第一開關Q1的第一控制端因此產生一電壓突波,使得該電容C兩端的跨壓接近零,因此使得該第一開關Q1在該電源輸入端I/P迅速上升時迅速地及時截止。When the input power supply VIN provides a stable voltage, for example, a stable operating voltage, the voltage across the second resistor R2 is equivalent to the voltage of the input VIN, and the capacitor C is equivalent to an open circuit, that is, the first resistor The voltage across R1 is zero, so that the capacitor C forms a stable voltage across the power input terminal I/P and the first control terminal of the first switch Q1, so that the first switch Q1 turns on the power input terminal I. /P and the load connection terminal O/P; when the voltage of the input power supply VIN rises rapidly, so that the power input terminal I/P rises rapidly in a short time, since the capacitor C cannot pass through the first resistor R1 in time Charging, the voltage on the capacitor C cannot produce a sudden change. At the moment when the input power source rises rapidly, the two ends of the capacitor C are equivalent to a short circuit, and the voltage across the capacitor C is zero, so that the first The switch Q1 is turned off in time when the voltage surge occurs, and an open circuit is formed between the power input terminal I/P and the load connection terminal O/P to prevent the voltage surge from entering the load circuit 20 in time. Further, the capacitor C forms a differential circuit with the first resistor R1. When the voltage of the power input terminal I/P rises rapidly, the connection between the capacitor C and the first resistor R1 is the first The first control terminal of the switch Q1 thus generates a voltage surge such that the voltage across the capacitor C approaches zero, thus causing the first switch Q1 to quickly and timely turn off when the power input I/P rises rapidly.

請參閱圖2所示,在本發明的第一較佳實例中,該具及時開關截止迴路的突波保護電路進一步包含一驅動單元10,電連接於該電源輸入端I/P及該第一開關Q1的第一控制端之間,且該驅動單元10係透過該第一電阻R1電連接該第一開關Q1的第一控制端,且該第一電阻R1及該第二電阻R2係透過該驅動單元10電連接該接地端。Referring to FIG. 2, in the first preferred embodiment of the present invention, the surge protection circuit with a timely switch-off circuit further includes a driving unit 10 electrically connected to the power input terminal I/P and the first The first control terminal of the first switch Q1 is electrically connected to the first control terminal of the switch Q1, and the first resistor R1 and the second resistor R2 are transmitted through the first resistor R1. The drive unit 10 is electrically connected to the ground.

該驅動單元10透過該電源輸入端I/P接收該輸入電源VIN,並根據該輸入電源VIN控制該第一開關Q1。當該輸入電源VIN提供的電壓大於一第一電壓時,該驅動單元10控制該第一開關Q1導通,且當該輸入電源VIN之電壓大於一第二電壓時,開驅動單元10控制該第一開關Q1截止,使得該第一開關在該電源輸入端I/P極該負載連接端O/P間形成開路。其中,該第二電壓大於該第一電壓。The driving unit 10 receives the input power VIN through the power input terminal I/P, and controls the first switch Q1 according to the input power VIN. When the voltage supplied by the input power source VIN is greater than a first voltage, the driving unit 10 controls the first switch Q1 to be turned on, and when the voltage of the input power source VIN is greater than a second voltage, the driving unit 10 controls the first The switch Q1 is turned off, so that the first switch forms an open circuit between the power input terminal I/P pole and the load connection terminal O/P. Wherein the second voltage is greater than the first voltage.

進一步來說,當該電源輸入端I/P之電壓大於該第一電壓時,例如一正常工作電壓時,該驅動電路令該第一電阻R1及該第二電阻R2與該接地端之間導通,該電容C兩端之跨壓等同該輸入電源VIN之電壓,該第一開關Q1因此導通,該負載連接端O/P及該電源輸入端I/P間形成一通路。Further, when the voltage of the power input terminal I/P is greater than the first voltage, for example, a normal operating voltage, the driving circuit turns on the first resistor R1 and the second resistor R2 and the ground terminal. The voltage across the capacitor C is equal to the voltage of the input power supply VIN. The first switch Q1 is thus turned on, and a path is formed between the load connection terminal O/P and the power input terminal I/P.

當該電源輸入端I/P之電壓大於該第二電壓時,該驅動單元10令該第一電阻R1及該第二電阻R2與該接地端間形成一開路,使得該第二電阻R2兩端之電壓等同該輸入端I/P之電壓,該第二電阻R2兩端之跨壓為零,該電容C的兩端的電壓等同該輸入端I/P之電壓,該電容C之跨壓為零,因此該第一開關Q1截止,避免該輸入電源VIN提供該過高之電壓至該負載連接端O/P。When the voltage of the power input terminal I/P is greater than the second voltage, the driving unit 10 forms an open circuit between the first resistor R1 and the second resistor R2 and the ground terminal, so that the two ends of the second resistor R2 The voltage is equal to the voltage of the input terminal I/P, the voltage across the second resistor R2 is zero, the voltage across the capacitor C is equal to the voltage of the input terminal I/P, and the voltage across the capacitor C is zero. Therefore, the first switch Q1 is turned off to prevent the input power source VIN from supplying the excessive voltage to the load connection terminal O/P.

請參閱圖3所示,在本發明的第二較佳實例中,該具及時開關截止迴路的突波保護電路包含一第一基納二極體ZD1,該第一基納二極體ZD1具有一陽極及一陰極,該第一基納二極體ZD的該陽極連接該第一控制端,且其陰極電連接該電源輸入端I/P。Referring to FIG. 3, in a second preferred embodiment of the present invention, the surge protection circuit with a timely switch-off loop includes a first Zener diode ZD1, and the first Zener diode ZD1 has An anode and a cathode, the anode of the first Zener diode ZD is connected to the first control terminal, and a cathode thereof is electrically connected to the power input terminal I/P.

在本較佳實例中,該第一開關Q1係一P型金屬氧化物半導體場效電晶體(P-channel Metal-Oxide-Semiconductor-Field-Effect Transistor;PMOSFET),具有一閘極、一源極,一漏極,其源極電連接該電源輸入端,其漏極連接該負載連接端,其閘極係該第一控制端。In the preferred embodiment, the first switch Q1 is a P-channel Metal-Oxide-Semiconductor-Field-Effect Transistor (PMOSFET) having a gate and a source. a drain, the source of which is electrically connected to the power input end, the drain of which is connected to the load connection end, and the gate thereof is the first control end.

當該輸入電源VIN之電壓於該第一基納二極體ZD1之崩潰電壓時,例如為一正常之工作電壓,該第一基納二極體ZD1受一反向電壓而不導通,該第一基納二極體ZD1兩端之電壓等同該電容C兩端之跨壓;當該輸入電源VIN提供之電壓大於該第一基納二極體ZD1之崩潰電壓,例如一電壓漣波之高峰電壓,該第一基納二極體ZD1崩潰而導通,並鉗制該第一開關Q1的源極及閘極間的跨電壓維持在該第一基納二極體ZD1的崩潰電壓,因此避免該第一開關Q1受該高於其額定承受電壓之輸入VIN之電壓損壞。When the voltage of the input power source VIN is at a breakdown voltage of the first Zener diode ZD1, for example, a normal operating voltage, the first Zener diode ZD1 is not turned on by a reverse voltage. The voltage across the Zener diode ZD1 is equal to the voltage across the capacitor C; when the input power supply VIN provides a voltage greater than the breakdown voltage of the first Zener diode ZD1, such as a peak of voltage chopping a voltage, the first Zener diode ZD1 collapses and conducts, and clamps a voltage across the source and the gate of the first switch Q1 to maintain a breakdown voltage of the first Zener diode ZD1, thereby avoiding The first switch Q1 is damaged by the voltage of the input VIN above its rated withstand voltage.

請參閱圖4所示,在本發明的第三較佳實例中,該驅動單元10包含:一第二開關Q2、一第三開關Q3,一第二基納二極體ZD2、一第三基納二極體ZD3,一第三電阻R3、一第四電阻R4、一第五點阻R5、一第六電阻R6。其中,該第二開關Q2具有一第二控制端,且該第一電阻R1係通過該第二開關Q2電連接至該接地端,該第三開關Q3電連接於該第二開關Q2的第二控制端及該接地端之間,且該第三開關Q3具有一第三控制端。Referring to FIG. 4, in the third preferred embodiment of the present invention, the driving unit 10 includes: a second switch Q2, a third switch Q3, a second Zener diode ZD2, and a third base. The nano-diode ZD3, a third resistor R3, a fourth resistor R4, a fifth point resistor R5, and a sixth resistor R6. The second switch Q2 has a second control terminal, and the first resistor R1 is electrically connected to the ground through the second switch Q2, and the third switch Q3 is electrically connected to the second switch Q2. The control terminal and the ground terminal are connected to each other, and the third switch Q3 has a third control terminal.

該第二基納二極體ZD2具有一陽極及一陰極,該第二基納二極體ZD2的陰極連接該電源輸入端I/P,該第三電阻R3電連接於該第二基納二極體ZD2的陽極及該第二開關Q2的第二控制端之間,且該第四電阻R4電連接於該第二基納二極體ZD2的陽極及該接地端之間。The second Zener diode ZD2 has an anode and a cathode. The cathode of the second Zener diode ZD2 is connected to the power input terminal I/P, and the third resistor R3 is electrically connected to the second base. The anode of the polar body ZD2 and the second control end of the second switch Q2 are electrically connected between the anode of the second Zener diode ZD2 and the ground.

該第三基納二極體ZD3具有一陽極及一陰極,該第三基納二極體ZD3陰極電連接該電源輸入端I/P,該第五電阻R5電連接於該第三基納二極體ZD3的陽極及該第二開關Q3的第三控制端之間,且該第六電阻R6電連接於該第三基納二極體ZD3的陽極及該接地端之間。The third Zener diode ZD3 has an anode and a cathode, the third Zener diode ZD3 cathode is electrically connected to the power input terminal I/P, and the fifth resistor R5 is electrically connected to the third base The anode of the polar body ZD3 and the third control end of the second switch Q3 are electrically connected between the anode of the third Zener diode ZD3 and the ground.

在本較佳實例中,該第一電壓係該第二基納二極體ZD2的崩潰電壓,且該第二電壓係該第三基納二極體ZD3的崩潰電壓。In the preferred embodiment, the first voltage is a breakdown voltage of the second Zener diode ZD2, and the second voltage is a breakdown voltage of the third Zener diode ZD3.

在本較佳實例中,該第二開關Q2及該第三開關Q3分別係一npn型雙極性接面電晶體(npn-type Bipolar Junction Transistor;npn-type BJT),且分別具有一基極、一集極、一射極。其中,該第二開關Q2的集極連接該第一電阻R1,該第二開關Q2的射極連接該接地端,且該第二開關Q2的基極為該第二控制端;該第三開關Q3的集極連接該第二開關的第二控制端,該第三開關Q3的射極連接該接地端,且該第三開關Q3的基極為該第三控制端。In the preferred embodiment, the second switch Q2 and the third switch Q3 are respectively an npn-type Bipolar Junction Transistor (npn-type BJT), and each has a base, A set of poles, an emitter. The collector of the second switch Q2 is connected to the first resistor R1, the emitter of the second switch Q2 is connected to the ground, and the base of the second switch Q2 is the second control terminal; the third switch Q3 The collector is connected to the second control end of the second switch, the emitter of the third switch Q3 is connected to the ground, and the base of the third switch Q3 is the third control terminal.

當該輸入電源VIN的電壓大於該第一電壓且小於該第二電壓,例如係一穩定工作電壓,該輸入電源VIN的電壓小於該第三基納二極體ZD3的崩潰電壓,該第三基納二極體ZD3受一反向電壓而不導通,該第三開關Q3未受一導通電壓而不導通,因此該第三開關Q3在該第二開關Q2的第二控制端及該接地端間形成一開路。進一步來說,該輸入電源VIN的電壓大於該第二基納二極體ZD2的崩潰電壓,該第二基納二極體ZD2崩潰而導通,因此該輸入電源VIN透過該導通的第二基納二極體ZD2及該第三電阻R3提供該第二開關Q2的第二控制端一導通電壓,使得該第二開關Q2導通,進而該第二開關Q2在該第一電阻R1與該接地端間形成一通路。When the voltage of the input power source VIN is greater than the first voltage and less than the second voltage, for example, a stable operating voltage, the voltage of the input power source VIN is less than the breakdown voltage of the third Zener diode ZD3, the third base The nano-diode ZD3 is not turned on by a reverse voltage, and the third switch Q3 is not turned on by a turn-on voltage, so the third switch Q3 is between the second control end of the second switch Q2 and the ground. Form an open circuit. Further, the voltage of the input power source VIN is greater than the breakdown voltage of the second Zener diode ZD2, and the second Zener diode ZD2 collapses and is turned on, so the input power source VIN passes through the turned-on second kinner The diode ZD2 and the third resistor R3 provide a second control terminal of the second switch Q2, such that the second switch Q2 is turned on, and the second switch Q2 is between the first resistor R1 and the ground. Form a path.

由於該電容C與該第一電阻R1係串連於該電源輸入端I/P及該接地端之間,且該電容C與該第一電阻R1與該第二電阻R2並聯,也就是說,該第二電阻R2的跨壓等同於該電容C與該第一電阻R1的跨壓合,進一步來說,由於該輸入電源VIN係一穩定工作電壓,該電容C的兩端等同開路,且該第一電阻R1沒有一電流經過,因此該第一電阻R1的跨壓為零,該電容C的跨壓等於該輸入電源VIN之電壓,該第一開關Q2的閘極與源極間形成一導通跨壓,該第一開關Q1因此導通,使得該第一電源VIN的電壓透過該第一開關Q1提供至該負載連接端O/P。The capacitor C and the first resistor R1 are connected in series between the power input terminal I/P and the ground, and the capacitor C is connected in parallel with the first resistor R1 and the second resistor R2, that is, The voltage across the second resistor R2 is equivalent to the voltage across the capacitor C and the first resistor R1. Further, since the input power source VIN is a stable operating voltage, both ends of the capacitor C are equivalent to an open circuit, and the The first resistor R1 has no current passing through, so the voltage across the first resistor R1 is zero, the voltage across the capacitor C is equal to the voltage of the input power source VIN, and the gate of the first switch Q2 forms a conduction between the gate and the source. During the voltage across, the first switch Q1 is thus turned on, so that the voltage of the first power source VIN is supplied to the load connection terminal O/P through the first switch Q1.

當該輸入電源VIN的電壓大於該第二電壓,也就是說,大於該第三基納二極體ZD3的崩潰電壓,該第三基納二極體ZD3崩潰而導通,該輸入電源VIN因此通過該第三基納二極體ZD3及該第五電阻R5提供該第三開關Q3的第三控制端一導通電壓,該第三開關Q3因此在該第二開關Q2的第二控制端及該接地端間形成導通,使得該第二開關Q2的第二控制端等同電連接該接地端,該第二開關Q2因此截止,進而在該第一電阻R1與該接地端間形成一開路,該電容C兩端的電壓等同該輸入電源VIN之電壓,也就是說,該電容C在第一開關Q1的源極與閘極間的跨壓為零,該第一開關Q1因此截止而不導通。該第一開關Q1在該電源輸入端I/P及該負載連接端O/P間形成一開路,因此避免該大於該第二電壓的輸入電源VIN之電壓進入該負載電路20。When the voltage of the input power source VIN is greater than the second voltage, that is, greater than the breakdown voltage of the third Zener diode ZD3, the third Zener diode ZD3 collapses and conducts, and the input power source VIN passes through The third Zener diode ZD3 and the fifth resistor R5 provide a third control terminal-on voltage of the third switch Q3, and the third switch Q3 is therefore at the second control end of the second switch Q2 and the ground. The second control terminal of the second switch Q2 is electrically connected to the ground, and the second switch Q2 is thus turned off, thereby forming an open circuit between the first resistor R1 and the ground. The voltage at both ends is equal to the voltage of the input power source VIN, that is, the voltage across the capacitor C is zero between the source and the gate of the first switch Q1, and the first switch Q1 is thus turned off and not turned on. The first switch Q1 forms an open circuit between the power input terminal I/P and the load connection terminal O/P, thereby preventing the voltage of the input power source VIN greater than the second voltage from entering the load circuit 20.

綜上所述,該驅動單元10在該輸入電源VIN提供一大於該第一電壓的穩定工作電壓時,該驅動單元導通該第一電阻R1與該接地端,令該電容C提供該第一開關Q1的閘極及源極間一導通電壓,該第一開關Q1導通;當該輸入電源VIN的電壓大於該第二電壓時,該驅動單元10令該第一電阻R1及該接地端間形成一開路,該電容C兩端之電壓等同該輸入電源VIN之電壓,該第一開關Q1因此截止。當該輸入電源VIN的電壓突然升高時,即使該驅動單元10的反應時間無法及時截止該第一開關Q1,由於該電容C及該第一電阻R1的微分效應,使得該電容C在該第一開關Q1的第一控制端產生一電壓突波,該電容C兩端之跨壓瞬間降為零,該第一開關Q1因此快速的及時截止,避免該突然升高之輸入電壓在該驅動單元10做動之前通過該尚未截止的第一開關Q1進入該負載電路20。In summary, when the input power supply VIN provides a stable operating voltage greater than the first voltage, the driving unit turns on the first resistor R1 and the ground, so that the capacitor C provides the first switch. The first switch Q1 is turned on when the voltage of the input power source VIN is greater than the second voltage, and the driving unit 10 forms a gap between the first resistor R1 and the ground terminal. In the open circuit, the voltage across the capacitor C is equal to the voltage of the input power source VIN, and the first switch Q1 is thus turned off. When the voltage of the input power source VIN suddenly rises, even if the reaction time of the driving unit 10 cannot turn off the first switch Q1 in time, the capacitance C is in the first stage due to the differential effect of the capacitor C and the first resistor R1. The first control terminal of a switch Q1 generates a voltage surge, and the voltage across the capacitor C instantaneously drops to zero, so that the first switch Q1 is quickly turned off in time to avoid the sudden rise of the input voltage in the driving unit. The load circuit 20 is entered through the first switch Q1 that has not been turned off before the operation is performed.

請參閱圖5所示,在本發明的第四較佳實施例中,進一步包含一輸出電容Cout,該輸出電容Cout電連接於該負載連接端O/P及該接地端之間,以抑制該負載連接端O/P之高頻電壓。Referring to FIG. 5, in a fourth preferred embodiment of the present invention, an output capacitor Cout is electrically connected between the load connection terminal O/P and the ground terminal to suppress the The high frequency voltage of the load connection O/P.

在本較佳實例中,該具及時開關截止迴路的突波保護電路進一步包含一輸入二極體Din,其中該第一開關Q1、該電容C、該第二電阻R2係通過該輸入二極體Din電連接至該電源輸入端I/P,且該輸入二極體Din具有一陽極及一陰極,其中,該輸入二極體Din的陽極電連接該電源輸入端I/P,該輸入二極體Din的陰極電連接該第一開關Q1、該電容C、該第二電阻R2。In the preferred embodiment, the surge protection circuit with a timely switch-off loop further includes an input diode Din, wherein the first switch Q1, the capacitor C, and the second resistor R2 pass through the input diode Din is electrically connected to the power input terminal I/P, and the input diode Din has an anode and a cathode, wherein an anode of the input diode Din is electrically connected to the power input terminal I/P, the input diode The cathode of the body Din is electrically connected to the first switch Q1, the capacitor C, and the second resistor R2.

該輸入二極體Din提供一整流保護,當該負載電路20產生一漣波電壓時,避免該漣波電壓的高峰電壓反像進入該輸入電源VIN,或避免該電容C產生放電時,其電能反向進入該電源VIN,因此避免該輸入電源VIN損壞。The input diode Din provides a rectification protection. When the load circuit 20 generates a chopping voltage, the peak voltage of the chopping voltage is prevented from entering the input power source VIN, or the capacitor C is prevented from generating a discharge. Reverse the power supply VIN, thus avoiding damage to the input power supply VIN.

以上所述僅是本發明的較佳實施例而已,並非對本發明做任何形式上的限制,雖然本發明已以較佳實施例揭露如上,然而並非用以限定本發明,任何熟悉本專業的技術人員,在不脫離本發明技術方案的範圍內,當可利用上述揭示的技術內容做出些許更動或修飾為等同變化的等效實施例,但凡是未脫離本發明技術方案的內容,依據本發明的技術實質對以上實施例所作的任何簡單修改、等同變化與修飾,均仍屬於本發明技術方案的範圍內。The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the present invention. A person skilled in the art can make some modifications or modifications to equivalent embodiments by using the above-disclosed technical contents without departing from the technical scope of the present invention, but without departing from the technical solution of the present invention, according to the present invention. Technical Substantials Any simple modifications, equivalent changes and modifications made to the above embodiments are still within the scope of the technical solutions of the present invention.

VIN‧‧‧輸入電源VIN‧‧‧ input power

20‧‧‧負載電路20‧‧‧Load circuit

I/P‧‧‧電源輸入端I/P‧‧‧ power input

O/P‧‧‧負載連接端O/P‧‧‧ load connection

Q1‧‧‧第一開關Q1‧‧‧First switch

R1‧‧‧第一電阻R1‧‧‧first resistance

R2‧‧‧第二電阻R2‧‧‧second resistance

C‧‧‧電容C‧‧‧ capacitor

ZD1‧‧‧第一基納二極體ZD1‧‧‧First Kina diode

ZD2‧‧‧第二基納二極體ZD2‧‧‧Second Kina diode

ZD3‧‧‧第三基納二極體ZD3‧‧‧ third Kina diode

R3‧‧‧第三電阻R3‧‧‧ third resistor

R4‧‧‧第四電阻R4‧‧‧fourth resistor

R5‧‧‧第五電阻R5‧‧‧ fifth resistor

R6‧‧‧第六電阻R6‧‧‧ sixth resistor

Q2‧‧‧第二開關Q2‧‧‧Second switch

Q3‧‧‧第三開關Q3‧‧‧third switch

Cout‧‧‧輸出電容Cout‧‧‧ output capacitor

Din‧‧‧輸入二極體Din‧‧‧ input diode

30‧‧‧驅動單元30‧‧‧Drive unit

40‧‧‧電子裝置40‧‧‧Electronic devices

Q‧‧‧開關Q‧‧‧ switch

圖1係本發明具及時開關截止迴路的突波保護電路的實施例之電路示意圖。 圖2係本發明具及時開關截止迴路的突波保護電路的第一較佳實施例之電路示意圖。 圖3係本發明具及時開關截止迴路的突波保護電路的第二較佳實施例之電路示意圖。 圖4係本發明具及時開關截止迴路的突波保護電路的第三較佳實施例之電路示意圖。 圖5係本發明具及時開關截止迴路的突波保護電路的第四較佳實施例之電路示意圖。 圖6係習有技術的突波保護電路之電路示意圖。1 is a circuit diagram of an embodiment of a surge protection circuit with a timely switch-off circuit of the present invention. 2 is a circuit diagram of a first preferred embodiment of the surge protection circuit of the present invention having a timely switch-off circuit. 3 is a circuit diagram of a second preferred embodiment of the surge protection circuit of the present invention having a timely switch-off circuit. 4 is a circuit diagram showing a third preferred embodiment of the surge protection circuit of the present invention having a timely switch-off circuit. FIG. 5 is a schematic circuit diagram of a fourth preferred embodiment of the surge protection circuit of the present invention with a timely switch-off circuit. Figure 6 is a circuit diagram of a prior art surge protection circuit.

Claims (8)

一種具及時開關截止迴路的突波保護電路,係供電連接於一輸入電源及一負載電路之間,包含有:一電源輸入端,供電連接至該輸入電源;一負載連接端,供電連接至該負載電路;一第一開關,電連接於該電源輸入端及該負載連接端之間,且該開關具有一第一控制端;一電容,電連接於該電源輸入端及該第一開關的第一控制端之間;一第一電阻,電連接於該第一開關的控制端及一接地端之間;一第二電阻,電連接於該電源輸入端及該接地端之間。 A surge protection circuit with a timely switch-off circuit is connected between an input power supply and a load circuit, and includes: a power input end, the power supply is connected to the input power; and a load connection end, the power supply is connected to the a load circuit; a first switch electrically connected between the power input end and the load connection end, and the switch has a first control end; a capacitor electrically connected to the power input end and the first switch A first resistor is electrically connected between the control terminal of the first switch and a ground terminal; a second resistor is electrically connected between the power input terminal and the ground terminal. 如請求項1所述之具及時開關截止迴路的突波保護電路,進一步包含:一驅動單元,電連接於該電源輸入端,其中:當該輸入電源的電壓大於一第一電壓並小於一第二電壓時,該驅動電路控制該第一開關導通;當該輸入電源的電壓小於該第一電壓或大於該第二電壓時,該驅動電路控制該第一開關不導通。 The hop protection circuit with a timely switch-off loop as described in claim 1, further comprising: a driving unit electrically connected to the power input terminal, wherein: when the voltage of the input power source is greater than a first voltage and less than one When the voltage is two, the driving circuit controls the first switch to be turned on; when the voltage of the input power source is less than the first voltage or greater than the second voltage, the driving circuit controls the first switch to be non-conductive. 如請求項1所述之具及時開關截止迴路的突波保護電路,進一步包含:一第一基納二極體,具有一陽極及一陰極,其陽極連接該第一開關的控制端,其陰極連接該電源輸入端。 The surge protection circuit with a timely switch-off circuit according to claim 1, further comprising: a first Zener diode having an anode and a cathode, the anode of which is connected to the control end of the first switch, and the cathode thereof Connect the power input. 如請求項2所述之具及時開關截止迴路的突波保護電路,其中該驅動單元進一步包含有: 一第二開關,具有一第二控制端;其中該第一電阻係通過該第二開關電連接至該接地端;一第三開關,電連接於該第二開關的該第二控制端及該接地端之間,且具有一第三控制端;一第二基納二極體,具有一陽極及一陰極,其陰極連接該電源輸入端;一第三電阻,電連接於該第二基納二極體的陽極及該第二開關的第二控制端之間;一第四電阻,電連接於該第二基納二極體的陽極及該接地端之間;一第三基納二極體,具有一陽極及一陰極,其陰極連接該輸入電源;一第五電阻,電漣接於該第三基納二極體的陽極及該第三開關的第三控制端之間;一第六電阻,電連接於該第三基納二極體的陽極及該接地端之間;其中,該第二基納二極體的崩潰電壓小於該第三基納二極體的崩潰電壓。 The surge protection circuit of claim 2, wherein the driving unit further comprises: a second switch having a second control end; wherein the first resistor is electrically connected to the ground through the second switch; a third switch electrically connected to the second control end of the second switch Between the grounding ends and having a third control end; a second Zener diode having an anode and a cathode, the cathode of which is connected to the power input end; and a third resistor electrically connected to the second base a cathode between the anode and the second control end of the second switch; a fourth resistor electrically connected between the anode of the second base and the ground; and a third Zener diode The body has an anode and a cathode, the cathode of which is connected to the input power source; a fifth resistor is electrically connected between the anode of the third Zener diode and the third control end of the third switch; And a sixth resistor electrically connected between the anode of the third Zener diode and the ground; wherein a breakdown voltage of the second Zener diode is less than a breakdown voltage of the third Zener diode. 如請求項4所述之具及時開關截止迴路的突波保護電路,其中:該第二開關係一npn型雙極性接面電晶體,具有一基極、一集極、一射極,其中,該第二開關的集極連接該第一電阻,該第二開關的射極連接該接地端,且該第二開關的基極為該第二控制端;該第三開關係一npn型雙極性接面電晶體,具有一集極、一射極、一基極,其中,該第三開關的集極連接該第二開關的該第二控制端,該第三開關的射極連接該接地端,且該第三開關的基極為該第三控制端。 The surge protection circuit with a switch-off loop as described in claim 4, wherein: the second open relationship is an npn-type bipolar junction transistor having a base, a collector, and an emitter, wherein The collector of the second switch is connected to the first resistor, the emitter of the second switch is connected to the ground, and the base of the second switch is the second control terminal; the third open relationship is an npn-type bipolar connection The surface transistor has a collector, an emitter, and a base, wherein the collector of the third switch is connected to the second control end of the second switch, and the emitter of the third switch is connected to the ground. And the base of the third switch is the third control end. 如請求項1所述之具及時開關截止迴路的突波保護電路,其中該第一開關係一p型金屬氧化物半導體場效電晶體,具有一閘極、一源極,一漏極;其中, 該源極電連接該電源輸入端;該漏極連接該負載連接端;該閘極係該第一控制端。 The surge protection circuit of claim 1, wherein the first open relationship-p-type metal oxide semiconductor field effect transistor has a gate, a source, and a drain; , The source is electrically connected to the power input end; the drain is connected to the load connection end; the gate is the first control end. 如請求項1所述之具及時開關截止迴路的突波保護電路,進一步包含:一輸出電容,電連接於該負載電路及該接地端之間。 The surge protection circuit of claim 1, wherein the output protection capacitor is electrically connected between the load circuit and the ground. 如請求項1所述之具及時開關截止迴路的突波保護電路,進一步包含:一輸入二極體;其中,該第一開關、該電容、該第二電阻係通過該輸入二極體電連接至該電源輸入端,該輸入二極體具有一陽極及一陰極;其中,該陽極電連接該電源輸入端,該陰極電連接該第一開關、該電容、該第二電阻。 The surge protection circuit of the present invention as claimed in claim 1, further comprising: an input diode; wherein the first switch, the capacitor, and the second resistor are electrically connected through the input diode Up to the power input end, the input diode has an anode and a cathode; wherein the anode is electrically connected to the power input end, and the cathode electrically connects the first switch, the capacitor, and the second resistor.
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI717887B (en) * 2018-12-26 2021-02-01 上海艾為電子技術股份有限公司 A protection circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI717887B (en) * 2018-12-26 2021-02-01 上海艾為電子技術股份有限公司 A protection circuit

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