TW202339386A - Semiconductor protector - Google Patents
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- TW202339386A TW202339386A TW111109529A TW111109529A TW202339386A TW 202339386 A TW202339386 A TW 202339386A TW 111109529 A TW111109529 A TW 111109529A TW 111109529 A TW111109529 A TW 111109529A TW 202339386 A TW202339386 A TW 202339386A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 285
- 230000001012 protector Effects 0.000 title claims abstract description 27
- 230000005669 field effect Effects 0.000 claims description 12
- 229910044991 metal oxide Inorganic materials 0.000 claims description 12
- 150000004706 metal oxides Chemical class 0.000 claims description 12
- 238000005516 engineering process Methods 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 1
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Abstract
Description
本發明半導體保護器,具有在直流電路應用過程中負載兩端發生過載或短路時保護直流電源之功能之電子技術領域。 The semiconductor protector of the present invention is in the field of electronic technology and has the function of protecting the DC power supply when overload or short circuit occurs at both ends of the load during the application of the DC circuit.
本發明半導體保護器經過發明人搜尋相關半導體保護裝置與相關之電子保護器發明文件之結果,並沒有發現與本發明半導體保護器相同或相似技術,尤其是本發明之第一半導體與第二半導體具有串聯連接、自己保護與自鎖之功能之技術手段而能達到直流電路應用過程中,當負載兩端發生過載或短路時具有保護直流電源之功能,是為世界首創之發明,其他電路特徵皆在本發明說明書中有詳細之說明。 The inventor of the semiconductor protector of the present invention searched for relevant semiconductor protection devices and related electronic protector invention documents, and found no identical or similar technologies to the semiconductor protector of the present invention, especially the first semiconductor and the second semiconductor of the present invention. It has the technical means of series connection, self-protection and self-locking functions to achieve the function of protecting the DC power supply when overload or short circuit occurs at both ends of the load in DC circuit applications. It is the world's first invention. Other circuit features are Detailed description is provided in the specification of the present invention.
本發明之目的: Purpose of the present invention:
本發明應用第一半導體、第二半導體、第三半導體、第四半導體、第一電阻器、第二電阻器及電壓比較器,達到能在直流電路供電中發生負載過載或短路時直流電源得到保護。 The invention uses a first semiconductor, a second semiconductor, a third semiconductor, a fourth semiconductor, a first resistor, a second resistor and a voltage comparator to protect the DC power supply when overload or short circuit occurs in the DC circuit power supply. .
當負載發生短路時,本發明應用第一半導體與第二半導體能在極短之時間內執行開路動作,達到保護直流電源電路之功能及避免因負載短路而引起的各種災害。 When the load is short-circuited, the present invention uses the first semiconductor and the second semiconductor to perform an open-circuit action in a very short time, thereby achieving the function of protecting the DC power circuit and avoiding various disasters caused by the load short-circuit.
本發明之第一半導體與第二半導體為執行本發明在開機時,使負載得到直流電源之供電,在執行本發明在關機時,使負載得不到直流電源之供電。 The first semiconductor and the second semiconductor of the present invention enable the load to receive power from the DC power supply when the invention is turned on, and prevent the load from receiving power from the DC power supply when the invention is turned off.
本發明在開機時,第一半導體之導通為由第一電源供應電壓,第二半導體之導通為由第二電源供應電壓。 When the invention is turned on, the conduction of the first semiconductor is the voltage supplied by the first power supply, and the conduction of the second semiconductor is the voltage supply by the second power supply.
本發明不論在開機或關機時,為應用之需求其第二半導體可以一直保持導通狀態,此時本發明之開機或關機動作由第一半導體執行。 Regardless of whether the device is turned on or off, the second semiconductor of the invention can always remain in a conductive state according to application requirements. At this time, the power on or shutdown action of the invention is performed by the first semiconductor.
本發明有下列之特徵: The present invention has the following characteristics:
1.本發明之第一半導體與第二半導體具有串聯連接之特徵,其負責直流電源之開路與導通供電於負載。 1. The first semiconductor and the second semiconductor of the present invention have the characteristics of being connected in series, and are responsible for opening and conducting the DC power supply to supply power to the load.
2.本發明之第三半導體,其負責控制第一半導體之開路與導通動作,以達到負載兩端發生短路時保護直流電源電路之目的。 2. The third semiconductor of the present invention is responsible for controlling the opening and conducting actions of the first semiconductor to achieve the purpose of protecting the DC power circuit when a short circuit occurs at both ends of the load.
3.本發明之第四半導體,其負責控制第二半導體之開路與導通動作,以達到負載兩端發生短路時保護直流電源電路之目的。 3. The fourth semiconductor of the present invention is responsible for controlling the opening and conducting actions of the second semiconductor to achieve the purpose of protecting the DC power circuit when a short circuit occurs at both ends of the load.
4.本發明設有第一電阻器具有限制電流之功能,以防止第一半導體因為閘極過大電流而損壞第一半導體。 4. The present invention provides a first resistor with a current limiting function to prevent the first semiconductor from being damaged due to excessive gate current.
5.本發明設有第二電阻器具有限制電流之功能,以防止第二半導體因為閘極過大電流而損壞第二半導體。 5. The present invention provides a second resistor with the function of limiting current to prevent the second semiconductor from being damaged due to excessive gate current.
6.本發明設有第三半導體與電壓比較器所構成之電路具有自鎖(Inter Lock)之功能。 6. In the present invention, the circuit composed of the third semiconductor and the voltage comparator has a self-locking (Inter Lock) function.
7.本發明設有第一半導體、第三半導體與電壓比較器所構成的電路,具有第一半導體自己保護(Self Protection)之功能。 7. The present invention is provided with a circuit composed of a first semiconductor, a third semiconductor and a voltage comparator, which has the function of self protection of the first semiconductor.
8.本發明設有第二半導體、第四半導體與電壓比較器所構成的電路,具有第二半導體自己保護之功能。 8. The present invention is provided with a circuit composed of a second semiconductor, a fourth semiconductor and a voltage comparator, and has the function of self-protection of the second semiconductor.
9.本發明之第一半導體包括N通道金屬氧化半導體場效電晶體(N Channel Metal Oxide Semiconductor Field Effect Transistor,N Channel MOSFET)、絕緣閘極雙極電晶體(Insulated Gate Bipolar Transistor,IGBT)與N型電晶體(N Type Transistor)三者可以根據需求自行選用。 9. The first semiconductor of the present invention includes N Channel Metal Oxide Semiconductor Field Effect Transistor (N Channel MOSFET), Insulated Gate Bipolar Transistor (IGBT) and N The three N Type transistors (N Type Transistor) can be selected according to needs.
10.本發明之第二半導體包括N通道金屬氧化半導體場效電晶體、絕緣閘極雙極電晶體與N型電晶體三者可以根據需求自行選用。 10. The second semiconductor of the present invention includes N-channel metal oxide semiconductor field effect transistor, insulated gate bipolar transistor and N-type transistor, which can be selected according to the needs.
11.本發明之第二半導體為了應用之需求,可以用電阻感測器(Resistor Sensor)替代。 11. The second semiconductor of the present invention can be replaced by a resistor sensor (Resistor Sensor) to meet application requirements.
12.本發明之第三半導體包括N通道金屬氧化半導體場效電晶體、絕緣閘極雙極電晶體與N型電晶體三者可以根據需求自行選用。 12. The third semiconductor of the present invention includes N-channel metal oxide semiconductor field effect transistor, insulated gate bipolar transistor and N-type transistor, which can be selected according to needs.
13.本發明之第四半導體包括N通道金屬氧化半導體場效電晶體、絕緣閘極雙極電晶體與N型電晶體三者可以根據需求自行選用。 13. The fourth semiconductor of the present invention includes N-channel metal oxide semiconductor field effect transistor, insulated gate bipolar transistor and N-type transistor, which can be selected according to needs.
10:負載 10:Load
11:第一電源 11:First power supply
12:第二電源 12:Second power supply
13:第三電源 13:Third power supply
14:直流電源 14: DC power supply
15:電壓比較器之負輸入端 15: Negative input terminal of voltage comparator
16:電壓比較器之正輸入端 16: Positive input terminal of voltage comparator
17:電壓比較器之輸出端 17: Output terminal of voltage comparator
18:第一電阻器 18: First resistor
19:第二電阻器 19: Second resistor
20:電壓比較器 20: Voltage comparator
21:第一半導體 21:First Semiconductor
22:第二半導體 22:Second Semiconductor
23:第三半導體 23:Third Semiconductor
24:第四半導體 24:Fourth Semiconductor
25:電阻感測器 25: Resistance sensor
圖1本發明半導體保護器第一實施例。 Figure 1 is a first embodiment of a semiconductor protector of the present invention.
圖2本發明半導體保護器第二實施例。 Figure 2 is a second embodiment of a semiconductor protector of the present invention.
圖3本發明半導體保護器第三實施例。 Figure 3 is the third embodiment of the semiconductor protector of the present invention.
圖4本發明半導體保護器第四實施例。 Figure 4 is the fourth embodiment of the semiconductor protector of the present invention.
圖5本發明半導體保護器第五實施例。 Figure 5 is the fifth embodiment of the semiconductor protector of the present invention.
如圖1所示,為本發明半導體保護器第一實施例,自圖中可知,本發明半導體保護器包括有第一半導體21、第二半導體22、第三半導體23、第四半導體24、第一電阻器18、第二電阻器19及電壓比較器20。
As shown in FIG. 1 , it is a first embodiment of a semiconductor protector of the present invention. As can be seen from the figure, the semiconductor protector of the present invention includes a
直流電源14之正電端連接負載10之第一端,負載10之第二端連接第一半導體21之汲極D(Drain,D),第一半導體21之源極S(Source,S)連接第二半導體22之汲極D,第二半導體22之源極S連接直流電源14之負電端,其中第一半導體21與第二半導體22形成串聯連接。
The positive terminal of the
第一半導體21之閘極G(Gate,G)連接第一電阻器18之第二端與第三半導體23之汲極D,第三半導體23之源極S與第一半導體21之源極S連接,第三半導體23之閘極G連接電壓比較器20之輪出端(Output)17,第一電阻器18之第一端與電壓比較器20之正電源端連接第一電源11之正電端或第二電源12之正電端或另設電源隨其需求而定,而不予自限。
The gate G (Gate, G) of the
電壓比較器20之正輸入端(Non-inverting Input)15連接第一半導體21之源極S與第二半導體22之汲極D,電壓比較器20之負輸入端(Inverting Input)16連接第三電源13,第三電源13為電壓比較器20負輸入端16之參考電壓(Reference Voltage),電壓比較器
20之負電源端連接第二半導體22之源極S與直流電源14之負電端。
The positive input terminal (Non-inverting Input) 15 of the
第二半導體22之閘極G連接第四半導體24之汲極D與第二電阻器之第二端,第二電阻器之第一端連接第二電源12之正電端,第四半導體24之源極S連接第二半導體22之源極S,第四半導體24之閘極G連接電壓比較器20之輸出端17。
The gate G of the
如圖1所示,當負載10兩端短路時,根據第二半導體22之輸出特性曲線表(Output Characteristics)可知,當第二半導體22之汲極電流(Drain Current)上升到其相對應之汲源極電壓(Drain Source Voltage)到達高於電壓比較器20之負輸入端16之參考電壓時,電壓比較器20之輸出端17輸出一正電壓供電於第四半導體24之閘極G與第三半導體23之閘極G,此時第四半導體24之汲極D與源極S導通(Turn On),第二半導體22之汲極D與源極S開路(Turn Off),同時第三半導體23之汲極D與源極S導通,第一半導體21之汲極D與源極S開路,直流電源14不供電於短路負載10,而使直流電源14受到保護;同理,適當的選擇第二半導體22之汲極D與源極S之間的導通電壓值,配合電壓比較器20之負輸入端16之參考電壓值亦可達到過載保護之功能。
As shown in Figure 1, when both ends of the
當電壓比較器20之輸出端17輸出一正電壓供電於第四半導體24之閘極G,此時第四半導體24之汲極D與源極S導通,第二半導體22之汲極D與源極S開路,此即達成第二半導體22具有自己保護之功能。
When the
當電壓比較器20之輸出端17輸出一正電壓供電於
第三半導體23之閘極G,此時第三半導體23之汲極D與源極S導通,第一半導體21之汲極D與源極S開路,此即達成第一半導體21具有自己保護之功能。
When the
當電壓比較器20之輸出端17輸出一正電壓供電於第三半導體23之閘極G,此時第三半導體23之汲極D與源極S導通,第一電源11供電於第一電阻器18經過第三半導體23之汲極D與源極S,供電於電壓比較器20之正輸入端15,而產生自鎖之功能,使得維持電壓比較器20之輸出端17輸出一正電壓,同時因為第三半導體23之汲極D與源極S導通,致使第一半導體21之汲極D與源極S開路,而達成保護直流電源14之功能。
When the
如圖2所示,為本發明半導體保護器第二實施例,自圖中可知,其係將圖1中之第一半導體21、第二半導體22、第三半導體23與第四半導體24由N通道金屬氧化半導體場效電晶體改為絕緣閘極雙極電晶體,其他電路結構皆與圖1相同而不贅述。
As shown in Figure 2, it is a second embodiment of the semiconductor protector of the present invention. As can be seen from the figure, the
如圖2所示,當負載10兩端短路時,根據第二半導體22之輸出特性曲線表可知,當第二半導體22之集極電流(Collector Current)上升到其相對應之集射極電壓(Collector Emitter Voltage)到達高於電壓比較器20之負輸入端16之參考電壓時,電壓比較器20之輸出端17輸出一正電壓供電於第四半導體24之閘極G與第三半導體23之閘極G,此時第四半導體24之集極C與射極E導通,第二半導體22之集極C與射極E開路,同時第三半導體23之集極C與射極E導通,第一半導體21之集極C與射極E開路,直流電源14不供電於短路負載10,而使直
流電源14受到保護;同理,適當之選擇第二半導體22之集極C與射極E之間之集射極電壓值,配合電壓比較器20之負輸入端16之參考電壓值亦可達到過載保護之功能。
As shown in Figure 2, when both ends of the
當電壓比較器20之輸出端17輸出一正電壓供電於第四半導體24之閘極G,此時第四半導體24之集極C與射極E導通,第二半導體22之集極C與射極E開路,此即達成第二半導體22具有自己保護之功能。
When the
當電壓比較器20之輸出端17輸出一正電壓供電於第三半導體23之閘極G,此時第三半導體23之集極C與射極E導通,第一半導體21之集極C與射極E開路,此即達成第一半導體21具有自己保護之功能。
When the
當電壓比較器20之輸出端17輸出一正電壓供電於第三半導體23之閘極G,此時第三半導體23之集極C與射極E導通,第一電源11供電於第一電阻器18經過第三半導體23之集極C與射極E,供電於電壓比較器20之正輸入端15,而產生自鎖之功能,使得維持電壓比較器20之輸出端17輸出一正電壓,同時因為第三半導體23之集極C與射極E導通,致使第一半導體21之集極C與射極E開路,而達成保護直流電源14之功能。
When the
由上述可知,係將圖1的第一半導體21、第二半導體22、第三半導體23及第四半導體24由N通道金屬氧化半導體場效電晶體改為絕緣閘極雙極電晶體,其動作原理相同,而其負載10短路時之保護直流電源14之功能亦相同。
It can be seen from the above that the
由上述可知,圖1與圖2中之第一半導體21、第二
半導體22、第三半導體23及第四半導體24,可以由N通道金屬氧化半導體場效電晶體改為絕緣閘極雙極電晶體,亦可以將圖1與圖2中之第一半導體21、第二半導體22、第三半導體23及第四半導體24隨其需求部份改用,例如將圖1中之第一半導體21與第二半導體22由N通道金屬氧化半導體場效電晶體改為絕緣閘極雙極電晶體替代,隨其需求選用而不自限。
As can be seen from the above, the
如圖3所示,為本發明半導體保護器第三實施例,自圖中可知,其係將圖1中之第一半導體21、第二半導體22、第三半導體23與第四半導體24由N通道金屬氧化半導體場效電晶體改為N型電晶體,其他電路結構皆與圖1相同而不贅述。
As shown in Figure 3, it is the third embodiment of the semiconductor protector of the present invention. As can be seen from the figure, the
如圖3所示,當負載10兩端短路時,根據第二半導體22之輸出特性曲線表可知,當第二半導體22之集極電流(Collector Current)上升到其相對應之集射極電壓(Collector Emitter Voltage)到達高於電壓比較器20之負輸入端16之參考電壓時,電壓比較器20之輸出端17輸出一正電壓供電於第四半導體24之基極(Base,B)B與第三半導體23之基極B,此時第四半導體24之集極C與射極E導通,第二半導體22之集極C與射極E開路,同時第三半導體23之集極C與射極E導通,第一半導體21之集極C與射極E開路,直流電源14不供電於短路負載10,而使直流電源14受到保護;同理,適當之選擇第二半導體22之集極C與射極E之間之集射極電壓值,配合電壓比較器20之負輸入端16之參考電壓值亦可達到過載保護之功能。
As shown in Figure 3, when both ends of the
當電壓比較器20之輸出端17輸出一正電壓供電於
第四半導體24之基極B,此時第四半導體24之集極C與射極E導通,第二半導體22之集極C與射極E開路,此即達成第二半導體22具有自己保護之功能。
When the
當電壓比較器20之輸出端17輸出一正電壓供電於第三半導體23之基極B,此時第三半導體23之集極C與射極E導通,第一半導體21之集極C與射極E開路,此即達成第一半導體21具有自己保護之功能。
When the
當電壓比較器20之輸出端17輸出一正電壓供電於第三半導體23之基極B,此時第三半導體23之集極C與射極E導通,第一電源11供電於第一電阻器18經過第三半導體23之集極C與射極E,供電於電壓比較器20之正輸入端15,而產生自鎖之功能,使得維持電壓比較器20之輸出端17輸出一正電壓,同時因為第三半導體23之集極C與射極E導通,致使第一半導體21之集極C與射極E開路,而達成保護直流電源14之功能。
When the
由上述可知,係將圖1的第一半導體21、第二半導體22、第三半導體23及第四半導體24由N通道金屬氧化半導體場效電晶體改為N型電晶體,其動作原理相同,而其負載10短路時之保護直流電源14之功能亦相同。
It can be seen from the above that the
如圖4所示,為本發明半導體保護器第四實施例,自圖中可知,其係將圖1中之第四半導體24去除,因而第二半導體22不具有自己保護之功能,其他電路結構皆與圖1相同而不贅述。
As shown in Figure 4, it is the fourth embodiment of the semiconductor protector of the present invention. It can be seen from the figure that the
由圖4可知,因為將圖1中之第四半導體24去除,而僅用第二半導體22的汲源極電壓值做為汲極電
流的過載或短路之數據,而達到保護直流電源14之目的,同時因為將第四半導體24去除,其直流電源14供給負載10的導通與開路動作皆由第一半導體21負責,而其動作原理皆與圖1相同而不贅述。
It can be seen from FIG. 4 that because the
如圖5所示,為本發明半導體保護器第五實施例,自圖中可知,其係將圖4中之第二半導體22去除,而以電阻感測器25替代,其電阻感測器25之第一端連接第一半導體21之源極S,電阻感測器25之第二端連接電壓比較器20之負電源端,其他電路結構皆與圖4相同而不贅述。
As shown in Figure 5, it is the fifth embodiment of the semiconductor protector of the present invention. It can be seen from the figure that the
如圖5所示,自圖中可知,其係將圖4中之第二半導體22去除,而以電阻感測器25替代,取用電阻感測器25兩端之第一半導體21之汲極電流電壓降,當第一半導體21之汲極電流上升到電阻感測器25兩端電壓到達高於電壓比較器20之負輸入端16之參考電壓時,電壓比較器20之輸出端17輸出一正電壓供電於第三半導體23之閘極G,而使第三半導體23之汲極D與源極S導通,此時第一半導體21開路,而達到保護直流電源14之目的。
As shown in FIG. 5 , it can be seen from the figure that the
由上述可知,其圖1之第一半導體21、第二半導體22、第三半導體23與第四半導體24,隨其需求部份由N通道金屬氧化半導體場效電晶體改為絕緣閘極雙極電晶體或N型電晶體替代,而不自限。
It can be seen from the above that the
由上述可知,圖1、圖2、圖3、與圖4中之第一電源11、第二電源12與第三電源13為了圖式標示簡潔起見皆用點標示,而圖5則不接第二電源12,凡本行業通識之士皆知電源皆有正電端與負電端,在圖中並沒有標出,在此特别聲明。
As can be seen from the above, the
由上述動作原理與功能動作之說明可知本發明可據於實施。 From the description of the above operating principles and functional actions, it can be seen that the present invention can be implemented accordingly.
10:負載 10:Load
11:第一電源 11:First power supply
12:第二電源 12:Second power supply
13:第三電源 13:Third power supply
14:直流電源 14: DC power supply
15:電壓比較器之負輸入端 15: Negative input terminal of voltage comparator
16:電壓比較器之正輸入端 16: Positive input terminal of voltage comparator
17:電壓比較器之輸出端 17: Output terminal of voltage comparator
18:第一電阻器 18: First resistor
19:第二電阻器 19: Second resistor
20:電壓比較器 20: Voltage comparator
21:第一半導體 21:First Semiconductor
22:第二半導體 22:Second Semiconductor
23:第三半導體 23:Third Semiconductor
24:第四半導體 24:Fourth Semiconductor
Claims (10)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW111109529A TW202339386A (en) | 2022-03-16 | 2022-03-16 | Semiconductor protector |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW111109529A TW202339386A (en) | 2022-03-16 | 2022-03-16 | Semiconductor protector |
Publications (1)
Publication Number | Publication Date |
---|---|
TW202339386A true TW202339386A (en) | 2023-10-01 |
Family
ID=89856310
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW111109529A TW202339386A (en) | 2022-03-16 | 2022-03-16 | Semiconductor protector |
Country Status (1)
Country | Link |
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TW (1) | TW202339386A (en) |
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2022
- 2022-03-16 TW TW111109529A patent/TW202339386A/en unknown
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