TW201935793A - Semiconductor device - Google Patents

Abstract

The semiconductor device comprises a first semiconductor, a second semiconductor and a third semiconductor, constituting a semiconductor device that is required for an application circuit having a load overload or short-circuit protection function, and is equivalent to a single semiconductor characteristic, which avoids the damage caused by overload or short-circuit at both terminals of the load.

Description

Semiconductor device

The semiconductor device of the present invention has the protection function of overload or short circuit occurring at both ends of a load during a circuit application process, and an electronic technology field including a first semiconductor, a second semiconductor, and a third semiconductor.

As shown in Figure 1, it is an example of a battery discharge protection device, which is a Taiwan invention patent, patent number: Invention No. I583089, is a safe manual operation device, which has the following characteristics:

1. If the load 100 is short-circuited, the first semiconductor 12 is opened, and current supply is stopped to protect the battery 11.

2. To restore the normal circuit function, it is necessary to eliminate the cause of the short circuit at both ends of the load 100, and then re-power the battery 11.

Purpose of the invention:

The present invention uses the first semiconductor, the second semiconductor, the third semiconductor, and the circuit element to achieve the three-electrode feature equivalent to a single semiconductor function, and can protect the DC power supply when a load short circuit occurs during the DC power supply.

When the load is short-circuited, the application of the second semiconductor in the present invention can perform the open-circuit action of the first semiconductor in a very short period of time to achieve the function of protecting the DC power supply and avoiding various disasters caused by the load short-circuit. harm.

The present invention uses a third semiconductor to perform the reset function of the present invention, and it is not necessary to resend the DC power when the cause of the short circuit is eliminated.

The invention has the following features:

1. The first semiconductor of the present invention is responsible for supplying power to the load by turning off and on the direct current power.

2. The second semiconductor of the present invention is responsible for controlling the opening and conducting actions of the first semiconductor to achieve the purpose of protecting the DC power supply when a short circuit occurs across the load.

3. The third semiconductor of the present invention is responsible for the reset function. When the load short circuit is eliminated, it is not necessary to restart the open circuit and conduction of the DC power supply.

4. The first semiconductor of the present invention includes an N-Channel Metal Oxide Semiconductor Field Effect Transistor (N Channel MOSFET), an N-type transistor, and an insulated gate bipolar transistor. (Insulated Gate Bipolar Transistor, IGBT) The three can be selected according to their needs.

5. The second semiconductor of the present invention includes an N-type transistor, an N-channel metal oxide semiconductor field effect transistor, and an insulated gate bipolar transistor. The three semiconductors can be selected according to demand.

6. The third semiconductor of the present invention is a photo coupler, and a time control unit is provided to control the reset time.

7. The present invention may use a first resistor, a second resistor, a third resistor, a fourth resistor, and a first capacitor to form a semiconductor monomer with three-terminal characteristics for convenient application.

11‧‧‧First Semiconductor

12‧‧‧Second Semiconductor

13‧‧‧Third Semiconductor

14‧‧‧ Fourth Semiconductor

15‧‧‧Fifth Semiconductor

16‧‧‧ Sixth Semiconductor

17‧‧‧Seventh Semiconductor

21‧‧‧first resistor

22‧‧‧Second resistor

23‧‧‧Third resistor

24‧‧‧Fourth resistor

25‧‧‧first capacitor

30‧‧‧ the first end

40‧‧‧ second end

50‧‧‧ third end

60‧‧‧First switch

R‧‧‧ the main contact of the first switch

T‧‧‧First contact of the first switch

U‧‧‧ the second contact of the first switch

V‧‧‧ the third contact of the first switch

100‧‧‧ load

200‧‧‧First DC Power Supply

300‧‧‧second DC power supply

FIG. 1 shows an embodiment of a conventional battery discharge protection device.

FIG. 2 is a first embodiment of a semiconductor device according to the present invention.

FIG. 3 is a second embodiment of the semiconductor device of the present invention.

FIG. 4 is a third embodiment of the semiconductor device of the present invention.

FIG. 5 shows a fourth embodiment of the semiconductor device of the present invention.

FIG. 6 is a fifth embodiment of the semiconductor device of the present invention.

As shown in FIG. 2, this is a first embodiment of a semiconductor device according to the present invention. As can be seen from the figure, it includes a first semiconductor 11, a second semiconductor 12, a third semiconductor 13, a first resistor 21 (First Resistor, 21), Second resistor 22 (Second Resistor, 22), third resistor 23 (Third Resistor 23), fourth resistor 24 (Fourth Resistor, 24), first capacitor 25 (First Capacity, 25), first terminal 30 (First Termina, 30), second terminal 40 (SecondTerminal, 40), third terminal 50 (Third Terminal. 50), first switch 60 (First Switch, 60), load 100 (Load, 100), first Current source 200 (First DC Power Source, 200) and second DC power source 300 (Second DC Power Source, 300); the source S (Source, S) of the first semiconductor 11 is connected to the emitter E (Emitter) of the second semiconductor 12 E), the other end of the fourth resistor 24, the cathode terminal N (Cathode, N) of the third semiconductor 13, and the negative electrical terminal of the first capacitor 25, and the gate G (Gate, G) of the first semiconductor 11 is connected to the The collector C (Collector, C) of the two semiconductors 12 and the other end of the first resistor 21, one end of the first resistor 21 is connected to the first end 30; the base B (Base, B) of the second semiconductor 12 is connected to the first The emitter E of the three semiconductors 13 and one end of the fourth resistor 24, the emitter E of the second semiconductor 12 is connected to the third end 50; one end of the second resistor 22 and the first semiconductor 11 The drain D (Drain, D) is connected to the second terminal 40, the other end of the second resistor 22 is connected to the acceptor C of the third semiconductor 13, one end of the third resistor 23 is connected to the first terminal 30, and the third resistor The other end of 23 is connected to the anode terminal P (Anode, P) of the third semiconductor 13 and the positive electrical end of the first capacitor 25, and the negative electrical end of the first capacitor 25 is connected to the other end of the fourth resistor 24 and the first semiconductor 11 The source S and the emitter E of the second semiconductor 12 are connected to the third terminal 50; one end of the load 100 is connected to the positive terminal of the first DC power supply 200, and the other end of the load 100 is connected to the second terminal 40 and the first DC The negative electrical terminal of the power supply 200 and the negative electrical terminal of the second DC power supply 300 are connected to the third terminal 50. The main contact R of the first switch 60 is connected to the first terminal 30. The first contact T of the first switch 60 is connected to the first DC. The positive terminal of the power supply 200. The second contact U of the first switch 60 is neutral. The third contact V of the first switch 60 is connected to the positive terminal of the second DC power supply 300. The first semiconductor 11 is an N-channel metal. The semiconductor field effect transistor is oxidized, the second semiconductor 12 is an N-type transistor, and the third semiconductor 13 is a photocoupler.

As shown in FIG. 2, when the main contact R of the first switch 60 is turned to the first contact T, the positive electric terminal of the first DC power supply 200 is supplied to the first terminal 30 and the load 100 to the second terminal 40 at this time. The negative terminal of the first DC power source 200 is connected to the third terminal 50. At this time, the first terminal 30 supplies power to the gate G of the first resistor 21 to the first semiconductor 11 and the collector C of the second semiconductor 12, so the first The drain D and the source S of a semiconductor 11 are turned on. The first DC power source 200 supplies power to the load 100, and the third resistor 23 supplies power from the anode terminal P to the cathode terminal N of the third semiconductor 13. At this time, the third semiconductor The collector C of 13 is connected to the emitter E, so the collector C of the second semiconductor 12 is open to the emitter E. The third resistor 23 and the first capacitor 25 form a time constant circuit, which can be controlled. Third half The conducting time of the anode terminal P and the cathode terminal N of the conductor 13 is controlled by the reset time or replaced by a time controller with the same function, without limitation.

As shown in FIG. 2, when the main contact R of the first switch 60 is turned to the second contact U, the first DC power supply 200 does not supply power to the first terminal 30. At this time, the drain D of the first semiconductor 11 and the The source S is open, the first DC power source 200 does not supply power to the load 100, the collector C and the emitter E of the third semiconductor 13 are open, and the base B and the emitter E of the second semiconductor 12 have no voltage.

As shown in FIG. 2, when the main contact R of the first switch 60 is turned to the third contact V, the positive electric terminal of the second DC power source 300 supplies power to the first terminal 30 and the positive electric power of the first DC power source 200. The first terminal 30 supplies power to the load 100 to the second terminal 40, and the negative terminal of the first DC power supply 200 is connected to the third terminal 50 because the second DC power supply 300 supplies power to the first terminal 30. At this time, the first terminal 30 supplies power to the third terminal 50. A resistor 21 to the gate G of the first semiconductor 11 and the collector C of the second semiconductor 12. At this time, the drain D and the source S of the first semiconductor 11 are turned on, and the first DC power source 200 supplies power to the load 100. At the same time, the anode terminal P and the cathode terminal N of the third semiconductor 13 are powered through the third resistor 23. At this time, the emitter E and the collector C of the third semiconductor 13 are turned on, and the voltage across the fourth resistor 24 is low. The collector C and the emitter E of the second semiconductor 12 are open.

As shown in FIG. 2, when the first terminal 30 is connected to the first DC power supply 200 or the second DC power supply 300, the first DC power supply 200 supplies power to both ends of the load 100. If the two ends of the load 100 are short-circuited, it is equivalent to The positive voltage of the first DC power source 200 is supplied to the second resistor 22. At this time, the collector C and the emitter E of the second semiconductor 12 are turned on, and the voltage across the gate G and the source S of the first semiconductor 11 is low. Then, the drain D and the source S of the first semiconductor 11 are open, and the first direct current is The source 200 does not supply power to the load 100, but achieves the purpose of short-circuit protection of the first DC power source 200.

As shown in FIG. 2, when the first terminal 30 is connected to the first DC power supply 200 or the second DC power supply 300, the first DC power supply 200 supplies power to the two ends of the load 100. , Turn the main contact R of the first switch 60 to the second contact U, and then to the first contact T or the third contact V. At this time, the collector C and the emitter E of the third semiconductor 13 are turned on, and the second The voltage across the base B and the emitter E of the semiconductor 12 is low, the collector C and the emitter E of the second semiconductor 12 are open, and the gate G and the source S of the first semiconductor 11 are open. The pole D is in conduction with the source S, that is, the first DC power supply 200 supplies power to the load 100; if the main contact R of the first switch 60 is turned to the second contact U, the second DC power supply 300 is not supplied to the first terminal. 30. At this time, the first DC power source 200 does not supply power to the load 100.

As shown in FIG. 2, when the first terminal 30 is connected to the first DC power supply 200 or the second DC power supply 300, the first DC power supply 200 supplies power to both ends of the load 100. With a load of 200 currents, when the voltage drop between the drain D and the source S of the first semiconductor 11 is greater than the base-emitter on-voltage of the second semiconductor 12, the collector C and the emitter E of the second semiconductor 12 are turned on. The voltage across the gate G and the source S of the first semiconductor 11 is low, so the drain D and the source S of the first semiconductor 11 are open-circuited, and the first DC power source 200 does not supply power to the load 100, and achieves an overcurrent protection level. The purpose of a DC power supply 200.

It can be known from the above that when the main contact R of the first switch 60 is switched to the second contact U and the third contact V to switch back and forth, it is as if the first terminal 30 is connected to a positive voltage pulse and zero voltage, so the first terminal 30 is like the gate or base of a semiconductor, and the second terminal 40 is connected to a load 100 such as Like the drain or collector of a semiconductor, the third terminal 50 is connected to the negative electric terminal of the first DC power source 200 and the second DC power source 300 like the source or emitter of a semiconductor.

As shown in FIG. 3, this is a second embodiment of the semiconductor device of the present invention. As can be seen from the figure, the fourth semiconductor 14 is an N-type transistor. The fourth semiconductor 14 is substituted for the first semiconductor 11 of FIG. The collector C of the first semiconductor 11 replaces the drain D of the first semiconductor 11, the emitter E of the fourth semiconductor 14 replaces the source S of the first semiconductor 11, the base B of the fourth semiconductor 14 replaces the gate G of the first semiconductor 11, The rest of the circuit components are the same, and will not be described in detail.

As shown in FIG. 3, when the main contact R of the first switch 60 is turned to the first contact T, the positive electrical terminal of the first DC power supply 200 is supplied with power to the first terminal 30 and the load 100 to the second terminal 40. The negative terminal of the first DC power source 200 is connected to the third terminal 50. At this time, the first terminal 30 supplies power to the base B of the first resistor 21 to the fourth semiconductor 14 and the collector C of the second semiconductor 12, so the first The collector C and the emitter E of the four semiconductors 14 are turned on, and the first DC power source 200 supplies power to the load 100, and at the same time supplies the anode terminal P and the cathode terminal N of the third semiconductor 13 through the third resistor 23, and at this time the third The collector C and the emitter E of the semiconductor 13 are turned on, and the voltage across the base B and the emitter E of the second semiconductor 12 is low. Therefore, the collector C and the emitter E of the second semiconductor 12 are open.

As shown in FIG. 3, when the main contact R of the first switch 60 is turned to the second contact U, the first DC power source 200 does not supply power to the first terminal 30. At this time, the collector C of the fourth semiconductor 14 and the The emitter E is open, the first DC power source 200 is not supplying power to the load 100, the collector C and the emitter E of the third semiconductor 13 are open, and the base B and the emitter E of the second semiconductor 12 have no voltage.

As shown in FIG. 3, when the main contact R of the first switch 60 turns to the Three contacts V. At this time, the positive electric terminal of the second DC power supply 300 is supplied to the first terminal 30 and the positive electric terminal of the first DC power supply 200 is supplied to the load 100 to the second terminal 40, and the first DC power supply 200 The negative terminal is connected to the third terminal 50 because a second DC power source 300 supplies power to the first terminal 30. At this time, the first terminal 30 supplies power to the base B of the first resistor 21 to the fourth semiconductor 14 and the second semiconductor 12 At this time, the collector C of the fourth semiconductor 14 and the emitter E are turned on, and the first DC power source 200 supplies power to the load 100, and at the same time supplies the anode terminal P to the third semiconductor 13 through the third resistor 23 At the cathode terminal N, at this time, the emitter E and the collector C of the third semiconductor 13 are turned on, and the voltage across the fourth resistor 24 is low, so the collector C and the emitter E of the second semiconductor 12 are open.

As shown in FIG. 3, when the first terminal 30 is connected to the first DC power supply 200 or the second DC power supply 300, the first DC power supply 200 supplies power to both ends of the load 100. If the two ends of the load 100 are short-circuited, it is equivalent to The positive voltage of the first DC power source 200 is supplied to the second resistor 22. At this time, the collector C and the emitter E of the second semiconductor 12 are turned on, and the voltage between the base B and the emitter E of the fourth semiconductor 14 is low. Therefore, the collector C and the emitter E of the fourth semiconductor 14 are open-circuited, and the first DC power source 200 does not supply power to the load 100, but achieves the purpose of short-circuit protection of the first DC power source 200.

As shown in FIG. 3, when the first DC power source 200 or the second DC power source 300 is connected to the first terminal 30, the first DC power source 200 supplies power to both ends of the load 100. If the two ends of the load 100 are short-circuited, the cause is removed. , Turn the main contact R of the first switch 60 to the second contact U, and then to the first contact T or the third contact V. At this time, the collector C and the emitter E of the third semiconductor 13 are turned on, and the second The voltage across the base B and the emitter E of the semiconductor 12 is low, the collector C of the second semiconductor 12 is open to the emitter E, and the base B and the emitter E of the fourth semiconductor 14 are open The voltage is low, so the collector C and the emitter E of the fourth semiconductor 14 are turned on, that is, the first DC power source 200 supplies power to the load 100; if the main contact R of the first switch 60 is turned to the second contact U, the first The two DC power sources 300 do not supply power to the first terminal 30. At this time, the first DC power source 200 does not supply power to the load 100.

As shown in FIG. 3, when the first terminal 30 is connected to the first DC power supply 200 or the second DC power supply 300, the first DC power supply 200 supplies power to both ends of the load 100. If the load 100 is increased, it is increased. With a load of 200 current, when the voltage drop between the collector C and the emitter E of the fourth semiconductor 14 is greater than the base-emitter on-voltage of the second semiconductor 12, the collector C and the emitter E of the second semiconductor 12 are turned on. The voltage across the base B and the emitter E of the fourth semiconductor 14 is low, so the collector C and the emitter E of the fourth semiconductor 14 are open-circuited. The first DC power source 200 does not supply power to the load 100, and reaches the overcurrent protection level. The purpose of a DC power supply 200.

It can be known from the above that when the main contact R of the first switch 60 is switched to the second contact U and the third contact V to switch back and forth, it is as if the first terminal 30 is connected to a positive voltage pulse and zero voltage, so the first terminal 30 is like the gate or base of a semiconductor, while the second terminal 40 is connected to a load 100 like a sink or collector of a semiconductor, and the third terminal 50 is connected to the negative DC terminal of the first DC power supply 200 and the second DC power supply 300 as semiconductor Source or emitter.

As shown in FIG. 4, this is a third embodiment of the semiconductor device of the present invention. As can be seen from the figure, the fifth semiconductor 15 is an insulated gate bipolar transistor, and the fifth semiconductor 15 is substituted for the first semiconductor 11 of FIG. The collector C of the five semiconductors 15 replaces the drain D of the first semiconductor 11, the emitter E of the fifth semiconductor 15 replaces the source S of the first semiconductor 11, and the gate G of the fifth semiconductor 15 replaces the gate of the first semiconductor 11. Pole G, the remaining circuit components are the same, and will not be described in detail.

As shown in FIG. 4, when the main contact R of the first switch 60 is turned to the first contact T, the positive electrical terminal of the first DC power supply 200 is supplied to the first terminal 30 and the load 100 to the second terminal 40. The negative terminal of the first DC power source 200 is connected to the third terminal 50. At this time, the first terminal 30 supplies power to the gate G of the first resistor 21 to the fifth semiconductor 15 and the collector C of the second semiconductor 12. The collector C and the emitter E of the five semiconductors 15 are turned on. The first DC power source 200 supplies power to the load 100, and the third resistor 23 supplies power to the anode terminal P and the cathode terminal N of the third semiconductor 13. At this time, the third semiconductor The collector C and emitter E of 13 are turned on. Therefore, the collector C and the emitter E of the second semiconductor 12 are open.

As shown in FIG. 4, when the main contact R of the first switch 60 is turned to the second contact U, the first DC power source 200 does not supply power to the first terminal 30. At this time, the collectors C and The emitter E is open, the first DC power source 200 is not supplying power to the load 100, the collector C and the emitter E of the third semiconductor 13 are open, and the base B and the emitter E of the second semiconductor 12 have no voltage.

As shown in FIG. 4, when the main contact R of the first switch 60 is turned to the third contact V, the positive electric terminal of the second DC power source 300 supplies power to the first terminal 30 and the positive electric power of the first DC power source 200. The first terminal 30 supplies power to the load 100 to the second terminal 40, and the negative terminal of the first DC power supply 200 is connected to the third terminal 50 because the second DC power supply 300 supplies power to the first terminal 30. At this time, the first terminal 30 supplies power to the third terminal 50. A resistor 21 to a gate G of the fifth semiconductor 15 and a collector C of the second semiconductor 12. At this time, the collector C of the fifth semiconductor 15 is connected to the emitter E, and the first DC power source 200 supplies power to the load 100. At the same time, the third resistor 23 supplies power to the anode terminal P and the cathode terminal N of the third semiconductor 13. At this time, the emitter E and the collector C of the third semiconductor 13 are turned on, and the voltage across the fourth resistor 24 is low. Collector of two semiconductors 12 C and emitter E are open.

As shown in FIG. 4, when the first terminal 30 is connected to the first DC power supply 200 or the second DC power supply 300, the first DC power supply 200 supplies power to both ends of the load 100. If the two ends of the load 100 are short-circuited, it is equivalent to The positive voltage of the first DC power source 200 is supplied to the second resistor 22. At this time, the collector C and the emitter E of the second semiconductor 12 are turned on, and the voltage between the base B and the emitter E of the fifth semiconductor 15 is low. Therefore, the collector C and the emitter E of the fifth semiconductor 15 are open-circuited, and the first DC power source 200 does not supply power to the load 100, but achieves the purpose of short-circuit protection of the first DC power source 200.

As shown in FIG. 4, when the first terminal 30 is connected to the first DC power supply 200 or the second DC power supply 300, the first DC power supply 200 supplies power to the two ends of the load 100. , Turn the main contact R of the first switch 60 to the second contact U, and then to the first contact T or the third contact V. At this time, the collector C and the emitter E of the third semiconductor 13 are turned on, and the second The voltage across the base B and the emitter E of the semiconductor 12 is low, the collector C of the second semiconductor 12 is open to the emitter E, and the gate G and the emitter E of the fifth semiconductor 15 are open, so the collector of the fifth semiconductor 15 is open. The pole C and the emitter E are turned on, that is, the first DC power source 200 supplies power to the load 100. If the main contact R of the first switch 60 is turned to the second contact U, the second DC power source 300 is not supplied to the first terminal. 30. At this time, the first DC power source 200 does not supply power to the load 100.

As shown in FIG. 4, when the first terminal 30 is connected to the first DC power supply 200 or the second DC power supply 300, the first DC power supply 200 supplies power to both ends of the load 100. With a load of 200 currents, when the voltage drop between the collector C and the emitter E of the fifth semiconductor 15 is greater than the base-emitter on-voltage of the second semiconductor 12, the collector C and the emitter E of the second semiconductor 12 are turned on. fifth The voltage across the gate G and the emitter E of the semiconductor 15 is low, so the collector C and the emitter E of the fifth semiconductor 15 are open-circuited. The first DC power source 200 does not supply power to the load 100, and achieves the first overcurrent protection. Purpose of DC power supply 200.

It can be known from the above that when the main contact R of the first switch 60 is switched to the second contact U and the third contact V to switch back and forth, it is as if the first terminal 30 is connected to a positive voltage pulse and zero voltage, so the first terminal 30 is like the gate or base of a semiconductor, while the second terminal 40 is connected to a load 100 like a sink or collector of a semiconductor, and the third terminal 50 is connected to the negative DC terminal of the first DC power supply 200 and the second DC power supply 300 as semiconductor Source or emitter.

As shown in FIG. 5, this is a fourth embodiment of the semiconductor device of the present invention. As can be seen from the figure, the sixth semiconductor 16 is an N-channel metal oxide semiconductor field effect transistor, and the sixth semiconductor 16 is substituted for the second semiconductor 12 of FIG. 2. The drain D of the sixth semiconductor 16 replaces the collector C of the second semiconductor 12, the source S of the sixth semiconductor 16 replaces the emitter E of the second semiconductor 12, and the gate G of the sixth semiconductor 16 replaces the second semiconductor 12. Base B, the rest of the circuit composition is the same, without repeating it; its sixth semiconductor 16 replaces the second semiconductor 12 because the characteristics of the two are different, but the operation principle of the sixth semiconductor 16 and the first semiconductor 11 of FIG. 2 The same, the functions of performing the open circuit and the conducting switch are the same, which have been described in detail in FIG. 2 without further description. The present invention can select its characteristics according to requirements without limitation.

As shown in FIG. 6, it is a fifth embodiment of the semiconductor device of the present invention. As can be seen from the figure, the seventh semiconductor 17 is an insulated gate bipolar transistor, and the seventh semiconductor 17 is substituted for the second semiconductor 12 of FIG. 2. The collector C of the seventh semiconductor 17 replaces the collector C of the second semiconductor 12, the source S of the seventh semiconductor 17 replaces the emitter E of the second semiconductor 12, and the gate G of the seventh semiconductor 17 replaces the second semiconductor. The base B of 12 and the rest of the circuit composition are the same without further description; the seventh semiconductor 17 replaces the second semiconductor 12 because the characteristics of the two are different, but the operations of the seventh semiconductor 17 and the fifth semiconductor 15 of FIG. 4 The principle is the same, and the functions of performing the open circuit and the conducting switch are the same, which are described in detail in FIG. 4 and will not be repeated. The present invention can select its characteristics according to requirements without limitation.

The inventor has been engaged in electronic technology research for more than 50 years. The examples of the present invention have proved their success through experiments and implementations, and can be implemented according to them. The above-mentioned examples are merely to fully illustrate the advantages of the present invention. In the embodiments, the protection scope of the present invention is not limited thereto, and equivalent substitutions or transformations made by those skilled in the art based on the present invention are all within the protection scope of the present invention. The protection scope of the present invention is subject to the scope of patent application.

Claims (10)

A semiconductor device is characterized in that it is applied to a circuit having a load overload or short-circuit protection function. The semiconductor device includes: a first semiconductor having a drain, a source, and a gate; and a second semiconductor having A collector, an emitter, and a base; the collector of the second semiconductor is connected to the gate of the first semiconductor; the emitter of the second semiconductor is connected to the source of the first semiconductor; and a third semiconductor, It has an anode terminal, a cathode terminal, a collector and an emitter, and the emitter of the third semiconductor is connected to the base of the second semiconductor. For example, the semiconductor device according to item 1 of the patent application scope, wherein the first semiconductor includes: a drain, which is a drain of an N-channel metal oxide semiconductor field effect transistor, which may be a collector of an N-type transistor or an N-type insulation gate Collector replacement of a pole bipolar transistor; a source is the source of an N-channel metal oxide semiconductor field effect transistor, which can be the emitter of an N-type transistor or the emitter of an N-type insulated gate bipolar transistor And a gate, which is the gate of an N-channel metal oxide semiconductor field effect transistor, and can be replaced by the base of an N-type transistor or the gate of an N-type insulated gate bipolar transistor. For example, the semiconductor device of the first patent application scope, wherein the second semiconductor includes: a collector, which is an collector of an N-type transistor, which can be an N-channel metal-oxide semiconductor field effect transistor's drain or an N-type insulating gate Collector replacement of a pole bipolar transistor; an emitter is the emitter of an N-type transistor, which can be the source of an N-channel metal oxide semiconductor field effect transistor or the emitter of an N-type insulated gate bipolar transistor Substitution; and A base is the base of an N-type transistor, and can be replaced by the gate of an N-channel metal oxide semiconductor field effect transistor or the gate of an N-type insulated gate bipolar transistor. For example, the semiconductor device of the first patent application scope, wherein the third semiconductor includes: an anode terminal, which is the anode terminal of the photocoupler; a cathode terminal, which is the cathode terminal of the photocoupler; and a collector, which is the photocoupler's Collector; and an emitter, which is the emitter of the photocoupler. For example, the semiconductor device according to item 1 of the patent application chart, wherein the first semiconductor includes: a drain connected to one end and a second end of a second resistor; a source connected to a third end; And a gate connected to the collector of the second semiconductor and the other end of the first resistor. For example, the semiconductor device according to item 1 of the patent application chart, wherein the second semiconductor includes: a collector connected to the gate of the first semiconductor and the other end of the first resistor; an emitter, the emitter A pole is connected to the third end; and a base is connected to the emitter of the third semiconductor and one end of the fourth resistor. For example, the semiconductor device according to item 1 of the patent application chart, wherein the third semiconductor includes: an anode terminal connected to the other end of the third resistor and the positive terminal of the first capacitor; a cathode terminal connected to the cathode terminal; The negative terminal of the first capacitor, the other terminal of the fourth resistor, and the third terminal; A collector is connected to the other end of the second resistor; and an emitter is connected to the base of the second semiconductor and one end of the fourth resistor. For example, the semiconductor device according to items 5 and 7 of the patent application chart, wherein one end of the first resistor and one end of the third resistor are connected to the first end. For example, the semiconductor device according to items 5 and 8 of the patent application diagram, wherein the third terminal is connected to the negative terminal of the first DC power source and the negative terminal of the second DC power source, and the second terminal is connected to the positive terminal of the first DC power source. Terminal, the first terminal is connected to the positive electrical terminal of the first DC power source or the positive electrical terminal of the second DC power source. For example, the semiconductor device according to item 7 of the patent application chart, wherein the third resistor and the first capacitor constitute a time constant controller to control the time during which the anode terminal and the cathode terminal of the third semiconductor are turned on or control the time with an equivalent function. Device replacement.