CN106849926B - Wide-voltage NMOS switch control circuit - Google Patents

Wide-voltage NMOS switch control circuit Download PDF

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Publication number
CN106849926B
CN106849926B CN201710011386.XA CN201710011386A CN106849926B CN 106849926 B CN106849926 B CN 106849926B CN 201710011386 A CN201710011386 A CN 201710011386A CN 106849926 B CN106849926 B CN 106849926B
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CN
China
Prior art keywords
resistor
voltage
control circuit
circuit
power tube
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CN201710011386.XA
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Chinese (zh)
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CN106849926A (en
Inventor
卜春光
徐发洋
刘伟
韩松
郭庆
刘套
龚晶
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中国航天电子技术研究院
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Priority to CN201710011386.XA priority Critical patent/CN106849926B/en
Publication of CN106849926A publication Critical patent/CN106849926A/en
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Publication of CN106849926B publication Critical patent/CN106849926B/en

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    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • HELECTRICITY
    • H03BASIC ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08Modifications for protecting switching circuit against overcurrent or overvoltage
    • H03K17/081Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
    • H03K17/08104Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit in field-effect transistor switches

Abstract

The invention relates to a wide-voltage NMOS (N-channel metal oxide semiconductor) switch control circuit, which comprises an on-off control circuit, a high-voltage driving switch control circuit and a control circuit, wherein the on-off control circuit is used for converting an IO (input/output) control signal of a processor into an actual high-voltage driving switch control signal so as to drive the on-off control circuit and control the on-off of the whole circuit; the bootstrap voltage overvoltage protection circuit is used for preventing the overvoltage of the grid source electrode of the rear-end power tube from burning out due to overvoltage, and the bootstrap voltage undervoltage protection circuit is used for preventing the overvoltage of the grid source electrode of the rear-end power tube from burning out due to insufficient voltage, so that the rear-end power tube enters an amplification area and cannot be effectively started, and the overcurrent and overheating of the power tube are caused to burn out.

Description

Wide-voltage NMOS switch control circuit

Technical Field

The invention relates to a wide-voltage NMOS switch control circuit which has the characteristics of wide power input range, high reliability, small volume, easy realization of structure and the like and can be widely applied to application occasions needing switch control.

Background

With the development of microelectronic technology, N-channel MOSFETs show more and more significant advantages over transistors and P-channel MOSFETs in high frequency, high power and high efficiency switching applications. According to the device characteristics, a high-voltage signal relative to a source electrode is applied to the grid electrode of the N-channel MOSFET, the drain electrode and the source electrode of the N-channel MOSFET can be controlled to be effectively turned on, and the grid electrode voltage of the N-channel MOSFET is set to follow the source electrode voltage, so that the drain electrode and the source electrode of the N-channel MOSFET can be controlled to be effectively turned off.

The present invention is premised on having a high side power supply system with respect to the supply voltage, such as generating a VBOOST voltage using the isolated power supply shown in fig. 1.

Before the advent of MOSFET devices, the switch control circuit often took the form of a relay switch. The relay can fully ensure the isolation, has larger driving capability but poor reliability, and has larger limitation on the arc discharge, vibration resistance and shock resistance of the contact when in use. After electronic devices such as the MOSFET and the like appear, a part of the switch control circuit also adopts a triode, an MOS transistor and the like for switch control, but protection measures such as bootstrap voltage overvoltage and undervoltage are mostly not considered, and the circuit has a low voltage withstanding value and weak driving capability.

Disclosure of Invention

In order to solve the above problems, an object of the present invention is to provide a wide voltage NMOS switch control circuit with a wide power supply application range, a simple structure, a strong driving capability, and a high reliability, so as to satisfy the application occasions of high power and high efficiency NMOS switches.

The invention comprises the following technical scheme: a wide voltage NMOS switch control circuit comprises an on-off execution circuit, wherein the on-off execution circuit comprises a PMOS tube V1, a power tube V2, a voltage regulator tube V4, a voltage regulator tube V6, a thermistor F2 and a resistance-capacitance network; the circuit is characterized by also comprising an on-off control circuit for converting an IO control signal of the processor into an actual high-voltage driving switch control signal so as to drive the on-off control circuit and control the on-off of the whole circuit; the bootstrap voltage overvoltage protection circuit is used for preventing the gate source voltage of the rear-end power tube from being over-voltage to cause the power tube to be burnt out under the over-voltage condition, and the bootstrap voltage undervoltage protection circuit is used for preventing the gate source voltage of the rear-end power tube from being insufficient to cause the rear-end power tube to enter an amplification area and not to be effectively started to cause the power tube to be over-current and burnt out under the over-temperature condition;

the isolation control circuit is in control connection with the on-off execution circuit, and the bootstrap voltage overvoltage protection circuit and the bootstrap voltage undervoltage protection circuit are arranged between the isolation control circuit and the on-off execution circuit.

Further, isolation control circuit includes opto-coupler B1, PNP triode V8 and first resistance-capacitance network, first resistance-capacitance network includes resistance R12 and resistance R15, resistance R12's one end is connected with the controller, resistance R12's the other end with the first stitch of opto-coupler B1 is connected, opto-coupler B1's second stitch ground connection, opto-coupler B1's third stitch respectively with PNP triode V8's source electrode is connected, resistance R15 one end with PNP triode V8's base is connected, other end ground connection.

Further, the resistor R15 is a base current limiting resistor.

Further, the bootstrap voltage overvoltage protection circuit comprises an NPN triode V7, a double-sided breakdown diode V9 and a second resistance-capacitance network, wherein the second resistance-capacitance network comprises a resistor R16 and a resistor R17; the source of the NPN triode V7 is connected to one end of the resistor R16, the base of the NPN triode V7 is connected to the third pin of the double-sided breakdown-capable diode V9, the first pin and the second pin of the breakdown-capable diode V9 are both connected to the other end of the resistor R16, one end of the resistor R17 is connected between the first pin and the second pin of the resistor R16 and the breakdown-capable diode V9, and the other end of the resistor R17 is grounded.

Further, the bootstrap voltage under-voltage protection circuit comprises a comparator U1, an NPN triode V3 and a third resistance-capacitance network, wherein the third resistance-capacitance network comprises a resistor R2, a resistor R6, a resistor R3 and a resistor R7; one end of the resistor R2 is connected to the VIN input end, the other end of the resistor R2 is connected to the positive input end of the 5 th pin of the comparator U1, one end of the resistor R6 is grounded, the other end of the resistor R6 is connected to the positive input end of the 5 th pin of the comparator U1, one end of the resistor R3 is connected to V _ BOOST, the other end of the resistor R3 is connected to the negative input end of the 6 th pin of the comparator U1, one end of the resistor R7 is grounded, the other end of the resistor R7 is connected to the negative input end of the 6 th pin of the comparator U1, the output end of the 7 th pin of the comparator U1 is connected to the base of the NPN triode V3, the emitter of the NPN triode V3 is grounded, and the collector of the triode V539.

Further, the resistance-capacitance network comprises a resistor R9, a resistor R10, a resistor R11 and a resistor R13; the grid electrode of the PMOS tube V1 is connected with VIN through a resistor R13, the drain electrode of the PMOS tube V1 is connected with the grid electrode of the power tube V2 through a resistor R9, the resistor R11 and a voltage regulator V6 are connected between the grid electrode and the drain electrode of the power tube V2 in parallel, and the resistor R3538 and the voltage regulator V6 are electrically connectedA resistor R10 and a voltage regulator tube V4 are connected in parallel between the grid and the source of the PMOS tube V1, and the source of the power tube V2 and the input VINThe drain of the power tube V2 is connected with the output V through a thermistor F2OUTAnd (4) connecting.

Further, the resistor R9 and the resistor R11 are voltage dividing resistors, and the resistor R10 and the resistor R13 bootstrap the voltage dividing resistors.

Further, the thermistor F2 is a self-recovery fuse, and can play a role in system overcurrent protection.

Compared with the prior art, the invention has the following advantages:

(1) the invention provides a novel switching circuit design method aiming at the control requirement of an NMOS switch, the circuit is simple and reliable, and compared with large-volume switching equipment such as a relay, a contactor and the like, the miniaturization of the whole circuit is favorably realized;

(2) through reasonable design of the circuit, the voltage resistance of the whole system only depends on PMOS (P-channel metal oxide semiconductor) transistors, and through reasonable model selection of the PMOS transistors, the voltage resistance value of the circuit can be greatly improved, and the application range of the switch control circuit is improved;

(3) the invention fully considers the conditions of overvoltage and undervoltage of bootstrap voltage, fully ensures the normal work of the rear-end power tube and has high reliability;

(4) the circuit can realize the application occasion of multi-path switch power distribution by configuring a plurality of isolation control circuits and on-off execution circuits under the conditions of single bootstrap voltage, single bootstrap voltage overvoltage protection circuit and single undervoltage protection circuit, thereby simplifying the circuit structure and expanding the system application;

(5) the invention fully considers the system isolation, the switching speed and the overcurrent protection, and improves the system practicability.

Drawings

Fig. 1 is a schematic diagram of an application of a switch control circuit.

Fig. 2 is a schematic diagram of a wide voltage NMOS switch control circuit according to the present invention.

In the figure: i: isolation control circuit, II: bootstrap voltage overvoltage protection circuit, iii: bootstrap voltage under-voltage protection circuit, iv: and an on-off control circuit.

Detailed Description

The technical scheme of the invention is further described with reference to the accompanying drawings.

As shown in fig. 1-2, the wide voltage NMOS switch control circuit of the present invention includes an on-off execution circuit, where the on-off execution circuit includes a PMOS transistor V1, a power transistor V2, a voltage regulator transistor V4, a voltage regulator transistor V6, a thermistor F2, and a resistor-capacitor network; the circuit also comprises an isolation control circuit which is used for converting the IO control signal of the processor into an actual high-voltage driving switch control signal so as to drive the on-off control circuit and control the on-off of the whole circuit; the bootstrap voltage overvoltage protection circuit is used for preventing the gate source voltage of the rear-end power tube from being over-voltage to cause the power tube to be burnt out under the over-voltage condition, and the bootstrap voltage undervoltage protection circuit is used for preventing the gate source voltage of the rear-end power tube from being insufficient to cause the rear-end power tube to enter an amplification area and not to be effectively started to cause the power tube to be over-current and burnt out under the over-temperature condition;

the isolation control circuit is in control connection with the on-off execution circuit, and the bootstrap voltage overvoltage protection circuit and the bootstrap voltage undervoltage protection circuit are arranged between the isolation control circuit and the on-off execution circuit.

The isolation control circuit comprises an optocoupler B1, a PNP triode V8 and a resistor-capacitor network, wherein the first resistor-capacitor network comprises a resistor R12 and a resistor R15;

the bootstrap voltage overvoltage protection circuit comprises an NPN triode V7, a breakdown diode V9 and a second resistor-capacitor network, wherein the second resistor-capacitor network comprises a resistor R16 and a resistor R17;

the bootstrap voltage under-voltage protection circuit comprises a comparator U1, an NPN triode V3 and a resistance-capacitance network, wherein the resistance-capacitance network comprises a resistor R2, a resistor R6, a resistor R3 and a resistor R7;

the on-off control circuit comprises a PMOS tube V1, a resistor R10, a resistor R9, a resistor R11, a resistor R13, a voltage-regulator tube V4, voltage-regulator tubes V6, V2 and a thermistor F2, wherein the resistor R10 and the resistor R13 are bootstrap voltage divider resistors, and the voltage-regulator tube V4 is a gate-source overvoltage protection diode of the PMOS tube V1;

wherein, one end of the resistor R12 is connected with the controller, the other end is connected with the first pin of the optocoupler B1, the second pin of the optocoupler B1 is grounded, the third pin of the optocoupler B1 is connected with the base of the PNP triode V8, the collector of the PNP triode V8 is connected with the gate of the PMOS transistor V1, the resistors R10 and V4 are connected in parallel with the source and the gate of the PMOS transistor V1, one end of the resistor R15 is connected with the base of the PNP triode V8, the other end is grounded, the fourth pin of the optocoupler B1 is connected with the source of the PMOS transistor V1 and the emitter of the PNP triode V7, one end of the resistor R16 is connected with the emitter of the PNP triode V7, the base of the PNP triode V7 is connected with the third pin of the diac V9, the collector of the PNP triode V7 is connected with the gate of the PMOS transistor V1, a second pin of the diac V9 is connected to the other end of the resistor R16 and one end of the resistor R17, the other end of the resistor R17 is grounded, one end of the resistor R2 is connected to the input terminal VIN, the other end of the resistor R2 is connected to the positive input terminal of the 5 th pin of the comparator U1, one end of the resistor R6 is grounded, the other end of the resistor R6 is connected to the positive input terminal of the 5 th pin of the comparator U1, one end of the resistor R3 is connected to V _ BOOST, the other end of the resistor R3 is connected to the negative input terminal of the 6 th pin of the comparator U1, one end of the resistor R7 is grounded, the other end of the resistor R7 is connected to the negative input terminal of the 6 th pin of the comparator U1, the output terminal of the 7 th pin of the comparator U1 is connected to the base of the NPN transistor V3, the emitter of the NPN transistor V3 is grounded, and. The grid electrode of the PMOS tube V1 is connected with VIN through a resistor R13, the resistor R10 and a voltage regulator tube V4 are connected between the grid electrode and the source electrode of the PMOS tube V1 in parallel, the drain electrode of the PMOS tube V1 is connected with the grid electrode of the power tube V2 through a resistor R9, the resistor R11 and a voltage regulator tube V6 are connected between the grid electrode and the drain electrode of the power tube V2 in parallel, the source electrode of the power tube V2 is connected with VIN, and the drain electrode of the power tube V2 is connected with output VOUT through a thermistor F2.

The principle of the invention is as follows:

the optical coupler control conversion circuit is composed of a resistor R12, an optical coupler B1, a PNP triode V8 and a resistor R15, the PNP triode V8 is provided, a collector and an emitter are respectively connected to a source electrode and a grid electrode of a PMOS tube V1, the resistor R15 is a base current limiting resistor, and the optical coupler B1 controls the on-off of the emitter and the collector of the PNP triode V8 by controlling the on-off of the emitter and the base of the V8. The circuit module has low requirement on the voltage withstanding value of the output end of the optical coupler B1 through the diode clamping effect of the PNP triode V8, so that the voltage withstanding value of the module is high.

2. Bootstrap voltage overvoltage protection circuit:

the bootstrap voltage overvoltage protection circuit is composed of V7, V9, a resistor R16 and a resistor R17, the diode V9 is a double-sided breakdown diode, the V7 is a PNP triode, the resistor R16 and the resistor R17 are reasonably selected to divide the resistance values, the V9 can be broken down when the bootstrap voltage is in overvoltage, so that the V7 collector and the transmitter are conducted, the rear-end PMOS tube V1 is ensured to be in a closed state, and the rear-end power tube V2 is ensured to be turned off.

3. Bootstrap voltage undervoltage protection circuit:

the bootstrap voltage under-voltage protection circuit mainly comprises a voltage division network circuit, a comparator circuit, a logic inversion circuit and the like. The resistor R2, the resistor R6, the resistor R3 and the resistor R7 form a voltage division network, the U1 detects the bootstrap voltages VBOOST and VIN by using a comparator chip, and when the bootstrap voltage exceeds the VIN voltage by more than 6V, 7 pins are pulled down, so that the base of the NPN triode V3 is controlled to be low. The resistors R1 and V3 jointly form an OC output logic inverter, so that the output of V3 is at a low level in the power-on process of a system, the output of V3 is at a high-impedance state after bootstrap voltage bootstrap succeeds, the base of V7 is controlled, the PMOS tube V1 is turned off when the bootstrap voltage does not reach a normal value, and the control right is released after the bootstrap voltage bootstrap succeeds to control the switch of a rear-stage power tube by other control circuits.

Meanwhile, the resistor end of the resistor R13 is connected with the input power supply voltage, so that the PMOS tube V1 cannot be opened when the bootstrap voltage is lower than the input voltage.

4. The on-off control circuit:

the on-off control circuit consists of a PMOS tube V1, a resistor R10, a voltage regulator tube V4 and a resistor R13, wherein the resistor R10 and the resistor R13 are bootstrap voltage divider resistors, and V4 is a grid-source overvoltage protection diode of V1. Analysis shows that the reasonable selection of the high-voltage-withstanding PMOS transistor V1 can significantly improve the voltage withstanding value of the circuit.

Meanwhile, a resistor R9, a resistor R11, a voltage regulator tube V6, a power tube V2 and a thermistor F2 are rear-end circuit protection devices, a resistor R9 and a resistor R11 are divider resistors, and a V6 is a gate-source overvoltage protection diode of the power tube V2. F2 is self-restoring fuse, which can protect the system from overcurrent.

In conclusion, the voltage withstanding of the circuit can be remarkably improved and the adaptability range of the power supply can be improved through reasonable circuit design. The invention fully considers isolation, bootstrap overvoltage, undervoltage protection and overcurrent protection, and greatly improves the application reliability of the system. The invention can be used in parallel in multiple paths under the condition of single bootstrap voltage, can be applied to occasions for power distribution of multiple switches, and improves the practicability. The invention is not described in detail and is within the knowledge of a person skilled in the art.

Claims (7)

1. A wide voltage NMOS switch control circuit comprises an on-off execution circuit, wherein the on-off execution circuit comprises a PMOS tube V1, a power tube V2, a voltage regulator tube V4, a voltage regulator tube V6, a thermistor F2 and a resistance-capacitance network; the circuit further comprises: an isolation control circuit, a bootstrap voltage overvoltage protection circuit and a bootstrap voltage undervoltage protection circuit,
the isolation control circuit is used for converting an IO control signal of the processor into an actual high-voltage driving switch control signal so as to drive the on-off execution circuit and control the on-off of the whole circuit;
the bootstrap voltage overvoltage protection circuit is used for preventing the gate-source voltage overvoltage of the back-end power tube from causing the overvoltage burnout of the power tube, and comprises:
the bootstrap voltage under-voltage protection circuit is used for preventing the back-end power tube from entering an amplification region and being incapable of being effectively started due to insufficient gate-source voltage of the back-end power tube, so that the power tube is over-current and overheated to be burnt;
the isolation control circuit is in control connection with the on-off execution circuit, and the bootstrap voltage overvoltage protection circuit and the bootstrap voltage undervoltage protection circuit are arranged between the isolation control circuit and the on-off execution circuit; the bootstrap voltage overvoltage protection circuit is characterized by comprising an NPN triode V7, a double-sided breakdown diode V9 and a second resistance-capacitance network, wherein the second resistance-capacitance network comprises a resistor R16 and a resistor R17; the source of the NPN triode V7 is connected to one end of the resistor R16, the base of the NPN triode V7 is connected to the third pin of the double-sided diac V9, the first pin and the second pin of the diac V9 are both connected to the other end of the resistor R16, and one end of the resistor R17 is connected between the resistor R16 and the first pin and the second pin of the double-sided diac V9.
2. The control circuit of claim 1, wherein the isolation control circuit comprises an optocoupler B1, a PNP triode V8 and a first resistor-capacitor network, the first resistor-capacitor network comprises a resistor R12 and a resistor R15, one end of the resistor R12 is connected with a controller, the other end of the resistor R12 is connected with a first pin of the optocoupler B1, a second pin of the optocoupler B1 is grounded, a third pin of the optocoupler B1 is respectively connected with an emitter of the PNP triode V8, one end of the resistor R15 is connected with a base of the PNP triode V8 and the other end of the resistor R15 is grounded, and a collector of the PNP triode V8 is connected with a source of a PMOS tube V1.
3. The control circuit of claim 2, wherein the resistor R15 is a base current limiting resistor.
4. The control circuit of claim 1, wherein the bootstrap undervoltage protection circuit comprises a comparator U1, an NPN transistor V3, and a third resistor-capacitor network, the third resistor-capacitor network comprising a resistor R2, a resistor R6, a resistor R3, and a resistor R7; one end of the resistor R2 is connected to the VIN input end, the other end of the resistor R2 is connected to the 5 th pin positive input end of the comparator U1, one end of the resistor R6 is grounded, the other end of the resistor R6 is connected to the positive input end of the comparator U1, one end of the resistor R3 is connected to V _ BOOST, the other end of the resistor R3 is connected to the negative input end of the comparator U1, one end of the resistor R7 is grounded, the other end of the resistor R7 is connected to the 6 th pin negative input end of the comparator U1, the 7 th pin output end of the comparator U1 is connected to the base of the NPN triode V3, the emitter of the triode NPN V3 is grounded, and the collector of the NPN triode V3 is connected to the base of the NPN triode.
5. The control circuit of claim 1, wherein the resistor-capacitor network comprises a resistor R9, a resistor R10, a resistor R11, and a resistor R13; the grid of the PMOS tube V1 passes through a resistor R13 and an input VINThe drain electrode of the PMOS tube V1 is connected with the grid electrode of the power tube V2 through a resistor R9, the resistor R11 and the voltage-regulator tube V6 are connected between the grid electrode and the drain electrode of the power tube V2 in parallel, the resistor R10 and the voltage-regulator tube V4 are connected between the grid electrode and the source electrode of the PMOS tube V1 in parallel, and the source electrode and the input V2 of the power tube V are connected with the grid electrode of the power tube V2 in parallelINThe drain of the power tube V2 is connected with the output V through a thermistor F2OUTAnd (4) connecting.
6. The control circuit of claim 5, wherein the resistor R9 and the resistor R11 are voltage dividing resistors, and the resistor R10 and the resistor R13 bootstrap voltage dividing resistors.
7. The control circuit of claim 5, wherein the thermistor F2 is a self-recovery fuse and can be used for system overcurrent protection.
CN201710011386.XA 2017-01-06 2017-01-06 Wide-voltage NMOS switch control circuit CN106849926B (en)

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