TWI636593B - Method of manufacturing semiconductor light emitting device - Google Patents

Method of manufacturing semiconductor light emitting device Download PDF

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TWI636593B
TWI636593B TW104102547A TW104102547A TWI636593B TW I636593 B TWI636593 B TW I636593B TW 104102547 A TW104102547 A TW 104102547A TW 104102547 A TW104102547 A TW 104102547A TW I636593 B TWI636593 B TW I636593B
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abs
substrate
hardening
thickness
emitting device
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TW201601352A (zh
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吉川岳
高島正之
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住友化學股份有限公司
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52Encapsulations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/293Organic, e.g. plastic
    • H01L23/296Organo-silicon compounds
    • HELECTRICITY
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    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
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    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48237Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a die pad of the item
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
    • H01L2933/005Processes relating to semiconductor body packages relating to encapsulations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/483Containers
    • H01L33/486Containers adapted for surface mounting

Abstract

本發明係含有作為構成構件之基板、元件及封裝材料的半導體發光裝置之製造方法,其係含有以下步驟,將元件設置於基板的第1步驟,將硬化前之封裝材料以覆蓋元件方式,封裝(potting)於基板上的第2步驟,在硬化後之厚度t[mm]之封裝材料所具有之380nm、316nm及260nm之各波長之吸光度,分別為AbsA(t)、AbsB(t)及AbsC(t),380nm之光的透過率為T(t)時,使被封裝的封裝材料以滿足下述式(1)、(2)及(3)全部的方式予以硬化的第3步驟,(1) T(1.7)≧90%
(2) AbsB(t)-AbsA(t)<0.011t
(3) AbsC(t)-AbsA(t)<0.125t。

Description

半導體發光裝置之製造方法
本發明係有關半導體發光裝置之製造方法。
半導體發光裝置之製造方法,例如有包含將元件設置於基板的步驟,將硬化前之封裝材料以覆蓋元件方式,封裝於基板上的步驟及使被封裝之硬化前之封裝材料硬化的步驟所構成之元件之封裝的製造方法已為人知(非專利文獻1)。
先前技術文獻 非專利文獻
非專利文獻1:東麗道康寧公司「Electronics-Silicone-Catalog」2010年10月發行、Internet<URL:http://www.dowcorning.co.jp/ja_JP/content/japan/japanproducts/Electronics-Silicone-Catalog2010.pdf>
「發明概要」
但是以往之製造方法因封裝材料所具有之紫外光、特別是UV-C(200-280nm)區域之吸光度大,且因被吸收之紫外光而封裝材料之產生劣化,因此,含有放射此區域之紫外光之元件的半導體發光裝置之製造時,不一定適合。
本發明包含以下〔1〕~〔7〕記載的發明。
〔1〕一種半導體發光裝置之製造方法,其係含有作為構成構件之基板、元件及封裝材料的半導體發光裝置之製造方法,其係含有以下步驟,將元件設置於基板的第1步驟,將硬化前之封裝材料以覆蓋元件方式,封裝於基板上的第2步驟,在硬化後之厚度t[mm]之封裝材料所具有之380nm、316nm及260nm之各波長之吸光度,分別為AbsA(t)、AbsB(t)及AbsC(t),380nm之光的透過率為T(t)時,使被封裝的封裝材料以滿足下述式(1)、(2)及(3)全部的方式予以硬化的第3步驟,(1)T(1.7)≧90%
(2)AbsB(t)-AbsA(t)<0.011t
(3)AbsC(t)-AbsA(t)<0.125t。
〔2〕如前述〔1〕項之製造方法,其中式(3)為下述式(3’),(3’)AbsC(t)-AbsA(t)<0.09t。
〔3〕如前述〔1〕或〔2〕項之製造方法,其中t超過元件之厚度[mm],且2以下。
〔4〕如前述〔1〕~〔3〕項中任一項之製造方法,其中紅外線分光測量第2步驟所用之硬化前之封裝材料所含有的原料時之波數1269cm-1、3300cm-1、1016cm-1及1090cm-1之吸光度,分別為a、b、c及d時,滿足下述式(4)及(5)全部,(4)0.6<d/c<0.8
(5)0<b/a<0.4。
〔5〕如前述〔1〕~〔4〕項中任一項之製造方法,其中封裝材料含有聚縮合型封裝材料。
〔6〕一種半導體發光裝置,其係藉由前述〔1〕項之製造方法所製造的半導體發光裝置,硬化後之厚度t[mm]之封裝材料所具有之380nm、316nm及260nm之各波長的吸光度,分別為AbsA(t)、AbsB(t)及AbsC(t),380nm之光的透過率為T(t)時,滿足下述式(1)、(2)及(3)全部,(1)T(1.7)≧90%
(2)AbsB(t)-AbsA(t)<0.011t
(3)AbsC(t)-AbsA(t)<0.125t。
〔7〕如前述〔6〕項之半導體發光裝置,其中元件為放射UV-C(200-280nm)區域之光的元件。
藉由本發明之製造方法,可得到紫外光、特別是UV- C(200-280nm)區域之光取出效率佳,封裝材料之劣化小的半導體發光裝置。
1‧‧‧封裝材料
2‧‧‧基板
3‧‧‧元件
4‧‧‧電極
5‧‧‧元件之厚度[mm]
6‧‧‧封裝材料之厚度t[mm]
7‧‧‧導線配線
圖1係藉由本發明之製造方法所得之覆晶((flip chip))型且COB型半導體發光裝置之模式圖。
圖2係藉由本發明之製造方法所得之面向上(Face Up)型且SMD型半導體發光裝置之模式圖。
圖3係實施例,改變厚度t測量硬化物之AbsB(t)-AbsA(t)的結果圖。
圖4係實施例,改變厚度t測量硬化物之AbsC(t)-AbsA(t)的結果圖。
實施發明之形態
以下,詳細說明本發明。藉由本發明之製造方法所得之半導體發光裝置,包含作為構成構件之基板、元件及封裝材料。
<基板>
基板只要是一般作為半導體發光裝置之基板使用者即可,可使用例如尼龍、環氧、液晶聚合物(LCP)等的樹脂、氧化鋁、氮化鋁、LTCC等之陶瓷所構成者。特別是使用放射紫外光的元件時,為了抑制基板之著色劣化,大 多使用陶瓷。形狀可使用如圖1,將元件設置於平面基板上者,如圖2,為了提高光取出效率,而再設置反光鏡者等。
基板通常施予為了與搭載之元件以電連接用的電極。
<元件>
元件例如一般作為半導體發光元件使用者即可,例如一般被稱為LED之藍色發光二極體、紅色發光二極體、綠色發光二極體、白色發光二極體、紫外線發光二極體。此等LED可使用例如在藍寶石、氮化鋁等之上,藉由MOCVD法使AlInGaP、InGaN、AlGaN等之III-V族半導體成長者。360nm以下之紫外光發光用之元件所含有的半導體,較佳為使用AlGaN。元件係在一片基板上設置一個至複數個。元件之設置可使用使MOCVD成長面朝向基板側之覆晶方式或逆向之面向上方式。覆晶方式時,藉由焊接(solder)以電連接基板上之電極。面向上方式則是使用金等之導線(wire)配線來連接。紫外LED由光取出的觀點,大多採用覆晶方式。
<封裝材料>
本發明中,封裝材料通常包含選自由加成聚合型封裝材料及聚縮合型封裝材料所成群之至少1種的封裝材料。加成聚合型係指藉由將氫矽烷基(hydrosilyl)於碳間雙鍵加成反應進行聚合的封裝材料。聚縮合型係指將與矽原子鍵 結的羥基及與另外的矽原子鍵結的烷氧基或羥基,伴隨脫醇或脫水進行聚縮合的封裝材料。
由紫外光/可見光透過率的觀點,含有聚縮合型封裝材料較佳。聚縮合型封裝材料實質上不含鍵結力較弱的碳-碳鍵,故由紫外光所造成之劣化的觀點較佳。含有2種以上之封裝材料時,將彼等混合可用於後述的第2步驟。例如可包含下述步驟,階段性使用,亦即,將硬化前之第1種的封裝材料以覆蓋元件而封裝於基板上的第2步驟、使被封裝之硬化前之第1種封裝材料硬化的第3步驟、使硬化前之第2種封裝材料方裝於覆蓋元件之硬化後之第1種封裝材料之上,使被封裝之硬化前之第2種封裝材料硬化,層合封裝材料之步驟。
硬化前之封裝材料所含的原料以紅外線分光測量時之波數1269cm-1、3300cm-1、1016cm-1及1090cm-1之吸光度分別為a、b、c及d時,較佳為滿足下述式(4)及(5)全部。
(4)0.6<d/c<0.8
(5)0<b/a<0.4
在此,硬化前之封裝材料所含的原料係指例如封裝材料含有2種以上的封裝材料時,通常指含有最多的封裝材料,此滿足上述式(4)及(5)全部即可,但是使用之封裝材料滿足上述式(4)及(5)全體為佳。
硬化前之封裝材料各自在後述第2步驟中,為了封裝容易,因此溶解於溶劑來使用較佳。此時,所得之溶液在 25℃的黏度調整為10mPa.s至10000mPa.s即可。
溶劑只要是可分別溶解使用之硬化前的封裝材料者即可,例如有丙酮、甲基乙基酮等之酮溶劑;甲醇、乙醇、異丙醇、正丙醇等之醇溶劑;己烷、環己烷、庚烷、苯等之烴溶劑;乙酸甲酯、乙酸乙酯等之乙酸酯溶劑;二乙基醚、四氫呋喃等之醚溶劑;乙二醇單甲基醚、乙二醇單乙基醚、乙二醇單異丙基醚、乙二醇單丁基醚、乙二醇單己基醚、乙二醇單乙基己基醚、乙二醇單苯基醚、乙二醇單苄基醚、二乙二醇單甲基醚、二乙二醇單乙基醚、二乙二醇單異丙基醚、二乙二醇單丁基醚、二乙二醇單己基醚、二乙二醇單乙基己基醚、二乙二醇單苯基醚、二乙二醇單苄基醚、丙二醇單甲基醚、丙二醇單乙基醚、丙二醇單異丙基醚、丙二醇單丁基醚、丙二醇單己基醚、丙二醇單乙基己基醚、丙二醇單苯基醚、丙二醇單苄基醚、二丙二醇單甲基醚、二丙二醇單乙基醚、二丙二醇單異丙基醚、二丙二醇單丁基醚、二丙二醇單己基醚、二丙二醇單乙基己基醚、二丙二醇單苯基醚、二丙二醇單苄基醚等之乙二醇醚溶劑;乙二醇單乙基醚乙酸酯、乙二醇單異丙基醚乙酸酯、乙二醇單丁基醚乙酸酯、乙二醇單己基醚乙酸酯、乙二醇單乙基己基醚乙酸酯、乙二醇單苯基醚乙酸酯、乙二醇單苄基醚乙酸酯等將乙酸基加成於前述記載之乙二醇醚溶劑的乙二醇酯溶劑。
上述封裝材料例,例如含有具有式(I)表示之有機聚矽氧烷結構之樹脂A的封裝材料。此封裝材料在25℃下為 固體較佳。
(式中,R1各自獨立表示烷基,R2各自獨立表示烷氧基、烯基、氫原子、或羥基,P1、q1、a1、及b1表示[p1+b1×q1]:[a1×q1]=1:0.25~9的正數)。
此外,含有具有式(II)表示之有機聚矽氧烷結構之寡聚物B,而樹脂A與寡聚物B之混合比率,更佳為樹脂A:寡聚物B=100:0.1~20(質量比)。藉由以樹脂A為主成分,可抑制因紫外光所造成的劣化,或具有提高耐熱性的效果。
(式中,R1及R2表示與前述式(I)相同意義,p2、q2、r2、a2、及b2表示[a2×q2]/[(p2+b2×q2)+a2×q2+(r2+q2)]=0~0.3之0以上的數)。
以R1表示之烷基,可為直鏈狀,也可為支鏈狀,也可具有環狀結構,但是較佳為直鏈狀或支鏈狀之烷基,更佳為直鏈狀之烷基。該烷基之碳數無特別限定,較佳為1~10、更佳為1~6、又更佳為1~3、特佳為1。
R2各自獨立表示烷氧基、烯基、氫原子、或羥基,較佳為表示烷氧基或羥基。
R2為烷氧基時,該烷氧基可為直鏈狀,也可為支鏈狀,也可具有環狀結構,但是較佳為直鏈狀或支鏈狀之烷氧基,更佳為直鏈狀之烷氧基。該烷氧基之碳數無特別限定,較佳為1~3、更佳為1~2、特佳為1。
R2為烯基時,該烯基可為直鏈狀,也可為支鏈狀,也可具有環狀結構,但是較佳為直鏈狀或支鏈狀之烯基,更佳為直鏈狀之烯基。該烯基之碳數無特別限定,較佳為2~4。以R1表示之烯基,具體而言,較佳為乙烯基(Ethenyl)、烯丙基(2-丙烯基)、1-丙烯基、異丙烯基、丁烯基,更佳為乙烯基。
複數之R1及R2各自可為同種之基,也可互為不同之基。
樹脂A係R1為具有選自由甲基及乙基所成群之1種以上,且R2為具有選自由甲氧基、乙氧基、異丙氧基、及羥基所成群之1種以上者較佳,R1為具有選自由甲基及 乙基所成群之1種以上,且R2為具有選自由甲氧基、乙氧基、及異丙氧基所成群之1種以上與羥基者更佳。
樹脂A之重量平均分子量(Mw)通常為1500以上8000以下。樹脂A之重量平均分子量滿足此範圍時,可提高硬化物之成形性。樹脂A之重量平均分子量較佳為1500以上7000以下、更佳為2000以上5000以下。
樹脂A例如與上述各重複單位對應,具有可產生矽氧烷鍵之官能基的有機矽化合物作為起始原料來合成。「可產生矽氧烷鍵之官能基」,例如有鹵素原子、羥基、烷氧基。有機矽化合物,例如可列舉有機三鹵矽烷、有機三烷氧基矽烷。樹脂A可藉由將此等之起始原料以對應於各重複單位之存在比之比,使以水解縮合法進行反應來合成。樹脂A也可使用工業上市售的矽氧樹脂、烷氧基寡聚物等。
寡聚物B係R1為具有選自由甲基及乙基所成群之1種以上,R2為具有選自由甲氧基、乙氧基、異丙氧基、及羥基所成群之1種以上者較佳,R1為具有甲基,R2為具有甲氧基或羥基者更佳。
寡聚物B之重量平均分子量通常為未達1500。寡聚物B之重量平均分子量滿足此範圍時,可提高硬化物之成形性。寡聚物B之重量平均分子量較佳為200以上、未達1500、更佳為250~1000。
寡聚物B係例如與構成寡聚物B之上述各重複單位對應,具有可產生矽氧烷鍵之官能基的有機矽化合物作為 起始原料來合成。「可產生矽氧烷鍵之官能基」係表示與上述者相同意義。例如有機矽化合物可列舉有機三鹵矽烷、有機三烷氧基矽烷。寡聚物B可藉由將此等之起始原料以對應於各重複單位之存在比之比,使以水解縮合法進行反應來合成。
與樹脂A之重量平均分子量之差異,也可藉由例如控制使起始原料產生水解縮合反應時之反應溫度、對反應系內之起始原料之追加速度等來控制。寡聚物B也可使用工業上市售之矽氧樹脂、烷氧基寡聚物等。
樹脂A與寡聚物B之重量平均分子量係使用市售之GPC裝置,使用標準聚苯乙烯可進行測量。
此較佳之聚縮合型封裝材料,進一步含有硬化用觸媒為佳。使用硬化用觸媒時,樹脂A及寡聚物B係以另外的溶液來準備,使用前,將該等溶液混合為佳。
硬化用觸媒可使用例如鹽酸、硫酸、硝酸、燐酸等之無機酸或甲酸、乙酸、草酸、檸檬酸、丙酸、丁酸、乳酸、琥珀酸等之有機酸。不僅酸性化合物,也可使用鹼性的化合物。具體而言,可使用氫氧化銨、氫氧化四甲基銨、氫氧化四乙基銨等。
<半導體發光裝置之製造方法>
本發明之製造方法使用圖1來說明時,含有以下步驟:將元件3設置於設置有電極4之基板2的第1步驟, 將硬化前之封裝材料以覆蓋元件方式,封裝(potting)於基板上的第2步驟,在硬化後之厚度t[mm]之封裝材料1所具有之380nm、316nm及260nm之各波長之吸光度,分別為AbsA(t)、AbsB(t)及AbsC(t),380nm之光的透過率為T(t)時,使被封裝的封裝材料以滿足下述式(1)、(2)及(3)全部的方式予以硬化的第3步驟。(1)T(1.7)≧90%
(2)AbsB(t)-AbsA(t)<0.011t
(3)AbsC(t)-AbsA(t)<0.125t
第1步驟係藉由常法將上述元件設置於上述基板上的步驟。也可設置電極、配線等、半導體發光裝置通常必要之其他的構成。
第2步驟係以覆蓋被設置於基板上之元件,以封裝硬化前之上述封裝材料的步驟。
封裝步驟通常藉由專用的分配器(Dispenser)將封裝材料供給基板上。半導體發光裝置及元件配合其裝置之使用目的而有各種形狀,因此,供給之封裝材料的量係因基板、元件等之構造、面積、體積、其他電極、導線配線等之構造等而異,但是埋入此等之元件、導線配線等,且覆蓋發光元件上的封裝材料之厚度,盡可能可形成薄的量為佳,更佳為形成1mm以下之厚度的量。特別是近年開發之發光輸出電流100mA以上之可見光用功率LED(power LED),產生波長350nm以下之紫外線發光之UV-LED 等,該傾向顯著,因此,發光元件上之厚度形成薄者較佳。
本發明中,元件之厚度係表示由基板至元件上端的高度,但是有導線配線時,則表示由基板至導線配線的高度。
第3步驟係使第2步驟進行封裝後之硬化前的封裝材料硬化的步驟。藉由使以液狀封裝的封裝材料硬化,元件不必挾著空間而被封裝,因此,可抑制全反射之由元件之光取出損失。
在此,式(3)較佳為下述式(3’)。
(3’)AbsC(t)-AbsA(t)<0.09t
又,t為元件之厚度以下時,無封裝的效果,太厚時,光之吸收變大,故光取出效率降低,而厚度越增加,封裝材料越易產生龜裂,較佳為t超過元件之厚度[mm],且2以下。
實施例
述實施例所記載的透過率測量、紅外線分光測量所用的裝置、條件如下述。
<透過率測量>
裝置名:島津製作所公司製UV-3600
附屬裝置(attachment):積分球ISR-3100
測量波長:220~800nm
背景測量:大氣
測量速度:中速
<紅外線分光測量>
裝置名:VARIAN公司製670
附屬裝置:GOLDEN GATE金剛石ATR
測量波長:4000~700cm-1
背景測量:大氣
積算次數:32次
實施例1
使用下述樹脂A及寡聚物B得到樹脂組成物。
樹脂A為具有前述式(I)表示之有機聚矽氧烷結構的樹脂(A-1)(Mw=3500、前述式(I)中,R1=甲基、R2=甲氧基或羥基)及寡聚物B為具有前述式(II)表示之有機聚矽氧烷結構的寡聚物(B-1)(Mw=450、前述式(II)中,R1=甲基、R2=甲氧基)。樹脂(A-1)及寡聚物(B-1)之各重複單位的存在比率分別如表1及2所示。
對於樹脂(A-1),求式(4)及式(5)之值,得到(4)d/c=0.636
(5)b/a=0.153。
具體而言,在設置於水浴內的燒瓶內,添加前述樹脂(A-1)135g及異丙醇72.7g,加熱攪拌使內溫成為85℃為止,使前述樹脂(A-1)溶解。接著,添加前述寡聚物(B-1)15g,攪拌1小時以上,使前述寡聚物(B-1)溶解得到混合物。
所得之混合物中添加乙酸2-丁氧基乙酯47.2g後,使用蒸發器,在溫度為80℃、壓力為4kPaA之條件下,餾除異丙醇直到異丙醇濃度成為1質量%以下為止,得到前述樹脂(A-1)與前述寡聚物(B-1)之混合比為90:10(重量比)的矽氧樹脂(silicone resin)組成物(α1)。
相對於矽氧樹脂組成物(α1)100質量份,添加含有磷酸15重量%之硬化用觸媒2質量份,經充分攪拌混合得到矽氧樹脂組成物(α1-1)。然後,在鋁製杯內投入矽氧樹脂組成物(α1-1)約3.8g,在烤箱之中,以3.7℃/分鐘之速度,由室溫升溫至150℃,在150℃下放置5小時,得到矽氧樹脂組成物(α1-1)之硬化物。所得之硬化物之厚度為1.7mm。此硬化物之T(1.7)=92.3%,滿足式(1)。
又,藉由改變置入鋁杯之樹脂組成物的量,得到0.6mm至2.0mm的硬化物,求AbsB(t)-AbsA(t)及AbsC(t)-AbsA(t)之值的結果如圖3及4所示。此結果,所得之硬化物均滿足式(2)及式(3)的關係。
將厚度1.7mm之硬化物暴露於大氣中、200℃、1000小時,測量透過率之變化,當試驗前之透過率為1時,在260nm至380nm之區域內為0.98以上。
在具備有反光鏡、正極及負極之一對電極的基板上,設置放出275nm之光的半導體元件,在此將矽氧樹脂組成物(α1-1)進行封裝後,在烤箱之中,以3.7℃/分鐘的速度,由室溫升溫至150℃為止,於150℃下放置5小時,製作以矽氧樹脂組成物(α1-1)之硬化物封裝的半導體元件。封裝材料之厚度t為600μm。
產業上之可利用
依據本發明之製造方法時,可得到紫外線區域之光取出效率佳,且封裝材料之劣化小的半導體發光裝置。

Claims (8)

  1. 一種半導體發光裝置之製造方法,其係包含作為構成構件之基板、元件及封裝材料的半導體發光裝置之製造方法,其係含有以下步驟,將元件設置於基板的第1步驟,將硬化前之封裝材料以覆蓋元件方式,封裝於基板上的第2步驟,在將硬化後之厚度t[mm]之封裝材料所具有之在380nm、316nm及260nm之各波長的吸光度,分別為AbsA(t)、AbsB(t)及AbsC(t),380nm之光的透過率為T(t)時,使被封裝的封裝材料以滿足下述式(1)、(2)及(3)全部的方式予以硬化的第3步驟,第2步驟使用之硬化前之封裝材料為包含具有式(I)表示之有機聚矽氧烷構造之樹脂A的封裝材料,(1) T(1.7)≧90% (2) AbsB(t)-AbsA(t)<0.011t (3) AbsC(t)-AbsA(t)<0.125t (式中,R1各自獨立表示烷基,R2各自獨立表示烷氧基或羥基,p1、q1、a1及b1表示[p1+b1×q1]:[a1×q1]=1:0.25~9的正數)。
  2. 如申請專利範圍第1項之製造方法,其中式(3)為下述式(3’),(3’) AbsC(t)-AbsA(t)<0.09t。
  3. 如申請專利範圍第1或2項之製造方法,其中硬化後之厚度t[mm]超過元件之厚度[mm],且為2[mm]以下。
  4. 如申請專利範圍第1或2項之製造方法,其中紅外線分光測量第2步驟所用之硬化前之封裝材料所含有的原料時之波數1269cm-1、3300cm-1、1016cm-1及1090cm-1的吸光度,分別為a、b、c及d時,滿足下述式(4)及(5)全部,(4) 0.6<d/c<0.8 (5) 0<b/a<0.4。
  5. 一種半導體發光裝置,其係藉由如申請專利範圍第1項之製造方法所製造的半導體發光裝置,在將硬化後之厚度t[mm]之封裝材料所具有之380nm、316nm及260nm之各波長的吸光度,分別為AbsA(t)、AbsB(t)及AbsC(t),380nm之光的透過率為T(t)時,滿足下述式(1)、(2)及(3)全部,(1) T(1.7)≧90% (2) AbsB(t)-AbsA(t)<0.011t (3) AbsC(t)-AbsA(t)<0.125t。
  6. 如申請專利範圍第5項之半導體發光裝置,其中元件為放射UV-C區域之光的元件。
  7. 一種半導體發光裝置之製造方法,其係含有作為構 成構件之基板、元件及封裝材料之半導體發光裝置之製造方法,其係含有以下步驟,將元件設置於基板的第1步驟,將硬化前之封裝材料以覆蓋元件方式,封裝於基板上的第2步驟,在將硬化後之厚度t[mm]之封裝材料所具有之380nm、316nm及260nm之各波長之吸光度,分別設為AbsA(t)、AbsB(t)及AbsC(t),380nm之光的透過率設為T(t)時,使被封裝的封裝材料以滿足下述式(1)、(2)及(3)全部的方式予以硬化的第3步驟,硬化後之厚度t[mm]超過元件之厚度[mm],且為0.6~2[mm],(1) T(1.7)≧90% (2) AbsB(t)-AbsA(t)<0.011t (3) AbsC(t)-AbsA(t)<0.125t。
  8. 一種半導體發光裝置,其係藉由如申請專利範圍第7項之製造方法所製造的半導體發光裝置,在硬化後之厚度t[mm]之封裝材料所具有之380nm、316nm及260nm之各波長的吸光度,分別設為AbsA(t)、AbsB(t)及AbsC(t),380nm之光的透過率設為T(t)時,滿足下述式(1)、(2)及(3)全部,(1) T(1.7)≧90% (2) AbsB(t)-AbsA(t)<0.011t (3) AbsC(t)-AbsA(t)<0.125t。
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JPWO2015115341A1 (ja) 2017-03-23
TW201601352A (zh) 2016-01-01
WO2015115341A1 (ja) 2015-08-06
CN105940511A (zh) 2016-09-14
US9972756B2 (en) 2018-05-15
CN105940511B (zh) 2018-09-11
EP3101698A1 (en) 2016-12-07
KR20160117447A (ko) 2016-10-10
EP3101698A4 (en) 2017-06-28

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