TWI606482B - Tcct match circuit for plasma etch chambers - Google Patents

Description

Transformer coupling capacitor tuning matching circuit for plasma etching chamber [Proposition of priority]

The present application claims priority to U.S. Patent Application Serial No. 61/747,919, filed on Dec. 31, 2012, entitled " TCCT Match Circuit for Plasma Etch Chambers. The present application claims priority to the continuation of the application as part of the U.S. Patent Application Serial No. 13/658,652, filed on Jan. 23, 2012. The application is claimed as part of US Patent Application Serial No. 13/198683, filed on Aug. 4, 2011, entitled "Internal Faraday Shield Having Distributed Chevron Patterns and Correlated Positioning Relative to External Inner and Outer TCP Coil. Continuation of the priority of the application; the application claims the US Patent Provisional Application No. entitled "Internal Faraday Shield Having Distributed Chevron Patterns and Correlated Positioning Relative to External Inner and outer TCP Coil" on April 28, 2011 Priority 61/480314. The disclosure of these applications is hereby incorporated by reference in its entirety for all purposes.

This invention relates generally to semiconductor fabrication, and more particularly to TCCT matching circuits for plasma etch chambers.

In semiconductor fabrication, the etching process is common and repeated. There are two types of etching processes: wet etching and dry etching, as is well known in the art. Dry etching One of them is plasma etching performed by an inductively coupled plasma etching apparatus.

The plasma contains various types of free radicals, as well as positive and negative ions. The features, surfaces, and materials of the wafer are etched using chemical reactions of various free radicals, positive ions, and negative ions. During the etching process, the chamber coil performs a function similar to the primary side coil in the transformer, while the plasma performs the function similar to the secondary side coil in the transformer.

Existing transformer coupled capacitor tuning (TCCT) matching designs suffer from some problems, especially when used to implement magnetoresistive random access memory (MRAM) manufacturing processes. These problems include limited TCCT range, limited transformer coupled plasma (TCP), high coil voltage, and coil arcing. Therefore, the process window of the reactor chamber may be quite limited, which means that various formulations cannot be met. If a recipe that exceeds the process window is forced to operate, it may fail due to overvoltage and/or overcurrent interlocking, and even worse, may cause arcing of the TCP coil and ceramic windows and ceramic crosses. damage. In addition, when the terminal voltage is not properly balanced, the splashing action of the ceramic window due to the capacitive coupling of the TCP coil may gradually develop over time. The result is that particles sputtered from the ceramic window are subsequently deposited on the wafer, which can result in yield loss. This effect may limit the operational life of the reactor at, for example, 500 RF hours of operation.

In view of the above, there is a need for an improved TCCT matching circuit for a plasma etch chamber.

The present disclosure is an apparatus for etching a semiconductor and layers formed thereon during fabrication of a semiconductor device. The apparatus is defined by a TCCT matching circuit that controls the operation of the TCP coil of the plasma processing chamber, the etching step being performed in the plasma processing chamber.

In one embodiment, a matching circuit is provided coupled between the RF source and the plasma chamber, the matching circuit comprising the following components: a power input circuit coupled to an RF source; an inner coil input a circuit coupled between the power input circuit and the input end of the inner coil, the inner coil input circuit including an inductor and a capacitor coupled in series with the inductor, the inductor Connected to the power input circuit, and the capacitor is connected to the input end of the inner coil, the first node is defined between the power input circuit and the inner coil input circuit; an inner coil output circuit is coupled between the output end of the inner coil and the ground The inner coil output circuit defines a direct pass-through connection to the ground; an outer coil input circuit coupled between the first node and the input end of the outer coil; and an outer coil output circuit coupled to the outer coil Between the output and ground.

In one embodiment, the capacitance is a variable capacitance having a value between about 150 pF and about 1500 pF; and the inductance has a value from about 0.3 uH to about 0.5 uH.

In an embodiment, the outer coil input circuit includes a second capacitor.

In one embodiment, the second capacitor is a variable capacitor having a rating of from about 150 pF to about 1500 pF.

In an embodiment, the outer coil output circuit includes a second capacitor. In an embodiment, the second capacitance has a value from about 80 pF to about 120 pF. In another embodiment, the second capacitance has a value of about 100 pF ± about 1%.

In one embodiment, the power input circuit includes: a second capacitor coupled to the RF source; a second inductor coupled to the inner coil input circuit; and a third capacitor coupled between the second capacitor and the second inductor; A second node is defined between the second capacitor and the third capacitor; and a fourth capacitor is coupled between the second node and the ground. In one embodiment, the second capacitor has a rating of from about 5 pF to about 500 pF; the third capacitor has a rating of from about 50 pF to about 500 pF; the second inductor has a value of from about 0.3 uH to about 0.5 uH; The four capacitors have a value of from about 200 pF to about 300 pF. In an embodiment, the fourth capacitance has a value of about 250 pF ± about 1%.

In another embodiment, a matching circuit is provided, the matching circuit comprising: a power input circuit coupled to an RF source; an inner coil input circuit coupled to the input of the power input circuit and the inner coil Between the ends, the inner coil input circuit includes an inductor and a first capacitor coupled in series with the inductor, the inductor is connected to the power input circuit, and the first capacitor is connected to the input end of the inner coil, and the first node is defined in the power input circuit An inner coil input circuit; an inner coil output circuit coupled between the output end of the inner coil and the ground, the inner coil output circuit defines a direct path connection portion to the ground; and an outer coil input circuit coupled to the first node and Between the input ends of the outer coils; an outer coil output circuit coupled to the output of the outer coil Between ground and ground, the outer coil output circuit includes a second capacitor having a value greater than about 85 pF. In an alternative embodiment, the second capacitance has a value greater than about 100 pF.

In an embodiment, the first capacitance is a variable capacitance having a value between about 150 pF and about 1500 pF; and the inductance has a value from about 0.3 uH to about 0.5 uH.

In an embodiment, the outer coil input circuit includes a third capacitor. In an embodiment, the third capacitance is a variable capacitance having a rating of from about 150 pF to about 1500 pF.

In one embodiment, the power input circuit includes: a third capacitor coupled to the RF source; a second inductor coupled to the inner coil input circuit; and a fourth capacitor coupled between the third capacitor and the second inductor; a second node is defined between the third capacitor and the fourth capacitor; and a fifth capacitor is coupled between the second node and the ground. In one embodiment, the third capacitor has a rating of from about 5 pF to about 500 pF; the fourth capacitor has a rating of from about 50 pF to about 500 pF; the second inductor has a value of from about 0.3 uH to about 0.5 uH; The five capacitors have a value of from about 200 pF to about 300 pF. In an embodiment, the fifth capacitance has a value of about 250 pF ± about 1%.

In another embodiment, a matching circuit is provided, the matching circuit comprising: a power input circuit coupled to an RF source; an inner coil input circuit coupled to the input of the power input circuit and the inner coil Between the ends, the inner coil input circuit includes an inductor and a first capacitor coupled in series with the inductor, the inductor is connected to the power input circuit, and the first capacitor is connected to the input end of the inner coil, and the first node is defined in the power input circuit An inner coil input circuit; an inner coil output circuit coupled between the output end of the inner coil and the ground, the inner coil output circuit defines a direct path connection portion to the ground; and an outer coil input circuit coupled to the first node and Between the input ends of the outer coils, the outer coil input circuit includes a second capacitor; an outer coil output circuit coupled between the output of the outer coil and the ground, the outer coil output circuit including a third capacitor.

In an embodiment, the first capacitance is a variable capacitance having a rating between about 150 pF and about 1500 pF; and wherein the inductance has a value from about 0.3 uH to about 0.5 uH.

In one embodiment, the second capacitor is a variable capacitor having a rating of from about 150 pF to about 1500 pF.

In an embodiment, the third capacitance has a value from about 80 pF to about 120 pF. In an embodiment, the third capacitance has a value of about 100 pF ± about 1%.

In one embodiment, the power input circuit includes: a fourth capacitor coupled to the RF source; a second inductor coupled to the inner coil input circuit; and a fifth capacitor coupled between the fourth capacitor and the second inductor; A second node is defined between the fourth capacitor and the fifth capacitor; and a sixth capacitor coupled between the second node and the ground. In one embodiment, the fourth capacitor has a rating of from about 5 pF to about 500 pF; wherein the fifth capacitor has a rating of from about 50 pF to about 500 pF; wherein the second inductance has a value of from about 0.3 uH to about 0.5 uH; And the sixth capacitance has a value of from about 200 pF to about 300 pF. In an embodiment, the sixth capacitance has a value of about 250 pF ± about 1%.

102‧‧‧ chamber

104‧‧‧ chuck

106‧‧‧ dielectric window

120‧‧‧Outer coil

122‧‧‧ inner coil

124‧‧‧TCCT matching circuit

140, 142, 146, 148‧‧‧ nodes

160‧‧‧RF generator

162‧‧‧bias matching circuit

300, 302, 308, 310‧‧‧ inputs

304, 306, 312, 314‧‧‧ output

320‧‧‧TCCT input circuit

322‧‧‧RF power supply

324‧‧‧TCCT output circuit

400‧‧‧Power input circuit

402‧‧‧Inner coil input circuit

404‧‧‧Outer coil input circuit

406‧‧‧ inner coil output circuit

408‧‧‧Outer coil output circuit

410, 412‧‧‧ nodes

The invention and its further advantages are most effectively understood by reference to the following description.

1 shows a plasma processing system for an etching operation in accordance with an embodiment of the present invention.

2 is a cross-sectional view of a plasma processing chamber in accordance with an embodiment of the present invention.

3 shows a top view schematically showing inner and outer coils in accordance with an embodiment of the present invention.

4A is a schematic diagram showing the circuit topology of a TCCT matching circuit in accordance with an embodiment of the present invention.

4B is a simplified schematic diagram showing the components of a TCCT matching circuit in accordance with an embodiment of the present invention.

Figure 5 is a graph showing ion density versus TCP power for various top configurations in accordance with an embodiment of the present invention.

Figure 6 shows four graphs showing ion density versus radial distance in accordance with an embodiment of the present invention.

The present disclosure is a TCCT matching circuit for etching a semiconductor substrate and a layer formed thereon during fabrication of a semiconductor device. TCCT matching circuit controls the operation of TCP coil The TCP coil is placed over the dielectric window of the chamber in which the etching step is performed.

In the following description, numerous specific details are set forth to provide a thorough understanding of the invention. However, it will be apparent to those skilled in the art that the invention may be practiced without the specific details. In other instances, well known process operations and implementation details have not been described in detail in order to avoid unnecessarily obscuring the present invention.

1 illustrates a plasma processing system for an etching operation in accordance with an embodiment of the present invention. The system includes a chamber 102 that includes a chuck 104 and a dielectric window 106. The chuck 104 can be an electrostatic chuck that is used to support the substrate when it is present.

Also shown is a bias RF generator 160 which may be defined by one or more generators. If a majority of generators are provided, different frequencies can be utilized to achieve various tuning characteristics. A bias matching circuit 162 is coupled between the RF generator 160 and the conductive plates of the assembly, the conductive plates defining the chuck 104. The chuck 104 also includes an electrostatic electrode to enable chucking and dechucking of the wafer. In general, a filter and a DC clamp power supply can be provided. Other control systems for removing the wafer from the chuck 104 can also be provided. Although not shown, the pump is coupled to chamber 102, which is capable of vacuum control and removal of gaseous by-products from the chamber during operation of the plasma treatment.

Dielectric window 106 can be defined by a ceramic-like material. Other dielectric materials can be used as long as they can withstand the conditions of the semiconductor etch chamber. Typically, the chamber operates at elevated temperatures ranging between about 50 degrees Celsius and about 120 degrees Celsius. This temperature will depend on the etching process operation and the specific formulation. The chamber 102 will also operate under vacuum conditions ranging between about 1 millitorr (mT) and about 100 millitorr (mT). Although not shown, the chamber 102 is typically coupled to a plurality of devices when installed in a clean room or manufacturing facility. These devices include pipelines that provide process gas, vacuum, temperature control, and environmental particulate control.

These devices are coupled to the chamber 102 when installed at a target manufacturing location. Additionally, the chamber 102 can be coupled to a transfer chamber that will enable the robotic arm to move the semiconductor wafer into and out of the chamber 102 using typical automation.

2 is a cross-sectional view of a plasma processing chamber in accordance with an embodiment of the present invention. It shows that the TCP coil includes an inner coil (IC) 122 and an outer coil (OC). The TCP coils are arranged and arranged above the dielectric window 106.

The TCCT matching circuit 124 implements dynamics of the power supplied to the inner and outer coils Tuning. The TCP coil is coupled to a TCCT matching circuit 124 that includes a connection to the inner coil 122 and the outer coil 120. In an embodiment, the TCCT matching circuit 124 is configured to tune the TCP coil to provide more power to the inner coil 122 (relative to the outer coil 120). In another embodiment, the TCCT matching circuit 124 is configured to tune the TCP coil to provide less power to the inner coil 122 (relative to the outer coil 120). In another embodiment, the power provided to the inner and outer coils will provide an even distribution of power, and/or a radially distributed ion density above the control substrate (ie, the wafer present). In yet another embodiment, the power tuning between the outer coil and the inner coil will be adjusted based on processing parameters defined by the etching performed on the semiconductor wafer disposed over the chuck 104.

In one implementation, a TCCT matching circuit with variable capacitance (as described in further detail below) can be configured to automatically adjust to achieve a predetermined ratio of current in the two coils. It should be understood that the circuit shown herein provides tuning and adjustment to a desired current ratio. In an embodiment, the ratio of currents can range from 0.1 to 1.5. Typically, this ratio is called the Transformer Coupling Capacitance Tuning (TCCT) ratio. However, the TCCT ratio is set based on the process desired for a particular wafer or plurality of wafers.

It will be appreciated that by providing an adjustable TCP coil, chamber 102 can provide control of ion density versus TCP power flexibility, as well as radial ion density profile, depending on the processing operation being performed.

In addition, it should be noted that although the present disclosure refers to the TCCT matching circuit in its entirety, the use of this term should not limit the scope of the circuit (this circuit is defined to achieve the desired matching function and provide tuning). In other embodiments, where there is no TCCT function or no fixed TCCT ratio, it is contemplated that a matching circuit in accordance with the principles and embodiments described herein can be applied to achieve the desired matching function of the plasma processing system.

3 shows a top view that schematically depicts inner coil 122 and outer coil 120 in accordance with an embodiment of the present invention. The top view shown depicts the connection to the coil which, as previously described, includes outer coil 120 and inner coil 122 as an example. Inner coil 122 will include inner coil 1 (IC ₁ ) and inner coil 2 (IC ₂ ). The outer coil 120 includes an outer coil 1 (OC ₁ ) and an outer coil 2 (OC ₂ ). The connections between the ends of the coils are shown relative to the circuitry provided in the TCCT matching circuit 124. The illustration in FIG. 3 is provided to show annular windings associated with respective inner and outer coils for a TCP coil in chamber 102 in accordance with an embodiment of the present invention. As shown, the inner coils IC ₁ and IC ₂ are arranged in parallel spirals interleaved with each other. As shown, IC ₁ and IC ₂ resemble a pair of arithmetic or Archimedean spirals that are substantially the same shape but one of which rotates about 180 degrees about its axis relative to the other. The input 300 of the IC ₁ is located diametrically at the input 302 of the IC ₂ . Furthermore, the output 304 of the IC ₁ is located diametrically at the output 306 of the IC ₂ . The configuration of the outer coils OC ₁ and OC ₂ is similar to the configuration of the inner coils IC ₁ and IC ₂ , which are defined as substantially parallel spirals interleaved and rotated relative to each other by about 180 degrees. OC input terminal 308 with respect to _a diameter line OC ₂ input terminal 310, output terminal ₁ of the OC 312 with respect to the diameter line OC ₂ output terminal 314. In one embodiment, the input and output ends of the inner and outer coils are arranged in a substantially linear configuration. It should be understood that other types of coil configurations can also be used. For example, a dimensional coil that provides a hemispherical structure, and other coil type structures other than a planar coil distribution can be provided.

As has been noted, the TCP coil is coupled to the TCCT matching circuit 124, which includes a connection to the outer coil 120 and the inner coil 122. As shown, outer coil 120 inputs 308 and 310 are coupled to node 146, which in turn is coupled to TCCT input circuit 320. The output of outer coil 120 is coupled to node 142, which is coupled to TCCT output circuit 324. Inner coil 122 has inputs 300 and 302 that are coupled to node 140, which in turn is coupled to TCCT input circuit 320. Outputs 304 and 306 of inner coil 122 are coupled to node 148, which is coupled to TCCT output circuit 324. The TCCT input circuit receives power from the RF power source 322. The TCCT output circuit is connected to ground.

4A is a schematic diagram showing the circuit topology of a TCCT matching circuit in accordance with an embodiment of the present invention. The RF source 322 provides power to the power input circuit 400. Based variable capacitance C ₁ is coupled between the RF source 322 and the node 410. Node 410 is connected to the capacitor C _2, the capacitance C ₂ in turn connected to a ground. Node 410 is also connected to the variable capacitor C _3, the variable capacitance C ₃ and further connected to the inductor L _5. Inductor L ₅ is coupled to node 412. In one embodiment, the power input line 400 to ground circuits the capacitor C _{2,. 3} variable capacitance C, and inductance L ₅ is defined by a variable capacitance C provided the above-described _1, node 410 is coupled.

Node 412 is coupled to each of inner coil input circuit 402 and outer coil input circuit 404. In one embodiment, the inner coil input circuit 402 is defined by an inductor L ₃ and a variable capacitor C ₅ that are coupled to each other. ₃ Series coupled inductor L between node 412 and the variable capacitor C _5. Variable capacitor C ₅ is connected to the node 140 (shown in FIG. 3), the node 140 in turn connected to an input end of the inner coil.

With continued reference to FIG. 4A, node 412 is also coupled to outer coil input circuit 404. In one embodiment, the outer coil system by the input circuit 404 is coupled to node ₄ of the variable capacitance C 412 is defined. Variable capacitance C ₄ is also connected to a node 146 (shown in FIG. 3) 146 in turn connected to an input end of the outer coil node.

In addition, FIG. 4A also shows a TCCT output circuit 324 defined by an inner coil output circuit 406 and an outer coil output circuit 408. Inner coil output circuit 406 is coupled to node 148 (shown in Figure 3), which in turn is coupled to the output of the inner coil. In an embodiment, the inner coil output circuit 406 is defined by a ground path. Outer coil output circuit 408 is coupled to node 142 (shown in Figure 3), which in turn is coupled to the output of the outer coil. In one embodiment, the outer coil is defined by the output circuit based coupling capacitance C between the node 142 and the ground _7.

In one embodiment, the variable capacitance C ₁ to about 5 rating based 500pF. In one embodiment, the capacitor C ₂ system rated at about 250pF. In one embodiment, the variable capacitance C ₃ lines rated at about 5 to 500pF. In one embodiment, the inductance L ₅ lines rated at about 0.3uH. In one embodiment, the variable capacitance C ₄ lines rated at about 150 to 1500pF. In one embodiment, inductor L ₃ lines rated at about 0.55uH. In one embodiment, the variable capacitance C ₅ lines rated at about 150 to 1500pF. In one embodiment, the capacitor C ₇ lines rated at about 100pF.

TCCT variable capacitance matching circuit 124 to achieve _{C 1, C 3, C 4} , and C ₅ of dynamic tuning, tuning to provide power to the inner and outer coils. In one embodiment, the variable capacitance _{C 1, C 3, C 4} , C ₅ and controlled by lines connected to the chamber 102 of the electronic board of the controller processing. The electronic board can be coupled to a network system that will routinely operate a particular process that depends on the processing operations desired during a particular cycle. Electronic plate etching operation chamber 102 so as to control the execution, and a control variable capacitance _{C 1, C 3, C 4} , and C ₅ is set particularly.

4B is a simplified schematic diagram showing the components of a TCCT matching circuit in accordance with an embodiment of the present invention. As shown, power input circuit 400 receives power from RF power source 322. Power input circuit 400 is coupled to node 412. Inner coil input circuit 402 is coupled to node 412 Between the inner coil 122 and the inner coil 122. Outer coil input circuit 404 is coupled between node 412 and outer coil 120. Inner coil 122 is coupled to inner coil output circuit 406 and inner coil output circuit 406 is coupled to ground. The outer coil 120 is connected to the outer coil output circuit 408, and the outer coil output circuit 408 is connected to ground.

In summary, the TCCT matching circuit design described so far provides an improvement in power efficiency. This is believed to be due to design optimization that minimizes the effects of stray capacitance on the coil on the plasma. The effect of stray capacitance on RF power efficiency has been published in "Power Efficiency Oriented Optimal Design of High Density CCP and ICP Sources for Semiconductor RF" by Maolin Long in "IEEE Transactions on Plasma Science, Vol. 34, No. 2, April 2006". Research and elaboration is carried out in Plasma Processing Equipment, which is incorporated herein by reference.

Regarding the inner coil, the conventional TCCT matching circuit design already includes an output side inductance, and the output side inductance increases the stray capacitance, and thus reduces power efficiency. However, in this embodiment of the embodiment, the inner coil circuit system configured to output the ground path, while the inner coil system is configured to input circuit includes an inductor L _3. This reduces stray capacitance, thus improving power efficiency and contributing to lower voltages on the inner coil.

Regarding the outer coil, the conventional TCCT matching circuit design has provided a relatively low output side capacitance. However, in the embodiments described herein, the outer coil output circuit is configured to provide a higher capacitance that reduces the impedance of a particular frequency and provides a lower voltage drop.

Table 1 shown below provides RF characterization data comparing the original top RF design to the top RF design modified in accordance with an embodiment of the present invention.

As shown by the data in Table 1, in the case of no load (no plasma), the Q value of the inner coil of the modified tip is improved relative to the Q value of the inner coil of the original tip. Therefore, RF power efficiency has also improved. Therefore, in the case of no load, since the outer coil is dominant at a lower TCCT, the overall Q value of the TCP coil is improved at a higher TCCT. In addition, this data shows that overall RF power efficiency is significantly improved with load (with plasma).

In summary, the presently disclosed TCCT matching circuit provides high power efficiency, which means that a higher density of plasma is achieved given a charge. In addition, the disclosed TCCT matching circuit allows for relatively low voltage levels at the coil terminals due to high power efficiency. The ability to operate at lower voltages at the coil terminals reduces the acceleration of ions (these ions may strike the surface of the dielectric window). The result is a reduction in the production of particles caused by particles splashed from the dielectric window. Health. Table 2 below shows a comparison of the terminal voltages between the existing TCCT matching circuit design and the TCCT matching circuit design in accordance with an embodiment of the present invention.

The data in Table 2 shows a comparison of the measured RF voltages between the TCCT matching circuit and the existing TCCT matching circuit in accordance with an embodiment of the present invention. In the (shown in FIG. 4A) of the voltage input within the coil, and the voltage V ₃ V represents the measured voltage variable capacitance 140 between the nodes _{3 and} C _5. A voltage V ₄ is measured between the output of the outer coil and capacitor C ₇ (also shown in Figure 4A), and voltage V ₄ represents the voltage at the output of the outer coil.

The data as shown in Table 2 illustrates that the coil terminal voltage is significantly reduced in the TCCT matching circuit design in accordance with an embodiment of the present invention. Because the coil terminal voltage is reduced, embodiments of the present invention can be used in various conductor etch chambers to minimize dielectric window spatter and also to eliminate coil arcing caused by terminal to ground overvoltage.

Figure 5 is a graph showing ion density versus TCP power for various top configurations in accordance with an embodiment of the present invention. In this diagram, the line drawings of the different top configurations are represented by different shapes. The circle corresponds to a line graph with the original tip of the 0.1 吋 coil window spacing. The experimental conditions were as follows: TCCT = 1, SF6 = 50 sccm, Ar = 200 sccm, Ch. P = 9 mT, and tip = 160 mm. The diamond corresponds to a line graph having a modified top end of the TCCT matching circuit in accordance with the embodiments described herein, the modified tip also having a 0.1 inch coil window spacing. The square corresponds to 0.4 吋 A line drawing of the original top of the coil window spacing. The triangle corresponds to a line diagram of the original top end without a Faraday shield (FS), which also has a 0.4 inch coil window spacing.

Comparing the line graph with the original top end of the 0.1吋 coil window spacing (represented by the circle) and the line graph with the modified top end of the 0.1吋 coil window spacing (represented by diamonds), it can be seen that the modified top RF design provides an obvious Higher power efficiency than the original top RF design. That is, the modified tip provides a significantly higher ion density for a given TCP power. By providing higher power efficiency, the equivalent plasma density as in the conventional top TCCT matching design can be achieved with only lower power. This capability provides an improvement in the lifetime of the TCCT matching circuit (due to the component being subjected to lower power) and also reduces the generation of particles due to splashing of the dielectric window as previously described.

Figure 6 shows four graphs, each showing ion density versus radial distance. In the graph shown at the top right of Figure 6, the line graph shows the various TCCT values applied to the original tip of the coil window spacing of 0.1 。. For each line graph, TCP power = 1000W. The line graph represented by the diamond corresponds to TCCT=1. The line graph represented by the square corresponds to TCCT = 0.5. The line graph represented by the triangle corresponds to TCCT = 1.3.

In the graph shown at the upper left of Fig. 6, the line graph shows various TCCT values applied to the modified tip of the TCCT matching circuit in accordance with an embodiment of the present invention, and this tip has a coil window spacing of 0.1 。. For each line graph, TCP power = 1000W. The line graph represented by the diamond corresponds to TCCT=1. The line graph represented by the square corresponds to TCCT = 0.5. The line graph represented by the triangle corresponds to TCCT = 1.3.

In the graph shown at the bottom right of Figure 6, the line graph shows various TCCT values applied to the original tip of the coil window spacing of 0.4 。. The line graph represented by the diamond corresponds to TCCT=1. The line graph represented by the square corresponds to TCCT = 0.5. The line graph represented by the triangle corresponds to TCCT = 1.3.

In the graph shown at the bottom left of Figure 6, the line graph shows various TCCT values applied to the baseline tip without the Faraday shield but with a 0.4 inch coil window spacing. The line graph represented by the diamond corresponds to TCCT=1. The line graph represented by the square corresponds to TCCT = 0.5. The line graph represented by the triangle corresponds to TCCT = 1.3.

The line graph shown in FIG. 6 illustrates that the increased plasma density resulting from the inclusion of the TCCT matching circuit in accordance with an embodiment of the present invention is more evenly distributed throughout the wafer.

Although the present invention has been described in terms of a number of embodiments, it will be understood that those skilled in the art will recognize various changes, additions, substitutions and equivalents. All such variations, additions, permutations and equivalents are intended to be included within the true spirit and scope of the invention.

320‧‧‧TCCT input circuit

322‧‧‧RF power supply

324‧‧‧TCCT output circuit

400‧‧‧Power input circuit

402‧‧‧Inner coil input circuit

404‧‧‧Outer coil input circuit

406‧‧‧ inner coil output circuit

408‧‧‧Outer coil output circuit

410, 412‧‧‧ nodes

Claims (12)

A matching circuit is coupled between the RF source and the plasma chamber, the matching circuit comprising: a power input circuit coupled to an RF source; an inner coil input circuit coupled to the power input circuit Between the input ends of the coil, the inner coil input circuit includes an inductor and a first variable capacitor coupled in series with the inductor, the inductor being coupled to the power input circuit, and the capacitor is coupled to the input of the inner coil a first node is defined between the power input circuit and the inner coil input circuit, wherein the inductance has a value of 0.3 uH to 0.5 uH; an inner coil output circuit coupled between the output end of the inner coil and ground The inner coil output circuit defines a direct path connection portion that does not include an inductor or a capacitor, and the direct path connection portion is a direct connection portion to the ground; an outer coil input circuit is coupled to the input of the first node and the outer coil Between the ends, the outer coil input circuit has a second variable capacitor, and the outer coil input circuit is further coupled to the power input circuit via the first node; a loop output circuit coupled between the output of the outer coil and the ground, wherein the outer coil output circuit includes a third capacitor having a value of 80 pF to 120 pF, wherein the first node will be from the power input The power of the circuit is shunted for distribution to the inner coil input circuit and the outer coil input circuit, the first and second variable capacitors providing tuning of the current ratio between the inner coil and the outer coil. The matching circuit of claim 1, wherein the first variable capacitor has a rating between 150 pF and 1500 pF. The matching circuit of claim 1, wherein the second variable capacitor has a rating of 150 pF to 1500 pF. The matching circuit of claim 1, wherein the power input circuit comprises: a fourth capacitor coupled to the RF source; and a second inductor coupled to the inner coil input circuit; a fifth capacitor coupled between the fourth capacitor and the second inductor; a second node defined between the fourth capacitor and the fifth capacitor; and a sixth capacitor coupled to the second node Between ground and ground. The matching circuit of claim 4, wherein the fourth capacitor has a rating of 5 pF to 500 pF; wherein the fifth capacitor has a rating of 50 pF to 500 pF; wherein the second inductor has a rating of 0.3 uH to 0.5 uH The value of the sixth capacitor has a value of 200 pF to 300 pF. A matching circuit comprising: a power input circuit coupled to an RF source; an inner coil input circuit coupled between the power input circuit and an input of the inner coil, the inner coil input circuit including an inductor And a first capacitor coupled in series with the inductor, the inductor being coupled to the power input circuit, and the first capacitor is coupled to the input end of the inner coil, the first node being defined in the power input circuit and the inner coil input Between the circuits, wherein the first capacitor is a variable capacitor having a rating between 150 pF and 1500 pF, and wherein the inductor has a value of 0.3 uH to 0.5 uH; an inner coil output circuit coupled therein Between the output end of the coil and the ground, the inner coil output circuit defines a direct path connection to ground; an outer coil input circuit is coupled between the first node and the input end of the outer coil; an outer coil output circuit, Coupling between the output end of the outer coil and the ground, the outer coil output circuit includes a second capacitor having a value greater than 85 pF, wherein the power input is a third capacitor coupled to the RF source, a second inductor coupled to the inner coil input circuit, a fourth capacitor coupled between the third capacitor and the second inductor, defined by the third capacitor and the a second node between the fourth capacitor and a fifth capacitor coupled between the second node and the ground. The matching circuit of claim 6, wherein the outer coil input circuit comprises a sixth electric Rong. The matching circuit of claim 7, wherein the sixth capacitor is a variable capacitor having a rating of 150 pF to 1500 pF. The matching circuit of claim 6, wherein the third capacitor has a rating of 5 pF to 500 pF; wherein the fourth capacitor has a rating of 50 pF to 500 pF; wherein the second inductor has a rating of 0.3 uH to 0.5 uH The value of the fifth capacitor has a value of 200 pF to 300 pF. A matching circuit coupled between the RF source and the plasma chamber, the matching circuit comprising: a power input circuit coupled to an RF source; an inner coil input circuit coupled to the power input circuit Between the input ends of the coil, the inner coil input circuit includes an inductor and a first variable capacitor coupled in series with the inductor, the inductor being coupled to the power input circuit, and the first variable capacitor is coupled to the inner coil The input end, the first node is defined between the power input circuit and the inner coil input circuit, wherein the inductance has a value of 0.3 uH to 0.5 uH; an inner coil output circuit coupled to the output end of the inner coil Between grounding, the inner coil output circuit defines a direct path connection portion that does not include an inductor or a capacitor, and the direct path connection portion is a direct connection portion to the ground; an outer coil input circuit is coupled to the first node and the outer portion Between the input ends of the coil, the outer coil input circuit has a second variable capacitor, and the outer coil input circuit is further coupled to the power input circuit via the first node; An outer coil output circuit coupled between the output of the outer coil and ground, wherein the outer coil output circuit includes a third capacitor having a value of 80 pF to 120 pF, wherein the first node will be from the power input a power split of the circuit for distribution to the inner coil input circuit and the outer coil input circuit, the first and second variable capacitors providing tuning of a current ratio between the inner coil and the outer coil, Wherein the power input circuit includes a fourth capacitor coupled to the RF source, a second inductor coupled to the inner coil input circuit, and a fifth capacitor coupled between the fourth capacitor and the second inductor, defined in the a second node between the fourth capacitor and the fifth capacitor, and a sixth capacitor coupled between the second node and the ground, wherein the fourth capacitor has a rating of 5 pF to 500 pF, wherein the fifth capacitor has A rating of 50 pF to 500 pF, wherein the second inductance has a value of 0.3 uH to 0.5 uH, wherein the sixth capacitance has a value of 200 pF to 300 pF. A matching circuit as in claim 10, wherein the first variable capacitor has a rating between 150 pF and 1500 pF. A matching circuit as in claim 10, wherein the second variable capacitor has a rating of 150 pF to 1500 pF.