TWI582859B - 連接第一電子封裝體至第二電子封裝體之方法 - Google Patents

連接第一電子封裝體至第二電子封裝體之方法 Download PDF

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TWI582859B
TWI582859B TW104103563A TW104103563A TWI582859B TW I582859 B TWI582859 B TW I582859B TW 104103563 A TW104103563 A TW 104103563A TW 104103563 A TW104103563 A TW 104103563A TW I582859 B TWI582859 B TW I582859B
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mold
electrical
interconnects
electronic package
substrate
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TW104103563A
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TW201539585A (zh
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嘉平 邱
市川欣也
富田佳宏
羅伯特L 聖克曼
艾利克 李
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英特爾公司
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Description

連接第一電子封裝體至第二電子封裝體之方法 發明領域
本文中描述之實施例大體上係關於連接第一電子封裝體至第二電子封裝體之方法。
發明背景
疊層封裝體製造(package-on-package fabrication)已廣泛地用以在多種電子應用(例如,智慧型電話技術)中增加記憶體頻寬。當前疊層封裝體技術關於電子互連件(亦即,I/O埠)之數目已達到上限。因此,正在開發各種不同技術以便滿足較高I/O要求。
一種類型之技術提供3D/TSV解決方案。然而,TSV技術並不非常成熟,且3D組裝相當具挑戰性以便生產用於疊層封裝體製造之精細間距的電氣互連件。當前正在開發其他技術以在封裝體之間形成較緻密的電氣互連件。此等技術包括:(i)使用導線接合技術;(ii)高銅柱(high copper pillar,HCP);及(iii)Cu-SnAg電鍍凸塊。此等技術中之每一者的開發正遭受各種設計問題,該等設計問題使難以在疊層封裝體電子系統中之封裝體之間製造密度增加之 電氣互連件。
依據本發明之一實施例,係特地提出一種方法,其包含:以一電導體來填充一模具以在該模具內形成數個電氣互連件;將該模具附接至一基體以使得該等電氣互連件嚙合該基體上之電氣接點;自該等電氣互連件移除該模具;以及以一電氣絕緣體來覆蓋該等電氣互連件。
10‧‧‧電子封裝體
10A‧‧‧第一電子封裝體
10B‧‧‧第二電子封裝體
11、14‧‧‧模具
12‧‧‧電氣互連件
15‧‧‧基體
16‧‧‧電氣接點/焊膏
17‧‧‧電氣接點/導電墊片
19‧‧‧區段
20‧‧‧電氣絕緣體
21‧‧‧晶粒
22‧‧‧導電墊片
25‧‧‧焊球
28‧‧‧電氣絕緣體之部分
30‧‧‧模型
31‧‧‧電氣互連件狀突出物/材料
32‧‧‧材料
100、1100、1500‧‧‧方法
110、120、130、140、150、160、1110、1120、1130、1140、1150、1505、1510、1520、1530、1540、1550、1560‧‧‧步驟
圖1說明製造電子封裝體之實例方法的流程圖。
圖2為可用於圖1所展示之方法中之實例模具的側視圖。
圖3為圖2所展示之模具的俯視圖。
圖4為可用於圖1所展示之方法中之另一實例模具的側視圖。
圖5展示附接至基體的圖2之模具。
圖6展示正自基體移除的圖5之模具。
圖7展示以電氣絕緣體而覆蓋的圖6之電氣互連件。
圖8展示經移除以曝露電氣互連件的圖7之電氣絕緣體之部分。
圖9展示圖7之電氣絕緣體,其中電氣互連件包括自電氣絕緣體曝露之區段。
圖10展示圖9之電氣絕緣體,其中導電墊片形成於電氣絕緣體上。
圖11說明製造電子封裝體之另一實例方法的流程圖。
圖12展示可用以形成圖2所展示之模具之實例模型。
圖13展示以材料而覆蓋的圖12之實例模型。
圖14展示在已自圖12之模型移除材料以形成圖2所說明之模具之後的圖13之實例材料。
圖15說明連接第一電子封裝體至第二電子封裝體之另一實例方法的流程圖。
圖16展示第一電子封裝體正附接至第二電子封裝體之實例形式。
圖17展示第一電子封裝體正附接至第二電子封裝體之另一實例形式。
較佳實施例之詳細說明
以下描述及圖式充分地說明特定實施例以使熟習此項技術者能夠實踐該等實施例。其他實施例可併有結構改變、邏輯改變、電氣改變、製程改變及其他改變。一些實施例之部分及特徵可包括於其他實施例之部分及特徵中,或由其他實施例之部分及特徵取代。申請專利範圍中闡述之實施例涵蓋彼等申請專利範圍之所有可用等效者。
如本申請案中所使用的諸如「水平」之定向術語係相對於平行於晶圓或基體之習知平面或表面的平面而界定,而不管晶圓或基體之定向如何。術語「垂直」指代垂直於如上文所界定之水平的方向。諸如「在......上」、「側」(如在「側壁」中)、「較高」、「下部」、「在......上方」及「在......下方」之介詞係相對於在晶圓或基體之頂部表面上的習知 平面或表面而界定,而不管晶圓或基體之定向如何。
利用疊層封裝體技術之電子系統當前受到封裝體之間的電氣互連件之量限制。當前疊層封裝體技術藉由使用焊球而在封裝體中之一者上形成頂側電氣互連件。焊球之使用將電氣互連件(亦即,I/O埠)之間距限制為大於400um。
與本文中描述的連接第一電子封裝體至第二電子封裝體之方法相關的實施例在模具內部臨時地產生電氣互連件。一旦在模具內部形成電氣互連件,就以批次模式將模具及電氣互連件附接至第一封裝體基體之頂側。接著進行額外製作製程以完成第一電子封裝體,以便製備第一電子封裝體以供以疊層封裝體配置而附接至第二電子封裝體。
與現有疊層封裝體技術相比較,模具之使用允許以較小間距(例如,200至300um)形成電氣互連件。如上文所論述,當前疊層封裝體技術使用將間距限制為大於400um之焊球來形成頂側互連件。
圖1說明製造電子封裝體10之方法[100],方法[100]包括[110]以電導體來填充模具11以在模具11內形成數個電氣互連件12。
圖2為可用於圖1所展示之方法中之實例模具11的側視圖。模具11包括以若干電導體而填充以形成數個電氣互連件12之開口。
圖3為圖2所展示之模具11的俯視圖。與現有疊層 封裝體技術相比較,模具11之使用允許以較小間距(例如,200至300um)形成電氣互連件12。模具11中之開口的數目、配置及/或圖案可取決於電子封裝體10之整體設計而變化。
在圖2及圖3所展示之實例模具11中,模具11中之開口並不自始至終延伸通過模具11。圖4為可用於圖1所展示之方法中之另一實例模具14的側視圖。模具14包括針對形成數個電氣互連件12之若干電導體的開口。在圖4所展示之實例模具14中,模具14中之開口自模具14之一個側延伸至模具14之對置側以使得電氣互連件12自始至終延伸通過模具14。
在一些實例實施例中,[110]以電導體來填充模具11以在模具11內形成數個電氣互連件12可包括以銅來填充模具11。用以填充模具11中之開口以形成電氣互連件12之電氣導體的類型可部分地取決於與製造電子封裝體10相關聯之多種製作及設計考慮。
如圖1所展示,製造電子封裝體10之方法[100]進一步包括[120]將模具11附接至基體15以使得電氣互連件12嚙合基體15上之電氣接點16。圖5展示附接至基體15的圖2之模具11。
在圖5所展示之實例中,將模具11附接至基體15以使得電氣互連件12嚙合基體15上之電氣接點17可包括以焊膏16來將模具11附接至基體15。作為一實例,以焊膏16來將模具11附接至基體15可包括將焊膏16附接至基體15上 之導電墊片17。
將模具11附接至基體15的方式可部分地取決於與製造電子封裝體10相關聯之多種製作及設計考慮而變化。作為實例,可使用銀環氧樹脂或各向異性導電膜(參見(例如)圖5中之ACF 18)來將模具11附接至基體15。
此外,預期到,可將模具11附接至基體15上除了導電墊片17以外之某物。基體15上之電氣連接的類型可取決於與製造電子封裝體10相關聯之多種製作及設計考慮。
如圖1所展示,製造電子封裝體10之方法[100]進一步包括[130]自電氣互連件12移除模具11。圖6展示正自基體15移除的圖5之模具11。自基體15移除模具11的方式可部分地取決於與製造電子封裝體10相關聯之多種製作及設計考慮而變化。
如圖1所展示,製造電子封裝體10之方法[100]進一步包括[140]以電氣絕緣體20來覆蓋電氣互連件12。圖7展示以電氣絕緣體20而覆蓋之電氣互連件12。
在方法[100]之一些形式中,[140]以電氣絕緣體20來覆蓋電氣互連件12可包括移除電氣絕緣體20之部分28以曝露電氣互連件12。圖8展示經移除以曝露電氣互連件的電氣絕緣體20之部分28。
作為一實例,可經由蝕刻或某一其他製程而移除電氣絕緣體20之部分以曝露電氣互連件12。用以移除電氣絕緣體20之部分之製程的類型將取決於與電子封裝體10之製造相關聯的多種製作及設計考慮。
在方法[100]之其他形式中,[140]以電氣絕緣體20來覆蓋電氣互連件12可包括以電氣絕緣體20來覆蓋電氣互連件12以使得電氣互連件12之區段19保持曝露。圖9展示圖7之電氣絕緣體20,其中電氣互連件12包括自電氣絕緣體20曝露之區段19。
製造電子封裝體10之方法[100]可進一步包括[150]在電氣絕緣體20上形成嚙合電氣互連件12之導電墊片22。圖10展示圖9之電氣絕緣體20,其中導電墊片22形成於電氣絕緣體20上。
此外,預期到,除了導電墊片17以外之某物可形成於電氣絕緣體20上。電氣絕緣體20上之電氣連接的類型可取決於與製造電子封裝體10相關聯之多種製作及設計考慮。
製造電子封裝體10之方法[100]可進一步包括[160]將晶粒21附接至基體15以使得晶粒21電氣連接至電氣互連件12中之至少一些。圖5至圖10展示附接至基體15之晶粒21。
可在方法[100]期間以任何已知方式且在任何時間將晶粒21附接至基體15。作為一實例,可在將模具11附接至基體15之前將晶粒21附接至基體15。此外,附接至基體15之晶粒21的類型、大小及配置可部分地取決於與電子封裝體10之效能及製造相關聯的製作及設計考慮。應注意,晶粒21在形式上亦可為置放於彼此之頂部上及/或彼此鄰近地定位的多個晶粒。
圖11說明製造電子封裝體10之另一實例方法[1100]。方法[1100]包括:[1110]產生用於生產電氣互連件12之模具11(例如,玻璃模具);[1120]以電氣導體來填充模具11以在模具11內形成電氣互連件12(參見(例如)圖2至圖4);及[1130]將模具11附接至基體15以使得電氣互連件12嚙合基體15上之電氣接點(參見(例如)圖5)。
方法[1100]可進一步包括[1140]自電氣互連件12移除模具11(參見(例如)圖6),及[1150]以電氣絕緣體20來覆蓋電氣互連件12(參見(例如)圖7)。
在該方法之一些形式中,[1110]產生用於生產電氣互連件12之模具11可包括在模具11中形成收納形成電氣互連件12之電氣導體之孔洞。作為實例,在模具11中形成收納電氣導體之孔洞可包括在模具11中形成部分地延伸通過模具11(參見(例如)圖2)之孔洞,或自模具11之一個側至模具11之對置側全部地延伸通過模具11(參見(例如)圖4)之孔洞。
在該方法之一些形式中,[1110]產生用於生產電氣互連件12之模具11可包括以材料32(例如,聚二甲基矽氧烷)來覆蓋包括電氣互連件狀突出物31之模型30。圖12展示可用以形成圖2所展示之模具11之實例模型30。圖13展示以材料32而覆蓋的圖12之實例模型30。模型30及材料32之組合物可部分地取決於與製造模具11相關聯之多種製作及設計考慮而變化。
此外,[1110]產生用於生產電氣互連件12之模具 11可進一步包括自模型30移除材料32以使得材料32在其自模型30移除時形成模型11。圖14展示在已自模型30移除材料32以形成模具11之後的實例材料31。
圖15說明連接第一電子封裝體10A至第二電子封裝體10B之方法[1500]。方法[1500]包括:[1510]以電導體來填充模具11以在模具11內形成數個電氣互連件12(參見圖2至圖4);[1520]將模具11附接至第一電子封裝體10A之基體15以使得電氣互連件12嚙合基體15上之電氣接點(參見圖5);[1530]自電氣互連件12移除模具11(參見圖6);及[1540]以電氣絕緣體20來覆蓋電氣互連件12以形成第一電子封裝體10A(參見圖7)。
連接第一電子封裝體10A至第二電子封裝體10B之方法[1500]進一步包括[1550]將第一電子封裝體10A附接至第二電子封裝體10B以使得電氣信號經由電氣互連件12而在第一電子封裝體10A與第二電子封裝體10B之間來回行進。
圖16展示第一電子封裝體10A正附接至第二電子封裝體10B之實例形式。第一電子封裝體10A包括使用焊球25而緊固至第二導電封裝體10B之導電墊片22(參見(例如)圖10)。
圖17展示第一電子封裝體10A正附接至第二電子封裝體10B之另一實例形式。第一電子封裝體10A具有經蝕刻出以便曝露電氣互連件12的電氣絕緣體20之部分28(參見(例如)圖8)。
連接第一電子封裝體10A至第二電子封裝體10B之方法[1500]可進一步包括[1560]將晶粒21附接至基體15以使得晶粒21電氣連接至電氣互連件12中之至少一些。圖16及圖17展示附接至第一電子封裝體10A之基體15的晶粒21。
連接第一電子封裝體10A至第二電子封裝體10B之方法[1500]可進一步包括[1505]藉由[1510]以電導體來填充模具11以在模具11內形成數個電氣互連件12(參見(例如)圖2至圖4)而產生用於生產電氣互連件12之模具11(參見(例如)圖14中之模具11)。
此綜述意欲提供本發明之主題的非限制性實例一其並不意欲提供獨佔式或竭盡式解釋。包括【實施方式】以提供關於方法之另外資訊。
為了更好地說明本文中揭示之方法及設備,此處提供實施例之非限制性清單:實例1包括一種製造一電子封裝體之方法。該方法包括以一電導體來填充一模具以在該模具內形成數個電氣互連件。該模具包括以若干電導體而填充以形成數個電氣互連件之開口。製造一電子封裝體之該方法進一步包括將該模具附接至一基體以使得該等電氣互連件嚙合該基體上之電氣接點。
實例2包括請求項1之方法,其中以該電氣導體來填充一模具以在該模具內形成數個電氣互連件包括以銅來填充該模具。
實例3包括實例1至2中任一項之方法,其中將該模具附接至該基體以使得電氣互連件嚙合該基體上之電氣接點包括以一焊膏來將該模具附接至該基體。
實例4包括實例1至3中任一項之方法,其中以一焊膏來將該模具附接至該基體包括將該焊膏附接至該基體上之導電墊片。
實例5包括實例1至4中任一項之方法,其中以一電氣絕緣體來覆蓋該等電氣互連件包括留下自該電氣絕緣體曝露的該等電氣互連件之一部分。
實例6包括實例1至5中任一項之方法,其中以一電氣絕緣體來覆蓋該等電氣互連件包括移除該電氣絕緣體之部分以曝露該等電氣互連件。
實例7包括實例1至6中任一項之方法,其中移除該電氣絕緣體之部分以曝露該等電氣互連件包括蝕刻該電氣絕緣體以曝露該等電氣互連件。
實例8包括實例1至7中任一項之方法,其中以一導電液體來填充一模具以在該模具內形成數個電氣互連件包括填充該模具以使得該電氣導體自該模具之一個側延伸至該模具之一對置側。
實例9包括實例1至8中任一項之方法,其進一步包含在該電氣絕緣體上形成嚙合該等電氣互連件之導電墊片。
實例10包括實例1至9中任一項之方法,且其進一步包括將一晶粒附接至該基體,該晶粒電氣連接至該等電 氣互連件中之至少一些。
實例11包括一種製造一電子封裝體之方法。該方法包括產生用於生產電氣互連件之一模具,及以一電氣導體來填充該模具以在該模具內形成該等電氣互連件。該方法進一步包括將該模具附接至基體以使得電氣互連件嚙合該基體上之電氣接點。
實例12包括實例11之方法,且其進一步包括自該等電氣互連件移除該模具,及以一電氣絕緣體來覆蓋該等電氣互連件。
實例13包括實例11至12中任一項之方法,其中產生用於生產電氣互連件之一模具包括在該模具中形成收納該電氣導體之孔洞。
實例14包括實例11至13中任一項之方法,其中在該模具中形成收納該電氣導體之孔洞包括在該模具中形成自該模具之一個側延伸至該模具之一對置側的孔洞。
實例15包括實例11至14中任一項之方法,其中產生用於生產電氣互連件之一模具包含以一材料來覆蓋包括電氣互連件狀突出物之一模型,及自該模型移除該材料以形成該模具。
實例16包括實例11至15中任一項之方法,其中以一材料來覆蓋包括電氣互連件狀突出物之一模型包括以聚二甲基矽氧烷來覆蓋該模型。
實例17包括實例11至16中任一項之方法,其中產生用於生產電氣互連件之一模具包括產生用於生產電氣互 連件之一玻璃模具。
實例18包括一種連接一第一電子封裝體至一第二電子封裝體。該方法包括以一電氣導體來填充一模具以在該模具內形成數個電氣互連件,及將該模具附接至該第一電子封裝體之一基體以使得電氣互連件嚙合該基體上之電氣接點。該方法進一步包括自該等電氣互連件移除該模具,及以一電氣絕緣體來覆蓋該等電氣互連件以形成該第一電子封裝體。該方法進一步包括將該第一電子封裝體附接至該第二電子封裝體以使得電氣信號經由該等電氣互連件而在該第一電子封裝體與該第二電子封裝體之間來回行進。
實例19包括實例18之方法,且其進一步包括產生用於生產該等電氣互連件之該模具。
實例20包括實例18至19中任一項之方法,且其進一步包括將一晶粒附接至該第一電子封裝體之該基體以使得該晶粒電氣連接至該等電氣互連件中之至少一些。
在【實施方式】中將部分地闡述本發明之電子裝置、焊料組合物及相關方法之此等及其他實例及特徵。此綜述意欲提供本發明之主題的非限制性實例一其並不意欲提供獨佔式或竭盡式解釋。包括【實施方式】以提供關於系統及方法之另外資訊。
以上【實施方式】包括對隨附圖式之參考,隨附圖式形成【實施方式】之部分。圖式作為說明而展示可供實踐本發明之特定實施例。此等實施例在本文中亦被稱作 「實例」。此等實例可包括除了所展示或描述之元件以外的元件。然而,本發明者亦預期僅提供所展示或描述之彼等元件的實例。此外,本發明者亦預期使用所展示或描述之彼等元件之任何組合或排列的實例(或其一或多個態樣),其係關於特定實例(或其一或多個態樣),抑或關於本文中展示或描述之其他實例(或其一或多個態樣)。
在此文件中,如在專利文件中所常見,術語「一」獨立於「至少一個」或「一或多個」之任何其他例項或用法而用以包括一個或一個以上。在此文件中,術語「或」用以指代非獨占式或,使得「A或B」包括「A而非B」、「B而非A」及「A及B」,除非另有指示。在此文件中,術語「包括」及「其中(in which)」用作各別術語「包含」及「其中(wherein)」之通俗易懂的等效者。又,在以下申請專利範圍中,術語「包括」及「包含」為開放式,亦即,包括除了在請求項中列舉於此術語之後的元素以外之元素的系統、裝置、物品、組合物、調配物或製程仍被認為在彼請求項之範疇內。此外,在以下申請專利範圍中,術語「第一」、「第二」及「第三」等等僅僅用作標記,且並不意欲對其物件強加數值要求。
以上描述意欲為說明性的而非限制性的。舉例而言,上述實例(或其一或多個態樣)可彼此組合而使用。例如,一般熟習此項技術者在審閱以上描述後就可使用其他實施例。提供發明摘要以符合37 C.F.R.§1.72(b),從而允許讀者快速地確定技術揭示內容之本質。遵從以下理解:發 明摘要將不用以解釋或限制申請專利範圍之範疇或意義。又,在以上【實施方式】中,可將各種特徵分組在一起以簡化本發明。不應將此情形解釋為希望未主張之所揭示特徵對於任何請求項而言係必需的。實情為,本發明之主題可在於比特定所揭示實施例之所有特徵更少的特徵。因此,據此將以下申請專利範圍併入至【實施方式】中,其中每一請求項可獨立地作為一單獨實施例,且預期到,此等實施例可以各種組合或排列而彼此組合。應參考隨附申請專利範圍連同具有此等申請專利範圍之資格之等效者的全部範疇來判定本發明之範疇。
100‧‧‧方法
110、120、130、140、150、160‧‧‧步驟

Claims (20)

  1. 一種用於互連之方法,其包含:以一電導體來填充一模具以在該模具內形成數個電氣互連件;將該模具附接至一基體以使得該等電氣互連件嚙合該基體上之電氣接點;自該等電氣互連件移除該模具;以及以一電氣絕緣體來覆蓋該等電氣互連件。
  2. 如請求項1之方法,其中以該電氣導體來填充一模具以在該模具內形成數個電氣互連件包括以銅來填充該模具。
  3. 如請求項1之方法,其中將該模具附接至該基體以使得電氣互連件嚙合該基體上之電氣接點包括以一焊膏來將該模具附接至該基體。
  4. 如請求項3之方法,其中以一焊膏來將該模具附接至該基體包括將該焊膏附接至該基體上之導電墊片。
  5. 如請求項1之方法,其中以一電氣絕緣體來覆蓋該等電氣互連件包括留下自該電氣絕緣體所曝露的該等電氣互連件之一部分。
  6. 如請求項1之方法,其中以一電氣絕緣體來覆蓋該等電氣互連件包括移除該電氣絕緣體之部分以曝露該等電氣互連件。
  7. 如請求項6之方法,其中移除該電氣絕緣體之部分以曝 露該等電氣互連件包括蝕刻該電氣絕緣體以曝露該等電氣互連件。
  8. 如請求項1之方法,其中以一導電液體來填充一模具以在該模具內形成數個電氣互連件包括填充該模具以使得該電氣導體自該模具之一側延伸至該模具之一對側。
  9. 如請求項1之方法,其進一步包含在該電氣絕緣體上形成嚙合該等電氣互連件之導電墊片。
  10. 如請求項1之方法,其進一步包含將一晶粒直接附接至該基體上,該晶粒被電氣地連接至該等電氣互連件中之至少一些。
  11. 一種用於互連之方法,其包含:產生用於生產電氣互連件之一模具;以一電氣導體來填充該模具以在該模具內形成該等電氣互連件;以及將該模具附接至該基體以使得電氣互連件嚙合該基體上之電氣接點。
  12. 如請求項11之方法,其進一步包含:自該等電氣互連件移除該模具;以及以一電氣絕緣體來覆蓋該等電氣互連件。
  13. 如請求項11之方法,其中產生用於生產電氣互連件之一模具包括在該模具中形成接收該電氣導體之孔洞。
  14. 如請求項13之方法,其中在該模具中形成接收該電氣導體之孔洞包括在該模具中形成自該模具之一側延伸至該模具之一對側的孔洞。
  15. 如請求項11之方法,其中產生用於生產電氣互連件之一模具包含:以一材料來覆蓋包括電氣互連件狀突出物之一模型;以及自該模型移除該材料以形成該模具。
  16. 如請求項15之方法,其中以一材料來覆蓋包括電氣互連件狀突出物之一模型包括以聚二甲基矽氧烷來覆蓋該模型。
  17. 如請求項11之方法,其中產生用於生產電氣互連件之一模具包括產生用於生產電氣互連件之一玻璃模具。
  18. 一種連接一第一電子封裝體至一第二電子封裝體之方法,其包含:以一電氣導體來填充一模具以在該模具內形成數個電氣互連件;將該模具附接至該第一電子封裝體之一基體以使得電氣互連件嚙合該基體上之電氣接點;自該等電氣互連件移除該模具;以一電氣絕緣體來覆蓋該等電氣互連件以形成該第一電子封裝體;將該第一電子封裝體附接至該第二電子封裝體以使得該等電氣互連件能夠在該第一電子封裝體與該第二電子封裝體之間來回傳輸電氣信號。
  19. 如請求項18之方法,其進一步包含產生用於生產該等電氣互連件之該模具。
  20. 如請求項18之方法,其進一步包含將一晶粒附接至該第一電子封裝體之該基體以使得該晶粒被電氣地連接至該等電氣互連件中之至少一些。
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070246441A1 (en) * 2006-04-25 2007-10-25 Jin Wuk Kim Resist composition, method for forming resist pattern using the same, array substrate fabricated using the same and method of fabricating the array substrate
US20090095518A1 (en) * 2007-10-05 2009-04-16 Shinko Electric Industries Co., Ltd. Wiring board and method of manufacturing the same

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63304636A (ja) * 1987-06-05 1988-12-12 Hitachi Ltd はんだキヤリア及びその製法並びにこれを用いた半導体装置の実装方法
US6295730B1 (en) * 1999-09-02 2001-10-02 Micron Technology, Inc. Method and apparatus for forming metal contacts on a substrate

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070246441A1 (en) * 2006-04-25 2007-10-25 Jin Wuk Kim Resist composition, method for forming resist pattern using the same, array substrate fabricated using the same and method of fabricating the array substrate
US20090095518A1 (en) * 2007-10-05 2009-04-16 Shinko Electric Industries Co., Ltd. Wiring board and method of manufacturing the same

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