TWI575748B - Ｐ型場效電晶體及包含該ｐ型場效電晶體的互補式金屬氧化半導體電晶體 - Google Patents

Ｐ型場效電晶體及包含該ｐ型場效電晶體的互補式金屬氧化半導體電晶體 Download PDF

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TWI575748B
TWI575748B TW103130143A TW103130143A TWI575748B TW I575748 B TWI575748 B TW I575748B TW 103130143 A TW103130143 A TW 103130143A TW 103130143 A TW103130143 A TW 103130143A TW I575748 B TWI575748 B TW I575748B
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field effect
effect transistor
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翁文寅
黃正同
許維恆
吳奕廷
林育名
王荏滺
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聯華電子股份有限公司
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Description

P型場效電晶體及包含該P型場效電晶體的互補式金屬氧化半導體電晶體
本發明是有關於一種場效電晶體，且特別是有關於一種金屬氧化半導體電晶體。
金屬氧化半導體電晶體(Metal-Oxide Semiconductor Transistor，以下簡稱為MOS)乃半導體技術中一種重要的基本電子單體。MOS元件基本上可分為三種類型：(1)N通道MOS(N-Channel MOS，以下簡稱NMOS)，(2)P通道MOS(P-Channel MOS，以下簡稱PMOS)，以及(3)互補式(Complementary)MOS(以下簡稱CMOS)。其中CMOS是由一個NMOS及一個PMOS所組成的。這種以閘極電壓大小來決定開關狀態，同時以源極電壓大小來決定流經通道的電流的電晶體，被稱做為場效電晶體(Field Effect Transistor)，也因此NMOS及PMOS又可稱為NFET及PFET。
電晶體元件因其材質本身、材質之間的接觸面及結構等等因素而存在各種電阻，這些電阻對電晶體元件的效能有非常重要的影響。電晶體中的電阻主要有形成於汲極與源極之間的通道電阻(channel resist)及通稱為非本徵電阻(extrinsic resist)的其他電阻。如圖1所示，在MOS元件1中，非本徵電阻包括源極11(或汲極，圖中未示)與導電金屬層12之間的接觸電阻(contact resist)、導電金屬層12本身材質的內電阻(metal resist)，以及閘極13與源極11或汲極之間的延伸電阻(extension resist)所組成。在MOS製程向更 小線寬發展時(例如，自90nm往22nm發展)，通道的長度愈短，則通道電阻會愈小，但非本徵電阻則反之，故如何降低本徵電阻，成為重要的課題。
非本徵電阻中，以接觸電阻佔最大的比例。接觸電阻的大小，則主要由以下公式(1)中的電阻率ρc來決定： 其中，ΦB為金屬-半導體功函數，ND可視為半導體的載子濃度，m*則為半導體中的等效載子質量(effective carrier mass)，其他符號則為常數，在此不做贅述。
傳統的MOS結構，是以矽化金屬(silicide)，如矽化鎳、矽化鈦等作為與汲極/源極相接觸的導線。然而，由於金屬層係直接與半導體層接觸(MS contact)，而二者之接觸表面存在有缺陷，導致其功函數無法下降，產生費米能階鎖定(fermi level pinning)的現象，而使接觸電阻居高不下。為了解決這個問題，S.Datta等人(2014 Symposium on VLSI Technology Digest of Technical Papers)提出了在傳統的金屬與半導體之間另加入一絶緣層(Insulator)，使其成為MIS結構，而使功函數得以降低。
然而，上述的MIS結構雖可有效使NFET的接觸電阻降低，在PFET的結構方面，由於難以選擇適合的絶緣層，故仍然無法降低PFET乃至於CMOS整體的接觸電阻，成為仍待解決的問題。美國專利第7274055號提出了藉由適當的材質選擇來降低接觸電阻的概念。然而，其所揭露的結構，在形成汲極/源極的矽鍺(silicon-germanium，SiGe)層與金屬層之間，是使用多晶矽作為矽鍺層的覆蓋層(capping layer)來連結二者，而受限於矽本身的材質特性，仍然無法使接觸電阻降低至符合需求的程度。
如何降低上述的接觸電阻，以在縮小線寬的半導體元件中得致符合需求的電晶體結構，係為發展本案之主要目的。本發明之一實施例提出一種P型場效電晶體，包括：閘極區；絶緣區，鄰接該閘極區；矽鍺源極區及一矽鍺汲極區，分別鄰接於該絶緣區之二側；通道區，鄰接該絶緣區並形成於該矽鍺源極區及該矽鍺汲極區之間；導電層，分別電連接至該矽鍺源極區及該矽鍺汲極區；以及複數層覆蓋層，連接於該導電層與該矽鍺源極區及該導電層與該矽鍺汲極區之間，由矽層及矽鍺層交錯堆疊組成，其中接觸該矽鍺源極區及該矽鍺汲極區的是矽層，而接觸該導電層的是矽鍺層。其中，該導電層可以是矽化金屬層，其功函數不大於4.2eV。
本發明另提出一種包含上述P型場效電晶體的互補式金屬氧化半導體電晶體，包括：一基板；形成於該基板之該P型場效電晶體；以及形成於該基板之一N型場效電晶體；其中該N型場效電晶體包含閘極區；絶緣區，鄰接該閘極區；源極區及汲極區，分別鄰接於該絶緣區之二側；通道區，鄰接該絶緣區並形成於源極區及汲極區之間；導電層，分別電連接至源極區及汲極區；以及絶緣層，形成於導電層與源極區，及導電層與汲極區之間。
其中，該P型場效電晶體之導電層及該N型場效電晶體之導電層為同時形成，且二者之功函數均不大於4.2eV。
綜上所述，本發明係藉由P型場效電晶體MS結構的多層覆蓋層之結構改良，另可輔以N型場效電晶體的MIS結構，並配合限制導電層功函數的大小，以有效改善習知技術之接觸電阻過大所導致之問題。
為讓本發明之上述和其他目的、特徵和優點能更明顯易懂，下文特舉較佳實施例，並配合所附圖式，作詳細說明如下。
1‧‧‧MOS元件
11‧‧‧源極
12‧‧‧導電金屬層
13‧‧‧閘極
20‧‧‧P型場效電晶體
2‧‧‧基板
21‧‧‧隔絶區
22‧‧‧閘極區
23‧‧‧絶緣區
31‧‧‧矽鍺源極區
32‧‧‧矽鍺汲極區
33‧‧‧通道區
41、42、43‧‧‧導電接觸結構
411、412、413、414‧‧‧覆蓋層
415‧‧‧導電層
50‧‧‧互補式金屬氧化半導體電晶體
51‧‧‧基板
52‧‧‧鰭狀結構
6‧‧‧P型場效電晶體
61‧‧‧汲/源極區
62‧‧‧矽鍺層
63、64、65、66‧‧‧覆蓋層
67‧‧‧導電層
7‧‧‧N型場效電晶體
71‧‧‧汲/源極區
73‧‧‧導電層
圖1為MOS元件之非本徵電阻示意圖。
圖2為本發明之P型場效電晶體的一實施例之剖面示意圖。
圖3為圖2所示之導電接觸結構的局部放大示意圖。
圖4為本發明之互補式金屬氧化半導體電晶體的一實施例之剖面示意圖。
請參閱圖2，P型場效電晶體20形成於一基板2上的兩隔絶區21之間，以與其他基板2上的元件(圖中未示)區隔，其包括閘極區22；鄰接閘極區22的絶緣區23；分別鄰接於絶緣區23之二側的矽鍺源極區31及矽鍺汲極區32；鄰接絶緣區23並形成於矽鍺源極區31及矽鍺汲極區32之間的通道區33；以及導電接觸結構41、42、43，分別形成並電連接於矽鍺源極區31、矽鍺汲極區32及閘極區22的上方。其中，導電接觸結構41、42、43係可以用相同的製程步驟同時形成，故彼此間具有相同的結構。
以圖3所示的導電接觸結構41為例，其係由複數個覆蓋於矽鍺源極區31之上的覆蓋層411、412、413、414，以及覆蓋層414之上的導電層415所組成。與覆蓋層411、412、413、414連接於導電層415與矽鍺源極區31的結構相仿，矽鍺汲極區32上方的導電接觸結構42及閘極區22上方的導電接觸結構43亦因在同一製程中同時製成而具有相同的結構，在此僅以導電接觸結構41為代表。覆蓋層411、412、413、414乃由矽層及矽鍺層交錯堆疊組成，其中接觸矽鍺源極區31及矽鍺汲極區32的是矽層411，而接觸導電層415的則是 矽鍺層414，而覆蓋層412、413則分別為矽鍺層及矽層。導電層415可選自矽化金屬層中，功函數不大於4.2eV者，以進一步降低P型場效電晶體20的非本徵電阻。
上述覆蓋層的數目可視需求及應用調整，只要保持與導電層接觸者為矽鍺層即可。在P型場效電晶體20中，與導電層415接觸的為矽鍺層414，以取代傳統的矽層。由於矽鍺較矽有較大的載子濃度ND及較小的等效載子質量m*，由公式(1)可知，P型場效電晶體20的接觸電阻可更有效的被降低。
上述P型場效電晶體20的結構若應用於互補式金屬氧化半導體電晶體之中，再配合使用前述S.Datta等人所提出的MIS結構於N型場效電晶體之中，以及選用功函數不大於4.2eV的導電層，可以顯著的降低CMOS的非本徵電阻至符合需求的範圍之內。圖4所示的是一包括鰭狀結構52(如FinFET中的鰭狀通道...等)的互補式金屬氧化半導體電晶體50。需注意者，圖4中各元件的配置僅為方便解說的示意標識，非必然為互補式金屬氧化半導體電晶體50在空間中的實際配置，在此先為聲明。互補式金屬氧化半導體電晶體50包括形成於基板51上的P型場效電晶體6及N型場效電晶體7。其中，P型場效電晶體6及N型場效電晶體7之中的閘極區、絶緣區、源極區、汲極區、通道區、導電層以及絶緣層等均可用傳統的CMOS製程來完成，除了在構造、材質及空間上因PFET或NFET，或是因為平面及非平面的電晶體之構造上的不同而略有差異之外，其彼此間的相互連接關係與圖2所示之MOS構造大略相同，在此不再贅述。
而與傳統CMOS不同的部分，主要在於P型場效電晶體6在汲/源極區61與導電層67之間，形成有覆蓋層63、64、65、66，分別由矽/矽鍺/矽/矽鍺形成，如此與導電層67相鄰接觸的矽鍺層66，可大幅降低PFET中半導體/金屬層間的接觸電阻。另一方面，在N型場效電晶體7中，汲/源極區71與導電層73並非如傳統NFET般直接接觸， 而是在兩者間形成絶緣層72，以避免產生費米能階鎖定現象而使接觸電阻無法下降。另外，P型場效電晶體6之導電層67及N型場效電晶體7之導電層73為在同一製步驟中同時形成，且二者之功函數均不大於4.2eV，使互補式金屬氧化半導體電晶體50的非本徵電阻可以進一步降低。
綜上所述，本發明係藉由變更P型場效電晶體中矽鍺汲/源極與導電層間的覆蓋層結構，利用多層矽/矽鍺交替覆蓋的覆蓋層，並使與導電層接觸的覆蓋層為矽鍺，利用矽鍺較大的載子濃度及較低的等效載子質量，以便降低PFET的半導體/金屬接面的接觸電阻。另外，將此類PFET結構結合具有MIS結構的NFET共同構成CMOS，配合功函數不大於4.2eV的導電層，可使CMOS的整體非本徵電阻顯著的下降，而達成實務應用上的需求。雖然本發明已以較佳實施例揭露如上，然其並非用以限定本發明，任何熟習此技藝者，在不脫離本發明之精神和範圍內，當可作些許之更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。
50‧‧‧互補式金屬氧化半導體電晶體
51‧‧‧基板
52‧‧‧鰭狀結構
6‧‧‧P型場效電晶體
61‧‧‧汲/源極區
62‧‧‧矽鍺層
63、64、65、66‧‧‧覆蓋層
67‧‧‧導電層
7‧‧‧N型場效電晶體
71‧‧‧汲/源極區
73‧‧‧導電層

Claims (5)

  1. 一種P型場效電晶體，包括：一閘極區；一絶緣區，鄰接該閘極區；一矽鍺源極區及一矽鍺汲極區，分別鄰接於該絶緣區之二側；一通道區，鄰接該絶緣區並形成於該矽鍺源極區及該矽鍺汲極區之間；一導電層，分別電連接至該矽鍺源極區及該矽鍺汲極區；以及複數層覆蓋層，連接於該導電層與該矽鍺源極區及該導電層與該矽鍺汲極區之間，由矽層及矽鍺層交錯堆疊組成，其中該複數層覆蓋層至少四層，且接觸該矽鍺源極區及該矽鍺汲極區的是矽層，而接觸該導電層的是矽鍺層。
  2. 如申請專利範圍第1項所述之P型場效電晶體，其中該導電層為矽化金屬層。
  3. 如申請專利範圍第1項所述之P型場效電晶體，其中該導電層之功函數不大於4.2eV。
  4. 一種包含如申請專利範圍第1至3項之任一項所述之P型場效電晶體的互補式金屬氧化半導體電晶體，包括：一基板；形成於該基板之該P型場效電晶體；以及形成於該基板之一N型場效電晶體；其中該N型場效電晶體包含一閘極區； 一絶緣區，鄰接該閘極區；一源極區及一汲極區，分別鄰接於該絶緣區之二側；一通道區，鄰接該絶緣區並形成於該源極區及該汲極區之間；一導電層，分別電連接至該源極區及該汲極區；以及一絶緣層，形成於該導電層與該源極區，及該導電層與該汲極區之間。
  5. 如申請專利範圍第4項所述之互補式金屬氧化半導體電晶體，其中該P型場效電晶體之導電層及該N型場效電晶體之導電層為同時形成，且二者之功函數均不大於4.2eV。
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090108308A1 (en) * 2007-10-31 2009-04-30 Jusung Engineering Co., Ltd Transistor and method of fabricating the same
US20120056245A1 (en) * 2010-09-07 2012-03-08 Samsung Electronics Co., Ltd. Semiconductor devices including silicide regions and methods of fabricating the same
US8324043B2 (en) * 2008-11-20 2012-12-04 Samsung Electronics Co., Ltd. Methods of manufacturing semiconductor devices with Si and SiGe epitaxial layers
US20130285155A1 (en) * 2011-12-20 2013-10-31 Glenn A. Glass Iii-v layers for n-type and p-type mos source-drain contacts

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3547419B2 (ja) * 2001-03-13 2004-07-28 株式会社東芝 半導体装置及びその製造方法
US6949482B2 (en) 2003-12-08 2005-09-27 Intel Corporation Method for improving transistor performance through reducing the salicide interface resistance
US7175709B2 (en) * 2004-05-17 2007-02-13 Taiwan Semiconductor Manufacturing Co., Ltd. Epitaxy layer and method of forming the same
KR100669733B1 (ko) 2004-10-14 2007-01-16 삼성에스디아이 주식회사 유기박막 트랜지스터 및 이를 이용한 유기전계 발광표시장치
JP2008159803A (ja) * 2006-12-22 2008-07-10 Toshiba Corp 半導体装置
US7544997B2 (en) * 2007-02-16 2009-06-09 Freescale Semiconductor, Inc. Multi-layer source/drain stressor
KR101714003B1 (ko) * 2010-03-19 2017-03-09 삼성전자 주식회사 패시티드 반도체패턴을 갖는 반도체소자 형성방법 및 관련된 소자
US8395165B2 (en) 2011-07-08 2013-03-12 Bridelux, Inc. Laterally contacted blue LED with superlattice current spreading layer
KR20140038826A (ko) * 2012-09-21 2014-03-31 삼성전자주식회사 트랜지스터를 포함하는 반도체 소자 및 그 제조 방법

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090108308A1 (en) * 2007-10-31 2009-04-30 Jusung Engineering Co., Ltd Transistor and method of fabricating the same
US8324043B2 (en) * 2008-11-20 2012-12-04 Samsung Electronics Co., Ltd. Methods of manufacturing semiconductor devices with Si and SiGe epitaxial layers
US20120056245A1 (en) * 2010-09-07 2012-03-08 Samsung Electronics Co., Ltd. Semiconductor devices including silicide regions and methods of fabricating the same
US20130285155A1 (en) * 2011-12-20 2013-10-31 Glenn A. Glass Iii-v layers for n-type and p-type mos source-drain contacts

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