TWI565031B - 整合多數元件的單片積體電路晶片 - Google Patents

整合多數元件的單片積體電路晶片 Download PDF

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TWI565031B
TWI565031B TW102118432A TW102118432A TWI565031B TW I565031 B TWI565031 B TW I565031B TW 102118432 A TW102118432 A TW 102118432A TW 102118432 A TW102118432 A TW 102118432A TW I565031 B TWI565031 B TW I565031B
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傑佛瑞Ｈ 桑德斯
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Description

整合多數元件的單片積體電路晶片 發明領域
依據本發明的一或多個實施態樣係有關於半導體技術，且更特別有關於一種單片積體電路(IC)晶片其整合(例如單片地整合)多數個不同類型(例如不同結構和不同材料系統)的電晶體於單一晶片上。
發明背景
不同的半導體材料可被用來造成IC部件，包括矽(Si)和碳化矽(SiC)。
雖Si係普遍用於電子器件，但SiC可被用於高功率電子器件，因其能耐抗高溫度和高電壓。不同類型的電晶體具有不同的結構，譬如雙極接面電晶體(BJT)，接面閘場效應電晶體(JFET)，及金屬氧化物半導體場效應電晶體(MOSFET)等，可由SiC製成。因此，由SiC製成的側向BJT、JFET、或MOSFET可被用於高功率電子器件的IC。相對地，使用不同於SiC之材料製成的MOSFETs之標準互補金屬氧化物半導體(CMOS)電路一般不能耐抗較高的電壓。據此，一利用CMOS技術的單片式IC晶片若未使用SiC MOSFETs 則是不可行的，因SiC對較高的電壓具有一較高的容忍度。
發明概要
較好能提供一種半導體技術，其會整合(例如單片地整合)多個裝置於單一晶片上。因此，本發明的實施態樣提供一種單片式IC晶片，其允許多數個不同結構和不同材料系統的裝置(例如電晶體)能被一起組合在單一基材上。依據本發明之另一實施態樣，一具有一較高產能的單片式IC晶片能配裝於較小的空間內，譬如一X頻帶面板雷達之一單位胞元中。
在依據本發明之一實施例中，一含有多數個電晶體的單片IC晶片包含：一基材；一第一電晶體在該基材上；及一第二電晶體與該第一電晶體一體地形成於該基材上，該第二電晶體具有一與該第一電晶體不同的結構，其中該第一電晶體包含一第一材料系統且該第二電晶體包含一第二材料系統不同於該第一材料系統。
該單片IC晶片更包含一第三電晶體與該等第一和第二電晶體一體地形成於該基材上。
該第一電晶體可包含氮化鎵(GaN)，且該第二和第三電晶體可包含碳化矽(SiC)。
該第一電晶體包含一第一層由GaN所構成，及一第二層由該第一層上的氮化鋁鎵(AlGaN)所構成。
該第一層可具有一大約1μm至3μm的厚度。
該第二層可具有一大約25nm的厚度。
該第一電晶體可為一GaN無線電或微波頻率功率放大器，且該第二電晶體可為一汲極調制器構製成能切換該功率放大器的導通和關閉。
該第二電晶體可包含一p通道FET及一n通道FET。
該第一電晶體可為一異質結構場效應電晶體(HFET)。
該第三電晶體可為一雙極接面電晶體(BIJ)。
該基材可為一Si基材或一SiC基材。
在依據本發明之另一實施例中，一含有多數個裝置的單片IC晶片包含：一功率放大器；一位準轉移器用以將來自一雷達控制器的電壓增升至該晶片之一操作電壓；一高速閘驅動器用以由該位準轉移器接收該增升的電壓並驅動一FET，其中該FET係構製成能切換該功率放大器的導通與關閉；及一檢測電路用以當該功率放大器導通時發送一訊號至該雷達控制器。
該功率放大器可包含GaN。
該位準轉移器，該高速閘驅動器，及該FET之至少一者可包含SiC。
該FET可為一p通道FET或一n通道FET。
該位準轉移器和該高速閘驅動器的至少一者可包含一p通道FET及一n通道FET。
100‧‧‧X頻帶面板雷達
102‧‧‧傳輸/接收單位胞元
104‧‧‧引線電路
106‧‧‧Si汲極調制IC
108‧‧‧限制器
110‧‧‧低雜訊放大器
112‧‧‧功率放大器
202‧‧‧C頻帶單位胞元
206‧‧‧汲極調制電路
300‧‧‧整合結構
301‧‧‧GaN層
302‧‧‧BJT裝置
303‧‧‧AlGaN層
304‧‧‧GaN裝置
305，307，309，311，313，315‧‧‧各層
306‧‧‧CMOS裝置
308‧‧‧源極接點
310‧‧‧閘極接點
312‧‧‧汲極接點
314‧‧‧基材
317‧‧‧pFET
319‧‧‧nFET
321‧‧‧n井
323‧‧‧p型區
325‧‧‧p井
327‧‧‧n型區
329‧‧‧歐姆接觸金屬層
331‧‧‧閘介電疊層
333‧‧‧閘電極
335‧‧‧氧化物層
337‧‧‧互接金屬層
339‧‧‧射極區
341‧‧‧基極區
343‧‧‧集極區
400‧‧‧單片IC晶片
402‧‧‧位準轉移器
404‧‧‧高速閘驅動器
406‧‧‧FET
408‧‧‧功率放大器
410‧‧‧檢測電路
本發明之上述及其它的特徵和態樣將會在其詳 細實施例中參照所附圖式來描述說明而變得更為清楚易知。
圖1為一平面示意圖示出一X頻帶面板雷達的布局。
圖2為一平面示意圖示出一含有汲極調制電路的C頻帶單位胞元，在左上角處，及一X頻帶面板雷達的布局。
圖3為一依據本發明之一實施例之一形成於一基材上的整合結構之截面示意圖。
圖4為一依據一實施例之圖3所示的整合結構之GaN裝置和CMOS裝置的截面示意圖。
圖5為一依據一實施例之圖3所示的整合結構之BJT裝置、GaN裝置和CMOS裝置的截面示意圖。
圖6為一依據本發明之一實施例之一單片IC晶片的功能方塊圖。
較佳實施例之詳細說明
在依據本發明的實施例中，一單片IC晶片包含多數個具有不同結構和不同材料系統的裝置整合在同一基材上。本發明的的實施例將可由以下的詳細說明配合所附圖式而更清楚地瞭解。該等圖式不一定依比例繪製。為了方便之故，該等圖式中的相對標度和比率可能會被放大或縮小。在該等圖式中的標度和比例可為隨機的且不受限於此。
除了BJT、JFET或MOSFET以外，另一類型的電晶體，習知為異質結構場效應電晶體(HFET)者亦可被用來 造成一IC。HFET係使用於高頻用途，而可由氮化鎵(GaN)製成，其為一種供用於高功率和高頻裝置的半導體材料。例如，由GaN製成的電晶體能在比由其它半導體材料製成之電晶體更高的溫度和更高的電壓下操作。因此，GaN電晶體乃可例如被用作高功率主動電子掃描陣列(AESA)中的功率放大器。AESA是一種相位陣列雷達，其中的傳輸器和接收器功能係藉許多的小固態傳輸/接收塊來執行，它們係配裝在一單位胞元(例如模組)的陣列內。一AESA會藉在一天線前方呈特定角度的組構性和解構性干涉來操縱其“射束”。
每一單位胞元含有其各自的電路來執行該傳輸和接收功能。一單位胞元可為小至½吋×½吋，或甚至更小乃視頻率而定。在較高的頻率時，該等單位胞元係較小且較少空間可供使用，因為波長會在較高頻率減小，且單位胞元間隔係為波長之一函數。例如，一C頻帶面板雷達可具有一1吋×1吋大小的單位胞元，而一X頻帶面板雷達可具有一½吋×½吋大小的單位胞元。因此，可能難以將全部的傳輸/接收電路配裝在一較小的單位胞元內。
圖1為一平面示意圖，示出一X頻帶面板雷達100之一布局。如圖1中所示，每一傳輸/接收單位胞元102可包含一普通的引線電路104，一Si汲極調制IC 106(例如一汲極調制脈衝器)，一限制器108，一低雜訊放大器110，及一功率放大器112。功率和邏輯連接器可被連接於單位胞元之間。在各單位胞元102內的功率放大器112可在一高電壓操 作，例如28V至50V，該Si汲極調制IC 106作用如該功率放大器112之一開閉開關(例如一快速開閉開關)。
圖2為一平面示意圖，示出一含有汲極調制電路206的C頻帶單位胞元202，及一X頻帶面板雷達100之一布局。該C頻帶單位胞元202中的汲極調制電路206係能夠在一比該X頻帶面板雷達100中的Si汲極調制IC 106更高的功率操作，但是比一較低功率的汲極調制電路更大。因此，如圖2中所示，一C頻帶面板雷達單位胞元202的汲極調制電路206並非配裝在一X頻帶面板雷達100的較小單位胞元102內。緣是，乃有需要一種具有一較高產能的IC晶片，其會整合(例如單片地整合)多個裝置，包括高功率裝置等，並能配裝在一較小的空間內。
高功率GaN裝置能被使用Si或SiC基材來形成。但是，在一IC中的GaN裝置通常係與同一晶片上的其它GaN裝置整合。緣是，乃有需要一種IC晶片，其會整合(例如單片地整合)多種裝置(例如多種具有不同結構和不同材料系統的電晶體)於單一晶片上。
依據本發明之一態樣，一單片IC晶片會組合(例如一體地組合)多數個不同結構和不同材料系統的裝置於單一晶片上，因此其具有一較高的產能，並能配裝在一較高頻率的AESA之一較小的單位胞元內。
圖3至圖6代表所述的非限制性實施例。例如，雖本發明的實施例主要係參照整合在一SiC基材上的GaN電晶體和SiC電晶體來說明，但本發明並不限制於此。精習於 該技術者依據在此的揭露將可瞭解，任何其它適當的材料和製造方法皆可被用來實行本發明的所揭實施例。例如，不同材料系統的裝置可被使用，且具有不同結構的裝置(例如具有不同結構的電晶體)亦可被使用。此外，該基材可由任何數目的材料製成，譬如一藍寶石基材或一Si基材。
圖3為一依據本發明之一實施例之形成於一基材上的整合結構之一截面示意圖。依據一實施例，該整合結構300包含一BJT裝置302，一GaN裝置304，及一CMOS裝置306共同設在同一晶片上。
依據一實施例，在該GaN裝置304中，一GaN層301係被形成於該基材314(例如SiC基材)上，例如至一大約1~3μm的厚度。一氮化鋁鎵(AlGaN)層303可被形成於該GaN層301上，例如至一大約25nm的厚度。如一舉例，在一實施例中該Ga來源可為三甲基鎵，且該N來源可為氨，但本發明並不受限於此。源極、閘極和汲極接點308、310和312可被形成於該AlGaN層303上，且個別地對應於該GaN裝置304的源極、閘極和汲極區等。
該CMOS裝置306和該BJT裝置302可由SiC構成。該CMOS裝置306可包含一n通道FET(nFET)及一p通道FET(pFET)。此外，精習於該技術者將會瞭解，有見於該等CMOS裝置306和GaN裝置304需要不同的操作電壓，故一或多個位準轉移器(未示出)可被用來中介於該CMOS裝置306與該GaN裝置304之間。
該基材314例如可具有一4H或6H晶體結構，並可 具有一4或6吋的直徑。該基材314可由各種不同的材料製成，譬如SiC、藍寶石或Si。在一實施例中，該基材314為一4H SiC基材，其具有一高電阻率(例如大約10kΩ-cm)且是半絕緣的。
圖4為一依據一實施例之圖3所示的整合結構300之GaN裝置304和CMOS裝置306的截面示意圖。在一實施例中，該GaN裝置304可為一肖特基(Schottky)閘GaN HFET，包含305、307、309、311、313、315等各層，及源極接點308、閘極接點310和汲極接點312。該層305可由氮化鋁(AlN)製成。該層307可由摻雜碳的GaN製成，形成至一例如大約500nm的厚度。該層309可由GaN製成，形成至一例如大約150nm的厚度。該層311可由AlGaN製成，而有一大約26%的Al含量，且形成至一例如大約22nm的厚度。該層313可由氮化矽(SiN)製成，形成至一例如大約50nm的厚度。該閘極接點310可由鎳金(Ni/Au)製成。該層315可由SiN製成，形成至一例如大約250nm的厚度。但是，圖4中所示的實施例並不受限於上述的任何特定材料、結構或厚度。
在一實施例中，該CMOS裝置306包含一pFET 317及一nFET 319。如圖4中所示，該pFET 317具有一n井321和p型區323等。該nFET 319具有一p井325和n型區327等。一歐姆接觸金屬層329係形成於該各p型區323和n型區327上。該pFET 317和nFET 319各有一閘介電疊層331及一閘電極333在該閘介電疊層331上，介於各自的p型區323或n型區327之間。一氧化物層335係形成於該pFET 317和nFET 319 之間，並被一互接金屬層337覆蓋，該互接金屬層337亦形成於該各閘電極333上。
圖5為依據一實施例之圖3中所示的整合結構300之該BJT裝置302、GaN裝置304和CMOS裝置306的截面示意圖。該等GaN裝置304、CMOS裝置306和基材314具有實質上類似於圖4中所示的結構。在一實施例中，該BJT裝置302包含一射極區339、一基極區341、和一集極區343。該BJT裝置302為一NPN電晶體，其中該射極區339是一n型區，該基極區341是一p型區，且該集極區343是一n型區。但是，本發明的實施例並不受限於此，而該BJT裝置302可為一PNP電晶體，或可為一具有一不同結構的裝置，譬如一JFET或一MOSFET。但是，圖5中所示的實施例並不限制於上述的任何特定材料、結構或厚度。
圖6係為一依據本發明之一實施例的單片IC晶片400之一功能方塊圖。在一實施例中，該單片IC晶片400係設在一高頻AESA譬如一X頻帶面板雷達之一單位胞元中。該單片IC晶片400包含一GaN無線電或微波頻率功率放大器408，及SiC汲極調制電路用以切換(例如快速切換)該GaN功率放大器408的導通和關閉。依據一實施例，使用GaN作為該功率放大器408及用SiC作為汲極調制電路，可容許該單片IC晶片400以一雷達所需的較高電壓來操作(例如28V至50V)。在一實施例中，該GaN功率放大器408係使用一GaN HFET來實施。該汲極調制電路係被使用SiC裝置譬如SiC MOSFET來實施。
如圖6中所示，該汲極調制電路可包含一位準轉移器402，一高速閘驅動器404，一FET 406，及一檢測電路410。在一實施例中，一電壓譬如3.3V會由一外部的雷達控制器傳輸至該晶片400上的位準轉移器402。該位準轉移器402會增升該電壓位準至該晶片之一操作電壓位準，譬如28V。該增升的電壓電平嗣會被傳輸至該晶路車上的高速閘驅動器404，其會驅動該FET 406，該FET為一通常截止的電晶體，但當導通時會有一低(例如非常低的)電阻。各該位準轉移器402和該高速閘驅動器404可被實施為一SiC CMOS式的FET，譬如圖4中所示的CMOS裝置306，其包含一nFET及一pFET。該FET 406係可為一nFET或一pFET，當導通時會傳輸一28V的脈衝至該GaN功率放大器408。該汲極調制電路可更包含一檢測電路410，其會發送一訊號至該外部的雷達控制器表示該GaN功率放大器408是導通的。
因此，在依據本發明的實施例中，CMOS和GaN裝置皆被單片地整合在同一SiC基材上。一Si基材上之類似的整合範例係被提供於例如No.2011/0180857美國專利預先公告中，名稱為“在一共同基材上具有矽CMOS電晶體及IV-V族電晶體的結構”，其完整內容併此附送。
因此，具有不同結構和不同材料系統的裝置之各種組合可被整合(例如單片地整合)在單一晶片上。而且，該晶片可在高電壓操作，譬如一雷達所需者，且該傳輸/接收電路可被配裝在一高頻雷達之一較小的單位胞元內。
雖本發明已參照其實施例詳細地示出和描述，但 精習於該技術者將會瞭解在形式和細節上的各種不同變化亦可被作成，而不超出如以下申請專利範圍及其等同物所界定之本發明的精神與範圍。
300‧‧‧整合結構
301‧‧‧GaN層
302‧‧‧BJT裝置
303‧‧‧AlGaN層
304‧‧‧GaN裝置
306‧‧‧CMOS裝置
308‧‧‧源極接點
310‧‧‧閘極接點
312‧‧‧汲極接點
314‧‧‧基材

Claims (14)

  1. 一種含有多數個電晶體的單片積體電路(IC)晶片，包含：一基材；位於該基材上的一第一電晶體；與該第一電晶體一體地形成於該基材上的一第二電晶體，該第二電晶體具有一與該第一電晶體不同的結構；以及與該第一電晶體及該第二電晶體一體地形成於該基材上的一第三電晶體，其具有不同於該第一電晶體及該第二電晶體的一結構；其中該第一電晶體包含一第一材料系統，且該第二電晶體包含與該第一材料系統不同的一第二材料系統；其中該第一電晶體、該第二電晶體及該第三電晶體係從下列元件組成之群組選擇：雙極接面電晶體、接面場效應電晶體、異質結構場效應電晶體、及金屬氧化物半導體場效應電晶體；以及其中該第一電晶體包含氮化鎵(GaN)，且該第二電晶體和該第三電晶體包含碳化矽(SiC)。
  2. 如請求項1之單片IC晶片，其中該第一電晶體包含由GaN所構成的一第一層，及由該第一層上的氮化鋁鎵(AlGaN)所構成的一第二層。
  3. 如請求項2之單片IC晶片，其中該第一層具有一大約1μm至3μm的厚度。
  4. 如請求項2之單片IC晶片，其中該第二層具有一大約25nm的厚度。
  5. 如請求項1之單片IC晶片，其中該第一電晶體是一GaN無線電或微波頻率功率放大器，且該第二電晶體是組構來切換該功率放大器的導通與關閉的一汲極調制器。
  6. 如請求項1之單片IC晶片，其中該第二電晶體包含一p通道FET及一n通道FET。
  7. 如請求項6之單片IC晶片，其中該第一電晶體是一異質結構場效應電晶體(HFET)。
  8. 如請求項7之單片IC晶片，其中該第三電晶體是一雙極接面電晶體(BJT)。
  9. 如請求項1之單片IC晶片，其中該基材是一Si基材或一SiC基材。
  10. 一種含有多數個裝置的單片積體電路(IC)晶片，包含：一功率放大器；一位準轉移器，其係用以將一來自一雷達控制器的電壓提升至該晶片之一操作電壓；一高速閘驅動器，其係用以接收來自該位準轉移器的經提升電壓並驅動一場效應電晶體(FET)，其中該FET係組配來切換該功率放大器的導通和關閉；及一檢測電路，其係用以在該功率放大器導通時傳送一訊號至該雷達控制器；其中該功率放大器包含一異質結構場效應電晶體，且其中該位準轉移器、該高速閘驅動器、及該檢測 電路中之各者包含一金屬氧化物半導體場效應電晶體。
  11. 如請求項10之單片IC晶片，其中該功率放大器包含GaN。
  12. 如請求項11之單片IC晶片，其中該位準轉移器、該高速閘驅動器和該FET中的至少一者包含SiC。
  13. 如請求項12之單片IC晶片，其中該FET是一p通道FET或一n通道FET。
  14. 如請求項12之單片IC晶片，其中該位準轉移器和該高速閘驅動器中的至少一者包含一p通道FET及一n通道FET。
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