TWI533474B - Optoelectronic device - Google Patents

Optoelectronic device Download PDF

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TWI533474B
TWI533474B TW103136727A TW103136727A TWI533474B TW I533474 B TWI533474 B TW I533474B TW 103136727 A TW103136727 A TW 103136727A TW 103136727 A TW103136727 A TW 103136727A TW I533474 B TWI533474 B TW I533474B
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semiconductor
electrode
units
extension
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TW201519473A (en
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沈建賦
井長慧
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晶元光電股份有限公司
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    • H01L27/15Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
    • H01L27/153Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
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    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/387Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape with a plurality of electrode regions in direct contact with the semiconductor body and being electrically interconnected by another electrode layer
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    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • HELECTRICITY
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L33/0004Devices characterised by their operation
    • H01L33/0008Devices characterised by their operation having p-n or hi-lo junctions
    • H01L33/0012Devices characterised by their operation having p-n or hi-lo junctions p-i-n devices
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    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/382Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body
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    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • HELECTRICITY
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    • H01L33/36Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

Description

光電元件Optoelectronic component

【1】 本發明係關於一發光元件陣列。[1] The present invention relates to an array of light-emitting elements.

【2】 由於固態照明元件中的發光二極體具有低耗電量、低熱產生、操作壽命長、耐撞擊、體積小、反應速度快、以及可發出穩定波長的色光等良好光電特性,因此已廣泛應用於家電、儀表之指示燈、以及光電產品等。在光電技術發展中,固態照明元件著重於其發光效率、操作壽命以及亮度,因而預期在不久的將來能成為照明應用的主流。 【3】 在目前LED以陣列型發光元件之形式被使用,其多適用於高驅動電壓之應用,且可減少LED的體積及重量。LED製造者針對陣列型發光元件設計不同的電極佈局以滿足客戶對高驅動電壓LED的需求,以降低成本進而提高生產效率。[2] Since the light-emitting diode in the solid-state lighting element has good photoelectric characteristics such as low power consumption, low heat generation, long operating life, impact resistance, small volume, fast response speed, and color light that can emit stable wavelength, Widely used in home appliances, instrument indicators, and optoelectronic products. In the development of optoelectronic technology, solid-state lighting components focus on their luminous efficiency, operating life and brightness, and are expected to become the mainstream of lighting applications in the near future. [3] At present, LEDs are used in the form of array type light-emitting elements, which are suitable for high driving voltage applications and can reduce the size and weight of LEDs. LED manufacturers design different electrode layouts for array-type light-emitting components to meet customer demand for high-drive voltage LEDs to reduce cost and increase production efficiency.

【4】 本案提出一光電元件,包含一基板;複數個半導體單元,彼此電性連接位於此基板上;其中,每一個半導體單元皆包含一第一半導體層,一第二半導體層,以及一活性區介於其之間;複數個第一電極分別位於第一半導體層之上;一連接部形成於此複數個半導體單元上,電性串接此複數個半導體單元;以及複數個第二電極分別位於第二半導體層之上;其中,有一個第一電極包含一第一延伸部,以及有一個第二電極包含一第二延伸部。 【5】 本案提出一光電元件,包含一基板;複數個半導體單元,彼此電性連接位於此基板上;其中,每一個半導體單元皆包含一第一半導體層,一第二半導體層,以及一活性區介於其之間;複數個第一電極分別位於第一半導體層之上;一連接部形成於此複數個半導體單元上以電性串接此複數個半導體單元;以及複數個第二電極分別位於第二半導體層之上;其中,有一個第一電極包含一第一延伸部,以及有一個第二電極包含一第二延伸部,其中此複數個半導體單元之驅動電壓大致相同。 【6】 本案提出一光電元件,包含一基板;複數個半導體單元彼此之間電性連接且位於此基板上,其中各半導體單元包含一第一半導體層、一第二半導體層、以及一活性區介於其之間,複數個第一電極分別位於第一半導體層上;以及複數個第二電極分別位於第二半導體層上,其中複數個半導體單元包含一第一半導體單元,一第二半導體單元,以及一第三半導體單元,第一電極中的至少ㄧ個包含一第一電極墊位於基板最外圍的第一半導體單元上,以及第二電極中的至少ㄧ個包含一第二電極墊位於基板最外圍的第二半導體單元上,其中第一電極及第二電極包含一第一延伸部及一第二延伸部位於沒有電極墊的第三半導體單元上。 【7】 本案提出一光電元件,包含一基板;複數個半導體單元彼此之間電性連接且位於基板上,其中各半導體單元包含一第一半導體層、一第二半導體層、以及一活性區介於其之間;以及複數個第一電極及複數個第二電極分別位於複數個半導體單元上,其中各半導體單元包含一第一半導體單元,一第二半導體單元,以及一第三半導體單元,第一電極中的至少ㄧ個包含一第一電極墊位於第一半導體單元之第二半導體層上,以及第二電極中的至少ㄧ個包含一第二電極墊位於第二半導體單元之第二半導體層上,其中第一電極及第二電極包含一第一延伸部及一第二延伸部位於沒有電極墊的第三半導體單元上。 【8】 本案提出一光電元件,包含一基板;複數個半導體單元以複數行配置於基板上,其中複數個半導體單元各包含一第一半導體層、一第二半導體層、以及一活性區介於第一半導體層及第二半導體層之間;以及一連接部形成於各半導體單元上以電性串接複數個半導體單元,其中各半導體單元的面積大致上彼此相同,且複數個半導體單元配置於不同行中的數量不同。[4] The present invention proposes a photovoltaic element comprising a substrate; a plurality of semiconductor units electrically connected to each other on the substrate; wherein each semiconductor unit comprises a first semiconductor layer, a second semiconductor layer, and an active layer a region between which; a plurality of first electrodes are respectively located on the first semiconductor layer; a connection portion is formed on the plurality of semiconductor units, electrically connecting the plurality of semiconductor units; and the plurality of second electrodes are respectively Located on the second semiconductor layer; wherein a first electrode includes a first extension and a second electrode includes a second extension. [5] The present invention proposes a photovoltaic element comprising a substrate; a plurality of semiconductor units electrically connected to each other on the substrate; wherein each semiconductor unit comprises a first semiconductor layer, a second semiconductor layer, and an active layer a region between which; a plurality of first electrodes are respectively disposed on the first semiconductor layer; a connection portion is formed on the plurality of semiconductor units to electrically connect the plurality of semiconductor units; and the plurality of second electrodes are respectively Located on the second semiconductor layer; wherein a first electrode includes a first extension and a second electrode includes a second extension, wherein the driving voltages of the plurality of semiconductor units are substantially the same. [6] The present invention proposes a photovoltaic element comprising a substrate; a plurality of semiconductor units electrically connected to each other and located on the substrate, wherein each semiconductor unit comprises a first semiconductor layer, a second semiconductor layer, and an active region Between them, a plurality of first electrodes are respectively located on the first semiconductor layer; and a plurality of second electrodes are respectively located on the second semiconductor layer, wherein the plurality of semiconductor units comprise a first semiconductor unit and a second semiconductor unit And a third semiconductor unit, at least one of the first electrodes includes a first electrode pad on the first semiconductor unit at the outermost periphery of the substrate, and at least one of the second electrodes includes a second electrode pad on the substrate The second semiconductor unit of the outermost periphery, wherein the first electrode and the second electrode comprise a first extension portion and a second extension portion on the third semiconductor unit without the electrode pad. [7] The present invention proposes a photovoltaic element comprising a substrate; a plurality of semiconductor units electrically connected to each other and on the substrate, wherein each semiconductor unit comprises a first semiconductor layer, a second semiconductor layer, and an active region And a plurality of first electrodes and a plurality of second electrodes respectively on the plurality of semiconductor units, wherein each of the semiconductor units comprises a first semiconductor unit, a second semiconductor unit, and a third semiconductor unit, At least one of the electrodes includes a first electrode pad on the second semiconductor layer of the first semiconductor unit, and at least one of the second electrodes includes a second electrode pad on the second semiconductor layer of the second semiconductor unit The first electrode and the second electrode comprise a first extension portion and a second extension portion on the third semiconductor unit without the electrode pad. [8] The present invention proposes a photovoltaic element comprising a substrate; a plurality of semiconductor units are disposed on the substrate in a plurality of rows, wherein the plurality of semiconductor units each comprise a first semiconductor layer, a second semiconductor layer, and an active region Between the first semiconductor layer and the second semiconductor layer; and a connection portion formed on each of the semiconductor units to electrically connect a plurality of semiconductor units, wherein the semiconductor units have substantially the same area, and the plurality of semiconductor units are disposed The number in different rows is different.

【34】 第1圖揭示一符合本案一實施例之光電元件10之上視圖。光電元件10例如發光二極體(LED)、雷射二極體(LD)、或太陽能電池,包含複數個半導體單元形成於一基板11上,第一電極141,第二電極142,以及連接部143形成於半導體單元上。於本實施例中,光電元件10係為一發光二極體 (LED)。第2圖揭示第1圖中光電元件10沿A-A’線段之剖面圖。每一個半導體單元包含一第一半導體層121,一第二半導體層123,以及介於第一、第二半導體層之間的一活性區122。第一半導體層121的組成材料是一摻雜p-型或n-型雜質的III-V半導體材料,第二半導體層123的組成材料是一摻雜p-型或n-型雜質的III-V半導體材料,且第一半導體層121及第二半導體層123的電性相異。活性區122之結構可為單異質結構(SH)、雙異質結構(DH)、或者多重量子井結構(MQW)。溝槽170藉由蝕刻半導體單元而形成於半導體單元中,且暴露出部份的第一半導體層121。複數個分割道111形成於半導體單元之間,暴露出部份基板11。光電元件10上有複數個第一電極141及第二電極142,其中第一電極141係形成於暴露出的第一半導體層121之上,且第二電極142係形成於第二半導體層123之上。第一電極141包含一第一延伸部1411,第二電極142包含一第二延伸部1421。此外,複數半導體單元中的ㄧ個半導體單元上的其第一電極141包含一第一電極墊1412,且另ㄧ個半導體單元上的第二電極142包含一第二電極墊1422。 【35】 為了滿足客戶對光電元件特定面積、電流及驅動電壓的需求,半導體單元以及電極的佈局也必須特別設計。半導體單元之數量原則上是依公式n=(-1),(),或(+1)加以設計,其中,n代表半導體單元的數量,V代表光電元件的驅動電壓,Vf 代表半導體單元的驅動電壓。在本實施例中,光電元件10的大小是85×85mil2 ,其驅動電壓為72V。每一半導體單元的驅動電壓實質上為3V,但半導體單元的驅動電壓會因製程控制以及磊晶層的品質而有所變化。一般來說,在光電元件的電性效率上,半導體單元的驅動電壓越低越好。每一半導體單元的面積大致上彼此相同。依照上述的公式,光電元件10包含24個半導體單元,分別配置於行105、106、107、108、以及109。第一行105包含五個半導體單元151、152、153、154、以及155,朝一第一方向串接;第二行106包含五個半導體單元161、162、163、164、以及165,朝一第二方向串接;第三行107包含四個半導體單元171、172、173、以及174,朝第一方向串接;第四行108包含五個半導體單元181、182、183、184、以及185,朝第二方向串接;第五行109包含五個半導體單元191、192、193、194、以及195,朝第一方向串接。第一方向及第二方向相反,而不同行中包含不同數量的半導體單元的佈局可使配置上更容易滿足客戶的需求。 【36】 於第三行107中,半導體單元的外形是長方形且與其他行中的半導體單元形狀不同,藉由這樣的設計,可以使電極佈局上更容易。參考第1圖及第3圖,於第一行105及第五行109中,除了位於基板11角落區域的半導體單元151、155、191、以及195外,其他半導體單元上的電極佈局是相似的。於第二行106及第四行108中,除接近基板11邊緣的半導體單元161、165、181、以及185外,其他位於半導體單元上的電極佈局是相同的。第三行107中的半導體單元其電極佈局與其他行中的半導體單元相比差異性較大,但其中之半導體單元172及173上的電極佈局是相同的,而與位於基板11邊緣的半導體單元171及174不同。 【37】 第一延伸部1411包含一第一曲線延伸部1411a;第二延伸部1421包含一第二曲線延伸部1421a,在行105、106、108、及109上的半導體單元的第二延伸部1421更包含一直線延伸部1421b;第一曲線延伸部1411a及/或第二曲線延伸部1421a與半導體單元的任一邊都不互相平行。在第一、三、及五行105、107、及109的半導體單元上的第一延伸部1411位於溝槽170中,並且從半導體單元的第一邊向對側的第二邊延伸,第二延伸部1421則是從半導體單元的第二邊向第一邊延伸。在第二和四行106及108的半導體單元上的第一延伸部1411是從半導體單元的第二邊向第一邊延伸,且第二延伸部1421是從半導體單元的第一邊向第二邊延伸。於本實施例中,第二延伸部1421大致上係靠近半導體單元的邊緣設置,而第一延伸部1411係置於半導體單元溝槽170中,與第一半導體層121電性連接。延伸部的數量可依半導體單元的面積做調整,若半導體單元的面積較大,就需要較多的延伸部。延伸部亦可形成自第一曲線延伸部1411a延伸出的一二階延伸部1411c及/或自第二曲線延伸部1421a延伸出的一二階延伸部1421c,以增加電流分散。 【38】 第一電極墊1412及第二電極墊1422係分別位於基板11的相對角落的半導體單元155及191上,第一電極墊1412與半導體單元155上的第一延伸部1411相接觸,第二電極墊1422與半導體單元191上的第二延伸部1421相接觸;電極墊係作為打線接合(wire bonding)或覆晶式接合(flip chip type bonding)用。為了減少接合上的困難度,電極墊較佳地被分別配置在基板11最外側上的不同的半導體單元上。 【39】 為了要電連接各個半導體單元,一連接部143因此形成於各個半導體單元間,舉例來說,連接部143與第一半導體單元上的第一延伸部1411及相鄰的第二半導體單元上的第二延伸部1421相接。於本實施例中,連接部143於第一、三、及五行105、107、及109之間形成一第一方向的串接,而於第二及四行106及108之間形成一第二方向的反向串接。各行之間藉由連接部143串接半導體單元151及161、165及174、171及181、以及185及195。於第一、二、四、及五行105、106、108、及109中每兩個半導體單元間有兩個連接部143存在於其間,於第三行107中每兩個半導體單元間有一個連接部143存在於其間。第4圖是第1圖中所示之光電元件10的等效電路圖。 【40】 光電元件10之第二半導體層123及第二電極142之間更可包含一透明導電層,透明導電層的材料係一金屬氧化材料,例如氧化銦錫(ITO)、氧化鎘錫(CTO)、氧化銻錫、氧化銦鋅、氧化鋅鋁、或氧化鋅錫。此外,當一金屬層具有能讓光透過的厚度時,也可作為透明導電層。 【41】 於基板11及第一半導體層121之間,更可包含一接合層,使得半導體單元與基板11接合。接合層可為一絕緣透明接合層或是導電透明接合層;若為絕緣透明接合層,其材料可以是聚醯亞胺(polyimide)、苯并環丁烯(BCB)、或過氟環丁烷(PFCB);若為導電接合層的材料,其材料可以是金屬氧化材料或是金屬,金屬氧化材料包含氧化銦錫(ITO)、氧化鎘錫(CTO)、氧化銻錫、氧化銦鋅、氧化鋅鋁、或氧化鋅錫;金屬材料包含鎳、金、鈦、鉻、鋁、或鉑。分割道111形成於各個半導體單元之間,且暴露出部分基板11及/或絕緣透明接合層。當接合層是導電接合層時,分割道111穿過導電接合層暴露出基板11使得各半導體單元之間電性絕緣,此時基板11為氮化鋁(AlN)、藍寶石、或玻璃。 【42】 第5圖揭示一符合本案第二實施例之光電元件20之上視圖。參考第5-6圖,光電元件20包含複數個半導體單元形成於一基板21上,且經由複數個分割道211分隔開來,第一電極241、第二電極242、以及連接部243係形成於半導體單元上。半導體單元的結構與光電元件10的相同,包含第一半導體層121、第二半導體層123,以及介於第一、第二半導體層之間的活性區122。複數個分割道211形成於各半導體單元之間。光電元件20上有複數個第一電極241及第二電極242,其中第一電極241係形成於暴露出的第一半導體層121上,且第二電極242係形成於第二半導體層123上。第一電極241包含一第一延伸部2411,第二電極242包含一第二延伸部2421。此外,複數半導體單元中的ㄧ個半導體單元上的第一電極241包含一第一電極墊2412,且另ㄧ半導體單元上的第二電極242包含一第二電極墊2422。 【43】 於本實施例中,光電元件20的大小是85×85mil2 ,其驅動電壓為72V,每一半導體單元的面積大致上彼此相同,依照上述的公式(-1),光電元件20包含23個半導體單元,分別配置於行205、206、207、208、及209中。第一行205包含五個半導體單元251、252、253、254、及255朝一第一方向串接,且其上的電極佈局與光電元件10第一行105中的半導體單元上的電極佈局相同;第二行206包含四個半導體單元261、262、263、及264朝一第二方向串接,且其上的電極佈局與光電元件10第三行107中的半導體單元上的電極佈局相同;第三行207包含五個半導體單元271、272、273、274、及275朝第一方向串接,且其上的電極佈局與光電元件10第一行105中的半導體單元上的電極佈局相同;第四行208包含四個半導體單元281、282、283、及284朝第二方向串接,且其上的電極佈局與光電元件10第三行107中的半導體單元上的電極佈局相同;第五行209包含五個半導體單元291、292、293、294、及295朝第一方向串接,且其上的電極的佈局與光電元件10第一行105中的半導體單元上的電極佈局相同。 【44】 於第二及四行206、208中,半導體單元的外形是長方形且與其他行中的半導體單元形狀不同。參考第5圖及第6圖,第一行205、第三行207、以及第五行209的半導體單元上的電極佈局,除了半導體單元251、255、271、275、291、及295上的電極外,其他半導體單元上的電極佈局彼此之間大致上相似;第二行206及第四行208的半導體單元上的電極佈局,除了半導體單元261、264、281、及284上的電極外,其他半導體單元上的電極佈局彼此之間大致上相同。第一延伸部2411包含一第一曲線延伸部2411a,且第二延伸部2421包含一第二曲線延伸部2421a。在行205、207、及209的半導體單元上,第二延伸部2421更包含一直線延伸部2421b;第一曲線延伸部2411a與第二曲線延伸部2421a不平行於半導體單元的任一邊。第一、三、及五行205、207、209半導體單元上的第一延伸部2411係設置於第一半導體層121上,且自半導體單元的第一邊向相對於第一邊的第二邊延伸,第二延伸部2421則是從第二邊向第一邊延伸。於第二、及四行206、208半導體單元上的第一延伸部2411係自半導體單元的第二邊向第一邊延伸,第二延伸部2421則是自第一邊向第二邊延伸。於本實施例中,第二延伸部2421大致上係靠近半導體單元的邊緣設置,而第一延伸部2411係置於半導體單元中,與第一半導體層電性連接。延伸部亦可形成自第一曲線延伸部2411a延伸出的一二階延伸部2411c,以增加電流分散。 【45】 第一電極墊2412及第二電極墊2422係分別形成於半導體單元255及291上,第一電極墊2412與半導體單元255上的第一延伸部2411相接觸,第二電極墊2422與半導體單元291上的第二延伸部2421相接觸。電極墊係作為接合(bonding)用,且分別配置在基板21角落區域上的不同的半導體單元上。 【46】 於本實施例中,連接部243於第一、三、及五行205、207、及209之間形成一第一方向的串接,而於第二及四行206及208之間形成一第二方向的反向串接。各行之間藉由連接部243串接半導體單元251及261、264及275、271及281、以及284及295。於第一、三、及五行205、207、及209中每兩個半導體單元間有兩個連接部243,於第二行206及第四行208中每兩個半導體單元間有一個連接部243。第7圖是第5圖中所示之光電元件20的等效電路圖。 【47】 第8圖揭示一符合本案第三實施例之光電元件30之上視圖。參考第8-9圖,光電元件30包含複數個半導體單元形成於一基板31上,第一電極341、第二電極342、以及連接部343形成於半導體單元上。半導體單元的結構包含第一半導體層121、第二半導體層123,以及介於第一、第二半導體層之間的活性區122。複數個分割道311形成於各半導體單元之間。光電元件30上有複數個第一電極341及第二電極342,其中第一電極341包含一第一延伸部3411形成於半導體單元355之外的半導體單元上,第二電極342包含一第二延伸部3421。此外,半導體單元355上的第一電極341包含一第一電極墊3412,且半導體單元391上的第二電極342包含一第二電極墊3422。 【48】 於本實施例中,光電元件30的大小是50×50mil2 ,其驅動電壓為72V,半導體單元的驅動電壓約為3V,每一半導體單元的面積大致上彼此相同。光電元件30包含23個半導體單元,分別配置於行305、306、307、308、及309中。第一行305包含五個半導體單元351、352、353、354、及355朝一第一方向串接;第二行306包含四個半導體單元361、362、363、及364朝一第二方向串接;第三行307包含五個半導體單元371、372、373、374、及375朝第一方向串接;第四行308包含四個半導體單元381、382、383、及384朝第二方向串接;第五行309包含五個半導體單元391、392、393、394、及395朝第一方向串接。 【49】 於第二及四行306、308中,半導體單元的外形與其他行中的半導體單元形狀不同。參考第8圖及第9圖,第一行305、第三行307、以及第五行309的半導體單元上的電極佈局,除了半導體單元351、355、371、375、391、及395上的電極外,其他半導體單元上的電極佈局彼此之間大致上相似;第二行306及第四行308的半導體單元上的電極佈局,除了半導體單元361、364、381、及384上的電極外,其他的彼此之間大致上相同。第一延伸部3411可以是一曲線延伸部3411a,其係設置於接近基板31外圍的半導體單元361、375、381、391、及394上;第一延伸部3411也可以是一直線延伸部3411b,係設置於其他半導體單元上。第二延伸部3421可為一曲線延伸部。 【50】 於第一、三、及五行305、307、309,除了半導體單元375、395外,其他的半導體單元其上的第一延伸部3411係自半導體單元的第一邊向相對於第一邊的第二邊延伸,第二延伸部3421則係自第二邊向第一邊延伸。半導體單元375及395上的第一延伸部3411係自半導體單元的第三邊向第二邊延伸。於第二及四行306、308,除了半導體單元361、381外,其他半導體單元上的第一延伸部3411係自第二邊向第一邊延伸,且第二延伸部3421係自第一邊向第二邊延伸。於半導體單元361及381上的第一延伸部3411係自半導體單元361及381的第三邊向第一邊延伸。第一延伸部3411的曲線延伸部及第二延伸部3421不平行於半導體單元的任一邊。於本實施例中,第二延伸部3421大致上係靠近半導體單元的邊緣設置,而第一延伸部3411係置於半導體單元中,與第一半導體層電性連接。延伸部亦可形成自曲線延伸部3411a及直線延伸部3411b延伸出的一二階延伸部3411c,以增加電流分散。 【51】 第一電極墊3412及第二電極墊3422係分別形成於半導體單元355及391上,第二電極墊3422與半導體單元391上的第二延伸部3421相接觸。電極墊係作為打線接合或覆晶式接合用,且分別配置在基板31角落區域上的不同的半導體單元上。 【52】 於本實施例中,連接部343於第一、三、及五行305、307、及309之間形成一第一方向的串接,而於第二及四行306及308之間形成一第二方向的反向串接。各行之間藉由連接部343串接半導體單元351及361、364及375、371及381、以及384及395。於每兩個半導體單元間有一個連接部343存在於其間。第10圖是第8圖中所示之光電元件30的等效電路圖。 【53】 第11圖揭示一符合本案第四實施例之光電元件40之上視圖。參考第11-12圖,光電元件40包含複數個半導體單元形成於一基板41上,第一電極441、第二電極442、以及連接部443形成於半導體單元上。半導體單元的結構包含第一半導體層121、第二半導體層123,以及介於第一、第二半導體層之間的活性區122。複數個分割道411形成於各半導體單元之間。光電元件40上有複數個第一電極441及第二電極442,其中第一電極441包含一第一延伸部4411形成於半導體單元455之外的半導體單元上,且形成於半導體單元471以外的半導體單元上的第二電極442包含一第二延伸部4421。此外,形成於半導體單元455上的第一電極441包含一第一電極墊4412,且於半導體單元471上的第二電極442包含一第二電極墊4422。 【54】 於本實施例中,光電元件40的大小是45×45mil2 ,其驅動電壓為48V,半導體單元的驅動電壓約為3V;依照上述公式,光電元件40包含16個半導體單元,配置於行405、406、及407中。第一行405包含五個半導體單元451、452、453、454、及455朝一第一方向串接;第二行406包含六個半導體單元461、462、463、464、465、及466朝一第二方向串接;第三行407包含五個半導體單元471、472、473、474、及475朝第一方向串接。 【55】 第二402中的半導體單元的外形與其他行中的半導體單元形狀不同;參考第11圖及第12圖,第一行405以及第三行407的半導體單元上的電極佈局,除了位於半導體單元451、455、471、及475上的電極外,其他半導體單元的電極佈局彼此之間大致上相似。第一延伸部4411包含一直線延伸部4411a以及一二階延伸部4411c,其中所有的第二延伸部4421都是曲線的延伸部。於第一及二行405、407的半導體單元上的第一延伸部4411係自半導體單元的第一邊向相鄰於第一邊的第三邊及第四邊延伸,而第二延伸部4421係自第二邊向第三邊及第四邊延伸。於第二行406的半導體單元上的第一延伸部4411係自半導體單元的第二邊向第三邊及第四邊延伸,而第二延伸部4421係自第一邊向第三邊及第四邊延伸。曲線延伸部4411及4421不平行於半導體單元的任一邊。 【56】 第一電極墊4412及第二電極墊4422係分別位於半導體單元455及471上,連接部443於半導體單元之間形成一串接。第13圖是第11圖中所示之光電元件40的等效電路圖。 【57】 第14圖揭示一符合本案第五實施例之光電元件50之上視圖。第15圖係光電元件50的3D立體圖。光電元件50的大小是40×40mil2 ,其驅動電壓為36V,半導體單元的驅動電壓約為3V;依照公式(-1),於本實施例中,光電元件50包含11個半導體單元,分別配置於行505、506、及507中。第一行505包含四個半導體單元551、552、553、及554朝一第一方向串接;第二行506包含三個半導體單元561、562、及563朝一第二方向串接;第三行507包含四個半導體單元571、572、573、及574朝第一方向串接。具有第一延伸部5411的第一電極541係形成於半導體單元554之外的半導體單元上,具有第二延伸部5421的第二電極542係形成於所有的半導體單元上。半導體單元554上的第一電極541包含一第一電極墊5412,且半導體單元571上的第二電極542包含一第二電極墊5422。連接部543於半導體單元之間形成一串接。第16圖是第14圖中所示之光電元件50的等效電路圖。 【58】 第17圖揭示一符合本案第六實施例之光電元件60之上視圖。第18圖係光電元件60的3D立體圖。光電元件60的大小是120×120mil2 ,其驅動電壓為24V,半導體單元的驅動電壓約為3V;依照公式(),於本實施例中,光電元件60包含8個半導體單元,分別配置於行605、606、及607中。第一行605包含二個半導體單元651及652朝一第一方向串接;第二行606包含四個半導體單元661、662、663、及664朝一第二方向串接;第三行607包含二個半導體單元671及672朝第一方向串接。第一電極641包含一第一延伸部6411,第二電極642包含一第二延伸部6421。此外,複數半導體單元中的ㄧ個半導體單元上的其第一電極641包含二個第一電極墊6412,且另一半導體單元上的第二電極642包含二個第二電極墊6422。連接部643於半導體單元之間形成一串接。第19圖是第17圖中所示之光電元件60的等效電路圖。 【59】 第20圖揭示一符合本案第七實施例之光電元件70之上視圖。第21圖係光電元件70的3D立體圖。光電元件70的大小是120×120mil2 ,其驅動電壓為24V,半導體單元的驅動電壓約為3V;依照公式(-1),於本實施例中,光電元件70包含7個半導體單元,分別配置於行705、706、及707中。第一行705包含二個半導體單元751及752朝一第一方向串接;第二行606包含三個半導體單元761、762、及769朝一第二方向串接;第三行707包含二個半導體單元771及772朝第一方向串接。第一電極741包含一第一延伸部7411,第二電極742包含一第二延伸部7421。此外,複數半導體單元中的ㄧ個半導體單元上的第一電極741包含二個第一電極墊7412,且另一半導體單元上的第二電極742包含二個第二電極墊7422。連接部743於半導體單元之間形成一串接。第22圖是第20圖中所示之光電元件70的等效電路圖。 【60】 第23圖揭示一符合本案第八實施例之光電元件80之上視圖。第24圖係光電元件80的3D立體圖。光電元件80的大小是85×85mil2 ,其驅動電壓為144V,半導體單元的驅動電壓約為3V;依照公式(),於本實施例中,光電元件80包含48個半導體單元配置於行801、802、803、804、805、806及807中。行801、803、805、及807中分別包含七個半導體單元朝一第一方向串接;行802及806中包含七個半導體單元朝一第二方向串接;第四行804包含六個半導體單元朝第一方向串接。複數半導體單元中的ㄧ個半導體單元上的第一電極841包含一第一電極墊8412位於半導體單元811的第一半導體層121上,且半導體單元871上的第二電極842包含一第二電極墊8422,其係位於第二半導體層123上。此外,具有第一延伸部8411的第一電極841係位於第一電極墊8412所置的半導體單元之外的半導體單元上;具有第二延伸部8421的第二電極842係位於所有半導體單元上。連接部843於半導體單元之間形成一串接。第一電極墊8412所位於的半導體單元811上的第二電極842係位於第二半導體層123上,藉由連接部843與半導體單元812的第一電極841連接;第二電極墊8422所位於的半導體單元871上的第一電極841係位於第一半導體層121上,藉由連接部843與半導體單元872的第二電極842連接。 【61】 第25圖揭示一符合本案第九實施例之光電元件90之上視圖。光電元件90包含48個半導體單元配置於行801、802、803、804、805、806及807中。其外觀及電極配置與光電元件80相似,差別在於第一電極墊9412係形成於半導體單元811的第二半導體層123上,藉由連接部843與半導體單元812的第一電極841形成串接;第二電極墊9422係形成於半導體單元871的第二半導體層123上,藉由連接部843與半導體單元872的第二電極842形成串接。當有一外部電源供應電流自第二電極墊9422注入,再由第一電極墊9412輸出時,由於第二電極墊9422下的半導體單元871電阻大於其與連接部843與半導體單元872的第二電極842的串接電阻,因此電流直接自第二電極墊9422經由連接部843流向半導體單元812的第一電極841,而不會流向半導體單元871下的第一半導體層121、活性區122、以及第二半導體層123。同樣的電流在流至半導體單元812的第一電極841,經由連接部843流向第一電極墊9412後,並不會流向半導體單元811下方的第一半導體層121、活性區122、以及第二半導體層123,而是直接輸出至外部電源。因此第一電極墊9412及第二電極墊9422下方的半導體單元811及871不會產生光。為了進一步電性隔絕電極墊及下方半導體單元,可於電極墊與半導體單元之間形成一絕緣層,避免因大電流造成電流貫穿電極墊下方的半導體層形成短路。 【62】 由於第一電極墊9412及第二電極墊9422下方的半導體單元不發光,因此第一電極墊9412面積可與半導體單元811的面積大致相當,第二電極墊9422面積可與半導體單元871的面積大致相當,以提升打線製程之良率。此外,光電元件90中第一電極墊9412亦可與光電元件80中的第二電極墊8422搭配,此時第一電極墊9412係大致整面覆蓋於半導體單元811的第二半導體層123上,而第二電極墊8422係位於半導體單元871的部份第二半導體層123之上;第一電極墊9412下方的半導體單元無電流注入,因此不發光,而第二電極墊8422所位於的半導體單元871上的第一電極841,藉由連接部843與半導體單元872的第二電極842連接,當電流注入時,第二電極墊8422所位於的的半導體單元871會發光。同樣地,光電元件90中第二電極墊9422亦可與光電元件80中的第一電極墊8412搭配,此時第一電極墊8412係位於半導體單元811的部份第一半導體121之上,而第二電極墊9422係大致整面覆蓋於半導體單元871的第二半導體層123之上;第一電極墊所位於的半導體單元811上的第二電極842,藉由連接部843與半導體單元812的第一電極841連接,當電流注入時,第一電極墊8412所位於的半導體單元811會發光,而注入第二電極墊9422的電流並不會流經半導體單元871的活性區122,而係直接藉由連接部843流向半導體單元872,因此第二電極墊9422所位於的半導體單元871不發光。 【63】 第一半導體層、活性層、及第二半導體層的材料包含一或多個元素選自於Ga、Al、In、As、P、N及Si所構成的群組,例如GaN、AlGaN、InGaN、AlGaInN、GaP、GaAs、GaAsP、GaNAs、或Si;基板的材料包含藍寶石、GaAs、GaP、SiC、ZnO、GaN、AlN、Cu、或Si。 【64】 本發明所列舉之各實施例僅用以說明本發明,並非用以限制本發明之範圍。任何人對本發明所作之任何顯而易知之修飾或變更皆不脫離本發明之精神與範圍。BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a top plan view of a photovoltaic element 10 in accordance with an embodiment of the present invention. The photovoltaic element 10, such as a light emitting diode (LED), a laser diode (LD), or a solar cell, includes a plurality of semiconductor units formed on a substrate 11, a first electrode 141, a second electrode 142, and a connection portion. 143 is formed on the semiconductor unit. In this embodiment, the photovoltaic element 10 is a light emitting diode (LED). Fig. 2 is a cross-sectional view showing the photovoltaic element 10 taken along line A-A' in Fig. 1. Each of the semiconductor units includes a first semiconductor layer 121, a second semiconductor layer 123, and an active region 122 interposed between the first and second semiconductor layers. The constituent material of the first semiconductor layer 121 is a III-V semiconductor material doped with p-type or n-type impurities, and the constituent material of the second semiconductor layer 123 is a III-doped p-type or n-type impurity. V semiconductor material, and the electrical properties of the first semiconductor layer 121 and the second semiconductor layer 123 are different. The structure of the active region 122 may be a single heterostructure (SH), a double heterostructure (DH), or a multiple quantum well structure (MQW). The trench 170 is formed in the semiconductor unit by etching the semiconductor unit, and a portion of the first semiconductor layer 121 is exposed. A plurality of divided tracks 111 are formed between the semiconductor units to expose a portion of the substrate 11. The photo-electric element 10 has a plurality of first electrodes 141 and second electrodes 142, wherein the first electrode 141 is formed on the exposed first semiconductor layer 121, and the second electrode 142 is formed on the second semiconductor layer 123. on. The first electrode 141 includes a first extension portion 1411, and the second electrode 142 includes a second extension portion 1421. In addition, the first electrode 141 of the plurality of semiconductor units in the plurality of semiconductor units includes a first electrode pad 1412, and the second electrode 142 of the other semiconductor unit includes a second electrode pad 1422. [35] In order to meet the customer's demand for specific area, current and driving voltage of the photovoltaic element, the layout of the semiconductor unit and the electrode must also be specially designed. The number of semiconductor units is in principle based on the formula n=( -1),( ),or( +1) is designed in which n represents the number of semiconductor units, V represents the driving voltage of the photovoltaic element, and V f represents the driving voltage of the semiconductor unit. In the present embodiment, the size of the photovoltaic element 10 is 85 x 85 mil 2 and its driving voltage is 72V. The driving voltage of each semiconductor unit is substantially 3V, but the driving voltage of the semiconductor unit varies depending on the process control and the quality of the epitaxial layer. In general, the lower the driving voltage of the semiconductor unit, the better the electrical efficiency of the photovoltaic element. The area of each semiconductor unit is substantially the same as each other. According to the above formula, the photovoltaic element 10 includes 24 semiconductor units arranged in rows 105, 106, 107, 108, and 109, respectively. The first row 105 includes five semiconductor units 151, 152, 153, 154, and 155 connected in series in a first direction; the second row 106 includes five semiconductor units 161, 162, 163, 164, and 165 toward a second The direction is serially connected; the third row 107 includes four semiconductor units 171, 172, 173, and 174 connected in series in a first direction; the fourth row 108 includes five semiconductor units 181, 182, 183, 184, and 185, toward The second direction is serially connected; the fifth row 109 includes five semiconductor units 191, 192, 193, 194, and 195 that are connected in series in the first direction. The first direction and the second direction are opposite, and the layout without a different number of semiconductor units in the same direction makes it easier to configure the customer's needs. [36] In the third row 107, the outer shape of the semiconductor unit is rectangular and different from the shape of the semiconductor unit in other rows, and by such a design, the electrode layout can be made easier. Referring to FIGS. 1 and 3, in the first row 105 and the fifth row 109, the electrode layouts on the other semiconductor units are similar except for the semiconductor units 151, 155, 191, and 195 located in the corner regions of the substrate 11. In the second row 106 and the fourth row 108, the arrangement of the electrodes on the semiconductor unit is the same except for the semiconductor units 161, 165, 181, and 185 which are close to the edge of the substrate 11. The semiconductor cells in the third row 107 have a larger electrode layout than the semiconductor cells in the other rows, but the electrode layouts on the semiconductor cells 172 and 173 are the same, and the semiconductor cells located at the edge of the substrate 11. 171 and 174 are different. The first extension 1411 includes a first curved extension 1411a; the second extension 1421 includes a second curved extension 1421a, and a second extension of the semiconductor unit on the rows 105, 106, 108, and 109. The 1421 further includes a linear extension 1421b; the first curved extension 1411a and/or the second curved extension 1421a are not parallel to either side of the semiconductor unit. The first extension 1411 on the semiconductor units of the first, third, and fifth rows 105, 107, and 109 is located in the trench 170 and extends from the first side of the semiconductor unit to the second side of the opposite side, the second extension The portion 1421 extends from the second side of the semiconductor unit to the first side. The first extension 1411 on the semiconductor units of the second and fourth rows 106 and 108 extends from the second side of the semiconductor unit toward the first side, and the second extension 1421 is from the first side to the second side of the semiconductor unit Extend sideways. In the present embodiment, the second extension portion 1421 is disposed substantially adjacent to the edge of the semiconductor unit, and the first extension portion 1411 is disposed in the semiconductor unit trench 170 to be electrically connected to the first semiconductor layer 121. The number of extensions can be adjusted according to the area of the semiconductor unit. If the area of the semiconductor unit is large, more extensions are required. The extension portion may also form a second-order extension portion 1411c extending from the first curved portion extension portion 1411a and/or a second-order extension portion 1421c extending from the second curved portion extending portion 1421a to increase current dispersion. The first electrode pad 1412 and the second electrode pad 1422 are respectively located on the semiconductor units 155 and 191 at opposite corners of the substrate 11, and the first electrode pad 1412 is in contact with the first extension portion 1411 on the semiconductor unit 155. The two electrode pads 1422 are in contact with the second extension portion 1421 on the semiconductor unit 191; the electrode pads are used for wire bonding or flip chip type bonding. In order to reduce the difficulty in bonding, the electrode pads are preferably disposed on different semiconductor units on the outermost side of the substrate 11, respectively. In order to electrically connect the respective semiconductor units, a connection portion 143 is thus formed between the respective semiconductor units, for example, the connection portion 143 and the first extension portion 1411 on the first semiconductor unit and the adjacent second semiconductor unit. The upper second extensions 1421 are in contact. In this embodiment, the connecting portion 143 forms a first direction of the series connection between the first, third, and fifth rows 105, 107, and 109, and forms a second between the second and fourth rows 106 and 108. The reverse direction of the direction. The semiconductor units 151 and 161, 165 and 174, 171 and 181, and 185 and 195 are connected in series between the rows by the connecting portion 143. There are two connection portions 143 between every two semiconductor units in the first, second, fourth, and fifth rows 105, 106, 108, and 109, and there is a connection between each two semiconductor units in the third row 107. The portion 143 is present therebetween. Fig. 4 is an equivalent circuit diagram of the photovoltaic element 10 shown in Fig. 1. [40] The second semiconductor layer 123 and the second electrode 142 of the photovoltaic element 10 may further comprise a transparent conductive layer. The material of the transparent conductive layer is a metal oxide material, such as indium tin oxide (ITO) or cadmium tin oxide. CTO), antimony tin oxide, indium zinc oxide, zinc aluminum oxide, or zinc tin oxide. Further, when a metal layer has a thickness that allows light to pass therethrough, it can also function as a transparent conductive layer. Between the substrate 11 and the first semiconductor layer 121, a bonding layer may be further included to bond the semiconductor unit to the substrate 11. The bonding layer may be an insulating transparent bonding layer or a conductive transparent bonding layer; if it is an insulating transparent bonding layer, the material may be polyimide, benzocyclobutene (BCB), or perfluorocyclobutane. (PFCB); if it is a material of the conductive bonding layer, the material may be a metal oxide material or a metal, and the metal oxide material comprises indium tin oxide (ITO), cadmium tin oxide (CTO), antimony tin oxide, indium zinc oxide, oxidation. Zinc aluminum, or zinc tin oxide; the metal material comprises nickel, gold, titanium, chromium, aluminum, or platinum. The dividing track 111 is formed between the respective semiconductor units and exposes a portion of the substrate 11 and/or the insulating transparent bonding layer. When the bonding layer is a conductive bonding layer, the dividing track 111 exposes the substrate 11 through the conductive bonding layer to electrically insulate the semiconductor units, and the substrate 11 is aluminum nitride (AlN), sapphire, or glass. Fig. 5 shows a top view of a photovoltaic element 20 in accordance with a second embodiment of the present invention. Referring to FIGS. 5-6, the photovoltaic element 20 includes a plurality of semiconductor units formed on a substrate 21 and separated by a plurality of dividing lanes 211, and the first electrode 241, the second electrode 242, and the connecting portion 243 are formed. On the semiconductor unit. The structure of the semiconductor unit is the same as that of the photovoltaic element 10, and includes a first semiconductor layer 121, a second semiconductor layer 123, and an active region 122 interposed between the first and second semiconductor layers. A plurality of divided tracks 211 are formed between the respective semiconductor units. The photoelectric element 20 has a plurality of first electrodes 241 and second electrodes 242. The first electrodes 241 are formed on the exposed first semiconductor layer 121, and the second electrodes 242 are formed on the second semiconductor layer 123. The first electrode 241 includes a first extension 2411, and the second electrode 242 includes a second extension 2421. In addition, the first electrode 241 on the semiconductor units of the plurality of semiconductor units includes a first electrode pad 2412, and the second electrode 242 on the other semiconductor unit includes a second electrode pad 2422. [43] In this embodiment, the size of the photovoltaic element 20 is 85×85 mil 2 , and the driving voltage thereof is 72 V, and the area of each semiconductor unit is substantially the same as each other, according to the above formula ( -1) The photovoltaic element 20 includes 23 semiconductor cells, which are disposed in rows 205, 206, 207, 208, and 209, respectively. The first row 205 includes five semiconductor units 251, 252, 253, 254, and 255 connected in series in a first direction, and the electrode layout thereon is the same as the electrode layout on the semiconductor unit in the first row 105 of the photovoltaic element 10; The second row 206 includes four semiconductor units 261, 262, 263, and 264 connected in series in a second direction, and the electrode layout thereon is the same as the electrode layout on the semiconductor unit in the third row 107 of the photovoltaic element 10; Row 207 includes five semiconductor cells 271, 272, 273, 274, and 275 connected in series in a first direction, and the electrode layout thereon is the same as the electrode layout on the semiconductor cells in the first row 105 of photovoltaic elements 10; Row 208 includes four semiconductor cells 281, 282, 283, and 284 connected in series in a second direction, and the electrode layout thereon is the same as the electrode layout on the semiconductor cells in the third row 107 of photovoltaic elements 10; The five semiconductor units 291, 292, 293, 294, and 295 are connected in series in the first direction, and the layout of the electrodes thereon is the same as the layout of the electrodes on the semiconductor unit in the first row 105 of the photovoltaic element 10. [44] In the second and fourth rows 206, 208, the outer shape of the semiconductor unit is rectangular and different from the shape of the semiconductor unit in the other rows. Referring to FIGS. 5 and 6, the electrode layout on the semiconductor unit of the first row 205, the third row 207, and the fifth row 209 is other than the electrodes on the semiconductor cells 251, 255, 271, 275, 291, and 295. The electrode layouts on the other semiconductor units are substantially similar to each other; the electrode layout on the semiconductor units of the second row 206 and the fourth row 208, in addition to the electrodes on the semiconductor units 261, 264, 281, and 284, other semiconductors The electrode layouts on the cells are substantially identical to each other. The first extension 2411 includes a first curved extension 2411a, and the second extension 2421 includes a second curved extension 2421a. On the semiconductor units of rows 205, 207, and 209, the second extension 2421 further includes a linear extension 2421b; the first curved extension 2411a and the second curved extension 2421a are not parallel to either side of the semiconductor unit. The first extension portion 2411 on the first, third, and fifth rows 205, 207, and 209 semiconductor units is disposed on the first semiconductor layer 121 and extends from the first side of the semiconductor unit toward the second side opposite to the first side The second extension portion 2421 extends from the second side toward the first side. The first extension portion 2411 on the second and fourth rows 206, 208 semiconductor unit extends from the second side of the semiconductor unit toward the first side, and the second extension portion 2421 extends from the first side to the second side. In this embodiment, the second extension portion 2421 is disposed substantially adjacent to the edge of the semiconductor unit, and the first extension portion 2411 is disposed in the semiconductor unit to be electrically connected to the first semiconductor layer. The extension may also form a second-order extension 2411c extending from the first curved extension 2411a to increase current dispersion. [45] The first electrode pad 2412 and the second electrode pad 2422 are respectively formed on the semiconductor units 255 and 291, the first electrode pad 2412 is in contact with the first extension portion 2411 on the semiconductor unit 255, and the second electrode pad 2422 is The second extensions 2421 on the semiconductor unit 291 are in contact. The electrode pads are used for bonding and are disposed on different semiconductor units on the corner regions of the substrate 21, respectively. In the present embodiment, the connecting portion 243 forms a series connection in the first direction between the first, third, and fifth rows 205, 207, and 209, and forms between the second and fourth rows 206 and 208. A reverse connection in a second direction. The semiconductor units 251 and 261, 264 and 275, 271 and 281, and 284 and 295 are connected in series between the respective rows by the connecting portion 243. There are two connection portions 243 between each of the first, third, and fifth rows 205, 207, and 209, and a connection portion 243 between each of the two semiconductor units in the second row 206 and the fourth row 208. . Fig. 7 is an equivalent circuit diagram of the photovoltaic element 20 shown in Fig. 5. Fig. 8 shows a top view of a photovoltaic element 30 in accordance with a third embodiment of the present invention. Referring to FIGS. 8-9, the photovoltaic element 30 includes a plurality of semiconductor units formed on a substrate 31, and the first electrode 341, the second electrode 342, and the connection portion 343 are formed on the semiconductor unit. The structure of the semiconductor unit includes a first semiconductor layer 121, a second semiconductor layer 123, and an active region 122 interposed between the first and second semiconductor layers. A plurality of divided tracks 311 are formed between the respective semiconductor units. The photoelectric element 30 has a plurality of first electrodes 341 and second electrodes 342. The first electrode 341 includes a first extension portion 3411 formed on the semiconductor unit outside the semiconductor unit 355, and the second electrode 342 includes a second extension. Part 3421. In addition, the first electrode 341 on the semiconductor unit 355 includes a first electrode pad 3412, and the second electrode 342 on the semiconductor unit 391 includes a second electrode pad 3422. In the present embodiment, the size of the photovoltaic element 30 is 50 × 50 mil 2 , the driving voltage is 72 V, the driving voltage of the semiconductor unit is about 3 V, and the area of each semiconductor unit is substantially the same as each other. The photo-electric element 30 includes 23 semiconductor units, which are disposed in rows 305, 306, 307, 308, and 309, respectively. The first row 305 includes five semiconductor units 351, 352, 353, 354, and 355 connected in series in a first direction; the second row 306 includes four semiconductor units 361, 362, 363, and 364 connected in series in a second direction; The third row 307 includes five semiconductor units 371, 372, 373, 374, and 375 connected in series in a first direction; the fourth row 308 includes four semiconductor units 381, 382, 383, and 384 connected in series in a second direction; The fifth row 309 includes five semiconductor units 391, 392, 393, 394, and 395 connected in series in the first direction. [49] In the second and fourth rows 306, 308, the outer shape of the semiconductor unit is different from the shape of the semiconductor unit in the other rows. Referring to FIGS. 8 and 9, the electrode layout on the semiconductor unit of the first row 305, the third row 307, and the fifth row 309 is in addition to the electrodes on the semiconductor units 351, 355, 371, 375, 391, and 395. The electrode layouts on the other semiconductor units are substantially similar to each other; the electrode layout on the semiconductor units of the second row 306 and the fourth row 308, except for the electrodes on the semiconductor units 361, 364, 381, and 384, They are roughly the same. The first extending portion 3411 may be a curved extending portion 3411a disposed on the semiconductor units 361, 375, 381, 391, and 394 near the periphery of the substrate 31. The first extending portion 3411 may also be a straight extending portion 3411b. Set on other semiconductor units. The second extension portion 3421 can be a curved extension portion. [50] In the first, third, and fifth rows 305, 307, and 309, except for the semiconductor units 375, 395, the first extension portion 3411 on the other semiconductor unit is opposite to the first side from the first side of the semiconductor unit. The second side of the side extends, and the second extending portion 3421 extends from the second side to the first side. The first extensions 3411 on the semiconductor cells 375 and 395 extend from the third side of the semiconductor unit to the second side. In the second and fourth rows 306, 308, except for the semiconductor units 361, 381, the first extension portion 3411 on the other semiconductor unit extends from the second side toward the first side, and the second extension portion 3421 is from the first side Extend to the second side. The first extensions 3411 on the semiconductor cells 361 and 381 extend from the third side of the semiconductor cells 361 and 381 toward the first side. The curved extension portion and the second extension portion 3421 of the first extension portion 3411 are not parallel to either side of the semiconductor unit. In this embodiment, the second extension portion 3421 is disposed substantially adjacent to the edge of the semiconductor unit, and the first extension portion 3411 is disposed in the semiconductor unit to be electrically connected to the first semiconductor layer. The extension portion may also form a second-order extension portion 3411c extending from the curved extension portion 3411a and the linear extension portion 3411b to increase current dispersion. The first electrode pad 3412 and the second electrode pad 3422 are formed on the semiconductor units 355 and 391, respectively, and the second electrode pad 3422 is in contact with the second extension portion 3421 on the semiconductor unit 391. The electrode pads are used for wire bonding or flip chip bonding, and are respectively disposed on different semiconductor units on the corner regions of the substrate 31. [52] In the present embodiment, the connecting portion 343 forms a first direction of the series connection between the first, third, and fifth rows 305, 307, and 309, and forms between the second and fourth rows 306 and 308. A reverse connection in a second direction. The semiconductor units 351 and 361, 364 and 375, 371 and 381, and 384 and 395 are connected in series between the rows by the connecting portion 343. A connection portion 343 is present between each two semiconductor units. Fig. 10 is an equivalent circuit diagram of the photovoltaic element 30 shown in Fig. 8. Fig. 11 shows a top view of a photovoltaic element 40 in accordance with a fourth embodiment of the present invention. Referring to FIGS. 11-12, the photovoltaic element 40 includes a plurality of semiconductor units formed on a substrate 41, and the first electrode 441, the second electrode 442, and the connection portion 443 are formed on the semiconductor unit. The structure of the semiconductor unit includes a first semiconductor layer 121, a second semiconductor layer 123, and an active region 122 interposed between the first and second semiconductor layers. A plurality of divided tracks 411 are formed between the respective semiconductor units. The photoelectric element 40 has a plurality of first electrodes 441 and second electrodes 442. The first electrodes 441 include a first extension portion 4411 formed on the semiconductor unit outside the semiconductor unit 455, and the semiconductor formed outside the semiconductor unit 471. The second electrode 442 on the unit includes a second extension 4421. In addition, the first electrode 441 formed on the semiconductor unit 455 includes a first electrode pad 4412, and the second electrode 442 on the semiconductor unit 471 includes a second electrode pad 4422. In the present embodiment, the size of the photo-electric element 40 is 45×45 mil 2 , the driving voltage is 48 V, and the driving voltage of the semiconductor unit is about 3 V. According to the above formula, the photo-electric element 40 includes 16 semiconductor units, and is disposed on In lines 405, 406, and 407. The first row 405 includes five semiconductor units 451, 452, 453, 454, and 455 connected in series in a first direction; the second row 406 includes six semiconductor units 461, 462, 463, 464, 465, and 466 toward a second The direction is serially connected; the third row 407 includes five semiconductor units 471, 472, 473, 474, and 475 connected in series in the first direction. [55] The outer shape of the semiconductor unit in the second 402 is different from the shape of the semiconductor unit in the other rows; referring to FIGS. 11 and 12, the electrode layout on the semiconductor unit of the first row 405 and the third row 407 is located except The electrode layouts of the other semiconductor units are substantially similar to each other except for the electrodes on the semiconductor units 451, 455, 471, and 475. The first extension 4411 includes a linear extension 4411a and a second extension 4411c, wherein all of the second extensions 4421 are curved extensions. The first extending portion 4411 on the first and second rows 405, 407 of the semiconductor unit extends from the first side of the semiconductor unit to the third side and the fourth side adjacent to the first side, and the second extending portion 4421 It extends from the second side to the third side and the fourth side. The first extending portion 4411 on the semiconductor unit of the second row 406 extends from the second side of the semiconductor unit to the third side and the fourth side, and the second extending portion 4421 is from the first side to the third side and Extending on four sides. The curve extensions 4411 and 4421 are not parallel to either side of the semiconductor unit. [56] The first electrode pad 4412 and the second electrode pad 4422 are respectively located on the semiconductor units 455 and 471, and the connection portion 443 forms a series connection between the semiconductor units. Fig. 13 is an equivalent circuit diagram of the photovoltaic element 40 shown in Fig. 11. Fig. 14 shows a top view of a photovoltaic element 50 in accordance with a fifth embodiment of the present invention. Fig. 15 is a 3D perspective view of the photovoltaic element 50. The size of the photo-electric element 50 is 40×40 mil 2 , the driving voltage is 36 V, and the driving voltage of the semiconductor unit is about 3 V; according to the formula ( -1) In the present embodiment, the photo-electric element 50 includes eleven semiconductor units, which are disposed in rows 505, 506, and 507, respectively. The first row 505 includes four semiconductor units 551, 552, 553, and 554 connected in series in a first direction; the second row 506 includes three semiconductor units 561, 562, and 563 connected in series in a second direction; The four semiconductor units 571, 572, 573, and 574 are connected in series in the first direction. The first electrode 541 having the first extension portion 5411 is formed on the semiconductor unit outside the semiconductor unit 554, and the second electrode 542 having the second extension portion 5421 is formed on all the semiconductor units. The first electrode 541 on the semiconductor unit 554 includes a first electrode pad 5412, and the second electrode 542 on the semiconductor unit 571 includes a second electrode pad 5422. The connecting portion 543 forms a series connection between the semiconductor units. Fig. 16 is an equivalent circuit diagram of the photovoltaic element 50 shown in Fig. 14. Figure 17 shows a top view of a photovoltaic element 60 in accordance with a sixth embodiment of the present invention. Figure 18 is a 3D perspective view of the photovoltaic element 60. The size of the photo-electric element 60 is 120×120 mil 2 , the driving voltage is 24 V, and the driving voltage of the semiconductor unit is about 3 V; according to the formula ( In the present embodiment, the photovoltaic element 60 includes eight semiconductor cells, which are disposed in rows 605, 606, and 607, respectively. The first row 605 includes two semiconductor units 651 and 652 connected in series in a first direction; the second row 606 includes four semiconductor units 661, 662, 663, and 664 connected in series in a second direction; the third row 607 includes two The semiconductor units 671 and 672 are connected in series in the first direction. The first electrode 641 includes a first extension 6411, and the second electrode 642 includes a second extension 6421. In addition, the first electrode 641 on the semiconductor unit of the plurality of semiconductor units includes two first electrode pads 6412, and the second electrode 642 on the other semiconductor unit includes two second electrode pads 6422. The connecting portion 643 forms a series connection between the semiconductor units. Fig. 19 is an equivalent circuit diagram of the photovoltaic element 60 shown in Fig. 17. Fig. 20 shows a top view of a photovoltaic element 70 in accordance with a seventh embodiment of the present invention. Fig. 21 is a 3D perspective view of the photovoltaic element 70. The size of the photo-electric element 70 is 120×120 mil 2 , the driving voltage is 24 V, and the driving voltage of the semiconductor unit is about 3 V; according to the formula ( -1) In the present embodiment, the photovoltaic element 70 includes seven semiconductor cells, which are disposed in rows 705, 706, and 707, respectively. The first row 705 includes two semiconductor units 751 and 752 connected in series in a first direction; the second row 606 includes three semiconductor units 761, 762, and 769 connected in series in a second direction; and the third row 707 includes two semiconductor units. 771 and 772 are connected in series in the first direction. The first electrode 741 includes a first extension portion 7411, and the second electrode 742 includes a second extension portion 7421. In addition, the first electrode 741 on the semiconductor units in the plurality of semiconductor units includes two first electrode pads 7412, and the second electrode 742 on the other semiconductor unit includes two second electrode pads 7422. The connecting portion 743 forms a series connection between the semiconductor units. Fig. 22 is an equivalent circuit diagram of the photovoltaic element 70 shown in Fig. 20. Fig. 23 shows a top view of a photovoltaic element 80 in accordance with an eighth embodiment of the present invention. Fig. 24 is a 3D perspective view of the photovoltaic element 80. The size of the photovoltaic element 80 is 85×85 mil 2 , the driving voltage is 144 V, and the driving voltage of the semiconductor unit is about 3 V; according to the formula ( In the present embodiment, the photovoltaic element 80 includes 48 semiconductor units arranged in rows 801, 802, 803, 804, 805, 806, and 807. The rows 801, 803, 805, and 807 respectively include seven semiconductor units connected in series in a first direction; the rows 802 and 806 include seven semiconductor units in series in a second direction; and the fourth row 804 includes six semiconductor units. The first direction is connected in series. The first electrode 841 on the plurality of semiconductor units in the plurality of semiconductor units includes a first electrode pad 8412 on the first semiconductor layer 121 of the semiconductor unit 811, and the second electrode 842 on the semiconductor unit 871 includes a second electrode pad. 8422, which is located on the second semiconductor layer 123. Further, the first electrode 841 having the first extension portion 8411 is located on the semiconductor unit other than the semiconductor unit on which the first electrode pad 8412 is disposed; the second electrode 842 having the second extension portion 8421 is located on all the semiconductor units. The connecting portion 843 forms a series connection between the semiconductor units. The second electrode 842 on the semiconductor unit 811 on which the first electrode pad 8412 is located is located on the second semiconductor layer 123, and is connected to the first electrode 841 of the semiconductor unit 812 through the connection portion 843; the second electrode pad 8422 is located The first electrode 841 on the semiconductor unit 871 is located on the first semiconductor layer 121, and is connected to the second electrode 842 of the semiconductor unit 872 via the connection portion 843. Fig. 25 shows a top view of a photovoltaic element 90 in accordance with a ninth embodiment of the present invention. Photocell 90 includes 48 semiconductor cells arranged in rows 801, 802, 803, 804, 805, 806, and 807. The difference between the appearance and the electrode arrangement is similar to that of the photo-electric element 80. The difference is that the first electrode pad 9412 is formed on the second semiconductor layer 123 of the semiconductor unit 811, and is connected in series with the first electrode 841 of the semiconductor unit 812 by the connection portion 843; The second electrode pad 9422 is formed on the second semiconductor layer 123 of the semiconductor unit 871, and is connected in series with the second electrode 842 of the semiconductor unit 872 by the connection portion 843. When an external power supply current is injected from the second electrode pad 9422 and outputted by the first electrode pad 9412, the resistance of the semiconductor unit 871 under the second electrode pad 9422 is greater than the second electrode of the semiconductor unit 872 and the connection portion 843 and the semiconductor unit 872. The series connection resistance of 842 is such that current flows directly from the second electrode pad 9422 via the connection portion 843 to the first electrode 841 of the semiconductor unit 812 without flowing to the first semiconductor layer 121 under the semiconductor unit 871, the active region 122, and the first Two semiconductor layers 123. The same current flows to the first electrode 841 of the semiconductor unit 812, and flows to the first electrode pad 9412 via the connection portion 843, and does not flow to the first semiconductor layer 121, the active region 122, and the second semiconductor under the semiconductor unit 811. Layer 123 is output directly to an external power source. Therefore, the semiconductor elements 811 and 871 under the first electrode pad 9412 and the second electrode pad 9422 do not generate light. In order to further electrically isolate the electrode pad and the lower semiconductor unit, an insulating layer may be formed between the electrode pad and the semiconductor unit to prevent a short circuit caused by a current flowing through the semiconductor layer under the electrode pad due to a large current. Since the semiconductor unit under the first electrode pad 9412 and the second electrode pad 9422 does not emit light, the area of the first electrode pad 9412 can be substantially equal to the area of the semiconductor unit 811, and the area of the second electrode pad 9422 can be combined with the semiconductor unit 871. The area is roughly equal to improve the yield of the wire-making process. In addition, the first electrode pad 9412 of the photo-electric element 90 can also be combined with the second electrode pad 8422 of the photo-electric element 80. At this time, the first electrode pad 9412 is substantially entirely covered on the second semiconductor layer 123 of the semiconductor unit 811. The second electrode pad 8422 is located on a portion of the second semiconductor layer 123 of the semiconductor unit 871; the semiconductor unit under the first electrode pad 9412 has no current injection, and therefore does not emit light, and the semiconductor unit where the second electrode pad 8422 is located The first electrode 841 on the 871 is connected to the second electrode 842 of the semiconductor unit 872 via the connection portion 843. When the current is injected, the semiconductor unit 871 in which the second electrode pad 8422 is located emits light. Similarly, the second electrode pad 9422 of the photo-electric component 90 can also be paired with the first electrode pad 8412 of the photo-electric component 80. At this time, the first electrode pad 8412 is located on a portion of the first semiconductor 121 of the semiconductor unit 811. The second electrode pad 9422 is substantially overlaid on the second semiconductor layer 123 of the semiconductor unit 871; the second electrode 842 on the semiconductor unit 811 where the first electrode pad is located is connected to the semiconductor unit 812 by the connection portion 843 The first electrode 841 is connected. When the current is injected, the semiconductor unit 811 where the first electrode pad 8412 is located emits light, and the current injected into the second electrode pad 9422 does not flow through the active region 122 of the semiconductor unit 871. Since the connection portion 843 flows to the semiconductor unit 872, the semiconductor unit 871 in which the second electrode pad 9422 is located does not emit light. [63] The material of the first semiconductor layer, the active layer, and the second semiconductor layer includes one or more elements selected from the group consisting of Ga, Al, In, As, P, N, and Si, such as GaN, AlGaN. InGaN, AlGaInN, GaP, GaAs, GaAsP, GaNAs, or Si; the material of the substrate comprises sapphire, GaAs, GaP, SiC, ZnO, GaN, AlN, Cu, or Si. The present invention is intended to be illustrative only and not to limit the scope of the invention. Any changes or modifications of the present invention to those skilled in the art will be made without departing from the spirit and scope of the invention.

【65】
10、20、30、40、50、60、70、80、90‧‧‧光電元件
11、21、31、41、51、61、71、81‧‧‧基板
141、241、341、441、541、641、741、841‧‧‧第一電極
142、242、342、442、542、642、742、842‧‧‧第二電極
143、243、343443、543、643、743、843‧‧‧連接部
121‧‧‧第一半導體層
123‧‧‧第二半導體層
122‧‧‧活性區
170‧‧‧溝槽
111、311‧‧‧分割道
1411、2411、3411、4411、5411、6411、7411、8411‧‧‧第一延伸部
1421、2421、3421、4421、5421、6421、7421、8421‧‧‧第二延伸部
1412、2412、3412、4412、5412、6412、7412、8412、9412‧‧‧第一電極墊
1422、2422、3422、4422、5422、6422、7422、8422、9422‧‧‧第二電極墊
105、106、107、108、109、205、206、207、208、209、305、306、307、308、309、405、406、407、505、506、507、605、606、607、705、706、707、801、802、803、804、805、806、807‧‧‧行
151、152、153、154、155、161、162、163、164、165、171、172、173、174、 181、182、183、184、185、191、192、193、194、195、251、252、253、254、255、261、262、263、264、271、272、273、274、275、281、282、283、284、291、292、293、294、295、351、352、353、354、355、361、362、363、364、371、372、373、374、375、381、382、383、384、391、392、393、394、395、451、452、453、454、455、461、462、463、464、465、466、471、472、473、474、475、551、552、553、554、561、562、563、571、572、573、574、651、652、661、662、663、664、671、672、751、752、761、762、769、771、772、811、812、871、872‧‧‧半導體單元
1411a、2411a‧‧‧第一曲線延伸部
1421a、2421a‧‧‧第二曲線延伸部
1421b、2421b、3411b、4411a‧‧‧直線延伸部
1411c、1421c、2411c、3411c、4411c‧‧‧二階延伸部
3411a‧‧‧曲線延伸部。
[65]
10, 20, 30, 40, 50, 60, 70, 80, 90‧‧‧ photoelectric elements
11, 21, 31, 41, 51, 61, 71, 81‧‧‧ substrates
141, 241, 341, 441, 541, 641, 741, 841 ‧ ‧ first electrode
142, 242, 342, 442, 542, 642, 742, 842‧‧‧ second electrode
143, 243, 343443, 543, 643, 743, 843 ‧ ‧ Connections
121‧‧‧First semiconductor layer
123‧‧‧Second semiconductor layer
122‧‧‧active area
170‧‧‧ trench
111, 311‧‧ ‧ divided road
1411, 2411, 3411, 4411, 5411, 6411, 7411, 8411‧‧‧ first extension
1421, 2421, 3421, 4421, 5421, 6411, 7421, 8421‧‧‧ Second extension
1412, 2412, 3412, 4412, 5412, 6412, 7412, 8412, 9412‧‧‧ first electrode pad
1422, 2422, 3422, 4422, 5422, 6422, 7422, 8422, 9422‧‧‧ second electrode pad
105, 106, 107, 108, 109, 205, 206, 207, 208, 209, 305, 306, 307, 308, 309, 405, 406, 407, 505, 506, 507, 605, 606, 607, 705, 706, 707, 801, 802, 803, 804, 805, 806, 807‧‧‧
151, 152, 153, 154, 155, 161, 162, 163, 164, 165, 171, 172, 173, 174, 181, 182, 183, 184, 185, 191, 192, 193, 194, 195, 251, 252, 253, 254, 255, 261, 262, 263, 264, 271, 272, 273, 274, 275, 281, 282, 283, 284, 291, 292, 293, 294, 295, 351, 352, 353, 354, 355, 361, 362, 363, 364, 371, 372, 373, 374, 375, 381, 382, 383, 384, 391, 392, 393, 394, 395, 451, 452, 453, 454, 455, 461, 462, 463, 464, 465, 466, 471, 472, 473, 474, 475, 551, 552, 553, 554, 561, 562, 563, 571, 572, 573, 574, 651, 652, 661, 662, 663, 664, 671, 672, 751, 752, 761, 762, 769, 771, 772, 811, 812, 871, 872 ‧ ‧ semiconductor units
1411a, 2411a‧‧‧ first curve extension
1421a, 2421a‧‧‧second curve extension
1421b, 2421b, 3411b, 4411a‧‧‧ linear extension
1411c, 1421c, 2411c, 3411c, 4411c‧‧‧ second-order extension
3411a‧‧‧ Curve extension.

【9】 第1圖係依本案一實施例所繪示之光電元件上視圖; 【10】 第2圖係第1圖所示之光電元件剖面圖; 【11】 第3圖係第1圖所示之光電元件3D立體圖; 【12】 第4圖係第1圖所示之光電元件等效電路圖; 【13】 第5圖係依本案一實施例所繪示之光電元件上視圖; 【14】 第6圖係第5圖所示之光電元件3D立體圖; 【15】 第7圖係第5圖所示之光電元件等效電路圖; 【16】 第8圖係依本案一實施例所繪示之光電元件上視圖; 【17】 第9圖係第8圖所示之光電元件3D立體圖; 【18】 第10圖係第8圖所示之光電元件等效電路圖; 【19】 第11圖係依本案一實施例所繪示之光電元件上視圖; 【20】 第12圖係第11圖所示之光電元件3D立體圖; 【21】 第13圖係第11圖所示之光電元件等效電路圖; 【22】 第14圖係依本案一實施例所繪示之光電元件上視圖; 【23】 第15圖係第14圖所示之光電元件3D立體圖; 【24】 第16圖係第14圖所示之光電元件等效電路圖; 【25】 第17圖係依本案一實施例所繪示之光電元件上視圖; 【26】 第18圖係第17圖所示之光電元件3D立體圖; 【27】 第19圖係第17圖所示之光電元件等效電路圖; 【28】 第20圖係依本案一實施例所繪示之光電元件上視圖; 【29】 第21圖係第20圖所示之光電元件3D立體圖; 【30】 第22圖係第20圖所示之光電元件等效電路圖; 【31】 第23圖係依本案一實施例所繪示之光電元件上視圖; 【32】 第24圖係第23圖所示之光電元件3D立體圖; 【33】 第25圖係依本案一實施例所繪示之光電元件上視圖。[9] Fig. 1 is a top view of a photovoltaic element according to an embodiment of the present invention; [10] Fig. 2 is a cross-sectional view of the photovoltaic element shown in Fig. 1; [11] Fig. 3 is a first figure 3D perspective view of the photoelectric element shown in the drawing; [12] Fig. 4 is an equivalent circuit diagram of the photovoltaic element shown in Fig. 1; [13] Fig. 5 is a top view of the photovoltaic element according to an embodiment of the present invention; [14] Fig. 6 is a perspective view of a photovoltaic element 3D shown in Fig. 5; [15] Fig. 7 is an equivalent circuit diagram of a photovoltaic element shown in Fig. 5; [16] Fig. 8 is a diagram showing an embodiment of the present invention The upper view of the photovoltaic element; [17] Fig. 9 is a 3D perspective view of the photovoltaic element shown in Fig. 8; [18] Fig. 10 is an equivalent circuit diagram of the photovoltaic element shown in Fig. 8; [19] Fig. 11 A top view of a photovoltaic element according to an embodiment of the present invention; [20] Fig. 12 is a 3D perspective view of the photovoltaic element shown in Fig. 11; [21] Fig. 13 is an equivalent circuit diagram of the photovoltaic element shown in Fig. 11; [22] Figure 14 is a top view of a photovoltaic element according to an embodiment of the present invention; [23] Figure 15 is a view of Figure 14 3D perspective view of the photoelectric element; [24] Fig. 16 is an equivalent circuit diagram of the photovoltaic element shown in Fig. 14; [25] Fig. 17 is a top view of the photovoltaic element according to an embodiment of the present invention; [26] Fig. 17 is a perspective view of a photovoltaic element shown in Fig. 17; [27] Fig. 19 is an equivalent circuit diagram of a photovoltaic element shown in Fig. 17; [28] Fig. 20 is a photovoltaic element according to an embodiment of the present invention [29] Fig. 21 is a 3D perspective view of the photovoltaic element shown in Fig. 20; [30] Fig. 22 is an equivalent circuit diagram of the photovoltaic element shown in Fig. 20; [31] Fig. 23 is based on the present case The top view of the photovoltaic element shown in the embodiment; [32] Fig. 24 is a perspective view of the photovoltaic element shown in Fig. 23; [33] Fig. 25 is a top view of the photovoltaic element according to an embodiment of the present invention.

【66】[66]

10‧‧‧光電元件 10‧‧‧Optoelectronic components

11‧‧‧基板 11‧‧‧Substrate

141‧‧‧第一電極 141‧‧‧First electrode

142‧‧‧第二電極 142‧‧‧second electrode

143‧‧‧連接部 143‧‧‧Connecting Department

170‧‧‧溝槽 170‧‧‧ trench

111‧‧‧分割道 111‧‧‧ dividing road

1411‧‧‧第一延伸部 1411‧‧‧First Extension

1421‧‧‧第二延伸部 1421‧‧‧Second extension

1412‧‧‧第一電極墊 1412‧‧‧First electrode pad

1422‧‧‧第二電極墊 1422‧‧‧Second electrode pad

105、106、107、108、109‧‧‧行 105, 106, 107, 108, 109‧‧‧

151、152、153、154、155、161、162、163、164、 165、171、172、173、174、181、182、183、184、185、191、192、193、194、 195‧‧‧半導體單元 151, 152, 153, 154, 155, 161, 162, 163, 164, 165, 171, 172, 173, 174, 181, 182, 183, 184, 185, 191, 192, 193, 194, 195‧‧‧Semiconductor unit

1411a‧‧‧第一曲線延伸部 1411a‧‧‧First Curve Extension

1421a‧‧‧第二曲線延伸部 1421a‧‧‧Second curve extension

1421b‧‧‧直線延伸部 1421b‧‧‧Linear extension

1411c‧‧‧二階延伸部 1411c‧‧‧ second-order extension

Claims (10)

一種光電元件,包含:一基板;複數個半導體單元以複數行,矩形形狀配置於該基板上,其中該複數個半導體單元各包含一第一半導體層、一第二半導體層、以及一活性區介於該第一半導體層及該第二半導體層之間,該複數行包含三行,位於該三行中的任一行之半導體單元的矩形形狀與其他兩行之半導體單元的矩形形狀不同;複數個第一電極各具有一第一電極佈局位於該第一半導體層上,其中位於該任一行之半導體單元的該第一電極佈局與該其他兩行中的半導體單元的該第一電極佈局不同;以及一連接部形成於該複數個半導體單元上以電性串接該複數個半導體單元,其中該複數個半導體單元的面積大致上彼此相同,且該複數個半導體單元配置於不同行中的數量不同。 A photovoltaic element comprising: a substrate; a plurality of semiconductor units disposed on the substrate in a plurality of rows, wherein the plurality of semiconductor units each comprise a first semiconductor layer, a second semiconductor layer, and an active region Between the first semiconductor layer and the second semiconductor layer, the plurality of rows comprise three rows, and the rectangular shape of the semiconductor unit located in any one of the three rows is different from the rectangular shape of the other two rows of semiconductor cells; The first electrodes each have a first electrode layout on the first semiconductor layer, wherein the first electrode layout of the semiconductor cells in the any row is different from the first electrode layout of the semiconductor cells in the other two rows; A connection portion is formed on the plurality of semiconductor units to electrically connect the plurality of semiconductor units, wherein an area of the plurality of semiconductor units is substantially the same as each other, and a quantity of the plurality of semiconductor units disposed in different rows is different. 如申請專利範圍第1項所述之光電元件,更包含複數個第二電極分別位於該第二半導體層上,其中,該複數個第一電極中至少有一個包含一彼此分離的複數個第一延伸部,以及該複數個第二電極中至少有一個包含一第二延伸部。 The photo-electric component of claim 1, further comprising a plurality of second electrodes respectively located on the second semiconductor layer, wherein at least one of the plurality of first electrodes comprises a plurality of first ones separated from each other The extension, and at least one of the plurality of second electrodes includes a second extension. 如申請專利範圍第1項所述之光電元件,更包含複數個連接部形成於兩相鄰的半導體單元之間以電性串接該兩相鄰的半導體單元,該複數個第一電極中至少有一個包含彼此分離的複數個第一延伸部,且該複數個連接部分別與該複數個第一延伸部形成一對一連接。 The photovoltaic device of claim 1, further comprising a plurality of connecting portions formed between two adjacent semiconductor units to electrically connect the two adjacent semiconductor units, at least one of the plurality of first electrodes There is a plurality of first extensions separated from each other, and the plurality of connections respectively form a one-to-one connection with the plurality of first extensions. 如申請專利範圍第1項所述之光電元件,更包含複數個第二電極分別位於該第二半導體層上,其中該複數個第一電極中至少有一個包含一第一延伸部,該複數個第二電極中至少有一個包含一第二延伸部。 The photo-electric component of claim 1, further comprising a plurality of second electrodes respectively disposed on the second semiconductor layer, wherein at least one of the plurality of first electrodes comprises a first extension, the plurality of At least one of the second electrodes includes a second extension. 如申請專利範圍第1項所述之光電元件,其中該其他兩行中的半導體單元的該複數個第一電極佈局彼此不同。 The photovoltaic element according to claim 1, wherein the plurality of first electrode layouts of the semiconductor units in the other two rows are different from each other. 如申請專利範圍第4項所述之光電元件,其中該第一延伸部或該第二延伸部不平行於該複數個半導體單元的任一邊。 The photovoltaic element of claim 4, wherein the first extension or the second extension is not parallel to either side of the plurality of semiconductor units. 如申請專利範圍第4項所述之光電元件,其中該複數個半導體單元包含一第一半導體單元、一第二半導體單元及一第三半導體單元,其中該第一半導體單元及該第二半導體單元分別位於該基板的相對角落,該複數個第一電極中之一包含一第一電極墊位於該第一半導體單元上,該複數個第二電極中之一包含一第二電極墊位於該第二半導體單元上,以及該第一延伸部及該第二延伸部位於沒有電極墊的該第三半導體單元上。 The photovoltaic device of claim 4, wherein the plurality of semiconductor units comprise a first semiconductor unit, a second semiconductor unit, and a third semiconductor unit, wherein the first semiconductor unit and the second semiconductor unit Located at opposite corners of the substrate, one of the plurality of first electrodes includes a first electrode pad on the first semiconductor unit, and one of the plurality of second electrodes includes a second electrode pad at the second The semiconductor unit, and the first extension and the second extension are located on the third semiconductor unit without the electrode pad. 如申請專利範圍第7項所述之光電元件,其中位於該第一半導體單元上的該第一電極更包含一延伸部與該第一電極墊接觸,或位於該第二半導體單元上的該第二電極更包含一延伸部與該第二電極墊接觸。 The photovoltaic device of claim 7, wherein the first electrode on the first semiconductor unit further comprises an extension portion in contact with the first electrode pad, or the first electrode on the second semiconductor unit The two electrodes further include an extension portion in contact with the second electrode pad. 如申請專利範圍第7項所述之光電元件,其中該第一半導體單元或該第二半導體單元至少其中之一不發光。 The photovoltaic element of claim 7, wherein at least one of the first semiconductor unit or the second semiconductor unit does not emit light. 如申請專利範圍第1項所述之光電元件,其中該複數個半導體單元於兩相鄰行之串接方向不同。 The photovoltaic element according to claim 1, wherein the plurality of semiconductor units are different in a series connection direction of two adjacent rows.
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