CN102315239B - Photoelectric cell - Google Patents

Photoelectric cell Download PDF

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Publication number
CN102315239B
CN102315239B CN201010511821.3A CN201010511821A CN102315239B CN 102315239 B CN102315239 B CN 102315239B CN 201010511821 A CN201010511821 A CN 201010511821A CN 102315239 B CN102315239 B CN 102315239B
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semiconductor
semiconductor unit
electrode
extension
row
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CN102315239A (en
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沈建赋
井长慧
谢明勋
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Epistar Corp
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Epistar Corp
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Priority claimed from US12/830,059 external-priority patent/US9324691B2/en
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Priority to CN201610597613.7A priority Critical patent/CN105977272B/en
Publication of CN102315239A publication Critical patent/CN102315239A/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/387—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape with a plurality of electrode regions in direct contact with the semiconductor body and being electrically interconnected by another electrode layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/0004—Devices characterised by their operation
    • H01L33/0008—Devices characterised by their operation having p-n or hi-lo junctions
    • H01L33/0012—Devices characterised by their operation having p-n or hi-lo junctions p-i-n devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/382—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
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    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls

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Abstract

The invention discloses a kind of photoelectric cell, it comprises substrate；Multiple semiconductor units are electrically connected with each other and are positioned on substrate, and wherein these semiconductor units comprise the first semiconductor layer, the second semiconductor layer and active area between it；Multiple first electrodes lay respectively on the first semiconductor layer；Connecting portion is formed on these semiconductor units electrically to concatenate these semiconductor units；And multiple second electrode lays respectively on the second semiconductor layer, wherein, having one to comprise in the first extension, and these second electrodes in these first electrodes has to comprise second extension.

Description

Photoelectric cell
Technical field
The present invention relates to light-emitting component.
Background technology
Owing to the light emitting diode in solid-state lighting elements has low power consumption, low grade fever generation, operation lifetime Length, impact resistance, volume are little, response speed is fast and it is special to send the good photoelectricity such as coloured light of wavelength stabilization Property, therefore it is widely used to household electrical appliances, the display lamp of instrument and photovoltaic etc..Send out in photoelectric technology Zhan Zhong, solid-state lighting elements focuses on its luminous efficiency, operation lifetime and brightness, thus it is contemplated that not The main flow of illumination application can be become long future.
Being used with the form of array type light-emitting component at current LED, it is applicable to high driving voltage more Application, and volume and the weight of LED can be reduced.LED maker sets for array type light-emitting component Count different electrode lay-outs to meet client's demand to high driving voltage LED, with reduce cost and then Improve production efficiency.
Summary of the invention
The application proposes a kind of photoelectric cell, comprises substrate；Multiple semiconductor units, are electrically connected to each other It is positioned on this substrate；Wherein, each semiconductor unit all comprises the first semiconductor layer, the second quasiconductor Layer and the active area between it；Multiple first electrodes lay respectively at the first semiconductor layer；Even The portion of connecing is formed on these multiple semiconductor units, electrically concatenates these multiple semiconductor units；And multiple Two electrodes lay respectively at the second semiconductor layer；Wherein, there is first electrode package containing the first extension, And have second electrode package containing the second extension.
The application also proposes a kind of photoelectric cell, comprises substrate；Multiple semiconductor units, the most electrically connect Connect and be positioned on this substrate；Wherein, each semiconductor unit all comprises the first semiconductor layer, and the second half lead Body layer, and the active area between it；Multiple first electrodes lay respectively at the first semiconductor layer； Connecting portion is formed on these multiple semiconductor units electrically to concatenate these multiple semiconductor units；And it is multiple Second electrode lays respectively at the second semiconductor layer；Wherein, there is first electrode package containing the first extension Portion, and have second electrode package containing the second extension, the wherein driving electricity of these multiple semiconductor units Press roughly the same.
The application separately proposes a kind of photoelectric cell, comprises substrate；Multiple semiconductor units are the most electrical Connect and be positioned on this substrate, the most each semiconductor unit comprise the first semiconductor layer, the second semiconductor layer, And the active area between it, multiple first electrodes lay respectively on the first semiconductor layer；And it is many Individual second electrode lays respectively on the second semiconductor layer, and plurality of semiconductor unit comprises the first quasiconductor Unit, the second semiconductor unit, and the 3rd semiconductor unit, at least one in the first electrode comprises First electronic pads is positioned on the first semiconductor unit of substrate outermost, and at least in the second electrode Individual second electronic pads that comprises is positioned on the second semiconductor unit of substrate outermost, wherein the first electrode and Two electrode package contain the first extension and the second extending part on the 3rd semiconductor unit not having electronic pads.
The application reintroduces a kind of photoelectric cell, comprises substrate；Multiple semiconductor units are the most electrical Connect and be positioned on substrate, the most each semiconductor unit comprise the first semiconductor layer, the second semiconductor layer, And the active area between it；And multiple first electrodes and multiple second electrode lay respectively at multiple On semiconductor unit, the most each semiconductor unit comprises the first semiconductor unit, the second semiconductor unit, And the 3rd semiconductor unit, at least one in the first electrode comprises the first electronic pads and is positioned at the first half and leads On second semiconductor layer of body unit, and at least one in the second electrode comprises the second electronic pads and is positioned at On second semiconductor layer of the second semiconductor unit, wherein the first electrode and the second electrode package are containing the first extension Portion and the second extending part are on the 3rd semiconductor unit not having electronic pads.
Accompanying drawing explanation
Fig. 1 is according to the photoelectric cell top view depicted in the embodiment of the present application；
Fig. 2 is the photoelectric cell profile shown in Fig. 1；
Fig. 3 is the photoelectric cell 3D axonometric chart shown in Fig. 1；
Fig. 4 is the photoelectric cell equivalent circuit diagram shown in Fig. 1；
Fig. 5 is according to the photoelectric cell top view depicted in the embodiment of the present application；
Fig. 6 is the photoelectric cell 3D axonometric chart shown in Fig. 5；
Fig. 7 is the photoelectric cell equivalent circuit diagram shown in Fig. 5；
Fig. 8 is according to the photoelectric cell top view depicted in the embodiment of the present application；
Fig. 9 is the photoelectric cell 3D axonometric chart shown in Fig. 8；
Figure 10 is the photoelectric cell equivalent circuit diagram shown in Fig. 8；
Figure 11 is according to the photoelectric cell top view depicted in the embodiment of the present application；
Figure 12 is the photoelectric cell 3D axonometric chart shown in Figure 11；
Figure 13 is the photoelectric cell equivalent circuit diagram shown in Figure 11；
Figure 14 is according to the photoelectric cell top view depicted in the embodiment of the present application；
Figure 15 is the photoelectric cell 3D axonometric chart shown in Figure 14；
Figure 16 is the photoelectric cell equivalent circuit diagram shown in Figure 14；
Figure 17 is according to the photoelectric cell top view depicted in the embodiment of the present application；
Figure 18 is the photoelectric cell 3D axonometric chart shown in Figure 17；
Figure 19 is the photoelectric cell equivalent circuit diagram shown in Figure 17；
Figure 20 is according to the photoelectric cell top view depicted in the embodiment of the present application；
Figure 21 is the photoelectric cell 3D axonometric chart shown in Figure 20；
Figure 22 is the photoelectric cell equivalent circuit diagram shown in Figure 20；
Figure 23 is according to the photoelectric cell top view depicted in the embodiment of the present application；
Figure 24 is the photoelectric cell 3D axonometric chart shown in Figure 23；
Figure 25 is according to the photoelectric cell top view depicted in the embodiment of the present application.
Description of reference numerals
10,20,30,40,50,60,70,80,90 photoelectric cell；
11,21,31,41,51,61,71,81 substrate；
141,241,341,441,541,641,741,841 first electrode；
142,242,342,442,542,642,742,842 second electrode；
143,243,343443,543,643,743,843 connecting portion；
121 first semiconductor layers；
123 second semiconductor layers；
122 active areas；
170 grooves；
111,311 segmentation road；
1411,2411,3411,4411,5411,6411,7411,8,411 first extension；
1421,2421,3421,4421,5421,6421,7421,8,421 second extension；
1412,2412,3412,4412,5412,6412,7412,8412,9,412 first electronic pads；
1422,2422,3422,4422,5422,6422,7422,8422,9,422 second electronic pads；
105、106、107、108、109、205、206、207、208、209、305、306、307、 308、309、405、406、407、505、506、507、605、606、607、705、706、 707,801,802,803,804,805,806,807 row；
151、152、153、154、155、161、162、163、164、165、171、172、173、 174、181、182、183、184、185、191、192、193、194、195、251、252、 253、254、255、261、262、263、264、271、272、273、274、275、281、 282、283、284、291、292、293、294、295、351、352、353、354、355、 361、362、363、364、371、372、373、374、375、381、382、383、384、 391、392、393、394、395、451、452、453、454、455、461、462、463、 464、465、466、471、472、473、474、475、551、552、553、554、561、 562、563、571、572、573、574、651、652、661、662、663、664、671、 672,751,752,761,762,769,771,772,811,812,871,872 quasiconductor list Unit；
1411a, 2411a first curvilinear extension；
1421a, 2421a second curvilinear extension；
1421b, 2421b, 3411b, 4411a rectilinear extension；
1411c, 1421c, 2411c, 3411c, 4411c second order extension；
3411a curvilinear extension.
Detailed description of the invention
Fig. 1 discloses the top view of the photoelectric cell 10 meeting the embodiment of the present application.Photoelectric cell 10 is such as For light emitting diode (LED), laser diode (LD) or solaode, comprise multiple quasiconductor list Unit is formed on substrate 11, the first electrode 141, and the second electrode 142 and connecting portion 143 are formed at half On conductor element.In the present embodiment, photoelectric cell 10 is light emitting diode (LED).Fig. 2 discloses In Fig. 1, photoelectric cell 10 is along the profile of A-A ' line segment.Each semiconductor unit comprises the first half leads Body layer 121, the second semiconductor layer 123, and the active area between first, second semiconductor layer 122.The composition material of the first semiconductor layer 121 is the III-V quasiconductor material of doped with p-type or n-type impurity Material, the composition material of the second semiconductor layer 123 is the III-V quasiconductor material of doped with p-type or n-type impurity Material, and the first semiconductor layer 121 and the second semiconductor layer 123 is the most different.The knot of active area 122 Structure can be single heterojunction structure (SH), double-heterostructure (DH) or multiple quantum trap structure (MQW).Ditch Groove 170 is formed in semiconductor unit by etching semiconductor unit, and exposes the first the half of part Conductor layer 121.Multiple segmentation roads 111 are formed between semiconductor unit, expose part substrate 11. Having multiple first electrode 141 and the second electrode 142 on photoelectric cell 10, wherein the first electrode 141 is formed On the first semiconductor layer 121 exposed, and the second electrode 142 is formed at the second semiconductor layer 123 On.First electrode 141 comprises the first extension 1411, and the second electrode 142 comprises the second extension 1421.Additionally, its first electrode 141 on a semiconductor unit in multiple semiconductor units comprises First electronic pads 1412, and the second electrode 142 on another semiconductor unit comprises the second electronic pads 1422。
In order to meet client's demand to photoelectric cell particular area, electric current and driving voltage, quasiconductor list The layout of unit and electrode also must be specifically designed.The quantity of semiconductor unit is essentially according to formula Or Being designed, wherein, n represents the quantity of semiconductor unit, V Represent the driving voltage of photoelectric cell, VfRepresent the driving voltage of semiconductor unit.In the present embodiment, The size of photoelectric cell 10 is 85 × 85mil2, its driving voltage is 72V.Each semiconductor unit Driving voltage is essentially 3V, but the driving voltage of semiconductor unit can be because of technology controlling and process and epitaxial layer Quality and be varied from.In general, in the electrical efficiency of photoelectric cell, driving of semiconductor unit Galvanic electricity pressure is the lowest more good.The area of each semiconductor unit is the most mutually the same.According to above-mentioned formula, Photoelectric cell 10 comprises 24 semiconductor units, be respectively arranged at row 105,106,107,108, with And 109.The first row 105 comprises five semiconductor units 151,152,153,154 and 155, Concatenate towards first direction；Second row 106 comprise five semiconductor units 161,162,163,164, with And 165, concatenate towards second direction；The third line 107 comprise four semiconductor units 171,172,173, And 174, concatenate towards first direction；Fourth line 108 comprise five semiconductor units 181,182,183, 184 and 185, concatenate towards second direction；Fifth line 109 comprise five semiconductor units 191,192, 193,194 and 195, concatenate towards first direction.First direction and second direction are contrary, and different The layout of the semiconductor unit comprising varying number in row can make to be easier to meet in configuration the demand of client.
In the third line 107, the profile of semiconductor unit be rectangle and with the quasiconductor list in other row Unit's shape is different, by such design, can make to be easier in electrode lay-out.With reference to Fig. 1 and Fig. 3, In the first row 105 and fifth line 109, except be positioned at substrate 11 corner regions semiconductor unit 151, 155, outside 191 and 195, the electrode lay-out on other semiconductor units is similar.In the second row 106 and fourth line 108 in, except close to substrate 11 edge semiconductor unit 161,165,181, with And outside 185, other electrode lay-outs being positioned on semiconductor unit are identical.In the third line 107 half Its electrode lay-out of conductor element diversity compared with the semiconductor unit in other row is relatively big, but therein half Electrode lay-out on conductor element 172 and 173 is identical, and be positioned at partly leading of substrate 11 edge Body unit 171 and 174 is different.
First extension 1411 comprises the first curvilinear extension 1411a；Second extension 1421 comprises Two curvilinear extension 1421a, the second of the semiconductor unit being expert on 105,106,108 and 109 Extension 1421 also comprises rectilinear extension 1421b；First curvilinear extension 1411a and/or second is bent Line extension 1421a is the most parallel to each other with any side of semiconductor unit.First and third and the five elements 105, the first extension 1411 on the semiconductor unit of 107 and 109 is positioned in groove 170, and And extend from the first limit of semiconductor unit to the second limit of offside, the second extension 1421 is then from half Second limit of conductor element extends to the first limit.Second and four row 106 and 108 semiconductor unit on The first extension 1411 be that the second limit from semiconductor unit extends to the first limit, and the second extension 1421 is that the first limit from semiconductor unit extends to the second limit.In the present embodiment, the second extension 1421 are generally arranged near the edge of semiconductor unit, and the first extension 1411 is placed in quasiconductor list In unit's groove 170, it is electrically connected with the first semiconductor layer 121.The quantity of extension can be according to quasiconductor list The area of unit adjusts, if the area of semiconductor unit is bigger, it is necessary to more extension.Extension Also the second order extension 1411c extended from the first curvilinear extension 1411a can be formed and/or from the second song The second order extension 1421c that line extension 1421a extends, to increase current dissipation.
First electronic pads 1412 and the second electronic pads 1422 lay respectively at the half of the relative corner of substrate 11 On conductor element 155 and 191, the first electronic pads 1412 and the first extension on semiconductor unit 155 Portion 1411 contacts, the second electronic pads 1422 and the second extension 1421 on semiconductor unit 191 Contact；Electronic pads engages (wire bonding) as lead-in wire or flip-over type engages (flip chip type Bonding) use.In order to reduce the degree of difficulty on joint, electronic pads is preferably arranged, respectively substrate 11 On different semiconductor unit in outermost.
In order to electrically connect each semiconductor unit, therefore connecting portion 143 is formed at each semiconductor unit Between, for example, connecting portion 143 and the first extension 1411 on the first semiconductor unit and adjacent The second semiconductor unit on the second extension 1421 connect.In the present embodiment, connecting portion 143 The concatenation of first direction is formed between first and third and the five elements 105,107 and 109, and in second And four reverse concatenations forming second direction between row 106 and 108.By connecting portion 143 between each row Concatenation semiconductor unit 151 and 161,165 and 174,171 and 181 and 185 and 195.In First and second, four and the five elements 105,106,108 and 109 in have two between each two semiconductor unit Individual connecting portion 143 is present in therebetween, has a connection in the third line 107 between each two semiconductor unit Portion 143 is present in therebetween.Fig. 4 is the equivalent circuit diagram of the photoelectric cell 10 shown in Fig. 1.
Transparent leading also can be comprised between second semiconductor layer 123 and second electrode 142 of photoelectric cell 10 Electric layer, the material of transparency conducting layer is metal oxide materials, such as tin indium oxide (ITO), cadmium tin (CTO), antimony tin, indium zinc oxide, zinc oxide aluminum or zinc-tin oxide.Additionally, when metal level has Have when can allow the thickness of light transmission, it is possible to as transparency conducting layer.
Between substrate 11 and the first semiconductor layer 121, also can comprise bonding layer so that quasiconductor list Unit engages with substrate 11.Bonding layer can be insulation transparent bonding layer or conductive, transparent bonding layer；If Insulation transparent bonding layer, its material can be polyimides (polyimide), benzocyclobutene (BCB), Or cross fluorine Tetramethylene. (PFCB)；If the material of conductive binding layer, its material can be metal oxide materials Or metal, metal oxide materials comprise tin indium oxide (ITO), cadmium tin (CTO), antimony tin, Indium zinc oxide, zinc oxide aluminum or zinc-tin oxide；Metal material comprise nickel, gold, titanium, chromium, aluminum or Platinum.Segmentation road 111 is formed between each semiconductor unit, and exposes part substrate 11 and/or absolutely The transparent bonding layer of edge.When bonding layer is conductive binding layer, segmentation road 111 exposes through conductive binding layer Go out substrate 11 to make to be electrically insulated between each semiconductor unit, now substrate 11 be aluminium nitride (AlN), Sapphire or glass.
Fig. 5 discloses the top view of the photoelectric cell 20 meeting the application the second embodiment.With reference to Fig. 5-6, Photoelectric cell 20 comprises multiple semiconductor unit and is formed on substrate 21, and via multiple segmentation roads 211 Separating, first electrode the 241, second electrode 242 and connecting portion 243 are formed at quasiconductor list In unit.The structure of semiconductor unit is identical with photoelectric cell 10, comprise the first semiconductor layer 121, Two semiconductor layers 123, and the active area 122 between first, second semiconductor layer.Multiple points Cut 211 to be formed between each semiconductor unit.Have on photoelectric cell 20 multiple first electrode 241 and Second electrode 242, wherein the first electrode 241 is formed on the first semiconductor layer 121 exposed, and Second electrode 242 is formed on the second semiconductor layer 123.First electrode 241 comprises the first extension 2411, the second electrode 242 comprises the second extension 2421.Additionally, in multiple semiconductor units one The first electrode 241 on semiconductor unit comprises the first electronic pads 2412, and on second half conductor element Second electrode 242 comprises the second electronic pads 2422.
In the present embodiment, the size of photoelectric cell 20 is 85 × 85mil2, its driving voltage is 72V, The area of each semiconductor unit is the most mutually the same, according to above-mentioned formula Photoelectric cell 20 comprise 23 semiconductor units, are respectively arranged in row 205,206,207,208 and 209. The first row 205 comprises five semiconductor units 251,252,253,254 and 255 towards first direction string Connect, and the electrode on the semiconductor unit in electrode lay-out thereon and photoelectric cell 10 the first row 105 Layout is identical；Second row 206 comprises four semiconductor units 261,262,263 and 264 towards second Direction concatenates, and on the semiconductor unit in electrode lay-out thereon and photoelectric cell 10 the third line 107 Electrode lay-out identical；The third line 207 comprise five semiconductor units 271,272,273,274 and 275 concatenate towards first direction, and electrode lay-out thereon and partly leading in photoelectric cell 10 the first row 105 Electrode lay-out on body unit is identical；Fourth line 208 comprise four semiconductor units 281,282,283, And 284 concatenate towards second direction, and in electrode lay-out thereon and photoelectric cell 10 the third line 107 Electrode lay-out on semiconductor unit is identical；Fifth line 209 comprise five semiconductor units 291,292, 293,294 and 295 concatenate towards first direction, and the layout of electrode thereon and photoelectric cell 10 the The electrode lay-out on semiconductor unit in a line 105 is identical.
In second and four in row 206,208, the profile of semiconductor unit be rectangle and with in other row Semiconductor unit shape different.With reference to Fig. 5 and Fig. 6, the first row 205, the third line 207, Yi Ji Electrode lay-out on the semiconductor unit of the five elements 209, except semiconductor unit 251,255,271,275, Outside electrode on 291 and 295, the most generally phase of the electrode lay-out on other semiconductor units Seemingly；Electrode lay-out on the semiconductor unit of the second row 206 and fourth line 208, except semiconductor unit 261, outside the electrode on 264,281 and 284, the electrode lay-out on other semiconductor units each other it Between be substantially the same.First extension 2411 comprises the first curvilinear extension 2411a, and the second extension 2421 comprise the second curvilinear extension 2421a.It is expert on the semiconductor unit of 205,207 and 209, Second extension 2421 also comprises rectilinear extension 2421b；First curvilinear extension 2411a and second is bent Line extension 2421a is not parallel to any side of semiconductor unit.First and third and the five elements 205,207, The first extension 2411 on 209 semiconductor units is arranged on the first semiconductor layer 121, and from partly leading First limit of body unit extends to the second limit relative to the first limit, and the second extension 2421 is then from the Two limits extend to the first limit.In second and four the first extension on row 206,208 semiconductor unit 2411 extend to the first limit from the second limit of semiconductor unit, and the second extension 2421 is then from the first limit Extend to the second limit.In the present embodiment, the second extension 2421 is generally near semiconductor unit Edge is arranged, and the first extension 2411 is placed in semiconductor unit, electrically connects with the first semiconductor layer Connect.Extension also can form the second order extension 2411c extended from the first curvilinear extension 2411a, To increase current dissipation.
First electronic pads 2412 and the second electronic pads 2422 are respectively formed in semiconductor unit 255 and 291 On, the first electronic pads 2412 contacts with the first extension 2411 on semiconductor unit 255, and second Electronic pads 2422 contacts with the second extension 2421 on semiconductor unit 291.Electronic pads is as connecing Close (bonding) use, and be arranged respectively on the different semiconductor unit in substrate 21 corner regions.
In the present embodiment, connecting portion 243 is between first and third and the five elements 205,207 and 209 Form the concatenation of first direction, and form the reverse of second direction in second and four between row 206 and 208 Concatenation.Semiconductor unit 251 and 261,264 and 275,271 is concatenated by connecting portion 243 between each row And 281 and 284 and 295.Each two in first and third and the five elements 205,207 and 209 Having two connecting portions 243 between semiconductor unit, in the second row 206 and fourth line 208, each two is partly led A connecting portion 243 is had between body unit.Fig. 7 is the equivalent circuit diagram of the photoelectric cell 20 shown in Fig. 5.
Fig. 8 discloses the top view of the photoelectric cell 30 meeting the application the 3rd embodiment.With reference to Fig. 8-9, Photoelectric cell 30 comprises multiple semiconductor unit and is formed on substrate 31, first electrode the 341, second electricity Pole 342 and connecting portion 343 are formed on semiconductor unit.The structure of semiconductor unit comprises first Semiconductor layer the 121, second semiconductor layer 123, and having between first, second semiconductor layer Source region 122.Multiple segmentation roads 311 are formed between each semiconductor unit.Have multiple on photoelectric cell 30 First electrode 341 and the second electrode 342, wherein the first electrode 341 comprises the first extension 3411 and is formed On semiconductor unit outside semiconductor unit 355, the second electrode 342 comprises the second extension 3421. Additionally, the first electrode 341 on semiconductor unit 355 comprises the first electronic pads 3412, and quasiconductor list The second electrode 342 in unit 391 comprises the second electronic pads 3422.
In the present embodiment, the size of photoelectric cell 30 is 50 × 50mil2, its driving voltage is 72V, The driving voltage of semiconductor unit is about 3V, and the area of each semiconductor unit is the most mutually the same. Photoelectric cell 30 comprises 23 semiconductor units, be respectively arranged at row 305,306,307,308 and In 309.The first row 305 comprises five semiconductor units 351,352,353,354 and 355 towards One direction concatenation；Second row 306 comprises four semiconductor units 361,362,363 and 364 towards Two direction concatenations；The third line 307 comprises five semiconductor units 371,372,373,374 and 375 Concatenate towards first direction；Fourth line 308 comprises four semiconductor units 381,382,383 and 384 Concatenate towards second direction；Fifth line 309 comprise five semiconductor units 391,392,393,394 and 395 concatenate towards first direction.
In second and four in row 306,308, the profile of semiconductor unit and the quasiconductor list in other row Unit's shape is different.With reference to Fig. 8 and Fig. 9, the first row 305, the third line 307 and fifth line 309 Semiconductor unit on electrode lay-out, except semiconductor unit 351,355,371,375,391, And outside the electrode on 395, the electrode lay-out on other semiconductor units is substantially similar each other；The Electrode lay-out on the semiconductor unit of two row 306 and fourth line 308, except semiconductor unit 361, 364, outside the electrode on 381 and 384, being substantially the same each other of other.First extension 3411 Can be curvilinear extension 3411a, its be disposed proximate to the semiconductor unit 361 of substrate 31 periphery, 375, 381, on 391 and 394；First extension 3411 can also be rectilinear extension 3411b, is arranged at On other semiconductor units.Second extension 3421 can be curvilinear extension.
In first and third and the five elements 305,307,309, in addition to semiconductor unit 375,395, its His semiconductor unit the first extension 3411 thereon from the first limit of semiconductor unit to relative to The second limit on one side extends, and the second extension 3421 then extends to the first limit from the second limit.Quasiconductor list The first extension 3411 in unit 375 and 395 extends to the second limit from the 3rd limit of semiconductor unit. In second and four row 306,308, in addition to semiconductor unit 361,381, on other semiconductor units The first extension 3411 extend to the first limit from the second limit, and the second extension 3421 from the first limit to Second limit extends.The first extension 3411 on semiconductor unit 361 and 381 is from semiconductor unit 3rd limit of 361 and 381 extends to the first limit.The curvilinear extension of the first extension 3411 and second prolongs Extending portion 3421 is not parallel to any side of semiconductor unit.In the present embodiment, the second extension 3421 Generally arrange near the edge of semiconductor unit, and the first extension 3411 be placed in semiconductor unit, It is electrically connected with the first semiconductor layer.Extension also can be formed from curvilinear extension 3411a and straight-line extension The second order extension 3411c that portion 3411b extends, to increase current dissipation.
First electronic pads 3412 and the second electronic pads 3422 are respectively formed in semiconductor unit 355 and 391 On, the second electronic pads 3422 contacts with the second extension 3421 on semiconductor unit 391.Electrode Pad engages as lead-in wire or flip-over type engages use, and is arranged respectively at the difference in substrate 31 corner regions Semiconductor unit on.
In the present embodiment, connecting portion 343 is between first and third and the five elements 305,307 and 309 Form the concatenation of first direction, and form the reverse of second direction in second and four between row 306 and 308 Concatenation.Semiconductor unit 351 and 361,364 and 375,371 is concatenated by connecting portion 343 between each row And 381 and 384 and 395.A connecting portion 343 is had to be present between each two semiconductor unit Therebetween.Figure 10 is the equivalent circuit diagram of the photoelectric cell 30 shown in Fig. 8.
Figure 11 discloses the top view of the photoelectric cell 40 meeting the application the 4th embodiment.With reference to figure 11-12, photoelectric cell 40 comprises multiple semiconductor unit and is formed on substrate 41, the first electrode 441, Second electrode 442 and connecting portion 443 are formed on semiconductor unit.The structure bag of semiconductor unit Containing first semiconductor layer the 121, second semiconductor layer 123, and between first, second semiconductor layer it Between active area 122.Multiple segmentation roads 411 are formed between each semiconductor unit.Photoelectric cell 40 On have multiple first electrode 441 and the second electrode 442, wherein the first electrode 441 comprises the first extension 4411 are formed on the semiconductor unit outside semiconductor unit 455, and are formed at semiconductor unit 471 The second electrode 442 on semiconductor unit in addition comprises the second extension 4421.Additionally, be formed at half The first electrode 441 on conductor element 455 comprises the first electronic pads 4412, and in semiconductor unit 471 On the second electrode 442 comprise the second electronic pads 4422.
In the present embodiment, the size of photoelectric cell 40 is 45 × 45mil2, its driving voltage is 48V, The driving voltage of semiconductor unit is about 3V；According to above-mentioned formula, photoelectric cell 40 comprises 16 half Conductor element, is configured in row 405,406 and 407.The first row 405 comprises five semiconductor units 451,452,453,454 and 455 concatenate towards first direction；Second row 406 comprises six quasiconductors Unit 461,462,463,464,465 and 466 concatenates towards second direction；The third line 407 comprises Five semiconductor units 471,472,473,474 and 475 concatenate towards first direction.
The profile of the semiconductor unit in the second row 402 is different from the semiconductor unit shape in other row； Reference Figure 11 and Figure 12, the electrode lay-out on the semiconductor unit of the first row 405 and the third line 407, Except being positioned in addition to the electrode on semiconductor unit 451,455,471 and 475, other semiconductor units Electrode lay-out be substantially similar each other.First extension 4411 comprises rectilinear extension 4411a And second order extension 4411c, the most all of second extension 4421 is all the extension of curve.In First and two row 405,407 semiconductor unit on the first extension 4411 from the of semiconductor unit While extending to the 3rd limit and the 4th limit adjacent to the first limit, and the second extension 4421 is from the second limit Extend to the 3rd limit and the 4th limit.The first extension 4411 on the semiconductor unit of the second row 406 Extend to the 3rd limit and the 4th limit from the second limit of semiconductor unit, and the second extension 4421 is from first While extend to the 3rd limit and the 4th limit.Curvilinear extension 4411 and 4421 is not parallel to semiconductor unit Any side.
First electronic pads 4412 and the second electronic pads 4422 lay respectively on semiconductor unit 455 and 471, Connecting portion 443 forms concatenation between semiconductor unit.Figure 13 is the photoelectric cell 40 shown in Figure 11 Equivalent circuit diagram.
Figure 14 discloses the top view of the photoelectric cell 50 meeting the application the 5th embodiment.Figure 15 is light The 3D axonometric chart of electric device 50.The size of photoelectric cell 50 is 40 × 40mil2, its driving voltage is 36V, the driving voltage of semiconductor unit is about 3V；According to formula In the present embodiment, light Electric device 50 comprises 11 semiconductor units, is respectively arranged in row 505,506 and 507.First Row 505 comprises four semiconductor units 551,552,553 and 554 and concatenates towards first direction；Second Row 506 comprises three semiconductor units 561,562 and 563 and concatenates towards second direction；The third line 507 Comprise four semiconductor units 571,572,573 and 574 to concatenate towards first direction.Have first to prolong First electrode 541 of extending portion 5411 is formed on the semiconductor unit outside semiconductor unit 554, tool The second electrode 542 having the second extension 5421 is formed on all of semiconductor unit.Quasiconductor list The first electrode 541 in unit 554 comprises the first electronic pads 5412, and second on semiconductor unit 571 Electrode 542 comprises the second electronic pads 5422.Connecting portion 543 forms concatenation between semiconductor unit.Figure 16 is the equivalent circuit diagram of the photoelectric cell 50 shown in Figure 14.
Figure 17 discloses the top view of the photoelectric cell 60 meeting the application sixth embodiment.Figure 18 is light The 3D axonometric chart of electric device 60.The size of photoelectric cell 60 is 120 × 120mil2, its driving voltage For 24V, the driving voltage of semiconductor unit is about 3V；According to formula In the present embodiment, Photoelectric cell 60 comprises 8 semiconductor units, is respectively arranged in row 605,606 and 607.The A line 605 comprises two semiconductor units 651 and 652 and concatenates towards first direction；Second row 606 comprises Four semiconductor units 661,662,663 and 664 concatenate towards second direction；The third line 607 comprises Two semiconductor units 671 and 672 concatenate towards first direction.First electrode 641 comprises the first extension 6411, the second electrode 642 comprises the second extension 6421.Additionally, in multiple semiconductor units one Its first electrode 641 on semiconductor unit comprises two the first electronic padses 6412, and second half conductor list The second electrode 642 in unit comprises two the second electronic padses 6422.Connecting portion 643 in semiconductor unit it Between formed concatenation.Figure 19 is the equivalent circuit diagram of the photoelectric cell 60 shown in Figure 17.
Figure 20 discloses the top view of the photoelectric cell 70 meeting the application the 7th embodiment.Figure 21 is light The 3D axonometric chart of electric device 70.The size of photoelectric cell 70 is 120 × 120mil2, its driving voltage For 24V, the driving voltage of semiconductor unit is about 3V；According to formula In the present embodiment, Photoelectric cell 70 comprises 7 semiconductor units, is respectively arranged in row 705,706 and 707.The A line 705 comprises two semiconductor units 751 and 752 and concatenates towards first direction；Second row 606 comprises Three semiconductor units 761,762 and 769 concatenate towards second direction；The third line 707 comprises two and half Conductor element 771 and 772 concatenates towards first direction.First electrode 741 comprises the first extension 7411, Second electrode 742 comprises the second extension 7421.Additionally, a quasiconductor in multiple semiconductor units The first electrode 741 on unit comprises two the first electronic padses 7412, and on second half conductor element Two electrodes 742 comprise two the second electronic padses 7422.Connecting portion 743 forms string between semiconductor unit Connect.Figure 22 is the equivalent circuit diagram of the photoelectric cell 70 shown in Figure 20.
Figure 23 discloses the top view of the photoelectric cell 80 meeting the application the 8th embodiment.Figure 24 is light The 3D axonometric chart of electric device 80.The size of photoelectric cell 80 is 85 × 85mil2, its driving voltage is 144V, the driving voltage of semiconductor unit is about 3V；According to formula In the present embodiment, light Electric device 80 comprises 48 semiconductor units and is configured at row 801,802,803,804,805,806 And in 807.Row 801,803,805 and 807 comprises seven semiconductor units respectively towards first party To concatenation；Row 802 and 806 comprises seven semiconductor units concatenate towards second direction；Fourth line 804 Comprise six semiconductor units to concatenate towards first direction.A semiconductor unit in multiple semiconductor units On the first electrode 841 comprise the first electronic pads 8412 and be positioned at the first quasiconductor of semiconductor unit 811 On layer 121, and the second electrode 842 on semiconductor unit 871 comprises the second electronic pads 8422, its position On the second semiconductor layer 123.Additionally, first electrode 841 with the first extension 8411 is positioned at On semiconductor unit outside the semiconductor unit that first electronic pads 8412 is put；There is the second extension Second electrode 842 of 8421 is positioned on all semiconductor units.Connecting portion 843 is between semiconductor unit Form concatenation.842, the second electrode on the semiconductor unit 811 that first electronic pads 8412 is positioned at On the second semiconductor layer 123, by the first electrode 841 of connecting portion 843 with semiconductor unit 812 Connect；The first electrode 841 on the semiconductor unit 871 that second electronic pads 8422 is positioned at is positioned at In semi-conductor layer 121, it is connected with the second electrode 842 of semiconductor unit 872 by connecting portion 843.
Figure 25 discloses the top view of the photoelectric cell 90 meeting the application the 9th embodiment.Photoelectric cell 90 Comprise 48 semiconductor units to be configured in row 801,802,803,804,805,806 and 807. Its outward appearance and electrode configuration are similar to photoelectric cell 80, and difference is that the first electronic pads 9412 is formed at half On second semiconductor layer 123 of conductor element 811, by connecting portion 843 and semiconductor unit 812 First electrode 841 forms concatenation；Second electronic pads 9422 is formed at the second the half of semiconductor unit 871 On conductor layer 123, concatenated with the second electrode 842 formation of semiconductor unit 872 by connecting portion 843. When there being external power source to inject from the second electronic pads 9422 for induced current, then exported by the first electronic pads 9412 Time, owing to semiconductor unit 871 resistance under the second electronic pads 9422 is more than its connecting portion 843 and half The series resistor of the first electrode 841 of conductor element 812, therefore electric current is directly from the second electronic pads 9422 The first electrode 841 of semiconductor unit 812 is flowed to, without flowing to quasiconductor list via connecting portion 843 The first semiconductor layer 121, active area 122 and the second semiconductor layer 123 under unit 871.Same Electric current is flowing to the first electrode 841 of semiconductor unit 812, flows to the first electrode via connecting portion 843 After pad 9412, the first semiconductor layer 121 below semiconductor unit 811, active area can't be flowed to 122 and second semiconductor layer 123, but it is directly output to external power source.Therefore the first electronic pads 9412 and second semiconductor units 811 and 871 below electronic pads 9422 will not produce light.In order to enter One step electrically completely cuts off electronic pads and lower semiconductor unit, can be formed between electronic pads and semiconductor unit Insulating barrier, it is to avoid because big electric current causes the semiconductor layer below electric current penetrating electrode pad to form short circuit.
Owing to the semiconductor unit below the first electronic pads 9412 and the second electronic pads 9422 is the most luminous, because of This first electronic pads 9412 area can be roughly the same with the area of semiconductor unit 811, the second electronic pads 9422 areas can be roughly the same with the area of semiconductor unit 871, to promote the yield of lead-in wire technique.This Outward, in photoelectric cell 90, the first electronic pads 9412 also can be with the second electronic pads 8422 in photoelectric cell 80 Collocation, now the first electronic pads 9412 substantially entire surface is covered in the second quasiconductor of semiconductor unit 811 On layer 123, and the second electronic pads 8422 is positioned at part second semiconductor layer 123 of semiconductor unit 871 On；Semiconductor unit no current below first electronic pads 9412 injects, the most luminous, and the The first electrode 841 on the semiconductor unit 871 that two electronic padses 8422 are positioned at, by connecting portion 843 It is connected with the second electrode 842 of semiconductor unit 872, when current is injected, the second electronic pads 8422 The semiconductor unit 871 being positioned at can luminescence.Similarly, the second electronic pads 9422 in photoelectric cell 90 Also can arrange in pairs or groups with the first electronic pads 8412 in photoelectric cell 80, now the first electronic pads 8412 is positioned at On part first quasiconductor 121 of semiconductor unit 811, and the second electronic pads 9422 substantially entire surface It is covered on the second semiconductor layer 123 of semiconductor unit 871；What the first electronic pads was positioned at partly leads The second electrode 842 on body unit 811, by the first electricity of connecting portion 843 with semiconductor unit 812 Pole 841 connects, when current is injected, and semiconductor unit 811 meeting that the first electronic pads 8422 is positioned at Luminescence, and the electric current injecting the second electronic pads 9422 can't flow through the active area of semiconductor unit 871 122, but directly flow to semiconductor unit 872, therefore the second electronic pads 9422 by connecting portion 843 The semiconductor unit 871 being positioned at is the most luminous.
The material of the first semiconductor layer, active layer and the second semiconductor layer comprises one or more element and is selected from In the group being made up of Ga, Al, In, As, P, N and Si, such as GaN, AlGaN, InGaN, AlGaInN, GaP, GaAs, GaAsP, GaNAs or Si；The material of substrate comprise sapphire, GaAs, GaP, SiC, ZnO, GaN, AlN, Cu or Si.
Each embodiment cited by the present invention is only in order to illustrate the present invention, and is not used to limit the model of the present invention Enclose.Anyone any modification apparent easy to know made for the present invention or change are all without departing from the essence of the present invention God and scope.

Claims (22)

1. a photoelectric cell, comprises:
Substrate；
Multiple semiconductor units, are electrically connected with each other and are positioned on this substrate, the most the plurality of partly lead Body unit is each to be comprised the first semiconductor layer, the second semiconductor layer and the first and second half leads between its this Active area between body layer；
Multiple first electrodes, lay respectively on this first semiconductor layer；And
Multiple second electrodes, lay respectively on this second semiconductor layer, wherein, in the plurality of first electrode At least one comprises multiple first extensions separated from one another, and in the plurality of second electrode at least One comprises the second extension,
Wherein there is between two adjacent semiconductor units multiple connecting portion separated from one another with should Two adjacent semiconductor units are electrically connected with, and the plurality of connecting portion each respectively with the plurality of first Corresponding one in extension is connected,
Multiple semiconductor units are arranged as at least three row, the first row is positioned at edge semiconductor unit First electrode of the semiconductor unit being positioned at edge in one electrode and the second row has different shapes, and second The first electrode and the third line of the semiconductor unit being positioned at edge in row is positioned at the semiconductor unit at edge The first electrode there is different shapes, in a line in wherein said the first row, the second row and the third line The shape of semiconductor unit is different from the shape of semiconductor unit in other two row.
2. photoelectric cell as claimed in claim 1, the driving voltage of the most the plurality of semiconductor unit and/or Area is identical.
3. photoelectric cell as claimed in claim 2, it is different that the most the plurality of semiconductor unit comprises at least two Shape.
4. photoelectric cell as claimed in claim 1, wherein in this first extension and this second extension at least One is had to comprise rectilinear extension, and/or an at least bag in this first extension and this second extension Containing second order extension.
5. photoelectric cell as claimed in claim 1, the most the plurality of first electrode comprises the first extension respectively Portion, and the plurality of second electrode comprises the second extension respectively.
6. photoelectric cell as claimed in claim 5, the most the plurality of first extension comprises the first curve respectively Extension, and the plurality of second extension comprises the second curvilinear extension respectively；
This first curvilinear extension and this second curvilinear extension are not parallel to the plurality of semiconductor unit Any side.
7. photoelectric cell as claimed in claim 5, the most the plurality of first electrode comprises straight-line extension respectively Portion, and the plurality of second electrode comprises rectilinear extension respectively.
8. photoelectric cell as claimed in claim 1, the most the plurality of semiconductor unit comprises the first quasiconductor list Unit, the second semiconductor unit and the 3rd semiconductor unit,
Wherein, one of the plurality of first electrode comprises the first electronic pads, this first electronic pads be positioned at this On semiconductor unit, this first semiconductor unit is positioned on the corner region of this substrate；
One of the plurality of second electrode comprises the second electronic pads, and this second electronic pads is positioned at this second half leads On body unit, this second semiconductor unit is positioned on another corner region of this substrate；And
This first extension and this second extending part are on the 3rd semiconductor unit not having electronic pads.
9. photoelectric cell as claimed in claim 8, this first electricity being wherein positioned on this first semiconductor unit Pole also comprises extension and contacts with this first electronic pads, and/or be positioned on this second semiconductor unit this Two electrodes also comprise extension and contact with this second electronic pads.
10. photoelectric cell as claimed in claim 1, wherein in this first extension and this second extension extremely Rare one comprises curvilinear extension, and this curvilinear extension is not parallel to the arbitrary of the plurality of semiconductor unit Limit.
11. photoelectric cells as claimed in claim 1, on the plurality of semiconductor unit of any of which this first Extension from the first limit of this semiconductor unit to relative to this first limit second limit extend, and this second Extension extends to this first limit from this second limit of this semiconductor unit, this first extending part in this Between two extensions.
12. photoelectric cells as claimed in claim 1, the most the plurality of semiconductor unit comprises first, second, 3rd and the 4th semiconductor unit, this first and second semiconductor unit is configured at the first row, and the 3rd And the 4th semiconductor unit be configured at second row adjacent with this first row.
The photoelectric cell of 13. such as claim 12, wherein this first extension and this second extending part in On this first semiconductor unit, this first electrode package being positioned on the 3rd semiconductor unit contains the 3rd extension Portion, this first extension prolongs to this first semiconductor unit second limit from this first semiconductor unit first limit Stretching, this second extension extends to this first limit from this second limit, wherein the of this first semiconductor unit While closer to the first limit of substrate, the second limit of this first semiconductor unit is closer to relative to this Second limit on substrate the first limit；
3rd extension from the 3rd semiconductor unit the second limit to the 3rd semiconductor unit the first limit Extending, wherein the second limit of the 3rd semiconductor unit is closer to the second limit of this substrate, and the 3rd half First limit of conductor element is closer to the first limit of this substrate.
The photoelectric cell of 14. such as claim 13, wherein this second electrode on the 3rd semiconductor unit Comprising the 4th extension, the 4th extension is led to the 3rd half from the first limit of the 3rd semiconductor unit Second limit of body unit extends.
The photoelectric cell of 15. such as claim 13, wherein the electrode lay-out on this first semiconductor unit with Electrode lay-out on this second semiconductor unit is identical, and/or the electrode lay-out on the 3rd semiconductor unit Identical with the electrode lay-out on the 4th semiconductor unit.
The photoelectric cell of 16. such as claim 13, the wherein electrode lay-out of this first row and this second row Electrode lay-out differs, and/or the plurality of semiconductor unit number in this first row is different from this second row The plurality of semiconductor unit number.
The photoelectric cell of 17. such as claim 13, this first row plurality of and this second row repeat configuration On this substrate.
The photoelectric cell of 18. such as claim 13, wherein the multiple semiconductor units in this first row pass through First connecting portion concatenates towards first direction, and the multiple semiconductor units in this second row pass through the second connecting portion Concatenating towards second direction, wherein this first direction and this second direction are contrary.
19. photoelectric cells as claimed in claim 1, also comprise bonding layer, are formed at this substrate and the plurality of Between semiconductor layer unit.
20. 1 kinds of photoelectric cells, comprise:
Substrate；
Multiple semiconductor units, are electrically connected with each other and are positioned on this substrate, the most the plurality of partly lead Body unit is each comprises the first semiconductor layer, the second semiconductor layer and between this first and second quasiconductor Active area between Ceng；
Multiple first electrodes, lay respectively on this first semiconductor layer；And
Multiple second electrodes, lay respectively on this second semiconductor layer,
Wherein, in the plurality of first electrode at least one comprise multiple first extensions separated from one another, And in the plurality of second electrode at least one comprise the second extension, wherein two adjacent partly leading There is multiple connecting portion separated from one another with by electrical for these two adjacent semiconductor units between body unit Connect, and each respectively corresponding to the plurality of first extension one of the plurality of connecting portion is connected Connect；The driving voltage of the most the plurality of semiconductor unit is identical,
Multiple semiconductor units are arranged as at least three row, the first row is positioned at edge semiconductor unit First electrode of the semiconductor unit being positioned at edge in one electrode and the second row has different shapes, and second The first electrode and the third line of the semiconductor unit being positioned at edge in row is positioned at the semiconductor unit at edge The first electrode there is different shapes, in a line in wherein said the first row, the second row and the third line The shape of semiconductor unit is different from the shape of semiconductor unit in other two row.
21. 1 kinds of photoelectric cells, comprise:
Substrate；
Multiple semiconductor units, are electrically connected with each other and are positioned on this substrate, the most the plurality of partly lead Body unit is each comprises the first semiconductor layer, the second semiconductor layer and between this first and second quasiconductor Active area between Ceng,
Multiple first electrodes, lay respectively on this first semiconductor layer；And
Multiple second electrodes, lay respectively on this second semiconductor layer,
The most the plurality of semiconductor unit comprises the first semiconductor unit, the second semiconductor unit, Yi Ji Three semiconductor units, at least one in the plurality of first electrode comprises the first electronic pads and is positioned at this substrate On this peripheral first semiconductor unit, and at least one in the plurality of second electrode comprises the second electricity Polar cushion is positioned on this second semiconductor unit of this substrate outermost,
Wherein this first electrode package contains multiple first extending parts separated from one another in not having being somebody's turn to do of electronic pads On 3rd semiconductor unit, this second electrode package contains the second extending part in not having the 3rd half of electronic pads On conductor element,
Wherein be respectively provided with between two adjacent semiconductor units multiple connecting portion separated from one another with These two adjacent semiconductor units are electrically connected with, and the plurality of connecting portion each respectively with the plurality of Corresponding one in first extension is connected,
Multiple semiconductor units are arranged as at least three row, the first row is positioned at edge semiconductor unit First electrode of the semiconductor unit being positioned at edge in one electrode and the second row has different shapes, and second The first electrode and the third line of the semiconductor unit being positioned at edge in row is positioned at the semiconductor unit at edge The first electrode there is different shapes, in a line in wherein said the first row, the second row and the third line The shape of semiconductor unit is different from the shape of semiconductor unit in other two row.
22. 1 kinds of photoelectric cells, comprise:
Substrate；
Multiple semiconductor units, are electrically connected with each other and are positioned on this substrate, the most the plurality of partly lead Body unit is each comprises the first semiconductor layer, the second semiconductor layer and between this first and second quasiconductor Active area between Ceng；And
Multiple first electrodes and multiple second electrode, lay respectively on the plurality of semiconductor unit,
The most the plurality of semiconductor unit comprises the first semiconductor unit, the second semiconductor unit, Yi Ji Three semiconductor units, at least one in the plurality of first electrode comprise the first electronic pads be positioned at this first half On this first semiconductor layer of conductor element, and at least one in the plurality of second electrode comprises second Electronic pads is positioned on this second semiconductor layer of this second semiconductor unit,
Wherein this first electrode package contains multiple first extending parts separated from one another in not having being somebody's turn to do of electronic pads On 3rd semiconductor unit, this second electrode package contains the second extending part in not having the 3rd half of electronic pads On conductor element,
Wherein be respectively provided with between two adjacent semiconductor units multiple connecting portion separated from one another with These two adjacent semiconductor units are electrically connected with, and the plurality of connecting portion each respectively with the plurality of Corresponding one in first extension is connected,
Multiple semiconductor units are arranged as at least three row, the first row is positioned at edge semiconductor unit First electrode of the semiconductor unit being positioned at edge in one electrode and the second row has different shapes, and second The first electrode and the third line of the semiconductor unit being positioned at edge in row is positioned at the semiconductor unit at edge The first electrode there is different shapes, in a line in wherein said the first row, the second row and the third line The shape of semiconductor unit is different from the shape of semiconductor unit in other two row.
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