TWI512889B - 具有雙面連接之積體電路封裝系統及其製造方法 - Google Patents

具有雙面連接之積體電路封裝系統及其製造方法 Download PDF

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TWI512889B
TWI512889B TW099108850A TW99108850A TWI512889B TW I512889 B TWI512889 B TW I512889B TW 099108850 A TW099108850 A TW 099108850A TW 99108850 A TW99108850 A TW 99108850A TW I512889 B TWI512889 B TW I512889B
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inserter
integrated circuit
hole
preformed
interconnect
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TW099108850A
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TW201044503A (en
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Chan Hoon Ko
Soo-San Park
Youngchul Kim
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Stats Chippac Ltd
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Description

具有雙面連接之積體電路封裝系統及其製造方法
本發明大體上係關於積體電路封裝系統，且尤係關於具有雙面連接之積體封裝系統。
愈益小型化之組件、較大封裝密度之積體電路(IC)、較高之效能、和較低之成本為電腦工業持續追求之目標。半導體封裝結構持續朝向小型化、增加封裝於其中之組件之密度、同時減小由其製成之產品之尺寸邁進。這是有鑒於對於資訊和通訊產品持續減小尺寸、厚度和成本伴隨不斷增加效能之持續增加的需求。
對於小型化的這些漸增需求尤其值得令人注意，例如，於譬如手機、免持雙耳耳機式手機(hands-free cellular phone headset)、個人資料助理(PDA)、小型手提攝錄放影機(camcorder)、筆記型電腦等等。所有的這些裝置持續製得較小和較薄以改善他們的輕便性。因此，併入這些裝置之大尺度IC(LSI)封裝件被要求製得較小和較薄。容裝和保護LSI之封裝件組構亦要求他們製得較小和較薄。
許多習知的半導體(或“晶片”)封裝件為將半導體晶粒用樹脂(譬如環氧樹脂壓模化合物)壓模於封裝件中之類型。多數的封裝方法係堆疊多個積體電路晶粒或封裝內封裝(package-in-package；PIP)或者他們的結合。其他的方法包含封裝層級堆疊(package level stacking)或者層疊封裝(package-on-package；POP)。
因此，對於提供高連通性、低製造成本、和減小之尺寸的積體電路封裝系統仍然有其需要。鑑於持續增加需求節省成本和改善效率，對於找出這些問題的解決辦法愈來愈重要。鑑於一直增加之商業競爭壓力，伴隨著成長之消費者期盼和縮減之對於市場上有意義的產品差異之機會，對於發現這些問題的解決之道是很重要的。此外，減少成本、改善效率和效能、和符合競爭壓力之需求對於找出這些問題的解決辦法之關鍵需求愈添加急迫性。
對於這些問題之解決方案已經搜尋良久，但是先前技術發展未教示或建議任何的解決方法，因此對於這些問題之解決已經長期困擾著熟悉此項技術者。
本發明提供一種製造積體電路封裝系統之方法，包含下列步驟：安裝積體電路於基板之上，該積體電路具有裝置貫穿孔和裝置互連，其中該裝置貫穿孔橫越該積體電路並且該裝置互連附接於該裝置貫穿孔；附接導電支撐於該基板之上，其中該導電支撐鄰接該積體電路；設置預成形插入器，該預成形插入器具有插入器貫穿孔和預附接互連，其中該預附接互連附接於該插入器貫穿孔；安裝該預成形插入器於該積體電路和該導電支撐之上，其中該預附接互連之該導電支撐位於該裝置貫穿孔之上；以及形成包覆體於該基板之上，該包覆體覆蓋該積體電路、該導電支撐、和部分覆蓋該預成形插入器。
本發明提供一種積體電路封裝系統，包含：基板；積體電路，該積體電路位在該基板之上具有裝置貫穿孔和裝置互連，其中該裝置貫穿孔橫越該積體電路並且該裝置互連附接於該裝置貫穿孔；導電支撐，於該基板之上，其中該導電支撐鄰接該積體電路；預成形插入器，該預成形插入器具有插入器貫穿孔和預附接互連，其中該預附接互連附接於該插入器貫穿孔，包含：該預成形插入器具有該預附接互連預先附接於該預成形插入器之載體之特徵，以及該預成形插入器位在該積體電路和該導電支撐之上且該預附接互連位於該裝置貫穿孔之上；以及包覆體，位於該基板之上，覆蓋該積體電路、該導電支撐、和部分覆蓋該預成形插入器。
本發明之某些實施例具有其他的步驟或元件附加於或取代上述步驟或元件。這些步驟或元件對於熟悉此項技術者從閱讀下列之詳細說明配合參照所附圖式將會變得很清楚。
下列之實施例係經過充分詳細的說明而使得熟悉此項技術者能夠製造和使用本發明。應該了解到，根據本揭示內容，其他的實施例將為明顯的，並且可以對系統、製程、或機械作改變而不會偏離本發明之範圍。
於下列說明中，提出了許多特定的詳細說明以提供對本發明之完全了解。然而，對於熟悉本技藝者而言，顯然無須如此詳細說明亦能實施本發明。為了不致模糊本發明，一些已熟知的電路、系統配置、和製程步驟將不作詳細揭示說明。
該系統實施例之各圖式係以部分圖解顯示，並未按比例繪製，尤其，某些尺寸是為了清楚表示而於各圖式中予以非常誇大地顯示。相似情況，雖然於所示圖式中所看到的為了容易說明而一般顯示相似的方向，但是於圖式中之此描繪就大部分而言為任意的。一般而言，本發明能夠操作於任何方向。
所有的圖式中係用相同的元件符號來指示相同的元件。為了方便說明之目的，該等實施例已經編號為第一實施例、第二實施例、等等，並不欲有任何其他的意義，或對本發明之提出限制。
為了說明之目的，此處所用之“水平面(horizontal)”一詞定義為平行於積體電路之平面或表面，而無關於其方向。“垂直的(vertical)”一詞係指垂直於剛才所定義之水平面之方向。相關於該水平面而定義譬如“在上方(above)”、“在下方(below)”、“底部(bottom)”、“頂部(top)”、“側(side)”(如於“側壁”中)、“較高(higher)”、“較低(lower)”、“上部(upper)”、“在‧‧‧之上(over)”、和“在‧‧‧下面(under)”等詞彙。詞彙“在上面(on)”意指元件之間有直接接觸。
本文中所用之詞彙“處理(processing)”包含當需要形成所述之結構時沉積材料或光阻、圖案化(patterning)、曝光、顯影(development)、蝕刻、清洗、和/或去除材料或光阻。
現在參照第1圖，圖中顯示本發明之第一具體實施例中積體電路封裝系統100之上視圖。積體電路封裝系統100之上視圖描繪預成形插入器(pre-formed interposer)102，譬如預成形貫穿孔插入器或預成形有機插入器(pre-formed organic interposer)。預成形插入器102能夠包含安裝接點104。包覆體106(譬如包含環氧樹脂壓模化合物之蓋子)能夠環繞該預成形插入器。
為了例示之目的，積體電路封裝系統100顯示具有陣列組構之安裝接點104，但應了解到積體電路封裝系統100能夠具有不同組構的安裝接點104。舉例而言，安裝接點104能夠形成外圍組構或者某些陣列位置減少之陣列組構。
茲參照第2圖，圖中顯示沿著第1圖之線2-2積體電路封裝系統100之剖面圖。積體電路封裝系統100之剖面圖描繪在包覆體106內之預成形插入器102。預成形插入器102係預先形成具有預附接互連(pre-attached interconnect)208與其附接。
剖面圖亦描繪積體電路212(譬如積體電路晶粒或覆晶(flip chip))之主動側210面對基板214(譬如層疊基板(laminated substrate)或印刷電路板)。
裝置貫穿孔216(譬如貫穿矽孔)能夠包含於積體電路212之非主動側220處的安裝墊218。裝置貫穿孔216從主動側210至非主動側220橫越積體電路212。
預成形插入器102包含載體222(譬如貫穿孔插入器或有機插入器)以及附接於該載體222的預附接互連208(譬如預鍍銲錫(solder on pad；SOP)凸塊或其他的預先附接導電凸出)。安裝墊218能夠附接於預附接互連208。
裝置貫穿孔216能夠耦接至基板214。導電支撐224(譬如銲球、導電柱、或導電桿)能夠安裝在基板214之上並且鄰接於積體電路212。
於裝置貫穿孔216與基板214之間，積體電路212能夠包含裝置互連226，譬如銲球、導電凸塊或者導電柱。裝置互連226亦能夠附接於主動側210與基板214之間而不附接於裝置貫穿孔216。
包覆體106能夠與預成形插入器102共平面。包覆體環繞該預附接互連208。積體電路封裝系統100具有預附接互連208與預成形插入器102之載體222之間堅固的連接之特徵，而使得機械和電性連接中斷或間斷得以被限制或減少。預先形成具有載體222之預附接互連208確保堅固的連結，從而在形成包覆體106過程中減少中斷。
外部互連228(譬如銲球或導電凸塊)能夠附接於基板214下方。導電支撐224能夠附接於預成形插入器102。導電支撐224能夠耦接於安裝接點104。預附接互連208能夠附接於被耦接至裝置貫穿孔216之安裝墊218於非主動側220。預附接互連208能夠耦接於安裝接點104。
茲參照第3圖，圖中顯示具有預附接互連208之預成形插入器102之剖面圖。該預成形插入器102包含插入器貫穿孔330，譬如包含導電材料、銅銲料或鎢之電性連接結構。插入器貫穿孔330能夠是貫穿矽通孔或電性通孔。預附接互連208能夠附接於插入器貫穿孔330。
插入器貫穿孔330從預成形插入器非主動側332至預成形插入器主動側334橫越預成形插入器102。插入器主動側334包含在其上之主動電路。插入器非主動側332不包含在其上之主動電路。插入器貫穿孔330允許從外側連接至第2圖之積體電路封裝系統100之內部以及至第2圖之外部互連228。
為了例示之目的，預成形插入器102顯示具有預附接互連208附接於插入器貫穿孔330，但應了解到預成形插入器102也能夠具有與預附接互連208不同的組構。舉例而言，預成形插入器102能夠具有預附接互連208附接至載體222但是不需附接至插入器貫穿孔330。
能夠形成並且測試預成形插入器102以確保載體222與預附接互連208之間之可靠的機械和電性連接。預先附接確保載體222與預附接互連208之間堅固的連接，用以安裝於第2圖之導電支撐224之上而予以維持。若互連係施用於第2圖之非主動側222而非施用於載體222，則導電支撐224之高度變化可能導致與載體222有不良的連接或沒有連接。
茲參照第4圖，圖中顯示本發明之第二具體實施例中具有第1圖之積體電路封裝系統100之積體電路層疊封裝(POP)系統400之上視圖。上視圖描繪安裝裝置402，譬如積體電路晶粒、覆晶、或封裝之積體電路。
茲參照第5圖，圖中顯示沿著第4圖之線5-5的積體電路層疊封裝系統400之剖面圖。該剖面圖描繪安裝裝置(mounting device)402安裝在積體電路封裝系統100之上。安裝裝置402之安裝互連(mounting interconnect)502能夠附接於預成形插入器102。安裝互連502能夠附接於插入器貫穿孔330。
已發現到本發明提供之具有預成形插入器之積體電路封裝系統提供了可靠的連接結構。該積體電路封裝系統具有形成有預成形插入器之特徵。用以形成預成形插入器之連接至載體的預附接互連減少或消除於預附接互連和載體之間不良或微弱的連接，從而改善於包覆製程中之可靠性。再者，當使用覆晶或其他的高I/O裝置時，使用預成形插入器能提供增加之互連效能。
亦發現到本發明提供具有雙連通(dual connectivity)和緊密佔地面積(compact footprint)之積體電路封裝系統。預成形插入器、插入器貫穿孔與預附接互連一起提供了從積體電路封裝系統上方和下方之雙連通。裝置貫穿孔和插入器貫穿孔允許積體電路電性耦接至預成形插入器，消除可能需要額外的佔地面積空間之額外的連接結構(譬如銲球)的需要。再者，使用預成形插入器能夠使得安裝額外的封裝件在積體電路封裝件之頂端上變得更加容易。
於是，已發現到本發明之積體電路封裝提供重要且迄今未知和尚未獲得的解決方法、能力、和功能態樣，用於與積體電路封裝系統雙連通。
茲參照第6圖，圖中顯示於本發明之另一個具體實施例中製造積體電路封裝系統100之方法600之流程圖。方法600包含：於方塊602中，安裝積體電路於基板之上，該積體電路具有裝置貫穿孔和裝置互連，其中該裝置貫穿孔橫越該積體電路並且該裝置互連附接於該裝置貫穿孔；於方塊604中，附接導電支撐於該基板之上，其中該導電支撐鄰接該積體電路；於方塊606中，設置預成形插入器，該預成形插入器具有插入器貫穿孔和預附接互連，其中該預附接互連係附接於該插入器貫穿孔；於方塊608中，安裝該預成形插入器於該積體電路和該導電支撐之上，其中該預附接互連於該裝置貫穿孔之上；以及於方塊610中，形成包覆體於該基板之上，該包覆體覆蓋該積體電路、該導電支撐、且部分覆蓋該預成形插入器。
所得到的方法、製程、裝備、裝置、產品、和/或系統係直接的、低成本的、不複雜、高度多樣性且有效的，能夠藉由調適已知的技術而出人意外且非顯而易見地加以執行，並且因此容易適合有效和經濟地製造積體封裝系統。
本發明之另一個重要的態樣為有益地支持和服務降低成本、簡化系統和增加效能之歷史趨勢。
本發明之這些和其他有價值之態樣因此促進技術之狀態至至少下一個層級。
雖然本發明已結合特定之最佳實施模式而作說明，但應了解到對於熟習此技藝者而言，在鑑於上述之說明後，可了解該實施例可作許多之替換、修飾和改變。因此，本發明將包含所有落於所包含之申請專利範圍之精神和範圍內之此等的替換、修飾和改變。此說明書中所提出和所附圖式中所顯示之所有內容係將作例示說明用而並非欲用來限制本發明。
100‧‧‧積體電路封裝系統
102‧‧‧預成形插入器
104‧‧‧安裝接點
106‧‧‧包覆體
208‧‧‧預附接互連
210‧‧‧主動側
212‧‧‧積體電路
214‧‧‧基板
216‧‧‧裝置貫穿孔
218‧‧‧安裝墊
220‧‧‧非主動側
222‧‧‧載體
224‧‧‧導電支撐
226‧‧‧裝置互連
228‧‧‧外部互連
330‧‧‧插入器貫穿孔
332‧‧‧插入器非主動側
334‧‧‧插入器主動側
400‧‧‧積體電路層疊封裝(POP)系統
402‧‧‧安裝裝置
502‧‧‧安裝互連
600‧‧‧方法
602、604、606、608、610‧‧‧方塊步驟
第1圖為於本發明之第一具體實施例中的積體電路封裝系統之上視圖。
第2圖為沿著第1圖之線2-2的積體電路封裝系統之剖面圖。
第3圖為具有預附接互連之預成形插入器之剖面圖。
第4圖為於本發明之第二具體實施例中具有第1圖之積體電路封裝系統之積體電路層疊封裝(POP)系統之上視圖。
第5圖為沿著第4圖之線5-5的積體電路層疊封裝系統之剖面圖。
第6圖為於本發明之另一個具體實施例中製造積體電路封裝系統之方法之流程圖。
100‧‧‧積體電路封裝系統
102‧‧‧預成形插入器
104‧‧‧安裝接點
106‧‧‧包覆體
208‧‧‧預附接互連
210‧‧‧主動側
212‧‧‧積體電路
214‧‧‧基板
216‧‧‧裝置貫穿孔
218‧‧‧安裝墊
220‧‧‧非主動側
222‧‧‧載體
224‧‧‧導電支撐
226‧‧‧裝置互連
228‧‧‧外部互連

Claims (10)

  1. 一種製造積體電路封裝系統之方法，包括下列步驟：以裝置貫穿孔橫越積體電路並且裝置互連附接於該裝置貫穿孔的方式安裝該積體電路於基板之上，該積體電路具有裝置貫穿孔和裝置互連；以導電支撐鄰接該積體電路的方式附接該導電支撐於該基板之上；以預附接互連附接於插入器貫穿孔的方式設置預成形插入器，該預成形插入器具有該插入器貫穿孔和該預附接互連；以該預附接互連位於該裝置貫穿孔之上的方式安裝該預成形插入器於該積體電路和該導電支撐之上；以及以包覆體覆蓋該積體電路、該導電支撐和部分覆蓋該預成形插入器的方式形成該包覆體在該基板上面，部分覆蓋該預成形插入器係包括該包覆體覆蓋於該預成形插入器之垂直側邊。
  2. 如申請專利範圍第1項之方法，其中，以該預附接互連位於該裝置貫穿孔之上的方式安裝該預成形插入器於該積體電路和該導電支撐之上包含電性耦接該預附接互連和該裝置貫穿孔。
  3. 如申請專利範圍第1項之方法，其中，以包覆體覆蓋該積體電路、該導電支撐和部分覆蓋該預成形插入器的方式形成該包覆體於該基板之上包含暴露該插入器貫穿 孔。
  4. 如申請專利範圍第1項之方法，其中，以包覆體覆蓋該積體電路、該導電支撐和部分覆蓋該預成形插入器的方式形成該包覆體於該基板之上包含形成該包覆體與該預成形插入器之暴露部分共平面。
  5. 如申請專利範圍第1項之方法，其中，以預附接互連附接於插入器貫穿孔的方式設置預成形插入器，該預成形插入器具有該插入器貫穿孔和該預附接互連，包含設置具有預先附著之銲錫於銲墊凸塊上之預成形插入器。
  6. 一種積體電路封裝系統，包括：基板；積體電路，該積體電路位在該基板之上具有裝置貫穿孔和裝置互連，其中該裝置貫穿孔橫越該積體電路並且該裝置互連附接於該裝置貫穿孔；導電支撐，位於該基板之上，其中該導電支撐鄰接該積體電路；預成形插入器，具有插入器貫穿孔和預附接互連，其中該預附接互連附接於該插入器貫穿孔，包含：該預成形插入器具有將該預附接互連預先附接於該預成形插入器之載體之特徵，以及該預成形插入器位在該積體電路和該導電支撐之上，而該導電支撐位於該裝置貫穿孔之上；以及包覆體，在該基板上面，覆蓋該積體電路、該導電支撐、和部分覆蓋該預成形插入器，部分覆蓋該預成形 插入器係包括以該包覆體覆蓋於該預成形插入器之垂直側邊。
  7. 如申請專利範圍第6項之系統，其中，該預附接互連係電性耦接至該裝置貫穿孔。
  8. 如申請專利範圍第6項之系統，其中，該包覆體暴露該插入器貫穿孔。
  9. 如申請專利範圍第6項之系統，其中，該包覆體係與該預成形插入器之暴露部分共平面。
  10. 如申請專利範圍第6項之系統，其中，該預附接互連包含於銲墊凸塊上的預附接銲錫。
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