TWI493680B - 功率半導體封裝體及其製造方法 - Google Patents

功率半導體封裝體及其製造方法 Download PDF

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Publication number
TWI493680B
TWI493680B TW101138093A TW101138093A TWI493680B TW I493680 B TWI493680 B TW I493680B TW 101138093 A TW101138093 A TW 101138093A TW 101138093 A TW101138093 A TW 101138093A TW I493680 B TWI493680 B TW I493680B
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Taiwan
Prior art keywords
lead plate
gate
semiconductor package
wafer
power semiconductor
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TW101138093A
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English (en)
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TW201349439A (zh
Inventor
謝智正
冷中明
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尼克森微電子股份有限公司
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Application filed by 尼克森微電子股份有限公司 filed Critical 尼克森微電子股份有限公司
Priority to TW101138093A priority Critical patent/TWI493680B/zh
Priority to US13/684,171 priority patent/US20130313696A1/en
Publication of TW201349439A publication Critical patent/TW201349439A/zh
Application granted granted Critical
Publication of TWI493680B publication Critical patent/TWI493680B/zh

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Description

功率半導體封裝體及其製造方法
本發明是有關於封裝技術領域，且特別是有關於一種半導體封裝技術。
近年來工商發達、社會進步，相對提供之產品亦主要針對便利、確實、經濟實惠為主旨，因此，當前開發之產品亦比以往更加進步，而得以貢獻社會。
由於功率電晶體具有高集成密度、相當低的靜態漏電流以及不斷提升的功率容量，功率電晶體仍然廣泛應用於開關電源和變頻器等電力電子學領域。在不斷增加的集成度、日益減小的封裝尺寸下，隨之而來，消費者市場上不斷提高對於散熱的要求。
然而，現有的功率半導體封裝結構，仍存在缺陷，而有待加以進一步改進。為了解決散熱問題，相關領域莫不費盡心思來謀求解決之道，但長久以來一直未見適用的方式被發展完成。因此，如何既能減小的封裝尺寸，又能有效率地散熱，實屬當前重要研發課題之一，亦成為當前相關領域亟需改進的目標。
因此，本發明之一態樣是在提供一種功率半導體封裝體及其製造方法。
依據本發明一實施例，一種功率半導體封裝體包含引線框架、第一晶片、第二晶片與單一連接片。引線框架具有電源引線板、接地板、輸出引線板、第一閘極引線板與一第二閘極引線板，彼此分開設置。第一晶片設置於電源引線板上，第一晶片內部的高側功率電晶體的閘極以接至第一閘極引線板；第二晶片設置於接地板上，第二晶片內部具的低側功率電晶體的閘極接至第二閘極引線板。連接片設置於第一、第二晶片與輸出引線板上，電氣連接高側功率電晶體的源極與低側功率電晶體的汲極。
上述之第二晶片以覆晶接合的方式，設置於接地板上。
上述之高側功率電晶體的閘極以導線搭接至第一閘極引線板。
上述之功率半導體封裝體更包含封膠層。封膠層至少包覆第一、第二晶片。
上述之連接片可為單一金屬片(clip)，金屬片黏著在第一、第二晶片與輸出引線板上。
上述之金屬片之頂部暴露於封膠層外，功率半導體封裝體亦可包含散熱片。散熱片直接接觸金屬片之頂部。
或者，上述之連接片可為單一鋁帶，鋁帶熱壓接合於第一、第二晶片與輸出引線板上。
上述之第一閘極引線板與第二閘極引線板分別位於第一、第二晶片之相對兩側。
或者，上述之第一閘極引線板與第二閘極引線板分別位於第一、第二晶片之同一側。
上述之功率半導體封裝體亦可包含驅動晶片。驅動晶 片係接至第一、第二閘極引線板。
上述之連接片具有一定位孔。
依據本發明另一實施例，一種功率半導體封裝體的製造方法包含下列步驟：(a)提供一引線框架，引線框架至少具有一電源引線板、一接地板、一輸出引線板、一第一閘極引線板與一第二閘極引線板；(b)設置一第一晶片於電源引線板上；(c)設置一第二晶片於接地板上，並將第二晶片內部的低側功率電晶體的閘極接至第二閘極引線板；(d)設置單一連接片於第一、第二晶片與輸出引線板上，連接片電氣連接高側功率電晶體的源極與低側功率電晶體的汲極；(e)將第一晶片內部的高側功率電晶體的閘極接至第一閘極引線板。
上述之第二晶片以覆晶方式接合於該接地板上。
上述之步驟(d)包含：提供單一金屬片以作為連接片，金屬片黏著在第一、第二晶片與輸出引線板上。
或者，上述之步驟(d)包含：提供單一鋁帶以作為連接片，並將鋁帶熱壓接合於第一、第二晶片與輸出引線板上。
上述之製造方法更包含：提供驅動晶片，以導線搭接至第一、第二閘極引線板。
綜上所述，本發明之技術方案與現有技術相比具有明顯的優點和有益效果。藉由上述技術方案，可達到相當的技術進步，並具有產業上的廣泛利用價值，其至少具有下列優點：1.充分利用電源引線板、接地板來幫助散熱；以及 2.第一、第二晶片之間無需以多組的打線連接，使得兩者間距(inter-die distance)極小，可容許放置較大晶片，亦可減少多組打線所需耗費的時間與製程；3.第一、第二晶片上部共電位，可以使用單一金屬片或單一鋁帶，完成電氣連接，可以加強散熱能力，減少線間電感，提高工作頻率；4.若使用金屬片，可以多個功率半導體封裝體整體一起施工，節省製作時間；5.使用封膠層覆蓋晶片，可以阻止水氣腐蝕晶片，提高可靠度；以及6.本發明的率半導體封裝體兼具雙面散熱的效果。
以下將以實施方式對上述之說明作詳細的描述，並對本發明之技術方案提供更進一步的解釋。
為了使本發明之敘述更加詳盡與完備，可參照所附之圖式及以下所述各種實施例，圖式中相同之號碼代表相同或相似之元件。另一方面，眾所週知的元件與步驟並未描述於實施例中，以避免對本發明造成不必要的限制。
於實施方式與申請專利範圍中，除非內文中對於冠詞有所特別限定，否則『一』與『該』可泛指單一個或複數個。
本文中所使用之『約』、『大約』或『大致』係用以修飾任何可些微變化的數量，但這種些微變化並不會改變其本質。於實施方式中若無特別說明，則代表以『約』、『大 約』或『大致』所修飾之數值的誤差範圍一般是容許在百分之二十以內，較佳地是於百分之十以內，而更佳地則是於百分五之以內。
本發明之技術態樣是一種功率半導體封裝體，其可應用於同步整流結構，或是廣泛地運用在相關之技術環節。第1圖是依照本發明一實施例之一種同步整流結構的電路圖。如第1圖所示，在同步整流結構中，第一晶片110內部具有高側功率電晶體M1，第二晶片120內部具有低側功率電晶體M2。驅動晶片130交替控制高側功率電晶體M1與低側功率電晶體M2之啟閉，藉以實現同步整流，實務上，上述的驅動晶片130亦可為PWM控制晶片。
在結構上，高側功率電晶體M1的汲極電氣連接引線框架的電源引線板210，以取得工作電壓；低側功率電晶體M2的源極電氣連接引線框架的接地板230；高側功率電晶體M1的源極與低側功率電晶體M2的汲極電氣連接引線框架的輸出引線板220，以輸出電壓，其具體結構如第2~4圖所示。
第2圖是依照本發明一實施例之一種功率半導體封裝體100a的立體圖。於第2圖中，功率半導體封裝體100a包含引線框架200、第一晶片110與第二晶片120。引線框架200具有電源引線板210、輸出引線板220、接地板230、第一閘極引線板240與第二閘極引線板250，彼此分開設置。第一晶片110設置於電源引線板210上，第一晶片內部110的高側功率電晶體的閘極接至第一閘極引線板240，本實施例以導線的方式搭接至第一閘極引線板；第二 晶片120覆晶接合於接地板230上，且第二晶片120內部之低壓電晶體的源極位於晶片之下表面，即其接合於接地板230。第二晶片120內部的低側功率電晶體的閘極，位於第二晶片120之下表面，且接著至第二閘極引線板250。本實施例以覆晶的方式，將第二晶片120設置於接地板230上，但此並不限至本發明，可根據第二晶片120的結構，亦可用打線的方式，將第二晶片與引線框架連接。藉此，本發明充分利用電源引線板210、接地板230來幫助散熱，即將外部電路的印刷電路板(PCB)中之電源層與接地層連接到電源引線板210與接地板230，以加大散熱面積，藉此增強散熱效果；而且，第一晶片110與第二晶片120之間無需以多組的打線連接，使得兩者間距(inter-die distance)極小，可容許放置較大晶片，並能進一步降低單體本身的阻抗。此外，本實施例之高側功率電晶體與低側功率電晶體皆為垂直型功率半導體結構，即閘極與源極位於晶片的同一側，汲極則位於晶片的另一側，因此利用本實施例之封裝方式，可選用高、低側功率電晶體皆為半導體製程之複雜度較低的垂直型功率半導體結構，進而降低整體的費用。
第3圖是依照本發明一實施例所繪示之第2圖的側視圖。如第3圖所示，功率半導體封裝體100a包含單一連接片300。連接片300設置於第一晶片110、第二晶片120與輸出引線板220上，且電氣連接高側功率電晶體M1的源極與低側功率電晶體M2的汲極(繪示於第1圖)。藉此，第一晶片110、第二晶片120上部共電位，可以使用單一 連接片300，完成電氣連接，可以加強散熱能力，減少線間電感，提高工作頻率。另外，連接片300亦可具有定位孔301(請參照第2圖)，以利於功率半導體封裝體的製作過程中，連接片300能被準確地設置於第一晶片110與第二晶片120上方。
於第3圖中，連接片300為金屬片(clip)，金屬片藉由焊料600黏著在第一晶片110、第二晶片120與輸出引線板220上。功率半導體封裝體100a亦包含包含封膠層500，封膠層500包覆第一晶片110、第二晶片120與連接片300。藉此，使用封膠層500覆蓋晶片，可以阻止水氣腐蝕晶片，提高可靠度。
第4圖是依照本發明另一實施例所繪示之第2圖的側視圖。如第4圖所示，金屬片300之頂部暴露於封膠層500外，如此，可以增加功率半導體封裝體100a的散熱功能。此外，功率半導體封裝體100a亦可包含散熱片510，散熱片510直接接觸金屬片300之頂部，藉以進一步幫助散熱。
第5圖是依照本發明另一實施例所繪示之第2圖的側視圖。如第5圖所示，電路基板400上的電源引線板210、接地板230可幫助第一晶片110與第二晶片120散熱，第一晶片110與第二晶片120上的連接片300可以加強散熱能力。藉此，本發明的功率半導體封裝體100a兼具雙面散熱的效果。
第6圖是依照本發明一實施例之複數個金屬片的局部示意圖。基本上功率半導體封裝體之單體製作時，一次放一片金屬片，但於實作上，亦可採用如第6圖所示的方式， 亦即使用一大片金屬片，包含與引線框架相同數目的金屬片300，先將引線框架上的晶片放置完成後，施予焊料於晶片與引線板上後，再將整個大片金屬板，經定位後放置並加壓於其上，最後將多個功率半導體封裝體整體封裝完成後，再進行切割成各個獨立的功率半導體封裝體，如此，可以節省製作的時間。
第7圖是依照本發明另一實施例之一種功率半導體封裝體的立體圖。於第7圖中，第一閘極引線板240與第二閘極引線板250分別位於第一晶片110、第二晶片120之同一側，以便於特定的配置運用。相對而言，於第2圖中，第一閘極引線板240與第二閘極引線板250分別位於第一晶片110、第二晶片120之相對兩側。
第8圖是依照本發明另一實施例之一種功率半導體封裝體的立體圖。不同於第7圖之第二晶片120內部之低側功率電晶體的閘極位於第二晶片120的下表面，本實施例之第二晶片120內部之低側功率電晶體的閘極位於第二晶片120的上表面，並以導線方式將其閘極搭接至第二閘極引線板250。第二晶片120內部之低側功率電晶體的源極係位於第二晶片120之下表面，且接合於接地板230。第二晶片120內部之低側功率電晶體的汲極位於第二晶片120之上表面，且藉由連接片300(例如：鋁帶)與第一晶片110內部之高側功率電晶體之源極連接。
第9圖是依照本發明一實施例所繪示之第7圖的側視圖。如第7~9圖所示，連接片300可為單一鋁帶，連接片300(即，鋁帶)熱壓接合於第一晶片110與第二晶片120 與輸出引線板220上，因此這部份則無需焊料600。再者，連接片300不僅可為鋁帶，亦可為其他具有可饒性的金屬帶，因此會造成未壓合處的連接片300呈現弧型，如此可以根據散熱需求，彈性地增加連接片300的長度，以增加鋁帶300的散熱面積。連接片300的熱壓接合面積，亦可根據設計需求，彈性調整。應瞭解到，如上所述之鋁帶、金屬帶僅為例示，然本發明並不以此為限，只要連接片300為彈性可饒性導電物質，亦為本發明之範圍。
第10圖是依照本發明一實施例之一種功率半導體封裝體的俯視圖。如第10圖所示，驅動晶片130整合至功率半導體封裝體中，亦即功率半導體封裝體可包含驅動晶片130，驅動晶片130係以導線搭接至第一閘極引線板240、第二閘極引線板250與第一晶片110。
第11圖是依照本發明一實施例所繪示之一種功率半導體封裝體的製造方法的示意圖。應瞭解到，在本實施例中所提及的流程步驟，除特別敘明其順序者外，均可依實際需要調整其前後順序，甚至可同時或部分同時執行。
如第11圖所示，在低側晶片接合810時，可先提供如上所述之引線框架200，並施予焊料600，接著設置一第二晶片120於引線框架200的接地板上，並將第二晶片內部的低側功率電晶體的閘極接至第二閘極引線板。在高側晶片接合820時，先施予焊料600，接著設置第一晶片110於引線框架200的電源引線板上。於金屬片接合830時，先施予焊料600，接著設置單一金屬片以作為連接片300於第一晶片110、第二晶片120與輸出引線板220上。於 回流程序840中，對焊料600進行處理。於打線步驟850中，將第一晶片110內部的高側功率電晶體的閘極以導線搭接至第一閘極引線板240。依據本發明之製造方法，只需要一道的回流程序，如此，可以節省製作的時間。
雖然第11圖中低側晶片接合810在高側晶片接合820之前，但此並不限制本發明，實務上，高側晶片接合820也可以在低側晶片接合810之前，熟習此項技藝者應視當時需要彈性選擇之。
於低側晶片接合810時，第二晶片120以覆晶方式接合於引線框架200的接地板上。
上述之製造方法亦可包含：形成封膠層以包覆第一晶片110、第二晶片120。
另外，金屬片之頂部暴露於封膠層外，製造方法更包含：利用一散熱片直接接觸金屬片之頂部。
上述之金屬片製作830亦可改為：提供單一鋁帶以作為連接片，並將鋁帶熱壓接合於第一晶片110、第二晶片120與輸出引線板220上。
上述之製造方法更包含：提供驅動晶片130，以導線搭接至第一、第二閘極引線板(繪示於第10圖)。
雖然本發明已以實施方式揭露如上，然其並非用以限定本發明，任何熟習此技藝者，在不脫離本發明之精神和範圍內，當可作各種之更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。
100a‧‧‧功率半導體封裝體
100b‧‧‧功率半導體封裝體
110‧‧‧第一晶片
120‧‧‧第二晶片
130‧‧‧驅動晶片
200‧‧‧引線框架
210‧‧‧電源引線板
220‧‧‧輸出引線板
230‧‧‧接地板
240‧‧‧第一閘極引線板
250‧‧‧第二閘極引線板
300‧‧‧連接片
301‧‧‧定位孔
400‧‧‧電路基板
500‧‧‧封膠層
510‧‧‧散熱片
600‧‧‧焊料
810‧‧‧低側晶片接合
820‧‧‧高側晶片接合
830‧‧‧金屬片接合
840‧‧‧回流程序
850‧‧‧打線步驟
為讓本發明之上述和其他目的、特徵、優點與實施例能更明顯易懂，所附圖式之說明如下：第1圖是依照本發明一實施例之一種同步整流結構的電路圖；第2圖是依照本發明一實施例之一種功率半導體封裝體的立體圖；第3圖是依照本發明一實施例所繪示之第2圖的側視圖；第4圖是依照本發明另一實施例所繪示之第2圖的側視圖；第5圖是依照本發明又一實施例所繪示之第2圖的側視圖；第6圖是依照本發明一實施例之複數個金屬片的局部示意圖；第7圖是依照本發明另一實施例之一種功率半導體封裝體的立體圖；第8圖是依照本發明又一實施例之一種功率半導體封裝體的立體圖；第9圖是依照本發明一實施例所繪示之第7圖的側視圖；第10圖是依照本發明一實施例之一種功率半導體封裝體的俯視圖；以及第11圖是依照本發明一實施例所繪示之一種功率半導體封裝體的製造方法的示意圖。
100a‧‧‧功率半導體封裝體
110‧‧‧第一晶片
120‧‧‧第二晶片
200‧‧‧引線框架
210‧‧‧電源引線板
220‧‧‧輸出引線板
230‧‧‧接地板
240‧‧‧第一閘極引線板
250‧‧‧第二閘極引線板
300‧‧‧連接片
301‧‧‧定位孔

Claims (13)

  1. 一種功率半導體封裝體，包含：一引線框架，至少具有一電源引線板、一接地板、一輸出引線板、一第一閘極引線板與一第二閘極引線板，彼此分開設置；一第一晶片，設置於該電源引線板上，其中該第一晶片內部具有一高側功率電晶體，該高側功率電晶體的閘極接至該第一閘極引線板；一第二晶片，設置於該接地板上，其中該第二晶片內部具有一低側功率電晶體，該低側功率電晶體的閘極接至該第二閘極引線板，其中該第一、第二晶片位於該第一閘極引線板與該第二閘極引線板之間，該第一閘極引線板與該第二閘極引線板分別位於該第一、第二晶片之相對不同兩側；以及單一連接片，設置於該第一、第二晶片與該輸出引線板上，電氣連接該高側功率電晶體的源極與該低側功率電晶體的汲極。
  2. 如請求項1所述之功率半導體封裝體，其中該第二晶片以覆晶接合的方式，設置於該接地板上。
  3. 如請求項1所述之功率半導體封裝體，其中該高側功率電晶體的閘極以導線搭接至該第一閘極引線板。
  4. 如請求項1所述之功率半導體封裝體，更包含：一封膠層，至少包覆該第一、第二晶片。
  5. 如請求項1所述之功率半導體封裝體，其中該連接片為單一金屬片(clip)，黏著在該第一、第二晶片與該輸出引線板上。
  6. 如請求項4所述之功率半導體封裝體，其中該金屬片之頂部暴露於該封膠層外，該功率半導體封裝體更包含：一散熱片，直接接觸該該金屬片之頂部。
  7. 如請求項1所述之功率半導體封裝體，其中該連接片為單一鋁帶，熱壓接合於該第一、第二晶片與該輸出引線板上。
  8. 如請求項1所述之功率半導體封裝體，更包含：一驅動晶片，以接至該第一、第二閘極引線板。
  9. 如請求項5所述之功率半導體封裝體，其中該連接片具有一定位孔。
  10. 一種功率半導體封裝體的製造方法，該製造方法包含：提供一引線框架，該引線框架至少具有一電源引線 板、一接地板、一輸出引線板、一第一閘極引線板與一第二閘極引線板；設置一第一晶片於該電源引線板上；設置一第二晶片於該接地板上，並將該第二晶片內部的該低側功率電晶體的閘極接至該第二閘極引線板；設置單一連接片於該第一、第二晶片與該輸出引線板上，該連接片電氣連接該高側功率電晶體的源極與該低側功率電晶體的汲極，其中該第一、第二晶片位於該第一閘極引線板與該第二閘極引線板之間，該第一閘極引線板與該第二閘極引線板分別位於該第一、第二晶片之相對不同兩側；以及將該第一晶片內部的高側功率電晶體的閘極接至該第一閘極引線板。
  11. 如請求項10所述之製造方法，其中該第二晶片以覆晶方式接合於該接地板上。
  12. 如請求項10所述之製造方法，其中設置單一連接片之步驟包含：提供單一金屬片以作為該連接片，該金屬片黏著在該第一、第二晶片與該輸出引線板上。
  13. 如請求項10所述之製造方法，其中設置單一連接片之步驟包含： 提供單一鋁帶以作為該連接片，並將該鋁帶熱壓接合該於該第一、第二晶片與該輸出引線板上。
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