TWI486981B - Laminated ceramic electronic parts and manufacturing method thereof - Google Patents
Laminated ceramic electronic parts and manufacturing method thereof Download PDFInfo
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- 239000000919 ceramic Substances 0.000 title claims description 233
- 238000004519 manufacturing process Methods 0.000 title claims description 11
- 239000004020 conductor Substances 0.000 claims description 132
- 238000007747 plating Methods 0.000 claims description 97
- 239000010949 copper Substances 0.000 claims description 96
- 229910052802 copper Inorganic materials 0.000 claims description 66
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 61
- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 claims description 32
- 239000005751 Copper oxide Substances 0.000 claims description 26
- 229910000431 copper oxide Inorganic materials 0.000 claims description 26
- 238000000034 method Methods 0.000 claims description 21
- 239000007791 liquid phase Substances 0.000 claims description 17
- 238000010438 heat treatment Methods 0.000 claims description 11
- 239000011521 glass Substances 0.000 claims description 8
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- 229910052760 oxygen Inorganic materials 0.000 claims description 6
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- 238000009792 diffusion process Methods 0.000 claims description 3
- 239000012071 phase Substances 0.000 claims description 3
- 238000001816 cooling Methods 0.000 claims description 2
- 239000003985 ceramic capacitor Substances 0.000 description 30
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 12
- 239000003990 capacitor Substances 0.000 description 11
- 229910000679 solder Inorganic materials 0.000 description 11
- 239000002184 metal Substances 0.000 description 10
- 229910052751 metal Inorganic materials 0.000 description 10
- 230000015572 biosynthetic process Effects 0.000 description 8
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- 229910052709 silver Inorganic materials 0.000 description 4
- 238000005476 soldering Methods 0.000 description 4
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 3
- 239000011230 binding agent Substances 0.000 description 3
- 238000001354 calcination Methods 0.000 description 3
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- 239000005388 borosilicate glass Substances 0.000 description 1
- 239000003054 catalyst Substances 0.000 description 1
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- 238000010276 construction Methods 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/002—Details
- H01G4/228—Terminals
- H01G4/232—Terminals electrically connecting two or more layers of a stacked or rolled capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
- H01G4/00—Fixed capacitors; Processes of their manufacture
- H01G4/30—Stacked capacitors
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Ceramic Capacitors (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
Description
本發明係關於一種層積陶瓷電子零件及其製造方法者,尤其係關於一種層積陶瓷電子零件所具備之外部端子電極之構造及外部端子電極之形成方法者。The present invention relates to a laminated ceramic electronic component and a method of manufacturing the same, and more particularly to a structure of an external terminal electrode provided in a laminated ceramic electronic component and a method of forming an external terminal electrode.
近年來,行動電話、筆記型電腦、數位攝影機、數位音頻設備等小型可攜式電子設備之市場正在擴大。該等可攜式電子設備隨著小型化之推進,高性能化同時亦有所推進。於可攜式電子設備中搭載有許多層積陶瓷電子零件,對於層積陶瓷電子零件,亦要求小型化且高性能化,例如,對於層積陶瓷電容器,要求小型化且大容量化。In recent years, the market for small portable electronic devices such as mobile phones, notebook computers, digital cameras, and digital audio devices is expanding. With the advancement of miniaturization, these portable electronic devices have also advanced in performance. In the portable electronic device, a plurality of laminated ceramic electronic components are mounted, and the laminated ceramic electronic component is also required to be small in size and high in performance. For example, a laminated ceramic capacitor is required to be small in size and large in capacity.
作為使層積陶瓷電容器小型化且大容量化之方法,有效的是讓陶瓷層薄層化,最近,陶瓷層之厚度為3μm左右者正得以實用化。當前,正在探求更加薄層化之可能性,但存在如下問題:越讓陶瓷層薄層化,則越容易產生內部電極間之短路,因此難以確保品質。As a method of miniaturizing and increasing the capacity of a laminated ceramic capacitor, it is effective to thin the ceramic layer. Recently, the thickness of the ceramic layer is about 3 μm. At present, the possibility of thinning is being sought, but there is a problem in that as the ceramic layer is thinned, the short circuit between the internal electrodes is more likely to occur, so that it is difficult to ensure quality.
作為其他方法,可考慮擴大內部電極之有效面積。然而,當要進行層積陶瓷電容器之量產時,考慮到陶瓷生片之層積偏差、切割偏差,從而有必要在其程度上確保內部電極與陶瓷素體側面之側邊距(side margin)、內部電極與陶瓷素體端面之端邊距(end margin),因此在擴大內部電極之有效面積方面存在制約。As another method, it is considered to enlarge the effective area of the internal electrode. However, when the mass production of the laminated ceramic capacitor is to be performed, it is necessary to ensure the side margin of the internal electrode and the ceramic body side to the extent that the ceramic green sheet is laminated unevenly and the cutting deviation is considered. Since the internal electrode and the end face of the ceramic body end face have an end margin, there is a limitation in enlarging the effective area of the internal electrode.
為一方面確保特定之邊距、一方面擴大內部電極之有效面積,有必要擴大陶瓷層之面積。然而,對於在已決定之尺寸規格內擴大陶瓷層之面積是有限度的,而且外部端子電極本身所具有之厚度亦成為障礙。In order to ensure a specific margin on the one hand and to enlarge the effective area of the internal electrode on the one hand, it is necessary to enlarge the area of the ceramic layer. However, there is a limit to expanding the area of the ceramic layer within the determined size specification, and the thickness of the external terminal electrode itself is also an obstacle.
先前,層積陶瓷電容器之外部端子電極係藉由於陶瓷素體之端部塗佈導電膏並燒接而形成。作為導電膏之塗佈方法,將陶瓷素體之端部浸漬於收容有導電膏之膏槽中然後取出者為主流,但於該方法中,受導電膏之黏性之影響,於陶瓷素體之端面之中央部容易較厚地附著導電膏。因此,外部端子電極會部分地變厚(例如,具體而言超出30μm),從而不得不使陶瓷層之面積相應地減小。Previously, the external terminal electrode of the laminated ceramic capacitor was formed by applying a conductive paste to the end of the ceramic body and baking it. As a coating method of the conductive paste, the end portion of the ceramic body is immersed in a paste tank containing the conductive paste and then taken out as a mainstream, but in the method, the ceramic body is affected by the viscosity of the conductive paste. The conductive paste is easily attached to the center portion of the end face. Therefore, the external terminal electrode is partially thickened (for example, specifically beyond 30 μm), so that the area of the ceramic layer has to be correspondingly reduced.
由此,提出一種藉由直接電鍍而形成外部端子電極之方法(例如參照專利文獻1)。根據該方法,以陶瓷素體之端面中之內部電極之露出部為核心而析出電鍍膜,並且電鍍膜成長,從而將相鄰之內部電極之露出部彼此連接起來。因此,應用該方法後,相較先前之導電膏之方法,可形成薄且平坦之外部端子電極。Thus, a method of forming an external terminal electrode by direct plating has been proposed (for example, refer to Patent Document 1). According to this method, the plating film is deposited with the exposed portion of the internal electrode in the end surface of the ceramic body as a core, and the plating film is grown to connect the exposed portions of the adjacent internal electrodes to each other. Therefore, after applying this method, a thin and flat external terminal electrode can be formed as compared with the prior method of the conductive paste.
然而,於上述電鍍之方法中,無法獲得先前導電膏之方法中之玻璃之接著劑效果,因而存在相對於陶瓷素體之電鍍膜即外部端子電極之固著力較弱的問題。However, in the above plating method, the effect of the adhesive of the glass in the method of the prior conductive paste cannot be obtained, and thus there is a problem that the fixing force with respect to the plating film of the ceramic body, that is, the external terminal electrode is weak.
[專利文獻1]國際公開第2007/049456號小冊子[Patent Document 1] International Publication No. 2007/049456
因此,本發明之目的在於提供一種具有薄且對於陶瓷素體之固著力優異之外部端子電極的層積陶瓷電子零件及其製造方法。Accordingly, an object of the present invention is to provide a laminated ceramic electronic component having a thin external terminal electrode excellent in adhesion to a ceramic body and a method of manufacturing the same.
本發明之層積陶瓷電子零件之特徵在於包括:陶瓷素體,其係層積複數個陶瓷層而成;內部導體,其係形成於陶瓷素體之內部,且於陶瓷素體之外表面上具有露出部;及外部端子電極,其係形成於陶瓷素體之外表面上,且被覆內部導體之露出部;為解決上述技術問題,外部端子電極含有被覆內部導體之露出部之銅鍍膜,並於銅鍍膜之內部且銅鍍膜之至少與陶瓷素體之界面側,以不連續狀存在有銅氧化物。The laminated ceramic electronic component of the present invention is characterized by comprising: a ceramic body formed by laminating a plurality of ceramic layers; and an inner conductor formed in the interior of the ceramic body and on the outer surface of the ceramic body An exposed portion; and an external terminal electrode formed on the outer surface of the ceramic body and covering the exposed portion of the inner conductor; to solve the above technical problem, the external terminal electrode includes a copper plating film covering the exposed portion of the inner conductor, and In the interior of the copper plating film and at least on the interface side of the copper plating film and the ceramic body, copper oxide is present discontinuously.
上述銅氧化物以球狀存在之情形較多。The above copper oxide is often present in a spherical form.
又,銅氧化物有時包含Cu2 O與CuO,於該情形時,較好的是於銅氧化物中,Cu2 O佔90重量百分比以上。Further, the copper oxide may contain Cu 2 O and CuO. In this case, it is preferable that Cu 2 O accounts for 90% by weight or more of the copper oxide.
內部導體亦可含有實質上無助於電氣特性顯現之虛設內部導體。The inner conductor may also contain dummy inner conductors that do not substantially contribute to the appearance of electrical characteristics.
亦可於陶瓷素體外表面上之內部導體之露出部以外的區域且外部端子電極與陶瓷素體之間,形成有輔助導體。於該情形時,輔助導體較好的是含有玻璃。An auxiliary conductor may be formed between a region other than the exposed portion of the inner conductor on the outer surface of the ceramic body and between the external terminal electrode and the ceramic body. In this case, the auxiliary conductor preferably contains glass.
當本發明之層積陶瓷電子零件例如構成電容器陣列或者多端子型低ESL電容器等情形時,內部導體之露出部係以於陶瓷素體之外表面上至少構成4行之方式形成,外部端子電極係以與內部導體之露出部之行相對應之方式形成至少4個。When the laminated ceramic electronic component of the present invention is, for example, a capacitor array or a multi-terminal type low ESL capacitor, the exposed portion of the inner conductor is formed on at least four rows on the outer surface of the ceramic body, and the external terminal electrode is formed. At least four are formed in a manner corresponding to the line of the exposed portion of the inner conductor.
當本發明之層積陶瓷電子零件例如構成層積陶瓷電容器或層積陶瓷電感器等情形時,典型的是,陶瓷素體具有互相相對之第1及第2主面與連結第1及第2主面間之4個側面,外部端子電極含有分別形成於側面上相異之第1及第2位置的第1及第2外部端子電極。When the laminated ceramic electronic component of the present invention is, for example, a laminated ceramic capacitor or a laminated ceramic inductor, the ceramic body typically has first and second main faces facing each other and connecting the first and second sides. The four side faces between the main faces and the external terminal electrodes include first and second external terminal electrodes respectively formed at the first and second positions different in the side faces.
於此種實施形態中,當本發明之層積陶瓷電子零件構成層積陶瓷電容器時,內部導體含有:第1內部電極,其係於側面上之第1位置具有露出部,且與第1外部端子電極電性連接;及第2內部電極,其係於側面上之第2位置具有露出部,且與第2外部端子電極電性連接;第1及第2內部電極經由特定之陶瓷層而互相相對。In the embodiment, when the laminated ceramic electronic component of the present invention comprises a laminated ceramic capacitor, the internal conductor includes a first internal electrode having an exposed portion at a first position on the side surface, and the first external portion The terminal electrode is electrically connected; and the second internal electrode has an exposed portion at a second position on the side surface and is electrically connected to the second external terminal electrode; and the first and second internal electrodes are mutually connected via a specific ceramic layer relatively.
當本發明之層積陶瓷電子零件構成層積陶瓷電感器時,內部導體含有:第1內部導體,其係於側面上之第1位置具有露出部;第2內部導體,其係於側面上之第2位置具有露出部,且於陶瓷層之層積方向上,配置在與第1內部導體不同之位置;及線圈導體,其延伸為線圈狀以將第1內部導體與第2內部導體電性連接。When the laminated ceramic electronic component of the present invention constitutes a laminated ceramic inductor, the inner conductor includes: a first inner conductor having an exposed portion at a first position on the side surface; and a second inner conductor attached to the side surface The second position has an exposed portion, and is disposed at a position different from the first inner conductor in the stacking direction of the ceramic layer, and the coil conductor extends in a coil shape to electrically connect the first inner conductor and the second inner conductor connection.
上述4個側面包括互相相對之第1及第2側面、以及互相相對之第3及第4側面時,上述第1外部端子電極僅形成於第3側面上,上述第2外部端子電極僅形成於第4側面上亦可。此時,較好的是,於第1及第2主面、以及第1及第2側面之各一部分上,形成僅於第1外部端子電極之外周緣上與第1外部端子電極電性連接之第1端緣導體,並於第1及第2主面、以及第1及第2側面之各一部分上,形成僅於第2外部端子電極之外周緣上與第2外部端子電極電性連接之第2端緣導體。When the four side faces include the first and second side faces facing each other and the third and fourth side faces facing each other, the first external terminal electrode is formed only on the third side face, and the second external terminal electrode is formed only on It can also be on the fourth side. In this case, it is preferable that each of the first and second main faces and each of the first and second side faces are electrically connected to the first external terminal electrode only on the outer periphery of the first external terminal electrode. The first end edge conductor is electrically connected to the second external terminal electrode only on the outer periphery of the second external terminal electrode on each of the first and second main faces and each of the first and second side faces. The second end edge conductor.
又,本發明亦用作製造如上所述之層積陶瓷電子零件之方法。Further, the present invention is also useful as a method of manufacturing a laminated ceramic electronic component as described above.
本發明之層積陶瓷電子零件之製造方法之特徵在於包括如下步驟:準備陶瓷素體,其係層積複數個陶瓷層而成者,於內部具有內部導體,且於外表面具有內部導體之一部分露出之露出部;對陶瓷素體實施電鍍處理,使內部導體之露出部上析出銅鍍膜;及對陶瓷素體實施熱處理,使銅鍍膜與陶瓷素體之間生成Cu液相、O液相及Cu固相。The method for manufacturing a laminated ceramic electronic component of the present invention is characterized by comprising the steps of: preparing a ceramic body which is formed by laminating a plurality of ceramic layers, having an inner conductor inside, and having a part of an inner conductor on the outer surface The exposed portion is exposed; the ceramic body is subjected to a plating treatment to deposit a copper plating film on the exposed portion of the inner conductor; and the ceramic body is subjected to heat treatment to form a Cu liquid phase, an O liquid phase, and a ceramic liquid body between the copper plating film and the ceramic body. Cu solid phase.
上述熱處理較好的是於溫度1065℃以上且氧濃度50ppm以上之條件下所實施。The above heat treatment is preferably carried out under the conditions of a temperature of 1065 ° C or more and an oxygen concentration of 50 ppm or more.
根據本發明,在形成銅鍍膜之後,於特定之條件下實施熱處理,藉此在銅鍍膜與陶瓷素體之間生成Cu液相、O液相及Cu固相。該等混合相容易偏析於銅鍍膜之內部、且銅鍍膜與至少陶瓷素體之界面側。然後,經冷卻後,上述Cu液相及O液相成為固體,生成銅氧化物。該銅氧化物在銅鍍膜之內部、且銅鍍膜與至少陶瓷素體之界面側,成為以不連續狀而存在之狀態。於該狀態下,銅氧化物作為將陶瓷素體與銅鍍膜牢固地接合之接著劑而發揮作用,從而可提高含有銅鍍膜之外部端子電極相對於陶瓷素體之固著力,其結果可獲得具有相對於陶瓷素體之固著力優異之外部端子電極的層積陶瓷電子零件。According to the present invention, after the copper plating film is formed, heat treatment is performed under specific conditions, whereby a Cu liquid phase, an O liquid phase, and a Cu solid phase are formed between the copper plating film and the ceramic body. These mixed phases are easily segregated inside the copper plating film and on the interface side between the copper plating film and at least the ceramic body. Then, after cooling, the Cu liquid phase and the O liquid phase become solid to form a copper oxide. The copper oxide is present in a discontinuous state in the interior of the copper plating film and on the interface side between the copper plating film and the at least ceramic body. In this state, the copper oxide acts as an adhesive for firmly bonding the ceramic body and the copper plating film, thereby improving the fixing force of the external terminal electrode including the copper plating film with respect to the ceramic body, and as a result, it is possible to obtain A laminated ceramic electronic component of an external terminal electrode having excellent adhesion to a ceramic body.
又,外部端子電極中所含之銅鍍膜係經電鍍而形成者,故與使用導電膏而形成之情形相比,可成為薄且平坦之狀態。因此,有助於層積陶瓷電子零件之小型化,且可於已決定之尺寸規格內增大陶瓷素體之體積,從而有助於層積陶瓷電子零件之高性能化。特別是在應用於層積陶瓷電容器時,可於已決定之尺寸規格內實現大容量化。Moreover, since the copper plating film contained in the external terminal electrode is formed by plating, it can be made thin and flat compared with the case where it is formed using a conductive paste. Therefore, it contributes to miniaturization of the laminated ceramic electronic component, and the volume of the ceramic body can be increased within the determined size specification, thereby contributing to the high performance of the laminated ceramic electronic component. In particular, when applied to a laminated ceramic capacitor, it is possible to increase the capacity in a predetermined size specification.
當上述銅氧化物含有Cu2 O與CuO時,尤其是Cu2 O與陶瓷之間之擴散結合而可實現牢固之接合狀態,故於銅氧化物中,若Cu2 O佔90重量百分比以上,則可進一步提高外部端子電極相對於陶瓷素體之固著力。When the copper oxide contains Cu 2 O and CuO, in particular, diffusion bonding between Cu 2 O and ceramic can achieve a strong bonding state, so if Cu 2 O accounts for 90% by weight or more in the copper oxide, Further, the fixing force of the external terminal electrode with respect to the ceramic body can be further improved.
當內部導體含有虛設內部導體時,可使外部端子電極相對於陶瓷素體之固著力進一步提高。When the inner conductor contains a dummy inner conductor, the fixing force of the external terminal electrode with respect to the ceramic body can be further improved.
若於陶瓷素體之外表面上之內部電極之露出部以外的區域上形成有輔助導體,則可容易擴大外部端子電極之形成區域,其結果可使外部端子電極相對於陶瓷素體之固著力進一步提高。When an auxiliary conductor is formed on a region other than the exposed portion of the internal electrode on the surface other than the ceramic body, the formation region of the external terminal electrode can be easily enlarged, and as a result, the fixing force of the external terminal electrode with respect to the ceramic body can be achieved. Further improve.
陶瓷素體具有互相相對之第1及第2側面、以及互相相對之第3及第4側面,第1外部端子電極僅形成於第3側面上,第2外部端子電極僅形成第4側面上,進而,若於第1及第2主面、以及第1及第2側面之各一部分上,形成有僅於第1外部端子電極之外周緣上與第1外部端子電極電性連接之第1端緣導體,並於第1及第2主面、以及第1及第2側面之各一部分上,形成僅於第2外部端子電極之外周緣上與第2外部端子電極電性連接之第2端緣導體,則可使得用以形成外部端子電極之電鍍步驟以相對較短之時間而完成,且因端緣導體之存在而可提高利用焊接進行安裝時之接合可靠性,又,可確實抑制水分等自外部端子電極之周圍向陶瓷素體之內部滲入,因而可提高層積電容器之可靠性。The ceramic body has first and second side faces facing each other and third and fourth side faces facing each other, the first external terminal electrode is formed only on the third side face, and the second external terminal electrode is formed only on the fourth side face. Further, a first end electrically connected to the first external terminal electrode only on the outer periphery of the first external terminal electrode is formed on each of the first and second main faces and each of the first and second side faces The edge conductor forms a second end electrically connected to the second external terminal electrode only on the outer periphery of the second external terminal electrode on each of the first and second main faces and each of the first and second side faces. The edge conductor can complete the plating step for forming the external terminal electrode in a relatively short period of time, and the connection reliability when mounting by soldering can be improved due to the presence of the edge conductor, and the moisture can be surely suppressed. The penetration from the periphery of the external terminal electrode into the interior of the ceramic body can improve the reliability of the laminated capacitor.
於本發明之層積陶瓷電子零件之製造方法中,若於溫度1065℃以上且氧濃度50ppm以上之條件下實施熱處理,則可確實生成充足之Cu液相及O液相。In the method for producing a laminated ceramic electronic component of the present invention, if the heat treatment is performed under the conditions of a temperature of 1065 ° C or higher and an oxygen concentration of 50 ppm or more, a sufficient Cu liquid phase and O liquid phase can be surely formed.
圖1至圖4係用以說明本發明之第1實施形態者。此處,圖1係表示作為層積陶瓷電子零件之一例之層積陶瓷電容器1之立體圖。圖2係沿圖1之A-A線之剖面圖。1 to 4 are views for explaining the first embodiment of the present invention. Here, FIG. 1 is a perspective view showing a laminated ceramic capacitor 1 as an example of a laminated ceramic electronic component. Figure 2 is a cross-sectional view taken along line A-A of Figure 1.
層積陶瓷電容器1具備陶瓷素體2。陶瓷素體2成長方體形狀,其具有互相相對之第1及第2主面3及4、以及將第1及第2主面3及4之間加以連結之4個側面5~8。再者,於以下之說明中,於4個側面5~8中,將朝向主面3及4之長邊方向延伸之側面5及6分別稱為第1及第2側面,將朝向短邊方向延伸之側面7及8分別稱為第1及第2端面。The laminated ceramic capacitor 1 is provided with a ceramic body 2. The ceramic body 2 has a rectangular parallelepiped shape, and has first and second main faces 3 and 4 opposed to each other, and four side faces 5 to 8 that connect the first and second main faces 3 and 4. In the following description, the side faces 5 and 6 extending in the longitudinal direction of the main faces 3 and 4 are referred to as the first and second side faces, respectively, in the four side faces 5 to 8, and are oriented in the short side direction. The extended side faces 7 and 8 are referred to as first and second end faces, respectively.
於陶瓷素體2之第1及第2端面7及8上,分別形成有第1及第2外部端子電極9及10。The first and second external terminal electrodes 9 and 10 are formed on the first and second end faces 7 and 8 of the ceramic body 2, respectively.
主要參照圖2,陶瓷素體2具有由複數個陶瓷層11層積所成之構造。於陶瓷素體2之內部,以互相之間介在有特定之陶瓷層11之狀態而於層積方向上交替形成有複數組之第1及第2內部電極12及13。第1內部電極12於第1端面7上具有露出部14,第2內部電極13於第2端面8上具有露出部15。第1內部電極12之露出部14被第1外部端子電極9所被覆,且與第1外部端子電極9電性連接。第2內部電極13之露出部15被第2外部端子電極10所被覆,且與第2外部端子電極10電性連接。Referring mainly to Fig. 2, the ceramic body 2 has a structure in which a plurality of ceramic layers 11 are laminated. Inside the ceramic body 2, the first and second internal electrodes 12 and 13 are alternately formed in the stacking direction in a state in which a specific ceramic layer 11 is interposed. The first inner electrode 12 has an exposed portion 14 on the first end surface 7, and the second inner electrode 13 has an exposed portion 15 on the second end surface 8. The exposed portion 14 of the first internal electrode 12 is covered by the first external terminal electrode 9 and electrically connected to the first external terminal electrode 9. The exposed portion 15 of the second internal electrode 13 is covered by the second external terminal electrode 10 and electrically connected to the second external terminal electrode 10.
圖3係表示陶瓷素體2之內部構造之平面圖,(1)表示第1內部電極12所通過之剖面,(2)表示第2內部電極13所通過之剖面。3 is a plan view showing the internal structure of the ceramic element body 2, wherein (1) shows a cross section through which the first internal electrode 12 passes, and (2) shows a cross section through which the second internal electrode 13 passes.
如圖3所示,第1及第2內部電極12及13均具有長方形之平面形狀。第1內部電極12含有與第2內部電極13相對之第1電容部16、及自第1電容部16引出至第1端面7之第1引出部17。關於第2內部電極13,亦同樣含有第2電容部18與第2引出部19。As shown in FIG. 3, each of the first and second internal electrodes 12 and 13 has a rectangular planar shape. The first internal electrode 12 includes a first capacitor portion 16 that faces the second internal electrode 13 and a first lead portion 17 that is drawn from the first capacitor portion 16 to the first end surface 7 . The second internal electrode 13 also includes the second capacitor portion 18 and the second lead portion 19 in the same manner.
圖4係將圖2之一部分、即形成有第1外部端子電極9之部分擴大所示之剖面圖。Fig. 4 is a cross-sectional view showing a portion of Fig. 2, that is, a portion in which the first external terminal electrode 9 is formed.
如圖4所示,第1外部端子電極9含有銅鍍膜20,其以被覆第1內部電極12之露出部14之方式而形成於第1端面7上。以下未圖示,關於第2外部端子電極10,亦同樣含有銅鍍膜20。銅鍍膜20之厚度較好的是1~10μm。As shown in FIG. 4, the first external terminal electrode 9 includes a copper plating film 20 which is formed on the first end surface 7 so as to cover the exposed portion 14 of the first internal electrode 12. The second external terminal electrode 10 also includes a copper plating film 20 as shown below. The thickness of the copper plating film 20 is preferably 1 to 10 μm.
於銅鍍膜20之內部、且銅鍍膜20與至少陶瓷素體2之界面側,以不連續狀存在有銅氧化物21。於圖4中,作為不連續狀態之一例,顯示有銅氧化物21以球狀而存在之狀態,但未必需要如此以獨立之狀態而存在,例如,亦可以條紋狀而存在。銅氧化物21發揮有將陶瓷素體2與外部端子電極9及10牢固接合之作用。關於該作用之詳細情況將於以下描述。銅氧化物21可包含Cu2 O與CuO。較好的是,於銅氧化物21中,Cu2 O之佔有比例為90重量百分比以上。The copper oxide 21 is present discontinuously in the interior of the copper plating film 20 and on the interface side between the copper plating film 20 and at least the ceramic body 2. In FIG. 4, as an example of the discontinuous state, the copper oxide 21 is present in a spherical shape. However, it is not necessarily required to exist in an independent state. For example, it may exist in a stripe shape. The copper oxide 21 functions to firmly bond the ceramic element body 2 to the external terminal electrodes 9 and 10. Details regarding this effect will be described below. The copper oxide 21 may contain Cu 2 O and CuO. Preferably, in the copper oxide 21, the proportion of Cu 2 O is 90% by weight or more.
陶瓷層11例如係由以BaTiO3 、CaTiO3 、SrTiO3 、CaZrO3 等作為主成分之介電質陶瓷所構成。再者,於該等主成分中,亦可添加Mn化合物、Fe化合物、Cr化合物、Co化合物、Ni化合物等副成分。又,陶瓷層11之厚度較好的是,於煅燒後,例如為1~10μm。The ceramic layer 11 is made of, for example, a dielectric ceramic containing BaTiO 3 , CaTiO 3 , SrTiO 3 , CaZrO 3 or the like as a main component. Further, an auxiliary component such as a Mn compound, an Fe compound, a Cr compound, a Co compound or a Ni compound may be added to the main components. Further, the thickness of the ceramic layer 11 is preferably, for example, 1 to 10 μm after the firing.
作為陶瓷素體2之尺寸,可為0402尺寸、0603尺寸、1005尺寸、1608尺寸、2012尺寸、3216尺寸、3225尺寸(參照JEITA規格等)等,但若立足於小型化且大容量化之觀點,則本發明可謂對於1005~2012尺寸之零件而言特別有益。The size of the ceramic element body 2 may be 0402 size, 0603 size, 1005 size, 1608 size, 2012 size, 3216 size, 3225 size (refer to JEITA specifications, etc.), but based on the viewpoint of miniaturization and large capacity. The invention is particularly advantageous for parts of the size of 1005~2012.
作為內部電極12及13所含之導電成分,例如可使用Ni、Cu、Ag、Pd、Ag-Pd合金、Au等。再者,若考慮到與銅鍍膜20中可含有之Cu2 O或CuO之銅氧化物21或Cu之反應性,則特別好的是使用Ni。又,內部電極12及13各自煅燒後之厚度較好的是0.5~2.0μm。As the conductive component contained in the internal electrodes 12 and 13, for example, Ni, Cu, Ag, Pd, an Ag-Pd alloy, Au, or the like can be used. Further, in consideration of the reactivity with the copper oxide 21 or Cu of Cu 2 O or CuO which may be contained in the copper plating film 20, Ni is particularly preferably used. Further, the thickness of each of the internal electrodes 12 and 13 after firing is preferably 0.5 to 2.0 μm.
繼而,對上述層積陶瓷電容器1之製造方法之一例加以說明。Next, an example of a method of manufacturing the laminated ceramic capacitor 1 described above will be described.
首先,分別準備可成為陶瓷層11之陶瓷生片、用以形成內部電極12及13之導電膏。於該等陶瓷生片及導電膏中,含有黏合劑及溶劑,作為該等黏合劑及溶劑,分別可使用公知之有機黏合劑及有機溶劑。First, a ceramic green sheet which can be the ceramic layer 11 and a conductive paste for forming the internal electrodes 12 and 13 are separately prepared. A binder and a solvent are contained in the ceramic green sheets and the conductive paste, and as the binders and solvents, known organic binders and organic solvents can be used.
其次,於陶瓷生片上,例如以網版印刷法等持有特定之圖案而印刷導電膏。藉此,可獲得形成有分別可成為內部電極12及13之導電膏膜之陶瓷生片。Next, on the ceramic green sheet, a conductive paste is printed by holding a specific pattern, for example, by a screen printing method. Thereby, a ceramic green sheet in which the conductive paste films which can be the internal electrodes 12 and 13 can be formed can be obtained.
接著,如上所述,將形成有導電膏膜之陶瓷生片以特定之順序層積特定片數,並於其上下將未形成導電膏膜之外層用陶瓷生片層積特定片數,由此可獲得未加工之狀態之母層積體。未加工之母層積體視需要而會在均壓機(isostatic pressing)等機構之作用下朝向層積方向壓接。Then, as described above, the ceramic green sheets on which the conductive paste film is formed are laminated in a specific order in a specific order, and the ceramic green sheets are laminated on the upper and lower sides of the conductive paste film without forming a specific number of sheets. A mother layer body in an unprocessed state can be obtained. The unprocessed mother laminate is crimped toward the stacking direction by a mechanism such as an isostatic pressing as needed.
其次,將未加工之母層積體切割成特定之尺寸,藉此切出陶瓷素體2之未加工狀態者。Next, the unprocessed mother laminate is cut into a specific size, thereby cutting out the unprocessed state of the ceramic body 2.
繼而,將未加工之陶瓷素體2進行煅燒。煅燒溫度亦取決於陶瓷生片中所含之陶瓷材料及導電膏膜中所含之金屬材料,較好的是例如於900~1300℃之範圍內選擇。Then, the unprocessed ceramic body 2 is calcined. The calcination temperature also depends on the ceramic material contained in the ceramic green sheet and the metal material contained in the conductive paste film, and is preferably selected, for example, in the range of 900 to 1300 °C.
然後,視需要而實施滾筒研磨等之研磨處理,讓內部電極12及13之露出部14及15露出。同時,於陶瓷素體2之稜部及角部形成圓弧。又,視需要而實施撥水處理,以防止來自內部電極12及13之露出部14及15與陶瓷層11之間隙的電鍍液之滲入。Then, if necessary, a polishing process such as barrel polishing is performed to expose the exposed portions 14 and 15 of the internal electrodes 12 and 13. At the same time, an arc is formed at the ridges and corners of the ceramic body 2. Further, a water repellent treatment is performed as needed to prevent penetration of the plating solution from the gap between the exposed portions 14 and 15 of the internal electrodes 12 and 13 and the ceramic layer 11.
繼而,對陶瓷素體2實施電鍍處理,使第1及第2內部電極12及13之露出部14及15上析出銅鍍膜20。作為鍍銅之方法,可採用電解鍍銅及無電解鍍銅之任一者,當採用無電解鍍銅時,為使電鍍析出速度提高,需要進行Pd觸媒等之前處理,從而具有導致步驟複雜化之缺點。因此,較好的是採用電解鍍銅。再者,為促進銅鍍膜20之形成,較好的是,於電解鍍銅或無電解鍍銅之前,實施打底鍍(strike plating)銅。又,於電鍍處理中,較好的是使用滾筒電鍍(barrel plating)。Then, the ceramic body 2 is subjected to a plating treatment to deposit the copper plating film 20 on the exposed portions 14 and 15 of the first and second internal electrodes 12 and 13. As a method of copper plating, any of electrolytic copper plating and electroless copper plating can be used. When electroless copper plating is used, in order to increase the plating deposition rate, it is necessary to perform pre-treatment such as Pd catalyst, which causes complicated steps. Disadvantages. Therefore, it is preferred to use electrolytic copper plating. Further, in order to promote the formation of the copper plating film 20, it is preferred to perform strike plating of copper before electrolytic copper plating or electroless copper plating. Further, in the plating treatment, it is preferred to use barrel plating.
然後,對陶瓷素體2實施熱處理,使上述銅鍍膜20與陶瓷素體2之外表面之間生成Cu液相、O液相及Cu固相。該等混合相容易偏析於銅鍍膜20與陶瓷素體2之外表面之界面上。推測出其原因在於,在熱處理時,液相容易朝向銅鍍膜20與陶瓷素體2之外表面之間的微小間隙或者陶瓷素體2表面之微細之空孔而移動。Then, the ceramic body 2 is subjected to heat treatment to form a Cu liquid phase, an O liquid phase, and a Cu solid phase between the copper plating film 20 and the outer surface of the ceramic body 2. These mixed phases are easily segregated on the interface between the copper plating film 20 and the outer surface of the ceramic body 2. It is presumed that the liquid phase easily moves toward the minute gap between the copper plating film 20 and the outer surface of the ceramic body 2 or the fine pores on the surface of the ceramic body 2 during the heat treatment.
熱處理條件較好的是,選擇溫度為1065℃以上且氧濃度為50ppm以上。當溫度未滿1065℃、或者氧濃度未滿50ppm時,有不能充分生成Cu液相及O液相之虞。熱處理溫度之上限較好的是設為不超出Cu之熔點之程度,具體而言,較好的是未滿1084℃。The heat treatment conditions are preferably such that the temperature is selected to be 1065 ° C or higher and the oxygen concentration is 50 ppm or more. When the temperature is less than 1065 ° C or the oxygen concentration is less than 50 ppm, the Cu liquid phase and the O liquid phase may not be sufficiently formed. The upper limit of the heat treatment temperature is preferably such that it does not exceed the melting point of Cu, and specifically, it is preferably less than 1084 °C.
繼而,將陶瓷素體2冷卻至室溫。此時,偏析於上述界面上之Cu液相及O液相變成固體,並於此處形成銅氧化物21。銅氧化物21將陶瓷素體2與銅鍍膜20牢固地接合。其中,在Cu2 O與陶瓷之間,藉由擴散結合而可實現更加牢固之接合狀態。又,銅鍍膜20與陶瓷素體2之間藉由銅氧化物21而密封,故水分難以自外部滲入,從而可使層積陶瓷電容器1之可靠性提高。Then, the ceramic body 2 was cooled to room temperature. At this time, the Cu liquid phase and the O liquid phase segregated on the above interface become solid, and the copper oxide 21 is formed therein. The copper oxide 21 firmly bonds the ceramic body 2 to the copper plating film 20. Among them, a stronger bonding state can be achieved between the Cu 2 O and the ceramic by diffusion bonding. Further, since the copper plating film 20 and the ceramic body 2 are sealed by the copper oxide 21, it is difficult to infiltrate moisture from the outside, and the reliability of the laminated ceramic capacitor 1 can be improved.
圖5係用以說明本發明第2實施形態之與圖4相對應之示圖。於圖5中,對於與圖4所示之元件相當之元件標附相同之參照符號,省略其重複之說明。Fig. 5 is a view for explaining the second embodiment of the present invention, corresponding to Fig. 4; In FIG. 5, the same components as those shown in FIG. 4 are denoted by the same reference numerals, and the description thereof will be omitted.
於第2實施形態中,於銅鍍膜20上進而形成有第1外側導電層24及第2外側導電層25。In the second embodiment, the first outer conductive layer 24 and the second outer conductive layer 25 are further formed on the copper plating film 20.
第1外側導電層24係由選自以Cu及Ni所組成之群中之1種金屬或者含有該金屬之合金之電鍍膜所構成。第1外側導電層24例如於焊錫安裝時,作為防止因焊錫而侵蝕銅鍍膜20之焊錫障壁層發揮功能。再者,當第1外側導電層24係由Cu構成時,銅鍍膜20亦由Cu所構成,故第1外側導電層24藉由增加Cu膜之厚度而作為焊錫障壁層來發揮功能。The first outer conductive layer 24 is composed of a plating film selected from the group consisting of a group consisting of Cu and Ni or an alloy containing the metal. The first outer conductive layer 24 functions as a solder barrier layer that prevents the copper plating film 20 from being eroded by solder, for example, when solder is mounted. Further, when the first outer conductive layer 24 is made of Cu, the copper plating film 20 is also made of Cu. Therefore, the first outer conductive layer 24 functions as a solder barrier layer by increasing the thickness of the Cu film.
第2外側導電層25係由選自以Sn、Pb、Au、Ag、Pd、Bi及Zn所組成之群中之1種金屬或者含有該金屬之合金之電鍍膜所構成。關於構成第2外側導電層25之材料,例如像焊錫安裝中之焊錫、導電性接著劑安裝中之導電性接著劑、打線接合安裝中之Au等,根據安裝形態,考慮與焊錫、導電性接著劑、Au等之相容性而適當選擇。The second outer conductive layer 25 is composed of a plating film selected from the group consisting of Sn, Pb, Au, Ag, Pd, Bi, and Zn, or a plating film containing an alloy of the metal. The material constituting the second outer conductive layer 25 is, for example, solder for solder mounting, conductive adhesive for mounting a conductive adhesive, Au during wire bonding, and the like, and solder and conductivity are considered depending on the mounting form. The compatibility of the agent, Au, etc. is appropriately selected.
圖6係用以說明本發明第3實施形態之與圖4相對應之示圖。於圖6中,對於與圖4所示之元件相當之元件標附相同之參照符號,省略其重複之說明。Fig. 6 is a view for explaining the third embodiment of the present invention, corresponding to Fig. 4; In FIG. 6, the same components as those shown in FIG. 4 are denoted by the same reference numerals, and the description thereof will be omitted.
於第3實施形態中,於銅鍍膜20上進而形成有外側導電層28。外側導電層28係由選自以Au、Ag及Pd所組成之群中之1種金屬或者含有該金屬之合金之電鍍膜所構成。當無需與焊錫安裝相對應時,第3實施形態有效地應用於例如導電性接著劑安裝或者打線接合安裝之特殊化之情形。根據第3實施形態,例如與第2實施形態相比,可減少外部端子電極9及10各自之層數。In the third embodiment, the outer conductive layer 28 is further formed on the copper plating film 20. The outer conductive layer 28 is composed of a plating film selected from the group consisting of Au, Ag, and Pd, or a plating film containing an alloy of the metal. When it is not necessary to correspond to the solder mounting, the third embodiment is effectively applied to, for example, the case where the conductive adhesive is mounted or the wire bonding is specialized. According to the third embodiment, for example, the number of layers of the external terminal electrodes 9 and 10 can be reduced as compared with the second embodiment.
圖7係用以說明本發明第4實施形態之與圖4相對應之示圖。於圖7中,對於與圖4所示之元件相當之元件標附相同之參照符號,省略其重複之說明。Fig. 7 is a view for explaining a fourth embodiment of the present invention, corresponding to Fig. 4; In FIG. 7, the same components as those shown in FIG. 4 are denoted by the same reference numerals, and the description thereof will be omitted.
於第4實施形態中,於銅鍍膜20上進而形成有第1外側導電層31及第2外側導電層32。第1外側導電層31係由含有熱硬化性樹脂與金屬填充料之導電性樹脂所構成。第2外側導電層32係由選自以Cu、Ni、Sn、Pb、Au、Ag、Pd、Bi及Zn所組成之群中之1種金屬或者含有該金屬之合金之電鍍膜所構成。In the fourth embodiment, the first outer conductive layer 31 and the second outer conductive layer 32 are further formed on the copper plating film 20. The first outer conductive layer 31 is made of a conductive resin containing a thermosetting resin and a metal filler. The second outer conductive layer 32 is composed of a plating film selected from the group consisting of Cu, Ni, Sn, Pb, Au, Ag, Pd, Bi, and Zn, or a plating film containing an alloy of the metal.
根據第4實施形態,在向層積陶瓷電容器1施加有外部應力時,第1外側導電層31中所含之樹脂成分會吸收應力,或者在第1外側導電層31與第2外側導電層32之間會引起作為失效安全(fail safe)功能之剝離,因此抑制應力直接施加於陶瓷素體2上,其結果可抑制陶瓷素體2上產生裂縫。According to the fourth embodiment, when external stress is applied to the laminated ceramic capacitor 1, the resin component contained in the first outer conductive layer 31 absorbs stress, or the first outer conductive layer 31 and the second outer conductive layer 32 The peeling is caused as a fail safe function, so that the suppression stress is directly applied to the ceramic body 2, and as a result, cracks are generated on the ceramic body 2.
圖8及圖9係用以說明本發明之第5實施形態者,圖8係與圖2相對應,圖9係與圖3相對應。於圖8及圖9中,對於與圖2及圖3所示之元件相當之元件標附相同之參照符號,省略其重複之說明。8 and 9 are for explaining a fifth embodiment of the present invention, FIG. 8 corresponds to FIG. 2, and FIG. 9 corresponds to FIG. In FIGS. 8 and 9, the components that are the same as those in the components shown in FIGS. 2 and 3 are denoted by the same reference numerals, and the description thereof will not be repeated.
於第5實施形態中,於陶瓷素體2之內部,形成有實質上無助於電氣特性之表現之虛設內部導體35及36。於該實施形態中,虛設內部導體35及36被分類為:在與第1或第2內部電極12或13同一面上所形成之內層虛設內部導體35、及在與第1及第2內部電極12及13之任一者均不同之面上所形成之外層虛設內部導體36。In the fifth embodiment, the dummy internal conductors 35 and 36 which do not substantially contribute to the electrical characteristics are formed inside the ceramic body 2. In this embodiment, the dummy inner conductors 35 and 36 are classified into an inner layer dummy inner conductor 35 formed on the same surface as the first or second inner electrode 12 or 13, and the first and second inner portions. The outer layer dummy inner conductor 36 is formed on a different surface of either of the electrodes 12 and 13.
虛設內部導體35及36係與內部電極12及13之情形相同,於陶瓷素體2之端面7及8上具有露出部,該等露出部亦被第1或第2外部端子電極9或10所被覆,且與銅鍍膜20(參照圖4)相連接。虛設內部導體35及36中所含之金屬較好的是使用與銅鍍膜20中所含之Cu反應者。藉此,可使外部端子電極9及10對陶瓷素體2之固著力進一步提高。又,虛設內部導體35及36較好的是含有與內部電極12及13相同之金屬,例如,可將Ni、Cu等用作虛設內部導體35及36中所含之金屬。The dummy inner conductors 35 and 36 are the same as the internal electrodes 12 and 13, and have exposed portions on the end faces 7 and 8 of the ceramic body 2, and the exposed portions are also provided by the first or second external terminal electrodes 9 or 10. It is covered and connected to the copper plating film 20 (refer to FIG. 4). It is preferable that the metal contained in the dummy inner conductors 35 and 36 be reacted with Cu contained in the copper plating film 20. Thereby, the fixing force of the external terminal electrodes 9 and 10 to the ceramic element body 2 can be further improved. Further, the dummy inner conductors 35 and 36 preferably contain the same metal as the inner electrodes 12 and 13, and for example, Ni, Cu, or the like can be used as the metal contained in the dummy inner conductors 35 and 36.
如圖9所示,虛設內部導體35及36較好的是,以與內部電極12及13之引出部17及19相同之寬度而形成。又,圖9(1)所示之2個外層虛設內部導體36所提供之圖案係與圖9(2)所示之第1內部電極12及內層虛設內部導體35所提供之圖案相同,又,圖9(3)所示之第2內部電極13及內層虛設內部導體35所提供之圖案係與圖9(4)所示之2個外層虛設內部導體36所提供之圖案相同。因此,可謀求該等之間的製造步驟之共通化。As shown in FIG. 9, the dummy inner conductors 35 and 36 are preferably formed to have the same width as the lead portions 17 and 19 of the internal electrodes 12 and 13. Further, the pattern of the two outer dummy inner conductors 36 shown in FIG. 9(1) is the same as that provided by the first inner electrode 12 and the inner dummy inner conductor 35 shown in FIG. 9(2). The pattern provided by the second inner electrode 13 and the inner dummy inner conductor 35 shown in Fig. 9 (3) is the same as the pattern provided by the two outer dummy inner conductors 36 shown in Fig. 9 (4). Therefore, it is possible to achieve the commonality of the manufacturing steps between the two.
圖10及圖11係用以說明本發明之第6實施形態者。此處,圖10係與圖2相對應之示圖。圖11係表示形成外部端子電極9及10之前的陶瓷素體2之狀態之立體圖。於圖10及圖11中,對於與圖1及圖2所示之元件相當之元件標附相同之參照符號,省略其重複之說明。10 and 11 are views for explaining the sixth embodiment of the present invention. Here, Fig. 10 is a view corresponding to Fig. 2. Fig. 11 is a perspective view showing a state of the ceramic body 2 before the external terminal electrodes 9 and 10 are formed. In FIGS. 10 and 11, the same components as those shown in FIGS. 1 and 2 are denoted by the same reference numerals, and the description thereof will not be repeated.
於第6實施形態中,於陶瓷素體2之外表面上之內部電極12及13之露出部14及15以外的區域、且外部端子電極9及10與陶瓷素體2之間,形成有輔助導體39。更具體而言,於陶瓷素體2之第1及第2主面3及4各自之長度方向上之兩端部,形成有輔助導體39。In the sixth embodiment, a region other than the exposed portions 14 and 15 of the internal electrodes 12 and 13 on the outer surface of the ceramic element body 2, and the external terminal electrodes 9 and 10 and the ceramic body 2 are formed with assistance. Conductor 39. More specifically, the auxiliary conductor 39 is formed at both end portions of the first and second main faces 3 and 4 of the ceramic body 2 in the longitudinal direction.
外部端子電極9及10之銅鍍膜20(參照圖4)係經電鍍而形成者,故存在以下傾向:難以於內部電極12及13之露出部14及15以外之區域上形成,但藉由形成輔助導體39而可容易延長銅鍍膜20之形成區域。由此,可容易擴大銅氧化物21之析出區域,從而可容易提高銅鍍膜20相對於陶瓷素體2之固著力。The copper plating film 20 (see FIG. 4) of the external terminal electrodes 9 and 10 is formed by plating, and therefore has a tendency to be formed on regions other than the exposed portions 14 and 15 of the internal electrodes 12 and 13, but by formation The auxiliary conductor 39 can easily extend the formation region of the copper plating film 20. Thereby, the deposition region of the copper oxide 21 can be easily expanded, and the adhesion of the copper plating film 20 to the ceramic body 2 can be easily improved.
輔助導體39較好的是含有玻璃。作為玻璃,可使用硼矽玻璃等含有B及Si者。於玻璃中,亦可含有Ba、Al、Cu等副成分。再者,關於玻璃之狀態,例如可利用波長色散型微量分析儀(WDX)進行映射分析而確認其成分。The auxiliary conductor 39 preferably contains glass. As the glass, those containing B and Si such as borosilicate glass can be used. In the glass, an auxiliary component such as Ba, Al or Cu may be contained. Further, regarding the state of the glass, for example, the composition can be confirmed by mapping analysis using a wavelength dispersion type micro analyzer (WDX).
輔助導體39可藉由如下方式而形成:例如,將形成有可成為輔助導體39之導電膏膜之陶瓷生片層積於未加工狀態之陶瓷素體2之最上層及最下層,並與陶瓷素體2同時進行煅燒。或者,亦可藉由在煅燒後之陶瓷素體2之第1及第2主面3及4上印刷導電膏並進行燒接而形成。於該等情形中使用有導電膏,但僅將其賦予主面3及4,故可使輔助導體39之厚度為10μm以下,即便包含外部端子電極9及10之厚度,亦可抑制為30μm以下之厚度。The auxiliary conductor 39 can be formed by, for example, laminating a ceramic green sheet formed with a conductive paste film which can serve as the auxiliary conductor 39 in the uppermost layer and the lowermost layer of the ceramic body 2 in an unprocessed state, and ceramics The body 2 is simultaneously calcined. Alternatively, it may be formed by printing a conductive paste on the first and second main faces 3 and 4 of the ceramic body 2 after firing and baking it. In these cases, a conductive paste is used, but only the main surfaces 3 and 4 are provided. Therefore, the thickness of the auxiliary conductor 39 can be 10 μm or less, and even if the thickness of the external terminal electrodes 9 and 10 is included, the thickness can be suppressed to 30 μm or less. The thickness.
再者,較好的是,在形成輔助導體39之後,藉由進行滾筒研磨等之研磨處理而對輔助導體39之端部賦予圓弧。Further, after the auxiliary conductor 39 is formed, it is preferable to impart an arc to the end portion of the auxiliary conductor 39 by performing a polishing process such as barrel polishing.
圖12至圖14係用以說明本發明之第7實施形態者。第7實施形態係第6實施形態之變形例,圖12及圖13分別係與圖10及圖11相對應。於圖12至圖14中,對於與圖10及圖11所示之元件相當之元件標附相同之參照符號,省略其重複之說明。12 to 14 are views for explaining the seventh embodiment of the present invention. The seventh embodiment is a modification of the sixth embodiment, and Figs. 12 and 13 correspond to Figs. 10 and 11, respectively. In FIGS. 12 to 14, the same components as those shown in FIGS. 10 and 11 are denoted by the same reference numerals, and the description thereof will not be repeated.
於第7實施形態中,與第6實施形態之情形相同,形成有輔助導體42。更具體而言,輔助導體42形成於:陶瓷素體2之第1及第2主面3及4各自之長度方向上之兩端部、第1及第2側面5及6各自之長度方向上之兩端部、及第1及第2端面7及8各自之外周緣部。In the seventh embodiment, the auxiliary conductor 42 is formed in the same manner as in the sixth embodiment. More specifically, the auxiliary conductor 42 is formed on both end portions of the first and second main faces 3 and 4 of the ceramic body 2 in the longitudinal direction, and in the longitudinal direction of each of the first and second side faces 5 and 6 Both end portions and the outer peripheral edge portions of the first and second end faces 7 and 8 are provided.
圖14係表示上述之輔助導體42之較佳形成方法之剖面圖。Fig. 14 is a cross-sectional view showing a preferred method of forming the above-described auxiliary conductor 42.
首先,如圖14(1)所示,準備陶瓷素體2,同時準備形成有由導電膏43所構成之膏層44之平板45。First, as shown in Fig. 14 (1), the ceramic body 2 is prepared, and a flat plate 45 on which the paste layer 44 composed of the conductive paste 43 is formed is prepared.
繼而,如圖14(2)所示,將陶瓷素體2之第1端面7浸漬於膏層44中,然後,如圖14(3)所示,取出陶瓷素體2。此時,於第1端面7上附著有導電膏43。Then, as shown in Fig. 14 (2), the first end face 7 of the ceramic body 2 is immersed in the paste layer 44, and then the ceramic body 2 is taken out as shown in Fig. 14 (3). At this time, the conductive paste 43 is adhered to the first end face 7.
其次,如圖14(4)所示,準備未形成有膏層之平板46。Next, as shown in Fig. 14 (4), a flat plate 46 on which no paste layer is formed is prepared.
繼而,如圖14(5)所示,將第1端面7向平板46按壓,從而第1端面7之中央部上所附著之導電膏43會朝向第1端面7之外周緣部擠出。其後,如圖14(6)所示,在取出了陶瓷素體2時,於第1端面7之中央部,成為未附著或幾乎未附著有導電膏43之狀態。Then, as shown in FIG. 14 (5), the first end surface 7 is pressed against the flat plate 46, and the conductive paste 43 adhered to the central portion of the first end surface 7 is extruded toward the outer peripheral edge portion of the first end surface 7. Then, as shown in Fig. 14 (6), when the ceramic body 2 is taken out, the conductive paste 43 is not adhered or hardly adhered to the central portion of the first end face 7.
對於陶瓷素體2之第2端面8,亦實施相同之步驟。The same procedure is also applied to the second end face 8 of the ceramic body 2.
繼而,燒接導電膏43,藉此,以如圖13所示之狀態而形成輔助導體42。再者,於圖14(5)及圖(6)所示之步驟中,亦可能會於端面7及8各自之中央部上殘留有導電膏43,但即便於上述情形時,在形成輔助導體42之後,亦可藉由進行滾筒研磨等之研磨處理而讓內部電極12及13之露出部14及15進行良好的露出。Then, the conductive paste 43 is baked, whereby the auxiliary conductor 42 is formed in a state as shown in FIG. Further, in the steps shown in FIGS. 14(5) and (6), the conductive paste 43 may remain on the central portions of the end faces 7 and 8, but in the above case, the auxiliary conductor is formed. After 42, the exposed portions 14 and 15 of the internal electrodes 12 and 13 can be well exposed by polishing treatment such as barrel polishing.
第7實施形態之輔助導體42具有與第6實施形態之輔助導體39相同之作用效果。然而,由於第7實施形態之輔助導體42形成於陶瓷素體2之第1及第2側面5及6上,故於第1及第2側面5及6上容易形成可成為外部端子電極9及10之銅鍍膜20(參照圖4)。因此,容易將銅氧化物21之析出區域迴繞至第1及第2側面5及6,從而可容易提高外部端子電極9及10之固著力。又,以延伸至第1及第2側面5及6之方式而形成有輔助導體42,故無需特別形成例如第5實施形態之外層虛設內部導體36。The auxiliary conductor 42 of the seventh embodiment has the same operational effects as the auxiliary conductor 39 of the sixth embodiment. However, since the auxiliary conductors 42 of the seventh embodiment are formed on the first and second side faces 5 and 6 of the ceramic body 2, the external terminal electrodes 9 can be easily formed on the first and second side faces 5 and 6 and 10 copper plating film 20 (refer to FIG. 4). Therefore, it is easy to rewind the deposition region of the copper oxide 21 to the first and second side faces 5 and 6, and the fixing force of the external terminal electrodes 9 and 10 can be easily improved. Further, since the auxiliary conductors 42 are formed so as to extend to the first and second side faces 5 and 6, it is not necessary to particularly form the dummy inner conductors 36, for example, in the fifth embodiment.
又,對於第7實施形態之情形,亦可對導電膏43之剩餘部分加以清除等以抑制其厚度,故即便包含外部端子電極9及10,亦可將厚度抑制為30μm以下。Further, in the case of the seventh embodiment, the remaining portion of the conductive paste 43 can be removed or the like to suppress the thickness thereof. Therefore, even if the external terminal electrodes 9 and 10 are included, the thickness can be suppressed to 30 μm or less.
圖15及圖16係用以說明本發明之第8實施形態者。圖15係與圖2相對應。於圖15中,對於與圖2所示之元件相當之元件標附相同之參照符號,省略其重複之說明。15 and 16 are diagrams for explaining an eighth embodiment of the present invention. Figure 15 corresponds to Figure 2. In FIG. 15, the same components as those shown in FIG. 2 are denoted by the same reference numerals, and the description thereof will be omitted.
於第8實施形態中,第1外部端子電極9僅形成於第1端面7上,第2外部端子電極10僅形成於第2端面8上。因此,即便為如下之方法,即,以陶瓷素體2之端面7及8中之內部電極12及13之露出部14及15為核心而使電鍍膜析出,並使該電鍍膜成長,藉此將相鄰之內部電極12及13之露出部14及15彼此加以連接,亦可以相對較短之時間而形成外部端子電極9及10。In the eighth embodiment, the first external terminal electrode 9 is formed only on the first end face 7, and the second external terminal electrode 10 is formed only on the second end face 8. Therefore, even if the plating film is deposited by using the exposed portions 14 and 15 of the internal electrodes 12 and 13 in the end faces 7 and 8 of the ceramic body 2 as a core, the plating film is grown. The external terminal electrodes 9 and 10 can be formed in a relatively short period of time by connecting the exposed portions 14 and 15 of the adjacent internal electrodes 12 and 13 to each other.
於第8實施形態中,又,於第1及第2主面3及4、以及第1及第2側面5及6之第1端面7側之各端部上,形成有僅於第1外部端子電極9之外周緣上與第1外部端子電極9電性連接之第1端緣導體49。同樣地,於第1及第2主面3及4以及第1及第2側面5及6之第2端面8側之各端部上,形成有僅於第2外部端子電極10之外周緣上與第2外部端子電極10電性連接之第2端緣導體50。In the eighth embodiment, the first and second main faces 3 and 4 and the first end faces 7 of the first and second side faces 5 and 6 are formed on only the first outer portion. A first end edge conductor 49 electrically connected to the first external terminal electrode 9 on the outer periphery of the terminal electrode 9. Similarly, on the outer peripheral edges of the first and second main terminals 3 and 4 and the second end faces 8 of the first and second side faces 5 and 6, only the outer periphery of the second external terminal electrode 10 is formed. The second end edge conductor 50 electrically connected to the second external terminal electrode 10.
與上述輔助導體39或42之情形相同,第1及第2端緣導體49及50較好的是含有玻璃,並且藉由例如導電膏之賦予及燒接而形成。導電膏之燒接可與陶瓷素體2之煅燒同時進行,亦可於陶瓷素體2煅燒之後進行。Similarly to the above-described auxiliary conductor 39 or 42, the first and second end edge conductors 49 and 50 preferably contain glass and are formed by, for example, imparting and baking of a conductive paste. The baking of the conductive paste can be performed simultaneously with the calcination of the ceramic body 2, or after the calcination of the ceramic body 2.
根據第8實施形態,於陶瓷素體2之第1及第2主面3及4、以及第1及第2側面5及6各自之與第1及第2端面7及8相鄰接之各端部上,以與第1及第2外部端子電極9及10之外周緣相導通之方式而形成有第1及第2端緣導體49及50,故可提高利用焊接進行安裝時之接合可靠性。又,與未形成端緣導體49及50之情形相比,由於水分等自外部端子電極9及10之周圍向陶瓷素體2之內部之滲入得到抑制,因此可提高層積陶瓷電容器1之可靠性。According to the eighth embodiment, each of the first and second main faces 3 and 4 of the ceramic body 2 and the first and second side faces 5 and 6 are adjacent to the first and second end faces 7 and 8 The first and second end edge conductors 49 and 50 are formed to be electrically connected to the outer periphery of the first and second external terminal electrodes 9 and 10 at the end portion, so that the bonding at the time of mounting by soldering can be improved. Sex. Further, since the penetration of moisture from the periphery of the ceramic terminal body 2 from the periphery of the external terminal electrodes 9 and 10 is suppressed as compared with the case where the edge conductors 49 and 50 are not formed, the reliability of the laminated ceramic capacitor 1 can be improved. Sex.
於第8實施形態中,較好的是,於第1外部端子電極9上及第1端緣導體49上,進一步形成外側電鍍膜51,又,於第2外部端子電極10上及第2端緣導體50上,進一步形成外側電鍍膜52。於該等外側電鍍膜51及52中,藉由使用焊錫潤濕性良好之金屬而可確實提高層積陶瓷電容器1之利用焊接進行安裝時之接合可靠性。作為焊錫潤濕性良好之金屬,可列舉例如Sn、Au等。In the eighth embodiment, it is preferable that the outer plating film 51 is further formed on the first external terminal electrode 9 and the first end edge conductor 49, and on the second external terminal electrode 10 and the second end. On the edge conductor 50, an outer plating film 52 is further formed. In the outer plating films 51 and 52, by using a metal having good solder wettability, it is possible to surely improve the bonding reliability when the laminated ceramic capacitor 1 is mounted by soldering. Examples of the metal having good solder wettability include Sn, Au, and the like.
再者,外側電鍍膜51及52並不限於1層構造之情形,例如可為以鍍鎳層為底層,且於其上形成有鍍錫層等之2層構造,進而亦可為3層以上之構造。In addition, the outer plating films 51 and 52 are not limited to the one-layer structure, and may be, for example, a two-layer structure in which a nickel plating layer is used as a bottom layer, and a tin plating layer or the like is formed thereon, or three or more layers may be used. Construction.
圖16係表示上述端緣導體49及50之較佳形成方法之剖面圖。圖16係與圖14相對應。於圖16中,對於與圖14所示之元件相當之元件標附相同之參照符號,省略其重複之說明。Fig. 16 is a cross-sectional view showing a preferred method of forming the edge conductors 49 and 50. Figure 16 corresponds to Figure 14. In FIG. 16, the same components as those shown in FIG. 14 are denoted by the same reference numerals, and the description thereof will be omitted.
首先,如圖16(1)所示,準備預先形成有外部端子電極9及10之陶瓷素體2,同時準備形成有由導電膏43所構成之膏層44之平板45。First, as shown in Fig. 16 (1), the ceramic element body 2 in which the external terminal electrodes 9 and 10 are formed in advance is prepared, and a flat plate 45 on which the paste layer 44 composed of the conductive paste 43 is formed is prepared.
繼而,如圖16(2)所示,將陶瓷素體2之第1端面7與第1外部端子電極9一併浸漬於膏層44,然後,如圖16(3)所示,取出陶瓷素體2。此時,以覆蓋形成有第1外部端子電極9之第1端面7之方式而附著有導電膏43。Then, as shown in Fig. 16 (2), the first end face 7 of the ceramic body 2 and the first external terminal electrode 9 are immersed in the paste layer 44, and then the ceramic element is taken out as shown in Fig. 16 (3). Body 2. At this time, the conductive paste 43 is adhered so as to cover the first end face 7 on which the first external terminal electrode 9 is formed.
接著,如圖16(4)所示,準備未形成膏層之平板46。Next, as shown in Fig. 16 (4), a flat plate 46 on which no paste layer is formed is prepared.
然後,如圖16(5)所示,將第1端面7上之第1外部端子電極9向平板46按壓,從而第1外部端子電極9上所附著之導電膏43會朝向第1外部端子電極9之外周緣部擠出。其後,如圖16(6)所示,在取出陶瓷素體2時,於除第1外部端子電極9之外周緣部以外之部分,成為未附著或幾乎未附著導電膏43之狀態。Then, as shown in Fig. 16 (5), the first external terminal electrode 9 on the first end face 7 is pressed against the flat plate 46, and the conductive paste 43 adhered to the first external terminal electrode 9 faces the first external terminal electrode. 9 outside the peripheral part of the extrusion. Then, as shown in Fig. 16 (6), when the ceramic element body 2 is taken out, the portion other than the peripheral portion other than the first external terminal electrode 9 is in a state in which the conductive paste 43 is not adhered or hardly adhered.
對於陶瓷素體2之形成有第2外部端子電極10之第2端面8,亦實施相同之步驟。The same step is also performed for the second end face 8 of the second external terminal electrode 10 in which the ceramic body 2 is formed.
繼而,燒接導電膏43,藉此,以如圖15所示之狀態而形成端緣導體49及50。Then, the conductive paste 43 is baked, whereby the edge conductors 49 and 50 are formed in a state as shown in FIG.
圖17及圖18係用以說明本發明之第9實施形態者。此處,圖17係表示作為層積陶瓷電子零件之一例之層積陶瓷電容器陣列101之立體圖。17 and 18 are views for explaining a ninth embodiment of the present invention. Here, Fig. 17 is a perspective view showing a laminated ceramic capacitor array 101 as an example of a laminated ceramic electronic component.
層積陶瓷電容器陣列101具備陶瓷素體102。陶瓷素體102成長方體形狀,其具有互相相對之第1及第2主面103及104、以及將第1及第2主面103及104之間加以連結之第1側面105、第2側面106、第3側面107及第4側面108。The laminated ceramic capacitor array 101 is provided with a ceramic body 102. The ceramic body body 102 has a rectangular parallelepiped shape, and has first and second main faces 103 and 104 facing each other, and a first side face 105 and a second side face 106 that connect the first and second main faces 103 and 104 to each other. The third side 107 and the fourth side 108 are provided.
圖18係表示陶瓷素體102之內部構造之平面圖,圖18之(1)與(2)表示相異之剖面。陶瓷素體102具有複數個陶瓷層109層積所成之構造。於陶瓷素體102之內部,以互相之間介在有特定之陶瓷層109之狀態,於層積方向上交替且於主面方向上交替而形成有複數組的第1及第2內部電極110及111。於該實施形態中,2個第1內部電極110與2個第2內部電極111交替排列於主面方向上。第1內部電極110於第1側面105上具有露出部112,第2內部電極111於第2側面106上具有露出部113。Fig. 18 is a plan view showing the internal structure of the ceramic body 102, and (1) and (2) of Fig. 18 show different cross sections. The ceramic body 102 has a structure in which a plurality of ceramic layers 109 are laminated. The first and second internal electrodes 110 are formed in the ceramic body 102 so as to be alternately arranged in the stacking direction and alternate in the main surface direction in the ceramic body 102. 111. In this embodiment, the two first inner electrodes 110 and the two second inner electrodes 111 are alternately arranged in the main surface direction. The first inner electrode 110 has an exposed portion 112 on the first side surface 105, and the second inner electrode 111 has an exposed portion 113 on the second side surface 106.
如圖17所示,於陶瓷素體102之第1及第2側面105及106上,分別形成有4個第1外部端子電極114及4個第2外部端子電極115。第1內部電極110之露出部112被第1外部端子電極114所被覆,且與第1外部端子電極114電性連接。第2內部電極111之露出部113被第2外部端子電極115所被覆,且與第2外部端子電極115電性連接。As shown in FIG. 17, four first external terminal electrodes 114 and four second external terminal electrodes 115 are formed on the first and second side faces 105 and 106 of the ceramic body 102, respectively. The exposed portion 112 of the first internal electrode 110 is covered by the first external terminal electrode 114 and electrically connected to the first external terminal electrode 114. The exposed portion 113 of the second internal electrode 111 is covered by the second external terminal electrode 115 and electrically connected to the second external terminal electrode 115.
關於上述層積陶瓷電容器陣列101之第1及第2外部端子電極114及115,雖未圖示,但參照圖4、圖5、圖6或圖7所說明之外部端子電極9之構造及形成方法亦適用。The first and second external terminal electrodes 114 and 115 of the laminated ceramic capacitor array 101 are not shown, but the structure and formation of the external terminal electrode 9 described with reference to FIG. 4, FIG. 5, FIG. 6, or FIG. The method is also applicable.
於第9實施形態之電容器陣列101之類的多端子型層積陶瓷電子零件中,有必要在某程度上確保相鄰之外部端子電極彼此之距離以防止焊錫橋接,但對於利用導電膏之塗佈方法而言,難以精度良好地塗佈導電膏,因此有必要確保所露出之內部電極間之距離稍寬,其結果阻礙小型化。與此相對,根據本發明,為形成外部端子電極而使用直接電鍍,故可將所露出之內部電極間之距離抑制為必要最小限度,由此可進一步推進層積陶瓷電子零件之小型化。In the multi-terminal type laminated ceramic electronic component such as the capacitor array 101 of the ninth embodiment, it is necessary to ensure the distance between adjacent external terminal electrodes to some extent to prevent solder bridging, but for coating with a conductive paste. In the cloth method, it is difficult to apply the conductive paste with high precision, and therefore it is necessary to ensure that the distance between the exposed internal electrodes is slightly wide, and as a result, it is prevented from being downsized. On the other hand, according to the present invention, since direct plating is used to form the external terminal electrode, the distance between the exposed internal electrodes can be suppressed to a minimum, and the size of the laminated ceramic electronic component can be further reduced.
再者,於第9實施形態中,8個端子即內部電極110及111之露出部112及113共計形成8行,但只要形成至少4行即可,關於外部端子電極,亦只要以對應於各自之行之方式而形成至少4行即可。Further, in the ninth embodiment, the eight terminals, that is, the exposed portions 112 and 113 of the internal electrodes 110 and 111 are formed in a total of eight rows. However, as long as at least four rows are formed, the external terminal electrodes may correspond to each other. It is sufficient to form at least 4 lines in the manner of the trip.
圖19至圖21係用以說明本發明之第10實施形態者。此處,圖19及圖20係分別與圖17及圖18相對應之圖。圖21係表示形成外部端子電極114及115之前的陶瓷素體102之第1及第2主面103及104之示圖。於圖19至圖21中,對於與圖17及圖18所示之元件相當之元件標附相同之參照符號,省略其重複之說明。19 to 21 are views for explaining the tenth embodiment of the present invention. Here, FIG. 19 and FIG. 20 are diagrams corresponding to FIGS. 17 and 18, respectively. 21 is a view showing the first and second main faces 103 and 104 of the ceramic body 102 before the external terminal electrodes 114 and 115 are formed. In FIGS. 19 to 21, the same components as those shown in FIGS. 17 and 18 are denoted by the same reference numerals, and the description thereof will not be repeated.
第10實施形態之特徵在於,如圖20所示,具備:在與第1或第2內部電極110或111同一面上所形成之內層虛設內部導體116、及在與內部電極110及111之任一者均不同之面上所形成之外層虛設內部導體117,且如圖21所示,具備在陶瓷素體102之第1及第2主面103及104上所形成之輔助導體118。The tenth embodiment is characterized in that, as shown in FIG. 20, the inner layer dummy inner conductor 116 formed on the same surface as the first or second inner electrode 110 or 111 and the inner electrodes 110 and 111 are provided. The outer layer dummy inner conductor 117 is formed on the outer surface of the ceramic body 102, and the auxiliary conductor 118 formed on the first and second main surfaces 103 and 104 of the ceramic body 102 is provided as shown in FIG.
虛設內部導體116及117發揮與第5實施形態之虛設內部導體35及36相同之作用效果,輔助導體118發揮與第6實施形態之輔助導體39相同之作用效果。因此,根據第10實施形態,與第9實施形態相比,可使第1及第2外部端子電極114及115相對於陶瓷素體102之固著力進一步提高,同時可容易將第1及第2外部端子電極114及115之形成區域延長至主面103及104。The dummy inner conductors 116 and 117 have the same operational effects as the dummy inner conductors 35 and 36 of the fifth embodiment, and the auxiliary conductor 118 exhibits the same operational effects as the auxiliary conductor 39 of the sixth embodiment. Therefore, according to the ninth embodiment, the fixing force of the first and second external terminal electrodes 114 and 115 with respect to the ceramic body 102 can be further improved, and the first and second portions can be easily obtained. The formation regions of the external terminal electrodes 114 and 115 are extended to the main faces 103 and 104.
再者,於第10實施形態中,亦可省略虛設內部導體116及117,或者省略輔助導體118。Further, in the tenth embodiment, the dummy inner conductors 116 and 117 may be omitted or the auxiliary conductor 118 may be omitted.
圖22及圖23係用以說明本發明之第11實施形態者。此處,圖22係表示作為層積陶瓷電子零件之一例之多端子型低ESL層積陶瓷電容器151之立體圖。22 and 23 are views for explaining the eleventh embodiment of the present invention. Here, FIG. 22 is a perspective view showing a multi-terminal type low ESL laminated ceramic capacitor 151 as an example of a laminated ceramic electronic component.
低ESL層積陶瓷電容器151具備陶瓷素體152。陶瓷素體152成長方體形狀,其具有互相相對之第1及第2主面153及154、以及將第1及第2主面153及154之間加以連結之第1至第4側面155~158。The low ESL laminated ceramic capacitor 151 is provided with a ceramic body 152. The ceramic body 152 has a rectangular parallelepiped shape, and has first and second main faces 153 and 154 opposed to each other, and first to fourth side faces 155 to 158 that connect the first and second main faces 153 and 154. .
圖23係表示陶瓷素體152之內部形狀之平面圖,圖23之(1)與(2)表示相異之剖面。Fig. 23 is a plan view showing the internal shape of the ceramic body 152, and (1) and (2) of Fig. 23 show different cross sections.
陶瓷素體152具有複數個陶瓷層159層積所成之構造。於陶瓷素體152之內部,以互相之間介在有特定之陶瓷層159之狀態,於層積方向上交替形成有複數組之第1及第2內部電極160及161。The ceramic body 152 has a structure in which a plurality of ceramic layers 159 are laminated. Inside the ceramic element body 152, a plurality of first and second internal electrodes 160 and 161 are alternately formed in the stacking direction with a specific ceramic layer 159 interposed therebetween.
第1內部電極160具有與第2內部電極161相對之第1電容部162、自第1電容部162引出至第1或第2側面155或156之複數個第1引出部163,於第1引出部163之端部上,形成有露出至第1或第2側面155或156之露出部164。The first internal electrode 160 has a first capacitor portion 162 that faces the second internal electrode 161, and a plurality of first lead portions 163 that are led out from the first capacitor portion 162 to the first or second side surface 155 or 156, and are led out at the first one. An exposed portion 164 exposed to the first or second side surface 155 or 156 is formed at an end portion of the portion 163.
第2內部電極161具有:與第1內部電極160相對之第2電容部165、及自第2電容部165引出至第1或第2側面155或156之複數個第2引出部166,於第2引出部166之端部上,形成有露出於第1或第2側面155或156之露出部167。The second internal electrode 161 includes a second capacitor portion 165 that faces the first internal electrode 160 and a plurality of second lead portions 166 that are led out from the second capacitor portion 165 to the first or second side surface 155 or 156. The exposed portion 167 exposed to the first or second side surface 155 or 156 is formed at the end portion of the lead portion 166.
於陶瓷素體152之第1及第2側面155及156上,分別交替排列有複數組之第1及第2外部端子電極168及169。第1內部電極160之露出部164被第1外部端子電極168所被覆,且與第1外部端子電極168電性連接。第2內部電極161之露出部167被第2外部端子電極169所被覆,且與第2外部端子電極169電性連接。The first and second external terminal electrodes 168 and 169 of the plurality of arrays are alternately arranged on the first and second side faces 155 and 156 of the ceramic body 152. The exposed portion 164 of the first internal electrode 160 is covered by the first external terminal electrode 168 and electrically connected to the first external terminal electrode 168. The exposed portion 167 of the second internal electrode 161 is covered by the second external terminal electrode 169 and electrically connected to the second external terminal electrode 169.
關於上述第11實施形態之第1及第2外部端子電極168及169,亦適用由參照圖4、圖5、圖6或圖7所說明之外部端子電極9之構造及形成方法。The structure and formation method of the external terminal electrode 9 described with reference to FIG. 4, FIG. 5, FIG. 6, or FIG. 7 are also applicable to the first and second external terminal electrodes 168 and 169 of the eleventh embodiment.
圖24至圖26係用以說明本發明之第12實施形態者。此處,圖24係與圖22相對應之圖,圖25係與圖23相對應之圖。圖26係表示陶瓷素體152之第1及第2主面153及154之示圖。於圖24至圖26中,對於與圖22及圖23所示之元件相當之元件標附相同之參照符號,省略其重複之說明。24 to 26 are views for explaining the twelfth embodiment of the present invention. Here, Fig. 24 is a view corresponding to Fig. 22, and Fig. 25 is a view corresponding to Fig. 23. Fig. 26 is a view showing the first and second main faces 153 and 154 of the ceramic body 152. In FIGS. 24 to 26, the same components as those shown in FIGS. 22 and 23 are denoted by the same reference numerals, and the description thereof will not be repeated.
第12實施形態相對於第11實施形態之關係係與第10實施形態相對於第9實施形態之關係相同。即,第12實施形態之特徵在於,如圖25所示,具備:在與第1或第2內部電極160或161同一面上所形成之內層虛設內部導體170、及在與內部電極160及161之任一者均不同之面上所形成之外層虛設內部導體171,且如圖26所示,具備在陶瓷素體152之第1及第2主面153及154上所形成之輔助導體172。The relationship between the twelfth embodiment and the eleventh embodiment is the same as that of the tenth embodiment with respect to the ninth embodiment. In other words, the twelfth embodiment is characterized in that, as shown in FIG. 25, the inner layer dummy inner conductor 170 formed on the same surface as the first or second inner electrode 160 or 161 and the inner electrode 160 and The outer layer dummy inner conductor 171 is formed on the different surface of the 161, and the auxiliary conductor 172 formed on the first and second main faces 153 and 154 of the ceramic body 152 is provided as shown in FIG. .
虛設內部導體170及171發揮與第5實施形態之虛設內部導體35及36相同之作用效果,輔助導體172發揮與第6實施形態之輔助導體39相同之作用效果。因此,根據第12實施形態,與第11實施形態相比,可使第1及第2外部端子電極168及169相對於陶瓷素體152之固著力進一步提高,同時可容易將第1及第2外部端子電極168及169之形成區域延長至第1及第2主面153及154。The dummy inner conductors 170 and 171 have the same operational effects as the dummy inner conductors 35 and 36 of the fifth embodiment, and the auxiliary conductor 172 exhibits the same operational effects as the auxiliary conductor 39 of the sixth embodiment. Therefore, according to the twelfth embodiment, the fixing force of the first and second external terminal electrodes 168 and 169 with respect to the ceramic element body 152 can be further improved, and the first and second portions can be easily obtained. The formation regions of the external terminal electrodes 168 and 169 are extended to the first and second main faces 153 and 154.
再者,於第12實施形態中,亦可省略虛設內部導體170及171,或者省略輔助導體172。Further, in the twelfth embodiment, the dummy inner conductors 170 and 171 may be omitted or the auxiliary conductor 172 may be omitted.
圖27及圖28係用以說明本發明之第13實施形態者。此處,圖27係表示作為層積陶瓷電子零件之一例之層積陶瓷電感器201之立體圖。27 and 28 are views for explaining the thirteenth embodiment of the present invention. Here, Fig. 27 is a perspective view showing a laminated ceramic inductor 201 as an example of a laminated ceramic electronic component.
層積陶瓷電感器201具備陶瓷素體202。陶瓷素體202成長方體形狀,其具有互相相對之第1及第2主面203及204、及將第1及第2主面203及204之間加以連結之4個側面205~208。再者,於以下說明中,在4個側面205~208中,將朝主面203及204之長邊方向延伸之側面205及206分別稱為第1及第2側面,將朝短邊方向延伸之側面207及208分別稱為第1及第2端面。The laminated ceramic inductor 201 is provided with a ceramic body 202. The ceramic body 202 has a rectangular parallelepiped shape, and has first and second main faces 203 and 204 opposed to each other, and four side faces 205 to 208 that connect the first and second main faces 203 and 204. In the following description, in the four side faces 205 to 208, the side faces 205 and 206 extending in the longitudinal direction of the main faces 203 and 204 are referred to as first and second side faces, respectively, and are extended in the short side direction. The side faces 207 and 208 are referred to as first and second end faces, respectively.
於陶瓷素體202之第1及第2端面207及208上,分別形成有第1及第2外部端子電極209及210。First and second external terminal electrodes 209 and 210 are formed on the first and second end faces 207 and 208 of the ceramic body 202, respectively.
圖28係將層積陶瓷電感器201所具備之陶瓷素體202分解表示之立體圖。FIG. 28 is a perspective view showing the ceramic element body 202 included in the laminated ceramic inductor 201 in an exploded manner.
陶瓷素體202具有複數個陶瓷層211層積所成之構造。於陶瓷素體202內部,形成有:第1內部導體213,其於第1端面207上具有露出部212;及第2內部導體215,其於第2端面208上具有露出部214,且於陶瓷層211之層積方向上,配置在與第1內部導體213不同之位置。第1內部導體213之露出部212被第1外部端子電極209所被覆,且與第1外部端子電極209電性連接。第2內部導體215之露出部214被第2外部端子電極210所被覆,且與第2外部端子電極210電性連接。The ceramic body 202 has a structure in which a plurality of ceramic layers 211 are laminated. Inside the ceramic body 202, a first inner conductor 213 having an exposed portion 212 on the first end surface 207 and a second inner conductor 215 having an exposed portion 214 on the second end surface 208 and being ceramic The layer 211 is disposed at a position different from the first inner conductor 213 in the stacking direction. The exposed portion 212 of the first inner conductor 213 is covered by the first external terminal electrode 209 and electrically connected to the first external terminal electrode 209. The exposed portion 214 of the second inner conductor 215 is covered by the second external terminal electrode 210 and electrically connected to the second external terminal electrode 210.
又,於陶瓷素體202之內部,形成有延伸為線圈狀以將第1內部導體213與第2內部導體215電性連接之線圈導體216。線圈導體216係由在特定之陶瓷層211上延伸之若干個線導體217、及在厚度方向上貫通特定之陶瓷層211之若干個通孔導體218所構成,且於陶瓷素體202內部立體地延伸。Further, inside the ceramic body 202, a coil conductor 216 which is extended in a coil shape to electrically connect the first inner conductor 213 and the second inner conductor 215 is formed. The coil conductor 216 is composed of a plurality of wire conductors 217 extending over a specific ceramic layer 211 and a plurality of via conductors 218 extending through a specific ceramic layer 211 in the thickness direction, and is stereoscopically inside the ceramic body 202. extend.
又,層積陶瓷電感器201具備實質上無助於電氣特性之表現之若干個虛設內部導體219。虛設內部導體219在鄰接於第1或第2內部導體213或215之露出部212或214之位置具有露出部,其發揮作用而使第1及第2外部端子電極209及210相對於陶瓷素體202之固著力進一步提高。Further, the laminated ceramic inductor 201 has a plurality of dummy internal conductors 219 that do not contribute substantially to the performance of electrical characteristics. The dummy inner conductor 219 has an exposed portion adjacent to the exposed portion 212 or 214 of the first or second inner conductor 213 or 215, and functions to cause the first and second external terminal electrodes 209 and 210 to be opposed to the ceramic body. The fixing power of 202 is further improved.
以上,聯繫所圖示之實施形態而對本發明進行了說明,但本發明亦可適用於除此之外之層積壓電電子零件或層積熱敏電阻等其他的層積陶瓷電子零件。Although the present invention has been described above in connection with the embodiments shown in the drawings, the present invention is also applicable to other laminated ceramic electronic components such as laminated piezoelectric electronic components or laminated thermistors.
繼而,對於為確認本發明之效果所實施之實驗例加以說明。於該實驗例中,根據第2實施形態而製成層積陶瓷電容器,並進行評價。Next, an experimental example performed to confirm the effects of the present invention will be described. In this experimental example, a laminated ceramic capacitor was produced and evaluated according to the second embodiment.
首先,準備用以製作具有如下表1所示之規格之層積陶瓷電容器的陶瓷素體。First, a ceramic body for producing a laminated ceramic capacitor having the specifications shown in Table 1 below was prepared.
繼而。為了於陶瓷素體上形成外部端子電極,使用如下表2所示之電鍍浴,且在如表3所示之電鍍條件下應用水平旋轉滾筒,藉此實施打底鍍銅及加厚鍍銅,形成厚度約10μm之銅鍍膜。Then. In order to form an external terminal electrode on the ceramic body, an electroplating bath as shown in Table 2 below was used, and a horizontal rotating drum was applied under the plating conditions as shown in Table 3, thereby performing copper plating and thick copper plating. A copper plating film having a thickness of about 10 μm was formed.
繼而,於以下表4所示之各條件下對陶瓷素體實施熱處理。Then, the ceramic body was subjected to heat treatment under each of the conditions shown in Table 4 below.
其後,一邊使用如上所揭示之表2所示之電鍍浴,一邊於如表3所示之電鍍條件下應用水平旋轉滾筒,藉此依次實施鍍鎳及鍍錫,於上述銅鍍膜上形成厚度約4μm之鍍鎳膜,以及於其上形成厚度約4μm之鍍錫膜,獲得樣品1~13之各自之樣品。Thereafter, while using the plating bath shown in Table 2 as disclosed above, a horizontal rotating drum was applied under the plating conditions as shown in Table 3, whereby nickel plating and tin plating were sequentially performed to form a thickness on the copper plating film. A nickel plating film of about 4 μm, and a tin plating film having a thickness of about 4 μm were formed thereon, and samples of respective samples 1 to 13 were obtained.
其次,對於以此所獲得之各樣品,首先,以如下方式評價外部端子電極之固著力。外部端子電極之固著力之評價係讓樣品產生剪斷破壞而進行。即,藉由焊接將各樣品之層積陶瓷電容器安裝於基板上,並以0.5mm/秒之載荷速度對兩外部端子電極向平行方向施加載荷直至產生破壞,觀察產生破壞時之破壞模式。於下表5中,顯示有各樣品中產生有破壞之部位。又,於表5中,於各10個樣品中,於銅鍍膜與陶瓷素體之間產生有破壞之樣品、即產生有電極剝離之樣品之個數作為[不良率]而顯示。Next, with respect to each sample thus obtained, first, the fixing force of the external terminal electrode was evaluated in the following manner. The evaluation of the fixing force of the external terminal electrode is performed by causing shear damage to the sample. That is, the laminated ceramic capacitor of each sample was mounted on the substrate by soldering, and a load was applied in parallel directions to the two external terminal electrodes at a load speed of 0.5 mm/sec until breakage occurred, and the failure mode at the time of destruction was observed. In Table 5 below, the areas where the damage occurred in each sample were shown. Further, in Table 5, in each of the ten samples, the number of samples which were broken between the copper plating film and the ceramic body, that is, the number of samples in which electrode peeling occurred, was displayed as [non-performing rate].
進而,實施耐濕可靠性試驗。於125℃及95%RH之環境下,對各樣品以72小時施加3.2V之電壓後,將絕緣電阻成為1MΩ以下之樣品判定為不良,於表5中,將各20個樣品中之不良樣品之個數顯示為[耐濕可靠性不良率]。Further, a moisture resistance reliability test was carried out. After applying a voltage of 3.2 V to each sample for 72 hours in an environment of 125 ° C and 95% RH, the sample having an insulation resistance of 1 MΩ or less was judged to be defective. In Table 5, the bad samples of each of the 20 samples were determined. The number is shown as [moisture resistance failure rate].
如表5所示,樣品1~8及11中,在銅鍍膜與陶瓷素體之間產生破壞,且耐濕可靠性差,與此相對,樣品9、10、12及13中,於陶瓷素體之內部產生破壞,且耐濕可靠性亦優異。由此可知,如樣品9、10、12及13般,在50ppm以上之氧環境下,以1065℃以上之溫度進行熱處理,藉此可使外部端子電極相對於陶瓷素體具有充分之強度及耐濕性而固著。As shown in Table 5, in Samples 1 to 8 and 11, damage occurred between the copper plating film and the ceramic body, and the moisture resistance reliability was poor. On the other hand, in the samples 9, 10, 12, and 13, the ceramic body was used. The inside is broken and the moisture resistance reliability is also excellent. From this, it can be seen that, as in the samples 9, 10, 12 and 13, the heat treatment is performed at a temperature of 1065 ° C or higher in an oxygen atmosphere of 50 ppm or more, whereby the external terminal electrode can have sufficient strength and resistance with respect to the ceramic body. Wet and fixed.
1...層積陶瓷電容器1. . . Laminated ceramic capacitor
2、102、152、202...陶瓷素體2, 102, 152, 202. . . Ceramic body
3、4、103、104、153、154、203、204...主面3, 4, 103, 104, 153, 154, 203, 204. . . Main face
5~8、105~108、155~158、205~208...側面5~8, 105~108, 155~158, 205~208. . . side
9、10、114、115、168、169、209、210...外部端子電極9, 10, 114, 115, 168, 169, 209, 210. . . External terminal electrode
11、109、159、211...陶瓷層11, 109, 159, 211. . . Ceramic layer
12、13、110、111、160、161...內部電極(內部導體)12, 13, 110, 111, 160, 161. . . Internal electrode (internal conductor)
14、15、112、113、164、167、212、214...露出部14, 15, 112, 113, 164, 167, 212, 214. . . Exposed part
20...銅鍍膜20. . . Copper coating
21...銅氧化物twenty one. . . Copper oxide
35、36、116、117、170、171、219...虛設內部導體35, 36, 116, 117, 170, 171, 219. . . Dummy internal conductor
圖1係表示本發明第1實施形態之層積陶瓷電容器1之外觀之立體圖。Fig. 1 is a perspective view showing the appearance of a laminated ceramic capacitor 1 according to the first embodiment of the present invention.
圖2係沿圖1之A-A線之剖面圖。Figure 2 is a cross-sectional view taken along line A-A of Figure 1.
圖3(1)、(2)係表示圖1所示之層積陶瓷電容器1所具備之陶瓷素體2之內部構造之平面圖。3(1) and (2) are plan views showing the internal structure of the ceramic element body 2 included in the laminated ceramic capacitor 1 shown in Fig. 1.
圖4係將圖2之一部分放大表示之剖面圖。Fig. 4 is a cross-sectional view showing a portion of Fig. 2 in an enlarged manner.
圖5係用以說明本發明第2實施形態之與圖4相對應之示圖。Fig. 5 is a view for explaining the second embodiment of the present invention, corresponding to Fig. 4;
圖6係用以說明本發明第3實施形態之與圖4相對應之示圖。Fig. 6 is a view for explaining the third embodiment of the present invention, corresponding to Fig. 4;
圖7係用以說明本發明第4實施形態之與圖4相對應之示圖。Fig. 7 is a view for explaining a fourth embodiment of the present invention, corresponding to Fig. 4;
圖8係用以說明本發明第5實施形態之與圖2相對應之示圖。Fig. 8 is a view for explaining the fifth embodiment of the present invention, corresponding to Fig. 2;
圖9(1)~(4)係用以說明本發明第5實施形態之與圖3相對應之示圖。9(1) to (4) are views for explaining the fifth embodiment of the present invention, which corresponds to Fig. 3.
圖10係用以說明本發明第6實施形態之與圖2相對應之示圖。Fig. 10 is a view for explaining the sixth embodiment of the present invention, corresponding to Fig. 2;
圖11係用以說明本發明之第6實施形態者,其係表示形成外部端子電極9及10之前的陶瓷素體2之狀態之立體圖。FIG. 11 is a perspective view showing a state in which the ceramic element body 2 before the external terminal electrodes 9 and 10 are formed, for explaining the sixth embodiment of the present invention.
圖12係用以說明本發明第7實施形態之與圖10相對應之示圖。Fig. 12 is a view for explaining the seventh embodiment of the present invention, corresponding to Fig. 10.
圖13係用以說明本發明第7實施形態之與圖11相對應之示圖。Fig. 13 is a view for explaining the seventh embodiment of the present invention, corresponding to Fig. 11;
圖14(1)~(6)係用以說明本發明之第7實施形態者,其係表示圖13所示之輔助導體42之較佳形成方法之剖面圖。14(1) to 6(6) are cross-sectional views showing a preferred embodiment of the auxiliary conductor 42 shown in Fig. 13 for explaining the seventh embodiment of the present invention.
圖15係用以說明本發明第8實施形態之與圖2相對應之示圖。Fig. 15 is a view for explaining the eighth embodiment of the present invention, corresponding to Fig. 2;
圖16(1)~(6)係用以說明本發明之第8實施形態者,其係表示圖15所示之端緣導體49及50之較佳形成方法之剖面圖。16(1) to 6(6) are cross-sectional views showing a preferred embodiment of the edge conductors 49 and 50 shown in Fig. 15 for explaining the eighth embodiment of the present invention.
圖17係表示本發明第9實施形態之層積陶瓷電容器陣列101之外觀之立體圖。Fig. 17 is a perspective view showing the appearance of a laminated ceramic capacitor array 101 according to a ninth embodiment of the present invention.
圖18(1)、(2)係表示圖17所示之層積陶瓷電容器陣列101所具備之陶瓷素體102之內部構造的平面圖。18(1) and (2) are plan views showing the internal structure of the ceramic element body 102 included in the laminated ceramic capacitor array 101 shown in Fig. 17.
圖19係用以說明本發明第10實施形態之與圖17相對應之示圖。Fig. 19 is a view for explaining the tenth embodiment of the present invention, corresponding to Fig. 17.
圖20(1)~(4)係用以說明本發明第10實施形態之與圖18相對應之示圖。20(1) to (4) are views for explaining the tenth embodiment of the present invention, which corresponds to Fig. 18.
圖21(1)、(2)係用以說明本發明之第10實施形態者,其等分別係表示形成外部端子電極114及115之前的陶瓷素體102之第1及第2主面103及104之示圖。21(1) and (2) are for explaining the tenth embodiment of the present invention, and the first and second main faces 103 of the ceramic body 102 before forming the external terminal electrodes 114 and 115, and 104 diagram.
圖22係表示本發明第11實施形態之多端子型低ESL層積陶瓷電容器151之外觀之立體圖。Fig. 22 is a perspective view showing the appearance of a multi-terminal type low ESL laminated ceramic capacitor 151 according to the eleventh embodiment of the present invention.
圖23(1)、(2)係表示圖22所示之層積陶瓷電容器151所具備之陶瓷素體152之內部構造之平面圖。23(1) and (2) are plan views showing the internal structure of the ceramic element body 152 provided in the laminated ceramic capacitor 151 shown in Fig. 22.
圖24係用以說明本發明第12實施形態之與圖22相對應之示圖。Fig. 24 is a view for explaining a 12th embodiment of the present invention, corresponding to Fig. 22;
圖25(1)~(4)係用以說明本發明第12實施形態之與圖23相對應之示圖。25(1) to (4) are views for explaining the 12th embodiment of the present invention, which corresponds to Fig. 23.
圖26(1)、(2)係用以說明本發明之第12實施形態者,其等分別係表示形成外部端子電極168及169之前的陶瓷素體152之第1及第2主面153及154之示圖。26(1) and (2) are for explaining the twelfth embodiment of the present invention, and the first and second main faces 153 of the ceramic body 152 before forming the external terminal electrodes 168 and 169, respectively. 154 diagram.
圖27係表示本發明第13實施形態之層積陶瓷電感器201之外觀之立體圖。Fig. 27 is a perspective view showing the appearance of a laminated ceramic inductor 201 according to a thirteenth embodiment of the present invention.
圖28(1)~(7)係將圖27所示之層積陶瓷電感器201所具備之陶瓷素體202分解表示之立體圖。28(1) to (7) are perspective views showing the ceramic element body 202 included in the laminated ceramic inductor 201 shown in Fig. 27 in an exploded manner.
1...層積陶瓷電容器1. . . Laminated ceramic capacitor
2...陶瓷素體2. . . Ceramic body
7...第1端面7. . . First end face
9...外部端子電極9. . . External terminal electrode
11...陶瓷層11. . . Ceramic layer
12...內部電極(內部導體)12. . . Internal electrode (internal conductor)
14...露出部14. . . Exposed part
20...銅鍍膜20. . . Copper coating
21...銅氧化物twenty one. . . Copper oxide
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WO2011114805A1 (en) * | 2010-03-16 | 2011-09-22 | 株式会社村田製作所 | Laminated ceramic electronic component |
WO2011114809A1 (en) * | 2010-03-16 | 2011-09-22 | 株式会社村田製作所 | Laminated ceramic electronic component |
JP5471686B2 (en) * | 2010-03-24 | 2014-04-16 | 株式会社村田製作所 | Manufacturing method of multilayer ceramic electronic component |
JP5526908B2 (en) * | 2010-03-24 | 2014-06-18 | 株式会社村田製作所 | Multilayer electronic components |
JP2012043841A (en) * | 2010-08-13 | 2012-03-01 | Murata Mfg Co Ltd | Laminated ceramic electronic component and method of manufacturing the same |
JP5273122B2 (en) * | 2010-10-25 | 2013-08-28 | Tdk株式会社 | Electronic component and method for manufacturing electronic component |
CN103103393A (en) * | 2012-11-05 | 2013-05-15 | 熊科学 | High-strength heat-resistant aluminium alloy and preparation method |
JP6357640B2 (en) * | 2013-11-11 | 2018-07-18 | パナソニックIpマネジメント株式会社 | Laminated parts |
JP6696124B2 (en) * | 2014-09-19 | 2020-05-20 | 株式会社村田製作所 | Multilayer ceramic capacitor and manufacturing method thereof |
JP5915798B2 (en) * | 2015-05-13 | 2016-05-11 | 株式会社村田製作所 | Multilayer ceramic electronic components |
JP6665438B2 (en) * | 2015-07-17 | 2020-03-13 | 株式会社村田製作所 | Multilayer ceramic capacitors |
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