TWI483396B - 具有垂直閘極之半導體元件及其製造方法 - Google Patents
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- 239000004065 semiconductor Substances 0.000 title claims description 24
- 238000004519 manufacturing process Methods 0.000 title claims description 14
- 239000010410 layer Substances 0.000 claims description 73
- 238000000034 method Methods 0.000 claims description 23
- 239000007789 gas Substances 0.000 claims description 22
- 239000000758 substrate Substances 0.000 claims description 22
- 238000000151 deposition Methods 0.000 claims description 16
- 230000008021 deposition Effects 0.000 claims description 16
- 239000012790 adhesive layer Substances 0.000 claims description 14
- 238000010926 purge Methods 0.000 claims description 13
- 229910052734 helium Inorganic materials 0.000 claims description 11
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 9
- 229920005591 polysilicon Polymers 0.000 claims description 9
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 8
- 229910052751 metal Inorganic materials 0.000 claims description 8
- 239000002184 metal Substances 0.000 claims description 8
- 239000010936 titanium Substances 0.000 claims description 8
- 229910052719 titanium Inorganic materials 0.000 claims description 8
- 239000001307 helium Substances 0.000 claims description 6
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 claims description 6
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 claims description 5
- 229910052721 tungsten Inorganic materials 0.000 claims description 5
- 239000010937 tungsten Substances 0.000 claims description 5
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 claims description 4
- 238000005516 engineering process Methods 0.000 claims description 3
- 238000005530 etching Methods 0.000 claims description 3
- 238000001459 lithography Methods 0.000 claims description 3
- 229910052715 tantalum Inorganic materials 0.000 claims description 3
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims description 3
- 150000004767 nitrides Chemical class 0.000 claims description 2
- 239000000463 material Substances 0.000 description 10
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 8
- 238000000137 annealing Methods 0.000 description 4
- 239000006227 byproduct Substances 0.000 description 4
- 229910052732 germanium Inorganic materials 0.000 description 4
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 4
- -1 InO 2 Inorganic materials 0.000 description 3
- 229910052987 metal hydride Inorganic materials 0.000 description 3
- 150000004681 metal hydrides Chemical group 0.000 description 3
- BPUBBGLMJRNUCC-UHFFFAOYSA-N oxygen(2-);tantalum(5+) Chemical compound [O-2].[O-2].[O-2].[O-2].[O-2].[Ta+5].[Ta+5] BPUBBGLMJRNUCC-UHFFFAOYSA-N 0.000 description 3
- 229910001936 tantalum oxide Inorganic materials 0.000 description 3
- XSOKHXFFCGXDJZ-UHFFFAOYSA-N telluride(2-) Chemical compound [Te-2] XSOKHXFFCGXDJZ-UHFFFAOYSA-N 0.000 description 3
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 2
- 229910052684 Cerium Inorganic materials 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 2
- 229910021193 La 2 O 3 Inorganic materials 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- GWXLDORMOJMVQZ-UHFFFAOYSA-N cerium Chemical compound [Ce] GWXLDORMOJMVQZ-UHFFFAOYSA-N 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910008482 TiSiN Inorganic materials 0.000 description 1
- MRPWWVMHWSDJEH-UHFFFAOYSA-N antimony telluride Chemical compound [SbH3+3].[SbH3+3].[TeH2-2].[TeH2-2].[TeH2-2] MRPWWVMHWSDJEH-UHFFFAOYSA-N 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 229910000449 hafnium oxide Inorganic materials 0.000 description 1
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 1
- 239000011261 inert gas Substances 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- QRXWMOHMRWLFEY-UHFFFAOYSA-N isoniazide Chemical compound NNC(=O)C1=CC=NC=C1 QRXWMOHMRWLFEY-UHFFFAOYSA-N 0.000 description 1
- NFFIWVVINABMKP-UHFFFAOYSA-N methylidynetantalum Chemical compound [Ta]#C NFFIWVVINABMKP-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052757 nitrogen Inorganic materials 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 229910003468 tantalcarbide Inorganic materials 0.000 description 1
- VSSLEOGOUUKTNN-UHFFFAOYSA-N tantalum titanium Chemical compound [Ti].[Ta] VSSLEOGOUUKTNN-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
- H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4966—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66613—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
- H01L29/66621—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation using etching to form a recess at the gate location
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
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- Electrodes Of Semiconductors (AREA)
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Description
本發明係有關於一種半導體元件及其製造方法，特別是有關於一種具有垂直閘極之半導體元件及其製造方法。
隨著半導體記憶體元件積極度的增加，尺寸係微縮且圖案變的更精細。由於元件尺寸變的更小，閘極通道的長度亦縮減，其會因短通道效應，熱載子效應等所產生的漏電流，導致元件操作速度或資料輸入輸出速率減慢。
為避免上述情形，業界係提出垂直閘極之技術。在傳統的閘極結構中，鎢係用作閘極之主要材料。然而，對於高度先進的半導體技術，鎢由於具有較大的晶格尺寸，並不適用於具有較小尺寸之垂直閘極的材料。因此，需要找到可適用於垂直閘極電晶體之垂直閘極適合的材料和其相關製程。
根據上述，本發明提供一種具有垂直閘極之半導體元件之製造方法，包括：提供一基底；於基底中形成一凹槽；於凹槽之底部和側壁形成一閘極介電層；形成一黏著層於凹槽中之閘極介電層上，其中黏著層是一金屬氮矽化物層；及形成一閘極層於凹槽中之黏著層上。
本發明提供一種具有垂直閘極之半導體元件，包括：一基底，包括一凹槽；一閘極介電層，位於凹槽之底部和側壁上；一黏著層，位於凹槽中之閘極介電層上，其中黏
著層是一金屬氮矽化物層；及一閘極層，位於凹槽中之黏著層上。
為讓本發明之特徵能更明顯易懂，下文特舉實施例，並配合所附圖式，作詳細說明如下：
以下詳細討論實施本發明之實施例。可以理解的是，實施例提供許多可應用的發明概念，其可以較廣的變化實施。所討論之特定實施例僅用來發明使用實施例的特定方法，而不用來限定發明的範疇。
以下根據第1A圖~第1C圖描述具有垂直閘極之半導體元件之製造方法。請參照第1A圖，提供一適用於製造積體電路之基底102。基底102可以半導體材料形成，例如矽、鍺化矽、碳化矽、砷化鎵或其它適合之半導體材料。後續，形成一罩幕層108於基底102上。接著，以微影和蝕刻製程將罩幕層108圖案化。其後，使用罩幕層108作為一罩幕，蝕刻基底102，將基底102圖案化，以形成一凹槽106。罩幕層108可包括氧化矽、氮化矽或上述的組合。罩幕層108較佳包括氮化矽。沿著凹槽106之側壁和底部表面形成一閘極介電層104。閘極介電層104可包括氧化矽、氮化矽或高介電常數材料，例如Ta2
O5
、HfO2
、HSiOx
、Al2
O3
、InO2
、La2
O3
、ZrO2
或TaO2
。形成一多晶矽層110於基底102和罩幕層108間。可於多晶矽層110中形成一源極區及/或汲極區。請參照第1B圖，形成一閘極層112(較佳包括氮化矽)於凹槽106中和閘極介電層104
上，且後續進行一退火製程。請參照第1C圖，在退火步驟之後，閘極介電層104和閘極層112之界面間會產生孔洞114。孔洞114會影響半導體元件的效能，且發現一些可靠度的問題與上述孔洞有關。
以下根據第2A圖~第2C圖描述本發明一實施例具有垂直閘極之半導體元件之製造方法。請參照第2A圖，提供一適用於製造積體電路之基底202。基底202可以半導體材料形成，例如矽、鍺化矽、碳化矽、砷化鎵或其它適合之半導體材料。在一較佳的實施例中，基底202是由矽組成。後續，形成一罩幕層206於基底上。接著，以微影和蝕刻製程將罩幕層206圖案化。其後，使用罩幕層206作為一罩幕，蝕刻基底202，將基底202圖案化，以形成一凹槽204。在一實施例中，罩幕層206可包括氧化矽、氮化矽或上述的組合，罩幕層206較佳包括氮化矽。沿著凹槽204之側壁和底部表面形成一閘極介電層208，閘極介電層208可包括氧化矽、氮化矽或高介電常數材料，例如Ta2
O5
、HfO2
、HSiOx
、Al2
O3
、InO2
、La2
O3
、ZrO2
或TaO2
。形成一多晶矽層205於基底202和罩幕層206間。在一實施例中，可於多晶矽層205中形成一源極區及/或汲極區。
請參照第2B圖，形成一黏著層210於凹槽204中和罩幕層206上。在一實施例中，黏著層210是一金屬氮矽化物，特別是，金屬氮矽化物可以是Mx
Si(1-x)
N，其中金屬(M)可以是鈦、鉭或鎢，且x之範圍可以是0.1~0.9，較佳為0.3~0.6。在一較佳實施例中，金屬(M)是鈦，且黏著層210
是鈦氮矽化物。鈦氮矽化物可以循序式氣流沉積(sequential flow deposition，簡稱SFD)之技術形成。以下敘述描述形成鈦氮矽化物之製程步驟：將TiCl4
、He和N2
經由一第一氣體管線導入一化學氣相沉積室，且將NH3
和N2
經由一第二氣體管線導入上述沉積室，以進行一第一沉積步驟。管線中可加入He、Ar或其它鈍氣之單獨或混合氣體。在一範例中，上述製程步驟可採用以下製程條件：TiCl4
之流量約為50 mg/min~350 mg/min，經由第一管線導入第一沉積室，且NH3
之流量約為100 sccm~500 sccm，經由第二管線導入上述沉積室。總壓力可以約為5 torr~30 torr，基座的溫度可以約為400℃~700℃。在TiCl4
和NH3
進行反應後，進行一第一清除(purge)步驟，以移除反應中產生的副產物。不希望產生的副產物可能會影響後續沉積薄膜於鈦氮化矽層上之黏著性。上述清除步驟係提供清除氣體至製程室，後續排除清除氣體和反應中產生的副產物。清除氣體可以為N2
、H2
、He、Ar、Ne、Xe或上述之組合。一般來說，提供至製程室之清除氣體的流量約為100 sccm~1000 sccm，時間最多約為5分鐘。
後續，將NH3
導入沉積室，以進行一第一氮化步驟。接著，進行一第二清除(purge)步驟，其中上述清除步驟係提供清除氣體至製程室，後續排除清除氣體和反應中產生的副產物。清除氣體可以為N2
、H2
、He、Ar、Ne、Xe或上述之組合。其後，將形成的層暴露在含矽氣體下，使矽混入氮化鈦層中，將其轉變成鈦氮矽化(TiSiN)層。含矽氣體可以例如為SiH4
或Si2
H6
。含矽氣體可以下列氣體混合：
H2
、N2
、Ar或He。一般來說，矽化物之形成步驟之製程條件可如下：含矽氣體之流量約為20 sccm~3000 sccm，總壓力約為0.5 torr~20 torr，溫度約為500℃~700℃。當含矽氣體與H2
混合，含矽氣體與H2
之比例較佳大於1。矽化物之形成步驟之製程條件更佳可如下：含矽氣體之流量約為80 sccm，H2
之流量約為450 sccm，總壓力約為5 torr，溫度約為650℃。後續，將NH3
和N2
經由第二管線導入沉積室，以進行一第二氮化步驟，完成一次循環(cycle)之沉積。本發明實施例可重複上述循環5~20次，形成鈦氮矽化物。在本發明一實施例中，黏著層之厚度可以為5 nm~20 nm。本發明可使用額外的製程室，且上述之參數可依據形成鈦氮矽化物之特殊的製程室而變化。舉例來說，其它的製程室可以具有較大或較小的體積，而其需要的氣體流量也隨著製程室的體積變化增加或減少。
後續，請參照第2C圖，形成閘極層212於凹槽204中和黏著層210上。閘極層212較佳包括氮化鈦、氮化鉭或氮化鎢，理由是這些材料具有較小的晶格尺寸和較低的阻值。後續，進行一退火製程，退火製程之溫度可以為800℃~1200℃。後續可進行一般的半導體製程步驟，例如圖案化閘極層、形成源極/汲極區、形成間隙壁、形成接觸、形成層間介電層或金屬間介電層，上述製程在此不詳細的描述。
本發明形成金屬氮矽化物黏著層具有避免於閘極介電層和閘極層間產生孔洞的優點，且可防止此孔洞衍生出之相關問題。更甚者，金屬氮矽化物黏著層可減少電晶體之
垂直閘極的阻值。
雖然本發明之較佳實施例說明如上，然其並非用以限定本發明，任何熟習此技藝者，在不脫離本發明之精神和範圍內，當可作些許之更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。
102‧‧‧基底
104‧‧‧閘極介電層
106‧‧‧凹槽
108‧‧‧罩幕層
110‧‧‧多晶矽層
112‧‧‧閘極層
114‧‧‧孔洞
202‧‧‧基底
204‧‧‧凹槽；
205‧‧‧多晶矽層
206‧‧‧罩幕層
208‧‧‧閘極介電層
210‧‧‧黏著層
212‧‧‧閘極層
第1A圖~第1C圖顯示具有垂直閘極之半導體元件之製造方法中間步驟的剖面圖。
第2A圖~第2C圖顯示本發明一實施例具有垂直閘極之半導體元件之製造方法中間步驟的剖面圖。
202‧‧‧基底
205‧‧‧多晶矽層
206‧‧‧罩幕層
208‧‧‧閘極介電層
210‧‧‧黏著層
212‧‧‧閘極層
Claims (7)
- 一種具有垂直閘極之半導體元件之製造方法，包括：提供一基底；於該基底中形成一凹槽；於該凹槽之底部和側壁形成一閘極介電層；形成一黏著層於該凹槽中之該閘極介電層上，其中該黏著層是一金屬氮矽化物層；及形成一閘極層於該凹槽中之該黏著層上，其中該黏著層係以循序式氣流沉積(sequential flow deposition)之技術形成，該循序式氣流沉積包括：進行一循環(cycle)之沉積，包括：將TiCl4 和NH3 導入一沉積室，以進行一第一沉積步驟；進行一第一清除(purge)步驟；將NH3 導入該沉積室，以進行一第一氮化步驟；進行一第二清除(purge)步驟；將一含矽氣體導入該沉積室，其中該含矽氣體包括SiH4 或Si2 H6 ；進行一第三清除(purge)步驟；及將NH3 導入該沉積室，以進行一第二氮化步驟；重複該循環5~20次。
- 如申請專利範圍第1項所述之具有垂直閘極之半導體元件之製造方法，其中該金屬包括鈦、鉭或鎢。
- 如申請專利範圍第1項所述之具有垂直閘極之半導體元件之製造方法，其中該閘極層包括氮化鈦。
- 如申請專利範圍第1項所述之具有垂直閘極之半導體元件之製造方法，其中於該基底中形成凹槽之步驟包括：於該基底上形成一罩幕層；以微影和蝕刻製程圖案化該罩幕層；及使用該罩幕層作為一罩幕，蝕刻該基底。
- 如申請專利範圍第4項所述之具有垂直閘極之半導體元件之製造方法，其中該罩幕層包括氮化鈦。
- 如申請專利範圍第4項所述之具有垂直閘極之半導體元件之製造方法，更包括於該基底和該罩幕層間形成一多晶矽層。
- 如申請專利範圍第6項所述之具有垂直閘極之半導體元件之製造方法，更包括於該多晶矽層中形成源極/汲極區。
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| US10573725B1 (en) * | 2018-09-20 | 2020-02-25 | Nanya Technology Corporation | Semiconductor structure and manufacturing method thereof |
| US11587791B2 (en) * | 2018-10-23 | 2023-02-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | Silicon intermixing layer for blocking diffusion |
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| TW426952B (en) * | 1999-01-16 | 2001-03-21 | United Microelectronics Corp | Method of manufacturing interconnect |
| US20050275042A1 (en) * | 2004-06-10 | 2005-12-15 | Samsung Electronics Co., Ltd. | Semiconductor device including a field effect transistor and method of forming thereof |
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| US20050275042A1 (en) * | 2004-06-10 | 2005-12-15 | Samsung Electronics Co., Ltd. | Semiconductor device including a field effect transistor and method of forming thereof |
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