TWI483382B - 半導體結構及其形成方法 - Google Patents
半導體結構及其形成方法 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims description 37
- 238000004519 manufacturing process Methods 0.000 title description 3
- 229910052751 metal Inorganic materials 0.000 claims description 51
- 239000002184 metal Substances 0.000 claims description 51
- 238000000034 method Methods 0.000 claims description 50
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 40
- 239000000463 material Substances 0.000 claims description 27
- 238000005498 polishing Methods 0.000 claims description 22
- 239000000126 substance Substances 0.000 claims description 22
- 229910052802 copper Inorganic materials 0.000 claims description 21
- 239000010949 copper Substances 0.000 claims description 21
- 230000004888 barrier function Effects 0.000 claims description 20
- 238000009792 diffusion process Methods 0.000 claims description 20
- 239000000758 substrate Substances 0.000 claims description 12
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 claims description 7
- 239000004020 conductor Substances 0.000 claims description 6
- 229910052715 tantalum Inorganic materials 0.000 claims description 6
- 238000007772 electroless plating Methods 0.000 claims description 5
- 239000007769 metal material Substances 0.000 claims description 5
- 229910052758 niobium Inorganic materials 0.000 claims description 5
- 239000010955 niobium Substances 0.000 claims description 5
- GUCVJGMIXFAOAE-UHFFFAOYSA-N niobium atom Chemical compound [Nb] GUCVJGMIXFAOAE-UHFFFAOYSA-N 0.000 claims description 5
- NFFIWVVINABMKP-UHFFFAOYSA-N methylidynetantalum Chemical compound [Ta]#C NFFIWVVINABMKP-UHFFFAOYSA-N 0.000 claims description 4
- 229910003468 tantalcarbide Inorganic materials 0.000 claims description 4
- 238000004140 cleaning Methods 0.000 claims description 3
- 238000007517 polishing process Methods 0.000 claims description 2
- 229910052684 Cerium Inorganic materials 0.000 claims 3
- GWXLDORMOJMVQZ-UHFFFAOYSA-N cerium Chemical compound [Ce] GWXLDORMOJMVQZ-UHFFFAOYSA-N 0.000 claims 3
- SIWVEOZUMHYXCS-UHFFFAOYSA-N oxo(oxoyttriooxy)yttrium Chemical compound O=[Y]O[Y]=O SIWVEOZUMHYXCS-UHFFFAOYSA-N 0.000 claims 3
- BCZWPKDRLPGFFZ-UHFFFAOYSA-N azanylidynecerium Chemical compound [Ce]#N BCZWPKDRLPGFFZ-UHFFFAOYSA-N 0.000 claims 2
- ZKEYULQFFYBZBG-UHFFFAOYSA-N lanthanum carbide Chemical compound [La].[C-]#[C] ZKEYULQFFYBZBG-UHFFFAOYSA-N 0.000 claims 2
- MRELNEQAGSRDBK-UHFFFAOYSA-N lanthanum(3+);oxygen(2-) Chemical compound [O-2].[O-2].[O-2].[La+3].[La+3] MRELNEQAGSRDBK-UHFFFAOYSA-N 0.000 claims 2
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 claims 1
- OLYKTICNIVCGSY-UHFFFAOYSA-N [O-2].[Ce+3].[C+4] Chemical compound [O-2].[Ce+3].[C+4] OLYKTICNIVCGSY-UHFFFAOYSA-N 0.000 claims 1
- 229910052707 ruthenium Inorganic materials 0.000 claims 1
- 239000010410 layer Substances 0.000 description 118
- 238000007747 plating Methods 0.000 description 7
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 6
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 5
- 229910000881 Cu alloy Inorganic materials 0.000 description 4
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 3
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 3
- 229910052799 carbon Inorganic materials 0.000 description 3
- 230000009977 dual effect Effects 0.000 description 3
- 238000009713 electroplating Methods 0.000 description 3
- 229910052757 nitrogen Inorganic materials 0.000 description 3
- 238000005240 physical vapour deposition Methods 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 description 2
- 239000005751 Copper oxide Substances 0.000 description 2
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 2
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 2
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 238000000231 atomic layer deposition Methods 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 229910000431 copper oxide Inorganic materials 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 229910052739 hydrogen Inorganic materials 0.000 description 2
- 239000001257 hydrogen Substances 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 1
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 229910021529 ammonia Inorganic materials 0.000 description 1
- 125000004429 atom Chemical group 0.000 description 1
- 238000000277 atomic layer chemical vapour deposition Methods 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000003054 catalyst Substances 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 229910017052 cobalt Inorganic materials 0.000 description 1
- 239000010941 cobalt Substances 0.000 description 1
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 229910052735 hafnium Inorganic materials 0.000 description 1
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 description 1
- 125000004435 hydrogen atom Chemical class [H]* 0.000 description 1
- 230000000977 initiatory effect Effects 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 239000013335 mesoporous material Substances 0.000 description 1
- 125000002496 methyl group Chemical group [H]C([H])([H])* 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 239000002243 precursor Substances 0.000 description 1
- 239000003870 refractory metal Substances 0.000 description 1
- 239000005871 repellent Substances 0.000 description 1
- 229910001925 ruthenium oxide Inorganic materials 0.000 description 1
- WOCIAKWEIIZHES-UHFFFAOYSA-N ruthenium(iv) oxide Chemical compound O=[Ru]=O WOCIAKWEIIZHES-UHFFFAOYSA-N 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 229910000077 silane Inorganic materials 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 229910052725 zinc Inorganic materials 0.000 description 1
- 239000011701 zinc Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/7684—Smoothing; Planarisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/288—Deposition of conductive or insulating materials for electrodes conducting electric current from a liquid, e.g. electrolytic deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
- H01L21/76849—Barrier, adhesion or liner layers formed in openings in a dielectric the layer being positioned on top of the main fill metal
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
本發明係有關於一種積體電路,且特別有關於一種內連線結構及其形成方法。
“鑲嵌”製程為一種常用以形成金屬線和介層孔的方法。一般而言,此方法包括於一介電層中形成一開口,此介電層係用以分開上下垂直相隔的金屬層,其中此開口通常使用傳統的微影和蝕刻技術形成。此開口形成後,再填入銅或銅合金於此開口內,以形成介層孔或溝槽。隨後藉由化學機械研磨(CMP)去除介電層表面上多餘的金屬材料,而剩餘的銅或銅合金則形成介層孔插塞(vias)及/或金屬線。
由於銅材料具有較低的電阻率(resistivity),因此鋁材料已被銅材料所取代。然而,隨著積體電路幾何結構持續的縮小和電流密度的增加,銅材料仍然發生電致遷移(electro migration)和應力遷移(stress migration)所造成之可靠度的問題。
第1圖繪示一傳統內連線結構的剖面圖。一般而言,第1圖所示之結構的形成步驟如下:首先在低介電常數介電層2中形成一開口,接著,形成一擴散阻障層6於開口內,再以銅材料填入開口,隨後執行化學機械研磨製程以去除多餘的銅材料,而形成銅導線4於開口內,
接著,金屬蓋層8隨之形成於銅導線4上。值得注意的是,由於擴散阻障層6和金屬蓋層8具有密封(sealing)銅導線4的功能,因此可防止銅擴散至低介電常數介電層2和位於其上方/位於其下方之低介電常數介電層中。之後,可形成蝕刻停止層10於銅導線4的上表面和金屬蓋層8上。
然而,傳統的內連線結構仍存在不少缺點。舉例而言,在形成銅導線4之化學機械研磨製程中,由於低介電常數介電層2暴露於研磨液之下,因而可能會造成低介電常數介電層2受損。此外,金屬蓋層8通常藉由無電電鍍製程形成,且此製程包括將晶圓浸泡在電鍍液中。然而,由於低介電常數介電層2之潤濕性(wetability)通常很低,因此會使得所形成的金屬蓋層8的厚度不均勻。特別是,在靠近銅導線4和擴散阻障層6之間的介面位置,可能會發生電鍍液和低介電常數介電層2之間不完全接觸的問題,而使得金屬蓋層8可能無法完全覆蓋銅導線4。因此,需要有一種新的內連線結構及其形成方法,以解決上述的問題。
本發明係提供一種半導體結構,包括:一介電層;一化學機械研磨停止層,位於該介電層上;一導線,位於該介電層內;以及一金屬蓋層,位於該導線之上。
本發明又提供一種半導體結構,包括:一基底;一
低介電常數介電層,位於該基底上;一外加的介電層,位於該低介電常數介電層上,其中該外加的介電層之介電常數高於該低介電常數介電層之介電常數;一開口,該開口自該外加的介電層之上表面延伸至該低介電常數介電層內;一擴散阻障層,位於該開口內襯;一銅導線,位於該開口內且位於該擴散阻障層之上;以及一金屬蓋層,位於該銅導線上。
本發明還提供一種半導體結構的形成方法,包括:形成一介電層;形成一化學機械研磨停止層於該介電層上;形成一導線於該介電層內;以及形成一金屬蓋層於該導線之上。
本發明更提供一種半導體結構的形成方法,包括:提供一半導體基底;形成一低介電常數介電層於該半導體基底之上;形成一外加的介電層於該低介電常數介電層上形成一開口,該開口自該外加的介電層之上表面延伸至該低介電常數介電層內;填入一銅材料於該開口內;實施一化學機械研磨(CMP)製程,以移除多餘的銅材料,其中該開口內剩餘的銅材料形成一銅導線,且其中該銅導線之上表面實質上與該外加的介電層之上表面等高;以及選擇性形成一金屬蓋層於該銅導線上。
本發明較佳實施例的製造與使用的說明詳述如下,然而,值得注意的是,本發明提供許多可應用的發明概
念並於特定的內文中廣泛地具體說明。這些實施例僅以特定的圖示闡述本發明的製造與使用,但不用以限制本發明的範圍。
第2圖顯示一啟始結構,其繪示形成一低介電常數介電層20於半導體基底24之上。半導體基底24可包括一般常用的半導體材料,例如矽、矽鍺或類似的材料,並有積體電路(圖未顯示)形成於其上。在一較佳的實施例中,低介電常數介電層20為金屬間介電層(IMD),其較佳的介電常數(即k值)低於3.5。再者,低介電常數介電層20之介電常數也可低於2.5(因此又稱之為超低介電常數介電層)。較佳者,低介電常數介電層20包含氮(N)、碳(C)、氫(H)、氧(O)、氟(F)或其結合。在一實施例中,低介電常數介電層20可為分子結構末端含碳(C)和氫(H)的材料,例如為甲烷基(CH3
)末端。值得注意的是,低介電常數介電層20為厭水性,因此其難以和後續即將進行之電鍍製程的電鍍液均勻地接觸。
接著,形成介電層21於低介電常數介電層20上,藉以作為CMP停止層。較佳者,介電層21可包括一擇自氧化矽、碳化矽、碳氧化矽、氮化矽、氮氧化矽或其結合之材料。再者,介電層21之介電常數可介於2.2和5.0之間,且較佳高於低介電常數介電層20之介電常數。介電層21較佳的形成方法為電漿加強式化學氣相沈積(PECVD)法,然而,亦可使用其他一般常用的形成方法,例如高密度電漿化學氣相沈積(HDPCVD)法、原子層化學
氣相沈積(ALCVD)法或類似的形成方法。在一實施例中,介電層21可包括氮化矽,其形成於一已通入氣體前驅物的反應室中進行化學反應,例如矽烷(SiH4
)和氨(NH3
)。較佳者,介電層21之厚度T1為50至300,更佳為300。然而,熟知此技藝之人士可理解,本說明書中所揭露之尺寸僅為範例,其將可隨著積體電路尺寸的微縮而縮小。之後,形成溝槽22於低介電常數介電層20和介電層21之中。
接著,請參照第3圖,其顯示毯覆式形成一擴散阻障層28,以覆蓋溝槽22底部和側壁。擴散阻障層28較佳係擇自鈦、氮化鈦、鉭、氮化鉭、釕、氮化釕或其結合之材料形成,其較佳的形成方法包括物理氣相沈積(PVD)法、原子層沈積(ALD)法或其他常用的方法。
之後,一種晶層(圖未顯示),較佳包括銅或銅合金材料,可形成於擴散阻障層28上。在一實施例中,此種晶層可藉由無電電鍍製程或物理氣相沈積製程形成。隨後,可藉由例如電鍍製程填充導電材料30於溝槽22內。導電材料30之較佳材料為銅或銅合金材料,然而,其他一般常用的金屬材料例如鋁、銀、耐火金屬(refractory metal)包括鎢、鉭、氮化鉭、鈦、氮化鈦或其結合之材料亦可使用。
請參閱第4圖,其繪示實施一CMP製程以去除多餘的填充材料,而使得導電材料30的上表面實質上與介電層21的上表面等高,因而形成擴散阻障層32和導線34。
此外,雖然導線34也可包含除銅以外的其他導電材料,但在本說明書中所述之導線34仍可稱之為銅導線。
較佳者,可實施一過研磨(over-polish)製程,以在整片晶圓上獲得厚度均勻的圖案。因此,經由過研磨製程之後,可能會降低介電層21的厚度。在一實施例中,介電層21剩餘的厚度T2為100Å。
第5A圖顯示金屬蓋層36選擇性形成於導線34上。金屬蓋層36較佳可包括例如鈷、鎳、鎢、鉬、矽、鋅、鉻、硼、磷、氮或其結合之材料。金屬蓋層36較佳之厚度T3為10Å至500Å,更佳為介於50Å至100Å之間,然而,其他不同的厚度亦可使用。
在一較佳的實施例中,金屬蓋層36可藉由在一電鍍液中,進行無電電鍍製程形成,且金屬蓋層36僅選擇性地形成於導線34上,而不會形成於低介電常數介電層20之上。此選擇性的形成方式可藉由使用鈀(Pd)觸媒來達成。本發明的優點之一為利用介電層21具有較低介電常數介電層20高的親水性,而使得電鍍液和介電層21之間的接觸狀態較電鍍液和低介電常數介電層20之間的接觸狀態更為均勻。同樣地,本發明也可用以改善電鍍液和導線34之間的接觸狀態,因而可獲得厚度較為均勻的金屬蓋層36。
一般而言,在CMP製程後,但在金屬蓋層36形成之前,由於導線34暴露在含氧的環境中,所以導線34的上表面會形成一原生(native)銅氧化層。因此,在預清
洗製程中,需使用一酸液來去除銅氧化層,並因而形成一凹陷區。如第5B圖所示,金屬蓋層36因而形成於此凹陷區內。例如在一較佳的實施例中,金屬蓋層36的上表面實質上和介電層21的上表面等高。然而,此凹陷區的深度可能高於或者亦可能低於金屬蓋層36之所需厚度,因此金屬蓋層36的上表面,同樣可能高於或者亦可能低於介電層21的上表面。
第6圖顯示一選擇性實施之蝕刻停止層40的形成方式。較佳者,蝕刻停止層40之介電常數小於4,且可包括碳及/或氮為主體的材料,例如碳化矽、氮化矽、碳氧化矽、氮氧化矽或其結合的材料。
在先前段落所述之一實施例中,說明一單鑲嵌結構的形成方法。然而,熟知此技藝之人士將可理解,藉由此單鑲嵌結構之形成方法的教導,可輕易地用於形成雙鑲嵌結構。舉例而言,如第7圖所示,其顯示一形成雙鑲嵌結構的實施例,包括形成介層孔插塞42和位於其上方的銅導線44於低介電常數介電層48中。隨後,藉由如先前段落之實施例所述之實質相同製程步驟,可形成CMP停止層46和金屬蓋層50。
本發明之實施例具有改善金屬蓋層於電鍍製程中之潤濕性的優點,因而可改善金屬蓋層之厚度的均勻性。此外,CMP停止層可用以保護低介電常數介電層被隨後進行的CMP製程損傷。再者,藉由CMP停止層也可改善CMP製程的均勻性。因此,可使得晶圓中的金屬圖案
具有較均勻的厚度,並因而改善金屬導線之片電阻的均勻性。
雖然本發明已以較佳實施例揭露如上,然其並非用以限定本發明,任何熟習此項技藝者,在不脫離本發明之精神和範圍內,當可做更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。
2、21‧‧‧介電層
4‧‧‧銅導線
6‧‧‧擴散阻障層
8、36、50‧‧‧金屬蓋層
10、40‧‧‧蝕刻停止層
20、48‧‧‧低介電常數介電層
22‧‧‧溝槽
24‧‧‧半導體基底
28、32‧‧‧擴散阻障層
30‧‧‧導電材料
34‧‧‧導線
42‧‧‧介層孔插塞
44‧‧‧銅導線
46‧‧‧化學機械研磨停止層
T1‧‧‧介電層21之厚度
T2‧‧‧介電層21剩餘之厚度
T3‧‧‧金屬蓋層36之厚度
第1圖顯示一習知的內連線結構,包括一金屬蓋層和一蝕刻停止層。
第2~4、5A、5B圖及第6圖為一系列之按照本發明實施例所製造之一單鑲嵌結構的剖面圖。
第7圖顯示按照本發明之實施例所製造之一雙鑲嵌結構。
20、48‧‧‧低介電常數介電層
21‧‧‧介電層
24‧‧‧半導體基底
40‧‧‧蝕刻停止層
32‧‧‧擴散阻障層
34‧‧‧導線
36、50‧‧‧金屬蓋層
42‧‧‧介層孔材料
44‧‧‧銅導線
46‧‧‧化學機械研磨停止層
Claims (23)
- 一種半導體結構,包括:一介電層;一化學機械研磨停止層,位於該介電層上,其中該該化學機械研磨停止層包含一材料,該材料係擇自實質上由氧化矽、碳化矽、碳氧化矽、氮化矽、氮氧化矽或其組合之族群,該化學機械研磨停止層的親水性高於該介電層的親水性;一導線,位於該介電層內;以及一金屬蓋層,位於該導線之上,其中該金屬蓋層之上表面實質上與該化學機械研磨停止層的上表面等高。
- 如申請專利範圍第1項所述之半導體結構,更包括:一擴散阻障層,位於該導線和該介電層之間,其中該擴散阻障層具有一上邊緣,該上邊緣實質上與該化學機械研磨停止層的該上表面等高。
- 如申請專利範圍第1項所述之半導體結構,其中該化學機械研磨停止層之介電常數介於2.2和5之間。
- 如申請專利範圍第1項所述之半導體結構,其中該金屬蓋層之厚度介於50Å至100Å之間。
- 如申請專利範圍第1項所述之半導體結構,其中該化學機械研磨停止層之厚度介於50Å至300Å之間。
- 如申請專利範圍第1項所述之半導體結構,其中該介電層之介電常數低於該化學機械研磨停止層之介電常 數。
- 一種半導體結構,包括:一基底;一低介電常數介電層,位於該基底之上;一另一介電層,位於該低介電常數介電層上,其中該另一介電層之介電常數高於該低介電常數介電層之介電常數,其中該另一介電層包含一材料,該材料係擇自實質上由氧化矽、碳化矽、碳氧化矽、氮化矽、氮氧化矽或其組合之族群,該另一介電層的親水性高於該低介電常數介電層的親水性;一開口,該開口自該外加的介電層之上表面延伸至該低介電常數介電層內;一擴散阻障層,位於該開口內襯;一銅導線,位於該開口內且位於該擴散阻障層之上;以及一金屬蓋層,位於該銅導線上,其中金屬蓋層之上表面實質上和該另一介電層之上表面等高。
- 如申請專利範圍第7項所述之半導體結構,其中該擴散阻障層具有一上邊緣,且該上邊緣實質上和該另一介電層等高。
- 如申請專利範圍第7項所述之半導體結構,其中該另一介電層之介電常數介於2.2和5之間。
- 如申請專利範圍第7項所述之半導體結構,其中金屬蓋層之厚度介於50Å和100Å之間。
- 如申請專利範圍第7項所述之半導體結構,其中該另一介電層之厚度介於50Å和300Å之間。
- 如申請專利範圍第7項所述之半導體結構,更包括一蝕刻停止層,位於該金屬蓋層和該另一介電層上。
- 一種半導體結構的形成方法,包括:形成一介電層;形成一化學機械研磨停止層於該介電層上,其中該該化學機械研磨停止層包含一材料,該材料係擇自實質上由氧化矽、碳化矽、碳氧化矽、氮化矽、氮氧化矽或其組合之族群,該化學機械研磨停止層的親水性高於該介電層的親水性;形成一導線於該介電層內;以及形成一金屬蓋層於該導線之上,且該金屬蓋層之上表面實質上與該化學機械研磨停止層的上表面等高。
- 如申請專利範圍第13項所述之半導體結構的形成方法,其中形成該導線的步驟包括:形成一開口,該開口自該化學機械研磨停止層的該上表面延伸至該介電層中;形成一擴散阻障層於該開口內襯;填入一金屬材料於該開口中;以及實施一化學機械研磨製程,以去除多餘的金屬材料,其中該開口內之該金屬材料的一部份形成該導線。
- 如申請專利範圍第14項所述之半導體結構的形成方法,其中該金屬蓋層藉由無電電鍍製程,選擇性地 形成於該導線上。
- 如申請專利範圍第15項所述之半導體結構的形成方法,更包括在形成該金屬蓋層的步驟前,實施一預清洗製程,其中該預清洗製程係用以去除該導線的上氧化層。
- 如申請專利範圍第13項所述之半導體結構的形成方法,更包括形成一蝕刻停止層於該金屬蓋層和該化學機械研磨停止層上。
- 一種半導體結構的形成方法,包括:提供一半導體基底;形成一低介電常數介電層於該半導體基底之上;形成一另一介電層於該低介電常數介電層上,其中該另一介電層包含一材料,該材料係擇自實質上由氧化矽、碳化矽、碳氧化矽、氮化矽、氮氧化矽或其組合之族群,該另一介電層的親水性高於該低介電常數介電層的親水性;形成一開口,該開口自該另一介電層之上表面延伸至該低介電常數介電層內;填入一銅材料至該開口內;實施一化學機械研磨(CMP)製程,以移除多餘的銅材料,其中該開口內剩餘的銅材料形成一銅導線;以及選擇性形成一金屬蓋層於該銅導線上,且該金屬蓋層之上表面實質上與該另一介電層之上表面等高。
- 如申請專利範圍第18項所述之半導體結構的形 成方法,更包括在該填入銅材料的步驟之前,形成一擴散阻障層,其中在完成該化學機械研磨(CMP)製程之後,該擴散阻障層之上邊緣實質上和該另一介電層之該上表面等高。
- 如申請專利範圍第18項所述之半導體結構的形成方法,其中該形成金屬蓋層之步驟包括無電電鍍製程。
- 如申請專利範圍第18項所述之半導體結構的形成方法,其中實施該化學機械研磨(CMP)的步驟包括過研磨該另一介電層。
- 如申請專利範圍第18項所述之半導體結構的形成方法,更包括在形成該金屬蓋層的步驟之前,實施一預清洗步驟,其中該預清洗步驟係用以移除該銅導線之上氧化層。
- 如申請專利範圍第18項所述之半導體結構的形成方法,更包括形成一蝕刻停止層於該金屬蓋層和該另一介電層上。
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US6358832B1 (en) * | 1999-09-30 | 2002-03-19 | International Business Machines Corporation | Method of forming barrier layers for damascene interconnects |
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DE102004042168B4 (de) * | 2004-08-31 | 2009-08-20 | Advanced Micro Devices, Inc., Sunnyvale | Halbleiterelement mit einem Metallisierungsschichtstapel mit kleinem ε mit erhöhter Widerstandsfähigkeit gegen Elektromigration und Verfahren zum Bilden des Halbleiterelements |
US20060205204A1 (en) * | 2005-03-14 | 2006-09-14 | Michael Beck | Method of making a semiconductor interconnect with a metal cap |
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US6358832B1 (en) * | 1999-09-30 | 2002-03-19 | International Business Machines Corporation | Method of forming barrier layers for damascene interconnects |
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