TWI456906B - 頻率合成器 - Google Patents
頻率合成器 Download PDFInfo
- Publication number
- TWI456906B TWI456906B TW101110549A TW101110549A TWI456906B TW I456906 B TWI456906 B TW I456906B TW 101110549 A TW101110549 A TW 101110549A TW 101110549 A TW101110549 A TW 101110549A TW I456906 B TWI456906 B TW I456906B
- Authority
- TW
- Taiwan
- Prior art keywords
- delay
- frequency
- signal
- parameter
- generate
- Prior art date
Links
- 230000003111 delayed effect Effects 0.000 claims 5
- 238000001914 filtration Methods 0.000 claims 3
- 230000001934 delay Effects 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
- H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/22—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop
- H03L7/23—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using more than one loop with pulse counters or frequency dividers
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Pulse Circuits (AREA)
Claims (16)
- 一種頻率合成器,包含有:一延遲單元,用來接收一參考訊號,並根據一延遲參數,對該參考訊號進行延遲處理,以產生一延遲參考訊號;一鎖相迴路,用來根據該延遲參考訊號與一回授除頻訊號,產生一輸出訊號;一控制單元,用來根據一目標倍率,產生該延遲參數與一除頻參數;一除頻器,用來根據該除頻參數,對該輸出訊號進行除頻處理,以產生該回授除頻訊號;以及一延遲鎖定迴路,用來根據該輸出訊號,產生一延遲級數;其中該控制單元根據該延遲參數與該延遲級數,產生一除頻延遲級數至該延遲單元,使該延遲單元據以對該輸出訊號進行延遲處理,產生該延遲參考訊號。
- 如請求項1所述之頻率合成器,其中該鎖相迴路包含有:一相頻偵測器,用來接收該延遲參考訊號與該回授除頻訊號,並據以產生一相位誤差訊號;一電荷泵,用來根據該相位誤差訊號,產生一控制電壓訊號;一迴路濾波器,用來對該控制電壓訊號進行濾波,以產生一濾波訊號;以及一壓控振盪器,用來根據該濾波訊號,產生該輸出訊號。
- 如請求項1所述之頻率合成器,其中該延遲參數為一延遲相角,該除頻參數為一除頻倍率。
- 如請求項1所述之頻率合成器,其中該控制單元根據該目標倍率與一延遲設定值,產生該延遲參數與該除頻參數,其中於每一時間區間中,該目標倍率與該延遲設定值之差值等於一計數值,下一時間區間之該延遲設定值等於該計數值之小數部分與1相減後之絕對值,下一時間區間之該延遲參數等於目前時間區間與下一時間區間之延遲設定值之差值,且下一時間區間之該除頻參數等於該計數值之無條件進位數值。
- 如請求項4所述之頻率合成器,其中該延遲設定值之初始值為0。
- 如請求項1所述之頻率合成器,其中該目標倍率係大於1。
- 如請求項1所述之頻率合成器,其中該目標倍率係為一非整數。
- 如請求項1所述之頻率合成器,其中該除頻器為一可變除頻器。
- 一種頻率合成器,包含有:一鎖相迴路,用來接收一參考訊號,並根據該參考訊號與一回授延遲訊號,產生一輸出訊號;一控制單元,用來根據一目標倍率,產生一延遲參數與一除頻參 數;一除頻器,用來根據該除頻參數,對該輸出訊號進行除頻處理,以產生一除頻訊號;一延遲單元,用來根據該延遲參數,對該除頻訊號進行延遲處理,以產生該回授延遲訊號;以及一延遲鎖定迴路,用來根據該輸出訊號,產生一延遲級數;其中該控制單元根據該延遲參數與該延遲級數,產生一除頻延遲級數至該延遲單元,使該延遲單元據以對該除頻訊號進行延遲處理,以產生該回授延遲訊號。
- 如請求項9所述之頻率合成器,其中該鎖相迴路包含有:一相頻偵測器,用來接收該參考訊號與該回授延遲訊號,並據以產生一相位誤差訊號;一電荷泵,用來根據該相位誤差訊號,產生一控制電壓訊號;一迴路濾波器,用來對該控制電壓訊號進行濾波,以產生一濾波訊號;以及一壓控振盪器,用來根據該濾波訊號,產生該輸出訊號。
- 如請求項9所述之頻率合成器,其中該延遲參數為一延遲相角,該除頻參數為一除頻倍率。
- 如請求項9所述之頻率合成器,其中該控制單元根據該目標倍率與一延遲設定值,產生該延遲參數與該除頻參數,其中於每一時 間區間中,該目標倍率與該延遲設定值之和等於一計數值,下一時間區間之該延遲設定值等於該計數值之小數部分之值,下一時間區間之該延遲參數等於目前時間區間與下一時間區間之延遲設定值之差值,且下一時間區間之該除頻參數等於該計數值之無條件進位數值。
- 如請求項12所述之頻率合成器,其中該延遲設定值之初始值為0。
- 如請求項9所述之頻率合成器,其中該目標倍率係大於1。
- 如請求項9所述之頻率合成器,其中該目標倍率係為一非整數。
- 如請求項9所述之頻率合成器,其中該除頻器為一可變除頻器。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW101110549A TWI456906B (zh) | 2012-03-27 | 2012-03-27 | 頻率合成器 |
US13/681,405 US8587353B2 (en) | 2012-03-27 | 2012-11-19 | Frequency synthesizer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW101110549A TWI456906B (zh) | 2012-03-27 | 2012-03-27 | 頻率合成器 |
Publications (2)
Publication Number | Publication Date |
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TW201340616A TW201340616A (zh) | 2013-10-01 |
TWI456906B true TWI456906B (zh) | 2014-10-11 |
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Family Applications (1)
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TW101110549A TWI456906B (zh) | 2012-03-27 | 2012-03-27 | 頻率合成器 |
Country Status (2)
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US (1) | US8587353B2 (zh) |
TW (1) | TWI456906B (zh) |
Families Citing this family (1)
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US10148272B2 (en) * | 2017-05-03 | 2018-12-04 | Ping-Ying Wang | Frequency generating circuit using quartz crystal resonator |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
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US5905388A (en) * | 1995-01-06 | 1999-05-18 | X Integrated Circuits B.V. | Frequency synthesizer |
TW200803178A (en) * | 2006-04-28 | 2008-01-01 | Motorola Inc | Phase offset control phase-frequency detector |
US7675328B2 (en) * | 2006-07-28 | 2010-03-09 | Fujitsu Limited | Phase detection apparatus and phase synchronization apparatus |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
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KR100543925B1 (ko) * | 2003-06-27 | 2006-01-23 | 주식회사 하이닉스반도체 | 지연 고정 루프 및 지연 고정 루프에서의 클럭 지연 고정방법 |
JP4252561B2 (ja) * | 2005-06-23 | 2009-04-08 | 富士通マイクロエレクトロニクス株式会社 | クロック発生回路及びクロック発生方法 |
US7498856B2 (en) * | 2005-12-05 | 2009-03-03 | Realtek Semiconductor Corporation | Fractional-N frequency synthesizer |
KR100784907B1 (ko) * | 2006-06-30 | 2007-12-11 | 주식회사 하이닉스반도체 | Dll 회로 및 그 제어 방법 |
KR100871640B1 (ko) * | 2007-03-30 | 2008-12-02 | 주식회사 하이닉스반도체 | 반도체 메모리 장치 및 그 구동방법 |
US8644441B2 (en) * | 2007-11-15 | 2014-02-04 | Mediatek Inc. | Clock generators and clock generation methods thereof |
KR100940849B1 (ko) * | 2008-08-08 | 2010-02-09 | 주식회사 하이닉스반도체 | 반도체 집적 회로 및 그 제어 방법 |
KR101046274B1 (ko) * | 2010-03-29 | 2011-07-04 | 주식회사 하이닉스반도체 | 클럭지연회로 |
KR101083639B1 (ko) * | 2010-03-29 | 2011-11-16 | 주식회사 하이닉스반도체 | 반도체 장치 및 그 동작 방법 |
US8373462B2 (en) * | 2011-05-19 | 2013-02-12 | Nanya Technology Corp. | Delay lock loop and delay lock method |
KR101923023B1 (ko) * | 2011-08-10 | 2018-11-28 | 에스케이하이닉스 주식회사 | 지연고정루프 |
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2012
- 2012-03-27 TW TW101110549A patent/TWI456906B/zh active
- 2012-11-19 US US13/681,405 patent/US8587353B2/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5905388A (en) * | 1995-01-06 | 1999-05-18 | X Integrated Circuits B.V. | Frequency synthesizer |
TW200803178A (en) * | 2006-04-28 | 2008-01-01 | Motorola Inc | Phase offset control phase-frequency detector |
US7675328B2 (en) * | 2006-07-28 | 2010-03-09 | Fujitsu Limited | Phase detection apparatus and phase synchronization apparatus |
Also Published As
Publication number | Publication date |
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TW201340616A (zh) | 2013-10-01 |
US20130257496A1 (en) | 2013-10-03 |
US8587353B2 (en) | 2013-11-19 |
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