TWI451504B - 在浸漬過程中使用回流底填組合物施於焊接點之製造半導體封裝或電路總成之方法 - Google Patents

在浸漬過程中使用回流底填組合物施於焊接點之製造半導體封裝或電路總成之方法 Download PDF

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TWI451504B
TWI451504B TW098108969A TW98108969A TWI451504B TW I451504 B TWI451504 B TW I451504B TW 098108969 A TW098108969 A TW 098108969A TW 98108969 A TW98108969 A TW 98108969A TW I451504 B TWI451504 B TW I451504B
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curable composition
reflow
composition
solder joints
container
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TW200949964A (en
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Chew B Chan
Qing Ji
Mark Currie
Neil Poole
Geraldine Kelly
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Henkel Corp
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Description

在浸漬過程中使用回流底填組合物施於焊接點之製造半導體封裝或電路總成之方法
本發明係關於在浸漬過程中使用回流底填組合物施於焊接點之製造半導體封裝或電路總成之方法。
半導體晶片藉由焊接點與基板接合之半導體裝置總成可使用底填密封材料填充半導體晶片與基板之間的間隙以幫助吸收應力及衝擊。
施用底填密封材料之習知方法包括毛細流動底填材料、不流動底填材料及晶圓用底填材料。
迄今，不存在浸漬過程中施用之底填密封材料，更不用說具有回流能力之材料。目前為止亦如此。
在一態樣中，本發明提供製造半導體封裝之方法，其步驟包括：
a.向容器中分配用作回流底填組合物之可固化組合物；
b.調節該可固化組合物在該容器內之高度；
c.提供附接有一或多個焊接點之半導體晶片且將該晶片相對於該容器安置以使得焊接點的至少一部分穿透可固化組合物從而在穿透可固化組合物之彼焊接點部分上提供塗層；
d.在電路板或載體基板上以定距離間隔之關係放置附接有一或多個其上具有可固化組合物塗層之焊接點的半導體晶片，以在其間界定間隙且形成半導體封裝總成；及
e.使該半導體封裝總成經受足以使間隙內之一或多個焊接點回焊且使可固化組合物固化之條件，其中該一或多個焊接點在該間隙內接觸該電路板或該載體基板。
在一可選步驟中，預期向容器中分配額外量之可固化組合物及/或調節可固化組合物在容器內之高度以確保存在適當量之可固化組合物以供塗覆一或多個焊接點。
在另一態樣中，本發明提供藉由使用一組合物提供回流及底填之方法，其步驟包括：
a.提供附接有一或多個焊接點之半導體晶片；
b.將回流底填組合物分配於焊接點的至少一部分上以在其上形成塗層；
c.在電路板或載體基板上放置附接有一或多個具有回流底填組合物塗層之焊接點的半導體晶片，以在其間建立電互連且形成總成，及
d.使該總成曝露於足以使該回流底填組合物固化之高溫條件。
因此，藉由此等方法將半導體裝置(諸如，附接有一或多個焊接點之半導體晶片)放置於載體基板或電路板上，且當裝置通過回焊時，回流底填組合物提供形成焊接點必需之作用且回流底填組合物之熱固性樹脂囊封焊料球，提供額外支撐及保護。因為此等方法允許焊接點形成及球體囊封，所以可實現較大方法最佳化。可消除傳統毛細流動底填所需之設備及時間且可顯著提高產量。
因此如上文所述，在一態樣中，本發明提供製造半導體封裝之方法，其步驟包括：
a.向容器中分配用作回流底填組合物之可固化組合物；
b.調節該可固化組合物在該容器內之高度；
c.提供附接有一或多個焊接點之半導體晶片且將該晶片相對於該容器安置以使得焊接點的至少一部分穿透可固化組合物從而在穿透可固化組合物之彼焊接點部分上提供塗層(合意地，焊接點應接收介於其直徑或高度的25%與80%之間的組合物塗層)；
d.在電路板或載體基板上以定距離間隔之關係放置附接有一或多個其上具有可固化組合物塗層之焊接點的半導體晶片，以在其間界定間隙且形成半導體封裝總成；及
e.使該半導體封裝總成經受足以使間隙內之一或多個焊接點回焊且使可固化組合物固化之條件，其中該一或多個焊接點在該間隙內接觸該電路板或該載體基板。
在一可選步驟中，預期向容器中分配額外量之可固化組合物及/或調節可固化組合物在容器內之高度以確保存在適當量之可固化組合物以供塗覆一或多個焊接點。焊接點意謂焊盤、焊球、焊料球或其他焊料電互連。
在另一態樣中，本發明提供藉由使用一組合物提供回流及底填之方法，其步驟包括：
a.提供附接有一或多個焊接點之半導體晶片；
b.將回流底填組合物分配於焊接點的至少一部分上以在其上形成塗層；
c.在電路板或載體基板上放置附接有一或多個其上具有回流底填組合物塗層之焊接點的半導體晶片，以在其間建立電互連且形成總成，及
d.使該總成曝露於足以使該回流底填組合物固化之高溫條件。
在另一態樣中，本發明提供製造電路總成之方法，其包含以下步驟：
a.向容器中分配用作回流底填組合物之可固化組合物；
b.調節該可固化組合物在該容器內之高度；
c.提供附接有一或多個焊接點之半導體封裝，且將該封裝相對於該容器安置，以使得該(等)焊接點的至少一部分穿透該可固化組合物，從而在穿透該可固化組合物之彼焊接點部分上提供塗層；
d.在電路板或載體基板上以定距離間隔關係放置附接有一或多個其上具有可固化組合物塗層之焊接點的半導體封裝，而在其間界定間隙且形成電路總成；及
e.使該電路總成經受足以使間隙內之一或多個焊接點回焊且使該可固化組合物固化之條件，其中該一或多個焊接點在該間隙內接觸該電路板或該載體基板；及
f.視情況將額外量之可固化組合物分配至該容器中，及/或調節該可固化組合物在該容器內之高度。
本發明之熱固性樹脂可包括(例如)任何常見環氧樹脂，儘管環氧樹脂應包括芳族環氧樹脂與脂族環氧樹脂之組合。
合適環氧樹脂一般包括(但不限於)多價酚(例如鄰苯二酚；間苯二酚；對苯二酚；4,4'-二羥基二苯基甲烷；4,4'-二羥基-3,3'-二甲基二苯基甲烷；4,4'-二羥基二苯基二甲基甲烷；4,4'-二羥基二苯基甲基甲烷；4,4'-二羥基二苯基環己烷；4,4'-二羥基-3,3'-二甲基二苯基丙烷；4,4'-二羥基二苯基碸；參(4-羥基苯基)甲烷)之聚縮水甘油醚；上述二酚之氯化及溴化產物的聚縮水甘油醚；酚醛清漆之聚縮水甘油醚(亦即，一元酚或多元酚與醛、甲醛，尤其是在酸催化劑存在下之反應產物)；藉由使以1mol二鹵烷烴或二鹵素二烷基來醚酯化2mol芳族氫羧酸之鈉鹽獲得之2mol二酚醚酯化而獲得之二酚的聚縮水甘油醚(參見英國專利第1,017,612號，其揭示內容以引用的方式明確併入本文中)；及藉由使酚與含有至少兩個鹵素原子之長鏈鹵素鏈烷烴縮合而獲得之多酚的聚縮水甘油醚(參見英國專利第1,024,288號，其揭示內容以引用的方式明確併入本文中)。
其他合適環氧基化合物包括基於芳族胺(諸如N,N'-二縮水甘油基-苯胺；N,N'-二甲基-N,N'-二縮水甘油基-4,4'-二胺基二苯基甲烷；N,N,N',N'-四縮水甘油基-4,4'-二胺基二苯基甲烷；N-二縮水甘油基-4-胺基苯基縮水甘油醚；及雙-4-胺基苯甲酸N,N,N',N'-四縮水甘油基-1,3-伸丙酯)及表氯醇之聚環氧化合物。
多官能環氧樹脂之特別合意實例包括雙酚A型環氧樹脂、雙酚F型環氧樹脂、酚醛型環氧樹脂及甲酚醛型環氧樹脂。
適用於本文中之環氧樹脂為酚系化合物之聚縮水甘油基衍生物，諸如可以商品名EPON 828、EPON 1001、EPON 1009及EPON 1031自Resolution Performance Co.購得者；以DER 331、DER 332、DER 334及DER 542自Dow Chemical Co.購得者；以RE-310-S、RE-404-S及BREN-S自Nippon Kayaku,Japan購得者。其他合適環氧樹脂包括由多元醇及其類似物與酚-甲醛酚醛清漆之聚縮水甘油基衍生物製備之聚環氧化物，酚-甲醛酚醛清漆之聚縮水甘油基衍生物可以商品名DEN 431、DEN 438及DEN 439自Dow Chemical Co.購得。甲酚類似物亦可以ECN 1235、ECN 1273及ECN 1299自Vantico,Inc購得。SU-8為自Interez,Inc購得之雙酚A型環氧酚醛清漆。胺、胺基醇及聚羧酸之聚縮水甘油基加合物亦適用於本發明，其市售樹脂包括來自F.I.C. Corporation的GLYAMINE 135、GLYAMINE 125及GLYAMINE 115；來自Vantico之ARALDITE MY-720、ARALDITE MY-721、ARALDITE MY-722、ARALDITE 0500及ARALDITE 0510；及來自Sherwin-Williams Co之PGA-X及PGA-C。
脂族環氧樹脂包括脂環及環脂族環氧樹脂，其市售實例包括Dow's ERL 4221及Daicel's Celoxide 2021。
合意地，環氧樹脂包括雙酚F環氧樹脂及環脂族環氧樹脂之組合。
回流底填組合物除了環氧樹脂組份之外亦包括酸性回流組份。酸性回流組份應包括二羧酸，合意地至少兩種羧酸，其中至少一者為二羧酸。舉例而言，戊二酸及單環C21 二羧酸為組合使用之適當選擇。
酸性回流組份應以總組合物計總共40重量百分比之量存在，或分別以戊二酸及單環C21 二羧酸的5-18重量百分比至20-40重量百分比之量存在。
酸性回流組份初始用於向一或多個焊接點提供回流且接著用於使該熱固性樹脂固化。
組合物亦包括催化劑，諸如基於鋅之催化劑，如辛酸鋅、磷酸鋅、環烷酸鋅或新癸酸鋅，或基於鉍之催化劑，如羧酸鉍。
催化劑應以0.5至3重量百分比範圍內之量使用。
亦可使用反應性稀釋劑，其市售實例可自CVC Chemicals獲得，包括鄰甲苯酚基縮水甘油醚(GE-10)、對第三丁基苯基縮水甘油醚(GE-11)、新戊二醇二縮水甘油醚(GE-20)、1,4-丁二醇二縮水甘油醚(GE-21)及環己烷二甲醇縮水甘油醚(GE-22)。可自CVC購得之其他反應性稀釋劑包括蓖麻油三縮水甘油醚(GE-35)及丙氧基化甘油三縮水甘油醚(GE-36)。合意地，組合物實質上不含溶劑或非反應性稀釋劑，其由在加工期間實際上無揮發性有機化合物蒸發表明。組合物在室溫下的流變性因此應介於1000至6000cps之間。該等蒸發可影響流變學且亦使最終用戶曝露於有害揮發性化學品中。然而，對於某些加工應用(諸如噴射或噴霧)而言，可藉由添加溶劑使組合物黏度降低。
組合物中可包括回流活化劑。向習知無流動底填中添加之回流活化劑傾向於使底填中之環氧樹脂組份過早固化。此處，回流活化劑不會不利影響組合物之穩定性。此等回流活化劑之實例包括三苯基氧化膦、咪唑及反式-2,3-二溴-2-丁烯-1,4-二醇，其通常適於以小於500ppm之量使用。
此外，組合物中可包括染料或賦色組份以供光學檢測。參見國際專利公開案第WO 2009/013210號。更特定言之，賦色組份具有適當顏色以便於光學偵測應用回流之組份的回流。賦色組份可為任何合適類型且包括染料或著色劑。顏色可由材料之螢光特性產生。一準則為給定之賦色劑在組合物中展現適當溶解度。諸如染料之合適賦色劑可選自偶氮、重氮、三芳基甲烷、二苯并哌喃、碸酞、吖啶、喹啉、嗪、噁嗪、蒽醌及靛藍染料，如(例如)美國專利第6,241,385號中所述。
合意地，在利用紅光源之偵測方法中，賦色劑將包含藍、綠或紫色染料，更合意地為藍色染料。該等材料可選自Orasol Navy BlueTM 、Janus GreenTM 、甲基紫、專利藍、Victoria blue RTM 、結晶紫、Irgalith Blue TNCTM 、Irgalith Magenta TCBTM 、Erythrosin extra bluishTM 、氯酚藍、溴酚藍、Savinyl blue BTM 、Orasol blue BLNTM 、若杜林紫(Rhoduline violet)、頻哪氰醇氯、頻哪氰醇溴、頻哪氰醇碘、Solophenyl Brilliant Blue BLTM 、Nile blue ATM 、GallocyaninTM 、Gallamine BlueTM 、天青石藍、亞甲基藍、Thinonin甲苯胺藍O、亞甲基綠及Azure A/B/CTM 、Savinyl Green BTM 、Savinyl Blue RS、D+C Green 6TM 、Blue VIF OrganolTM 、Celliton Blue ExtraTM 、Alizarin Blue STM 、硝基耐曬綠GSB、茜素紅、油溶品藍N、Solvay PurpleTM 及其組合，如美國專利第6,241,385號中所述。
合意地，在利用紅光源之偵測方法中，賦色劑將包含藍色、綠色或紫色染料，其可選自一或多種基於蒽醌之化合物。適當選擇此組份顯著促進藉由光學方式檢測回流。此藉由在自動拾放設備中與照明光源協同相互作用使得回流呈黑色而實現。舉例而言，若照明光源為紅色，則藍色賦色組份較佳。可排除對可靠焊接而言回流不足之組份。或者，若照明光源本質上為紫外光(UV)，則可以類似方式利用適當的發螢光賦色組份(其為發螢光組份)。若發螢光賦色劑在該回流介質中展現適當溶解度，則合適的螢光染料可(例如)選自雙苯并噁唑基化合物、苝、蒽、靛藍及硫靛藍、咪唑、萘二甲醯亞胺、二苯并哌喃、硫代二苯并哌喃、香豆素及若丹明(rhodamine)。合意地，賦螢光劑將係選自一或多種基於雙苯并噁唑基之化合物，諸如2,5-雙(5'-第三丁基-2-苯并噁唑基)噻吩。
本發明組合物(不管係呈回流底填或回流焊膏之形式)亦提供優於焊接之良好生強度，且因此提供堅固焊接點。因此，其賦予可歸因於良好回流的各種特性，例如自PCB或其他基板上之金屬表面移除氧化物層，且保護清潔接合表面不被氧化直至進行焊接為止。此提供改良之金屬間接點。
可使用本文所述之本發明方法組裝半導體封裝。
舉例而言，將具有與其一表面附接之焊接點的半導體封裝(諸如，CSP/BGA)浸入回流底填組合物之容器中，直至至少部分覆蓋焊接點表面之程度。接著將與半導體封裝表面附接之經回流底填塗覆之焊接點對準，且放置於載體基板(例如，電路板)上方並放置於其上，且曝露於焊料回焊條件以產生半導體總成。舉例而言，熱流(以W/g為單位)在恰好低於100℃時開始增加，且在約193℃下達到最大值。
藉此，藉由回流底填組合物本身使焊接點活化，且在回焊過程中可發生半導體封裝的自身對準。重要地是，不需要回焊後黏著加工。此顯著地節省加工之時間、勞動量及成本，此將提高產量。
電路板可由Al2 O3 、SiN3 及莫來石(mullite，Al2 O3 -SiO2 )之陶瓷基板；耐熱樹脂基板或條帶，諸如聚醯亞胺；玻璃強化環氧樹脂或苯并噁嗪；通常亦用作電路板之ABS及酚系基板；及其類似物建構。為便於連接，可將電極成形為凸塊形式。
焊接點可由多種金屬建構，諸如Pb、Sn、Ag、Cu、Bi、Ni、Ge、Sb、Zn、Ga、Al及其組合、混合物及合金。舉例而言，當使用時，Pb可以30重量百分比至99重量百分比之量存在於合金中，其餘為Sn及/或Ag。或者，例如，Ag(若存在)可以0.5重量百分比至5重量百分比之量存在於合金中，其餘為Sn、Cu、Ni、Ge、Ga、Al及Sb。更特定言之，以下金屬混合物中之一或多者可適用：
結合此等方法所述之回流底填組合物亦可顯示用於所謂封裝疊加("PoP")法之潛力。在PoP法中，在板總成加工期間將一組份放置於另一組份之上。第一層組份之頂部表面沿周長具有襯墊以便與第二層組份附接。目前PoP組裝者面臨之挑戰為用於第二層封裝之附接法。當前，許多PoP組裝者使用膠黏回流浸漬來附接組份。對本文所述之回流底填組合物而言，在放置前將組份浸入膠黏回流中。當總成通過回焊時，回流活動使焊接點形成。然而，膠黏回流僅促進焊接點形成；未提供其他裝置保護。當使用回流底填組合物替代時，形成互連且焊料球具有囊封之額外保護層。
回流底填組合物可用於多種加工應用中。舉例而言，組合物可適用於環氧回流接點附接，其中焊接點使用組合物與層狀封裝附接。在此應用中，組合物可藉助於噴射/噴霧、針轉移、浸漬(如本文所述)及印刷來分配。
組合物展示改良之工作壽命，通常能經受得住曝露於環境條件(例如，20-30℃，20-70% RH)歷時高達約至少24小時之時期。
組合物亦可再加工，因為封裝在回焊後組裝之後(諸如，在空氣、氮氣及形成氣氛中)，(例如)在發現缺陷之事件中，該部分可在焊接點處拆卸且使用新部分替代。
在一些狀況下，回流底填組合物中可能需要包括焊粉本身。在該等狀況下，將形成回流焊膏。適當焊粉之實例將為上文所述者。如此形成之焊膏可用於電源組之模具附接應用、TIM1應用及浸漿(諸如，用於PoP)中。
因為回流焊膏包括環氧樹脂組份，所以展示與底填組合物的改良相容性，當底填組合物亦含有環氧樹脂組份時尤其如此。
適於與亦為本文所述之方法結合使用的本文所述回流底填組合物在下文中藉助於組份及某些物理特性更詳細例示。
實例
第1-2號樣本闡述於下表1中。
此等樣本之某些物理特性展示於表2中。

Claims (9)

  1. 一種製造半導體封裝之方法，其包含以下步驟：a.將可固化組合物分配至容器中以用作回流底填組合物，該可固化組合物以化學計量關係包含雙酚F環氧樹脂與環脂族環氧樹脂之組合的環氧樹脂組份及酸性回流組份，該酸性回流組份係選自由松香、二羧酸及其組合所組成之群；b.調節該可固化組合物在該容器內之高度；c.提供附接有一或多個焊接點之半導體晶片且將該晶片相對於該容器安置，使得該或該等焊接點的至少一部分穿透該可固化組合物，從而在穿透該可固化組合物之該焊接點部分上提供塗層；d.在電路板或載體基板上，以定距離間隔關係放置附接有一或多個其上具有可固化組合物塗層之焊接點之該半導體晶片，以在其間界定間隙且形成半導體封裝總成；及e.使該半導體封裝總成經受足以使該間隙內之該一或多個焊接點回焊且使該可固化組合物固化之升高溫度條件，其中該一或多個焊接點在該間隙內接觸該電路板或該載體基板；及f.視情況將額外量之該可固化組合物分配至該容器中及/或調節該可固化組合物在該容器內之高度。
  2. 如請求項1之方法，其中該可固化組合物係呈單份式，且在室溫下具有至少24小時之存放期。
  3. 如請求項1之方法，其中該酸性回流組份初始用於向該一或多個焊接點提供回流，且接著用於使該環氧樹脂組份固化。
  4. 如請求項1之方法，其中該可固化組合物在室溫下具有介於1000至6000cp之間的流變性。
  5. 如請求項1之方法，其中該一或多個焊接點係由實質上不含鉛之焊料合金構造。
  6. 一種藉由使用一組合物來提供回流及底填之方法，其步驟包含：a.提供附接有一或多個焊接點之半導體晶片；b.將回流底填組合物分配於該或該等焊接點之至少一部分上，以在其上形成塗層，該回流底填組合物以化學計量關係包含雙酚F環氧樹脂與環脂族環氧樹脂之組合的環氧樹脂組份及酸性回流組份，該酸性回流組份係選自由松香、二羧酸及其組合所組成之群；c.在電路板或載體基板上放置附接有一或多個其上具有回流底填組合物塗層之焊接點之該半導體晶片，以在其間建立電互連且形成總成；及d.使該總成曝露於足以使該回流底填組合物固化之升高溫度條件。
  7. 如請求項6之方法，其中該酸性回流組份初始用於向該一或多個焊接點提供回流，且接著用於使該環氧樹脂組份固化。
  8. 如請求項1之方法，其中該等焊接點係由選自由Sn63-Pb37、Sn10-Pb90、Sn5-Pb95、Sn62-Pb36-Ag2、Sn63-Pb34.5-Ag2-Sb0.5、Sn96.5-Ag3.5、Sn-Ag1-Cu0.5、Sn-Ag2.6-Cu0.6、Sn-Ag3-Cu0.5、Sn-Ag3.2-Cu0.5、Sn-Ag3.5-Cu0.75、Sn-Ag3.8-Cu0.7、Sn-Ag4-Cu0.5、Sn-Ag1-Cu0.5-Ni0.05-Ge、Sn-Ag1.2-Cu0.5-Ni0.02-Ge、Sn-Ag3-Cu0.5-Ni0.05-Ge、CASTIN125® 、CASTIN258® 、CASTIN305® 、Sn91-Zn9、Sn-Zn8-Ag0.5-A10.01-Ga0.1、Sn58-Bi42及SnAg3.8Cu0.7Bi3Ni0.15Sb1.4組成之群的成員所構造。
  9. 一種製造電路總成之方法，其包含以下步驟：a.將可固化組合物分配至容器中用作回流底填組合物，該可固化組合物以化學計量關係包含雙酚F環氧樹脂與環脂族環氧樹脂之組合的環氧樹脂組份及酸性回流組份，該酸性回流組份係選自由松香、二羧酸及其組合所組成之群；b.調節該可固化組合物在該容器內之高度；c.提供附接有一或多個焊接點之半導體封裝且將該封裝相對於該容器安置，使得該或該等焊接點之至少一部分穿透該可固化組合物，從而在穿透該可固化組合物之該焊接點部分上提供塗層；d.在電路板或載體基板上以定距離間隔關係放置附接有一或多個其上具有可固化組合物塗層之焊接點之該半導體封裝，以在其間界定間隙且形成電路總成；及 e.使該電路總成經受足以使該間隙內之該一或多個焊接點回焊且使該可固化組合物固化之升高溫度條件，其中該一或多個焊接點在該間隙內接觸該電路板或該載體基板；及f.視情況將額外量之該可固化組合物分配至該容器中及/或調節該可固化組合物在該容器內之高度。
TW098108969A 2008-03-19 2009-03-19 在浸漬過程中使用回流底填組合物施於焊接點之製造半導體封裝或電路總成之方法 TWI451504B (zh)

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Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI627226B (zh) * 2013-08-02 2018-06-21 美商阿爾發金屬化工公司 用於密封之雙側強化助焊劑
US20170053858A1 (en) * 2015-08-20 2017-02-23 Intel Corporation Substrate on substrate package
DE102016112390B4 (de) 2016-07-06 2021-08-12 Infineon Technologies Ag Lötpad und Verfahren zum Verbessern der Lötpadoberfläche
JP7150232B2 (ja) * 2017-07-03 2022-10-11 株式会社弘輝 フラックス、やに入りはんだ及びソルダペースト

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5514729A (en) * 1993-11-17 1996-05-07 Sophia Systems Co., Ltd. Ultraviolet hardenable, solventless electrically conductive polymeric material
US6395124B1 (en) * 1999-07-30 2002-05-28 3M Innovative Properties Company Method of producing a laminated structure
TW200533714A (en) * 2003-12-16 2005-10-16 Gen Electric Combinations of resin compositions and methods of use thereof
US20060060987A1 (en) * 2004-09-23 2006-03-23 Tian-An Chen High performance amine based no-flow underfill materials for flip chip applications
US20070178244A1 (en) * 2006-01-31 2007-08-02 Denso Corporation Resin coating method and apparatus

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1222076C2 (de) 1962-02-03 1976-01-15 Bayer Ag, 5090 Leverkusen Verfahren zur herstellung von diepoxiden
CH448513A (de) 1963-11-14 1967-12-15 Bayer Ag Verfahren zur Herstellung von geformten Gebilden auf Basis von Epoxydharzen
US5816707A (en) 1994-05-06 1998-10-06 Minnesota Mining And Manufacturing Company Reversible chemical thermometer
US5953814A (en) * 1998-02-27 1999-09-21 Delco Electronics Corp. Process for producing flip chip circuit board assembly exhibiting enhanced reliability
US6528169B2 (en) * 2000-07-06 2003-03-04 3M Innovative Properties Company No-flow flux adhesive compositions
US6576495B1 (en) * 2000-08-30 2003-06-10 Micron Technology, Inc. Microelectronic assembly with pre-disposed fill material and associated method of manufacture
US6578755B1 (en) * 2000-09-22 2003-06-17 Flip Chip Technologies, L.L.C. Polymer collar for solder bumps
US6458472B1 (en) * 2001-01-08 2002-10-01 Henkel Loctite Corporation Fluxing underfill compositions
JP3905363B2 (ja) * 2001-06-28 2007-04-18 ハリマ化成株式会社 封止充填剤用液状エポキシ樹脂組成物
JP3891550B2 (ja) * 2001-10-29 2007-03-14 住友ベークライト株式会社 液状樹脂組成物、半導体装置の製造方法及び半導体装置
US6815831B2 (en) * 2001-12-12 2004-11-09 Intel Corporation Flip-chip device with multi-layered underfill having graded coefficient of thermal expansion
US7047633B2 (en) * 2003-05-23 2006-05-23 National Starch And Chemical Investment Holding, Corporation Method of using pre-applied underfill encapsulant
JP4492326B2 (ja) * 2004-12-06 2010-06-30 住友ベークライト株式会社 液状封止樹脂組成物及びそれを用いた半導体装置
EP2183076A1 (en) 2007-07-23 2010-05-12 Henkel Limited Solder flux

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5514729A (en) * 1993-11-17 1996-05-07 Sophia Systems Co., Ltd. Ultraviolet hardenable, solventless electrically conductive polymeric material
US6395124B1 (en) * 1999-07-30 2002-05-28 3M Innovative Properties Company Method of producing a laminated structure
TW200533714A (en) * 2003-12-16 2005-10-16 Gen Electric Combinations of resin compositions and methods of use thereof
US20060060987A1 (en) * 2004-09-23 2006-03-23 Tian-An Chen High performance amine based no-flow underfill materials for flip chip applications
US20070178244A1 (en) * 2006-01-31 2007-08-02 Denso Corporation Resin coating method and apparatus

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