TWI428068B - Printed circuit board and method for manufacturing same - Google Patents

Printed circuit board and method for manufacturing same Download PDF

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TWI428068B
TWI428068B TW100126254A TW100126254A TWI428068B TW I428068 B TWI428068 B TW I428068B TW 100126254 A TW100126254 A TW 100126254A TW 100126254 A TW100126254 A TW 100126254A TW I428068 B TWI428068 B TW I428068B
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layer
pattern
circuit board
circuit
substrate
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TW201301971A (en
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Feng-Yan Huang
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Zhen Ding Technology Co Ltd
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Description

電路板及其製作方法Circuit board and manufacturing method thereof

本發明涉及印刷電路板製作領域,特別係一種具有電磁遮罩層之電路板及其製作方法。The invention relates to the field of printed circuit board manufacturing, in particular to a circuit board having an electromagnetic shielding layer and a manufacturing method thereof.

印刷電路板因具有裝配密度高等優點而得到廣泛之應用。關於電路板之應用請參見文獻Takahashi, A. Ooki, N. Nagai, A. Akahoshi, H. Mukoh, A. Wajima, M. Res. Lab, High density multilayer printed circuit board for HITAC M-880,IEEE Trans. on Components, Packaging, and Manufacturing Technology, 1992, 15(4): 418-425。Printed circuit boards are widely used due to their high assembly density. For application of the circuit board, please refer to the literature Takahashi, A. Ooki, N. Nagai, A. Akahoshi, H. Mukoh, A. Wajima, M. Res. Lab, High density multilayer printed circuit board for HITAC M-880, IEEE Trans On Components, Packaging, and Manufacturing Technology, 1992, 15(4): 418-425.

當電路板進行工作時,電路板內之導電線路中傳輸之電信號與電子設備中之其他電子元件之間容易產生電磁干擾,從而影響到電子設備之正常工作。因此,在電路板之製作過程中,通常需要在電路板外層線路之表面製作電磁遮罩層,以遮罩電路板內之導電線路與其他電子元件之間之電磁干擾。先前技術中,電路板中之電磁遮罩層通常採用貼合電磁遮罩膜之方式形成。即先按照需要電磁遮罩部分之導電線路圖形之形狀對電磁遮罩膜進行沖型,然後之沖型後得到之與導電線路圖形相對應之電磁遮罩膜藉由手工之方式貼合到電路板之表面。然而,由於在貼合過程中需要手工之進行單個電路板之貼合,導致電路板之生產效率較低,並且容易產生對位精度不準之問題,影響得到之電路板之性能。When the circuit board is working, electromagnetic interference between the electrical signals transmitted in the conductive lines in the circuit board and other electronic components in the electronic device is likely to cause electromagnetic interference, thereby affecting the normal operation of the electronic device. Therefore, in the manufacturing process of the circuit board, it is usually required to make an electromagnetic mask layer on the surface of the outer circuit of the circuit board to shield the electromagnetic interference between the conductive lines in the circuit board and other electronic components. In the prior art, the electromagnetic mask layer in the circuit board is usually formed by laminating an electromagnetic mask film. That is, the electromagnetic shielding film is first punched according to the shape of the conductive circuit pattern of the electromagnetic shielding portion, and then the electromagnetic shielding film corresponding to the conductive circuit pattern obtained by punching is attached to the circuit by hand. The surface of the board. However, since the bonding of a single circuit board is required manually in the laminating process, the production efficiency of the circuit board is low, and the problem of inaccurate alignment accuracy is easily generated, which affects the performance of the obtained circuit board.

有鑑於此,提供一種能夠提升電路板中電磁遮罩層之製作速度和精度之電路板及其製作方法實屬必要。In view of the above, it is necessary to provide a circuit board capable of improving the fabrication speed and accuracy of an electromagnetic mask layer in a circuit board and a method of fabricating the same.

以下將以實施例說明一種電路板及其製作方法。A circuit board and a method of fabricating the same will be described below by way of embodiments.

一種電路板之製作方法,包括步驟:提供具有線路圖形之電路基板,所述線路圖形包括多個接地焊墊及多根導電線路,所述電路基板還包括形成在線路圖形上之覆蓋層,所述覆蓋層內形成有與多個接地焊墊一一對應之多個開口,每個接地焊墊對應從一個開口露出;在所述覆蓋層之表面形成阻擋圖形,所述多個接地焊墊和部分覆蓋層從阻擋圖形內之縫隙露出;藉由濺鍍金屬之方式,在從阻擋圖形露出多個接地焊墊之表面和部分覆蓋層之表面形成電磁遮罩層;以及在所述從阻擋圖形露出多個接地焊墊之表面和部分覆蓋層之表面形成電磁遮罩層表面形成絕緣層。A method for manufacturing a circuit board, comprising the steps of: providing a circuit substrate having a circuit pattern, the circuit pattern comprising a plurality of ground pads and a plurality of conductive lines, the circuit substrate further comprising a cover layer formed on the line pattern, a plurality of openings corresponding to the plurality of ground pads are formed in the cover layer, and each of the ground pads is correspondingly exposed from an opening; a blocking pattern is formed on a surface of the cover layer, the plurality of ground pads and a portion of the cover layer is exposed from the gap in the barrier pattern; an electromagnetic mask layer is formed on a surface of the plurality of ground pads exposed from the barrier pattern and a portion of the cover layer by sputtering metal; and the barrier pattern is formed The surface of the plurality of ground pads and the surface of the partial cover layer are exposed to form an electromagnetic shielding layer surface to form an insulating layer.

一種電路板之製作方法,包括步驟:提供包括多個依次連接之基板單元之電路基板,每個所述電路基板單元形成有線路圖形,所述線路圖形包括多個接地焊墊及多根導電線路,所述基板單元還包括形成在線路圖形上之覆蓋層,所述覆蓋層內形成有與多個接地焊墊一一對應之多個開口,每個接地焊墊對應從一個開口露出;依次在每個基板單元上之所述覆蓋層之表面形成阻擋圖形,所述多個接地焊墊和部分覆蓋層從阻擋圖形內之縫隙露出;藉由濺鍍金屬之方式,依次在所述從每個基板單元上之阻擋圖形露出多個接地焊墊之表面和部分覆蓋層之表面形成電磁遮罩層;依次在所述從阻擋圖形露出多個接地焊墊之表面和部分覆蓋層之表面形成電磁遮罩層表面形成絕緣層,從而將包括多個依次連接之基板單元之電路基板製成包括多個依次連接之電路板單元之電路板;以及沿著每個電路板單元之邊界切割電路板,得到多個分離之電路板單元。A method of manufacturing a circuit board, comprising the steps of: providing a circuit substrate comprising a plurality of sequentially connected substrate units, each of the circuit substrate units being formed with a circuit pattern, the circuit pattern comprising a plurality of ground pads and a plurality of conductive lines The substrate unit further includes a cover layer formed on the circuit pattern, wherein the cover layer is formed with a plurality of openings corresponding to the plurality of ground pads in a one-to-one manner, and each of the ground pads is correspondingly exposed from one opening; Forming a barrier pattern on a surface of the cover layer on each substrate unit, the plurality of ground pads and a portion of the cover layer being exposed from a gap in the barrier pattern; by means of sputtering metal, sequentially in the The barrier pattern on the substrate unit exposes a surface of the plurality of ground pads and a surface of the partial cover layer to form an electromagnetic mask layer; and electromagnetic shielding is formed on the surface of the plurality of ground pads exposed from the barrier pattern and a portion of the cover layer. Forming an insulating layer on the surface of the cover layer, thereby forming a circuit substrate including a plurality of sequentially connected substrate units into a plurality of circuit board units including a plurality of sequentially connected circuit board units Board; and a circuit board unit along the boundary of each of the cutting board, the circuit board unit to obtain a plurality of separation.

一種電路板,所述電路板包括基材層、線路圖形、覆蓋層及電磁遮罩層,所述線路圖形形成於基材層上,並包括多根導電線路及多個用於進行接地之接地焊墊,所述覆蓋層覆蓋於線路圖形上,所述覆蓋層內形成有與多個接地焊墊一一對應之多個開口,使得每個接地焊墊從對應之一個覆蓋層開口中暴露出,所述電磁遮罩層形成於接地焊墊及部分覆蓋層之表面,所述電磁遮罩層藉由濺鍍金屬之方式形成。A circuit board comprising a substrate layer, a wiring pattern, a cover layer and an electromagnetic shielding layer, the circuit pattern being formed on the substrate layer and comprising a plurality of conductive lines and a plurality of grounding for grounding a solder pad, the cover layer covers the circuit pattern, and the cover layer is formed with a plurality of openings corresponding to the plurality of ground pads in a one-to-one manner, such that each of the ground pads is exposed from a corresponding one of the cover openings The electromagnetic shielding layer is formed on a surface of the grounding pad and the partial covering layer, and the electromagnetic shielding layer is formed by sputtering metal.

本技術方案所提供之電路板之製作方法,在形成電磁遮罩層之前,在基板之形成阻擋圖形,在形成電磁遮罩層之後,將阻擋圖形去除,從而使得到之電路板單元中之電磁遮罩層與阻擋圖形互補。這樣,電路板中之電磁遮罩層形成之位置藉由阻擋圖形進行定義,可以保證形成之電磁遮罩層之對位精度。其次,由於電磁遮罩層藉由濺鍍方式形成,具有較好之厚度均勻性。The manufacturing method of the circuit board provided by the technical solution forms a blocking pattern on the substrate before forming the electromagnetic shielding layer, and after the electromagnetic shielding layer is formed, removes the blocking pattern, thereby causing electromagnetic in the circuit board unit The mask layer is complementary to the blocking pattern. In this way, the position at which the electromagnetic mask layer is formed in the circuit board is defined by the blocking pattern, and the alignment accuracy of the formed electromagnetic mask layer can be ensured. Secondly, since the electromagnetic mask layer is formed by sputtering, it has better thickness uniformity.

下面結合附圖及實施例對本技術方案提供之電路板及其製作方法作進一步說明。The circuit board provided by the technical solution and the manufacturing method thereof are further described below with reference to the accompanying drawings and embodiments.

本技術方案提供之電路板之製作方法包括如下步驟:The manufacturing method of the circuit board provided by the technical solution includes the following steps:

第一步,請參閱圖1,提供一個電路基板10,所述電路基板10包括多個依次連接之基板單元100。In a first step, referring to FIG. 1, a circuit substrate 10 is provided. The circuit substrate 10 includes a plurality of substrate units 100 connected in series.

電路基板10為柔性基板,所述電路基板10可以纏繞於卷軸上,本技術方案中之所有步驟可以應用於卷對卷工藝(Roll-to-Roll Process)進行操作。每個基板單元100包括基材層120、線路圖形110和覆蓋層130。線路圖形110形成於基材層120上,線路圖形110包括多根導電線路111及多個用於進行接地之接地焊墊112。每個接地焊墊112之表面形成有鍍層113,鍍層113包括銅鍍層114和形成於銅鍍層114上之鎳金鍍層115。鍍層113之厚度大致為15微米至20微米。覆蓋層130覆蓋於線路圖形110上,覆蓋層130內形成有與多個接地焊墊112一一對應之多個開口131,使得每個接地焊墊112從覆蓋層130露出。覆蓋層130用於覆蓋導電線路111,覆蓋層130可以由膠層和絕緣層組成,其中,膠層貼合於絕緣層和導電線路111之間。覆蓋層130之厚度大致為25微米至30微米。鍍層113之表面低於覆蓋層130之表面。The circuit substrate 10 is a flexible substrate, and the circuit substrate 10 can be wound on a reel. All steps in the technical solution can be applied to a Roll-to-Roll Process. Each of the substrate units 100 includes a substrate layer 120, a wiring pattern 110, and a cover layer 130. The line pattern 110 is formed on the substrate layer 120. The line pattern 110 includes a plurality of conductive lines 111 and a plurality of ground pads 112 for grounding. A surface of each of the ground pads 112 is formed with a plating layer 113 including a copper plating layer 114 and a nickel gold plating layer 115 formed on the copper plating layer 114. The thickness of the plating layer 113 is approximately 15 microns to 20 microns. The cover layer 130 covers the circuit pattern 110, and a plurality of openings 131 corresponding to the plurality of ground pads 112 are formed in the cover layer 130 such that each of the ground pads 112 is exposed from the cover layer 130. The cover layer 130 is used to cover the conductive line 111. The cover layer 130 may be composed of a glue layer and an insulation layer, wherein the glue layer is adhered between the insulation layer and the conductive line 111. The cover layer 130 has a thickness of approximately 25 microns to 30 microns. The surface of the plating layer 113 is lower than the surface of the cover layer 130.

基板單元100可以為單面電路板,也可以為雙面電路板或者多層電路板,亦即,基材層120可以為絕緣層,也可以包括交替排列之導電層和絕緣層。本實施例中,基板單元100為單面電路板,所述基材層120為絕緣層。The substrate unit 100 may be a single-sided circuit board, or may be a double-sided circuit board or a multi-layer circuit board, that is, the base material layer 120 may be an insulating layer, or may include alternating conductive layers and insulating layers. In this embodiment, the substrate unit 100 is a single-sided circuit board, and the substrate layer 120 is an insulating layer.

可以理解,當基板單元100為雙面電路板時,則基板之相對之兩面均形成有線路圖形。當基板單元100為多層電路板時,則基板之相對兩面均形成有線路圖形。另外,電路基板10也可以僅包括一個基板單元100,即每一步驟中僅對一個基板單元進行操作。It can be understood that when the substrate unit 100 is a double-sided circuit board, a circuit pattern is formed on opposite sides of the substrate. When the substrate unit 100 is a multilayer circuit board, a circuit pattern is formed on opposite sides of the substrate. In addition, the circuit substrate 10 may also include only one substrate unit 100, that is, only one substrate unit is operated in each step.

第二步,請參閱圖2,依次在每個基板單元100之表面形成阻擋圖形140,使得每個基板單元100表面不需要形成電磁遮罩層之部分被阻擋圖形140遮蔽,接地焊墊112和部分覆蓋層130之表面從阻擋圖形140內之縫隙露出。In the second step, referring to FIG. 2, a blocking pattern 140 is sequentially formed on the surface of each substrate unit 100 such that a portion of the surface of each substrate unit 100 that does not need to form an electromagnetic mask layer is shielded by the blocking pattern 140, the ground pad 112 and The surface of the partial cover layer 130 is exposed from the gap in the barrier pattern 140.

所述阻擋圖形140可以採用如下方法形成:首先,在每個基板單元100之表面形成覆蓋整個電路基板10表面之阻擋層141。阻擋層141可以採用壓合幹膜之方式形成。阻擋層141也可以採用印刷液態感光油墨之方式形成。然後,在所述阻擋層141進行曝光顯影形成阻擋圖形140,使得電路基板10需要形成電磁遮罩層之部分表面從阻擋圖形140內之縫隙露出。阻擋圖形140之厚度大致為40微米至100微米。本步驟中,接地焊墊112和部分覆蓋層130之表面從阻擋圖形140內之縫隙露出。本步驟可以採用卷對卷工藝進行操作,依次將每個基板單元100之表面形成阻擋圖形。The barrier pattern 140 may be formed by first forming a barrier layer 141 covering the entire surface of the circuit substrate 10 on the surface of each substrate unit 100. The barrier layer 141 can be formed by pressing a dry film. The barrier layer 141 can also be formed by printing a liquid photosensitive ink. Then, the barrier layer 141 is subjected to exposure and development to form the barrier pattern 140 such that a portion of the surface of the circuit substrate 10 where the electromagnetic mask layer needs to be formed is exposed from the slit in the barrier pattern 140. The barrier pattern 140 has a thickness of approximately 40 microns to 100 microns. In this step, the surfaces of the ground pad 112 and the partial cover layer 130 are exposed from the gaps in the barrier pattern 140. This step can be performed by a roll-to-roll process, in which the surface of each substrate unit 100 is sequentially formed into a blocking pattern.

第三步,請一併參閱圖3及圖4,採用濺鍍金屬之方式,在每個基板單元100之阻擋圖形140之表面及從阻擋圖形140內之縫隙露出之接地焊墊112和部分覆蓋層130之表面形成電磁遮罩層150。In the third step, please refer to FIG. 3 and FIG. 4 together, and the surface of the barrier pattern 140 of each substrate unit 100 and the ground pad 112 and partial coverage exposed from the gap in the barrier pattern 140 are sputtered by metal. The surface of layer 130 forms an electromagnetic mask layer 150.

電磁遮罩層150可以採用化學氣相沈積法(CVD)或者物理氣相沈積法(PVD)形成。濺鍍之金屬可以為鋅、鎳、銀、銅或者上述金屬之合金。形成之電磁遮罩層150之厚度為1微米至50微米,優選為1微米至25微米。當採用化學氣相沈積法形成電磁遮罩層150時,控制鍍膜室內之溫度為20攝氏度至2000攝氏度。當採用物理氣相沈積法進行濺鍍時,控制鍍膜室內之真空度為0.001Pa至10Pa,電壓為200V至1000V,濺鍍持續之時間為5分鐘至30分鐘,鍍膜室內之溫度為50攝氏度至500攝氏度。The electromagnetic mask layer 150 may be formed by chemical vapor deposition (CVD) or physical vapor deposition (PVD). The sputtered metal may be zinc, nickel, silver, copper or an alloy of the above metals. The electromagnetic shielding layer 150 is formed to have a thickness of from 1 micrometer to 50 micrometers, preferably from 1 micrometer to 25 micrometers. When the electromagnetic mask layer 150 is formed by chemical vapor deposition, the temperature in the coating chamber is controlled to be 20 degrees Celsius to 2000 degrees Celsius. When the physical vapor deposition method is used for sputtering, the vacuum in the coating chamber is controlled to be 0.001 Pa to 10 Pa, the voltage is 200 V to 1000 V, the sputtering duration is 5 minutes to 30 minutes, and the temperature in the coating chamber is 50 degrees Celsius to 500 degrees Celsius.

在本步驟中,也可以在進行濺鍍時對每個基板單元100不需要形成電磁遮罩層150之區域(即被阻擋圖形140遮蔽之區域)進行遮蔽,使得電磁遮罩層150僅形成於從阻擋圖形140內之縫隙露出之接地焊墊112及部分覆蓋層130之表面。In this step, it is also possible to shield the area where each of the substrate units 100 does not need to form the electromagnetic mask layer 150 (ie, the area blocked by the blocking pattern 140) during sputtering, so that the electromagnetic mask layer 150 is formed only on The surface of the ground pad 112 and the partial cover layer 130 exposed from the gap in the blocking pattern 140.

第四步,請參閱圖5,依次在每個基板單元100上之電磁遮罩層150之表面形成絕緣層160,所述絕緣層160僅覆蓋從阻擋圖形140內之縫隙露出之接地焊墊112及部分覆蓋層130對應之電磁遮罩層150之表面。In the fourth step, referring to FIG. 5, an insulating layer 160 is formed on the surface of the electromagnetic mask layer 150 on each of the substrate units 100, and the insulating layer 160 covers only the ground pads 112 exposed from the gaps in the barrier pattern 140. And a portion of the cover layer 130 corresponding to the surface of the electromagnetic mask layer 150.

絕緣層160僅形成於從阻擋圖形140內之縫隙露出之接地焊墊112及部分覆蓋層130對應之部分電磁遮罩層150之表面,而與阻擋圖形140相對應之部分電磁遮罩層150之表面並不形成有絕緣層。絕緣層160可以藉由塗布或者噴塗液態絕緣材料之方式形成。具體地,絕緣層160可以藉由絲網印刷或者噴墨列印等方式形成。The insulating layer 160 is formed only on the surface of the portion of the electromagnetic mask layer 150 corresponding to the ground pad 112 and the partial cover layer 130 exposed from the gap in the barrier pattern 140, and the portion of the electromagnetic mask layer 150 corresponding to the barrier pattern 140 The surface is not formed with an insulating layer. The insulating layer 160 can be formed by coating or spraying a liquid insulating material. Specifically, the insulating layer 160 may be formed by screen printing or inkjet printing or the like.

第五步,請參閱圖6,依次將每個基板單元100上阻擋圖形140及形成於阻擋圖形140上之電磁遮罩層150去除,得到電路板101,每個基板單元100對應形成一個電路板單元170。In the fifth step, referring to FIG. 6, the blocking pattern 140 on each substrate unit 100 and the electromagnetic mask layer 150 formed on the blocking pattern 140 are sequentially removed to obtain a circuit board 101, and each substrate unit 100 is formed into a circuit board correspondingly. Unit 170.

阻擋圖形140可以採用剝膜之方式去除。設計阻擋圖形140之厚度大於電磁遮罩層150之厚度,阻擋圖形140之部分側面暴露出。即將阻擋圖形140與其對應之化學試劑進行反應,使得阻擋圖形140被化學試劑溶解,從而從電路基板10之表面脫離。當阻擋圖形140之表面上形成有電磁遮罩層150時,阻擋圖形140表面上之電磁遮罩層150也一併被去除。The barrier pattern 140 can be removed by stripping. The thickness of the design barrier pattern 140 is greater than the thickness of the electromagnetic mask layer 150, and portions of the side of the barrier pattern 140 are exposed. The blocking pattern 140 is reacted with its corresponding chemical reagent such that the blocking pattern 140 is dissolved by the chemical agent to be detached from the surface of the circuit substrate 10. When the electromagnetic mask layer 150 is formed on the surface of the barrier pattern 140, the electromagnetic mask layer 150 on the surface of the barrier pattern 140 is also removed.

阻擋圖形140也可以採用機械剝離之方式,將其從每個基板單元100之表面去除。The barrier pattern 140 can also be removed from the surface of each substrate unit 100 by mechanical peeling.

第六步,請參閱圖7,沿著每個電路板單元170之邊界對所述電路電路板101進行切割,從而得到多個分離之電路板單元170。In a sixth step, referring to FIG. 7, the circuit board 101 is cut along the boundary of each of the board units 170 to obtain a plurality of separate board units 170.

本技術方案還提供一種採用上述電路板製作方法制得之電路板,所述電路板為每一個電路板單元170,其包括基材層120、線路圖形110、覆蓋層130、電磁遮罩層150及絕緣層160。線路圖形110形成於基材層120上,線路圖形110包括多根導電線路111及多個用於進行接地之接地焊墊112。每個接地焊墊112之表面形成有鍍層113,鍍層113包括銅鍍層114和形成於銅鍍層114上之鎳金鍍層115。鍍層113之厚度大致為15微米至20微米。覆蓋層130覆蓋於線路圖形110上,覆蓋層130內形成有與多個接地焊墊112一一對應之多個開口131,使得每個接地焊墊112從覆蓋層130露出。電磁遮罩層150形成於接地焊墊112及部分覆蓋層130之表面,絕緣層160形成於電磁遮罩層150上。The technical solution also provides a circuit board which is manufactured by the above-mentioned circuit board manufacturing method, and the circuit board is each circuit board unit 170, which comprises a substrate layer 120, a circuit pattern 110, a cover layer 130, and an electromagnetic mask layer 150. And an insulating layer 160. The line pattern 110 is formed on the substrate layer 120. The line pattern 110 includes a plurality of conductive lines 111 and a plurality of ground pads 112 for grounding. A surface of each of the ground pads 112 is formed with a plating layer 113 including a copper plating layer 114 and a nickel gold plating layer 115 formed on the copper plating layer 114. The thickness of the plating layer 113 is approximately 15 microns to 20 microns. The cover layer 130 covers the circuit pattern 110, and a plurality of openings 131 corresponding to the plurality of ground pads 112 are formed in the cover layer 130 such that each of the ground pads 112 is exposed from the cover layer 130. The electromagnetic mask layer 150 is formed on the surface of the ground pad 112 and the partial cover layer 130, and the insulating layer 160 is formed on the electromagnetic mask layer 150.

在本技術方案中,在形成電磁遮罩層150之前,在每個基板單元100之形成阻擋圖形140,在形成電磁遮罩層150之後,將阻擋圖形140去除。從而使得到之電路板單元170中之電磁遮罩層150與阻擋圖形140互補。這樣,每個電路板單元170中之電磁遮罩層150形成之位置藉由阻擋圖形140進行定義,可以保證形成之電磁遮罩層150之對位精度。其次,由於電磁遮罩層150藉由濺鍍方式形成,具有較好之厚度均勻性。最後,本技術方案提供之電路板製作方法可以採用卷對卷工藝進行操作,可以大大提升電路板製作之效率。In the present technical solution, the barrier pattern 140 is formed on each of the substrate units 100 before the electromagnetic mask layer 150 is formed, and after the electromagnetic mask layer 150 is formed, the barrier pattern 140 is removed. The electromagnetic mask layer 150 in the circuit board unit 170 is thus made complementary to the blocking pattern 140. Thus, the position at which the electromagnetic mask layer 150 in each of the circuit board units 170 is formed is defined by the blocking pattern 140, and the alignment accuracy of the formed electromagnetic mask layer 150 can be ensured. Secondly, since the electromagnetic mask layer 150 is formed by sputtering, it has better thickness uniformity. Finally, the circuit board manufacturing method provided by the technical solution can be operated by a roll-to-roll process, which can greatly improve the efficiency of circuit board fabrication.

惟,以上所述者僅為本發明之較佳實施方式,自不能以此限制本案之申請專利範圍。舉凡熟悉本案技藝之人士援依本發明之精神所作之等效修飾或變化,皆應涵蓋於以下申請專利範圍內。However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Equivalent modifications or variations made by persons skilled in the art in light of the spirit of the invention are intended to be included within the scope of the following claims.

10‧‧‧電路基板10‧‧‧ circuit board

101‧‧‧電路板101‧‧‧ boards

100‧‧‧基板單元100‧‧‧Substrate unit

110‧‧‧線路圖形110‧‧‧ line graphics

111‧‧‧導電線路111‧‧‧Electrical circuit

112‧‧‧接地焊墊112‧‧‧Ground pad

113‧‧‧鍍層113‧‧‧ plating

114‧‧‧銅鍍層114‧‧‧copper plating

115‧‧‧鎳金鍍層115‧‧‧ Nickel gold plating

120‧‧‧基材層120‧‧‧Substrate layer

130‧‧‧覆蓋層130‧‧‧ Coverage

131‧‧‧開口131‧‧‧ openings

140‧‧‧阻擋圖形140‧‧‧block graphics

141‧‧‧阻擋層141‧‧‧Block

150‧‧‧電磁遮罩層150‧‧‧Electromagnetic mask layer

160‧‧‧絕緣層160‧‧‧Insulation

170‧‧‧電路板單元170‧‧‧Circuit unit

圖1係本技術方案提供之基板之剖示圖。FIG. 1 is a cross-sectional view of a substrate provided by the technical solution.

圖2係圖1之基板表面形成阻擋層後之剖視圖。2 is a cross-sectional view showing the surface of the substrate of FIG. 1 after forming a barrier layer.

圖3係圖2之阻擋層經過曝光及顯影形成阻擋圖形後之剖視圖。3 is a cross-sectional view of the barrier layer of FIG. 2 after exposure and development to form a barrier pattern.

圖4係圖3之阻擋圖形表面及從阻擋圖形露出之基板表面形成電磁遮罩層後之剖視圖。4 is a cross-sectional view showing the barrier pattern surface of FIG. 3 and the electromagnetic mask layer formed on the surface of the substrate from which the barrier pattern is exposed.

圖5係在圖4之電磁遮罩層上形成絕緣層後之剖視圖。Figure 5 is a cross-sectional view showing the insulating layer formed on the electromagnetic mask layer of Figure 4.

圖6係圖5去除阻擋圖形後之剖視圖。Figure 6 is a cross-sectional view of Figure 5 with the barrier pattern removed.

圖7係圖6進行切割後得到之電路板單元之剖視圖。Figure 7 is a cross-sectional view of the circuit board unit obtained after cutting in Figure 6.

111‧‧‧導電線路 111‧‧‧Electrical circuit

112‧‧‧接地焊墊 112‧‧‧Ground pad

120‧‧‧基材層 120‧‧‧Substrate layer

130‧‧‧覆蓋層 130‧‧‧ Coverage

150‧‧‧電磁遮罩層 150‧‧‧Electromagnetic mask layer

160‧‧‧絕緣層 160‧‧‧Insulation

170‧‧‧電路板單元 170‧‧‧Circuit unit

Claims (10)

一種電路板之製作方法,包括步驟:
提供具有線路圖形之電路基板,所述線路圖形包括多個接地焊墊及多根導電線路,所述電路基板還包括形成在線路圖形上之覆蓋層,所述覆蓋層內形成有與多個接地焊墊一一對應之多個開口,每個接地焊墊對應從一個開口露出;
在所述覆蓋層之表面形成阻擋圖形,所述多個接地焊墊和部分覆蓋層從阻擋圖形內之縫隙露出;
藉由濺鍍金屬之方式,在從阻擋圖形露出多個接地焊墊之表面和部分覆蓋層之表面形成電磁遮罩層;以及
在所述從阻擋圖形露出多個接地焊墊之表面和部分覆蓋層之表面形成電磁遮罩層表面形成絕緣層。
A method for manufacturing a circuit board, comprising the steps of:
Providing a circuit substrate having a circuit pattern, the circuit pattern comprising a plurality of ground pads and a plurality of conductive lines, the circuit substrate further comprising a cover layer formed on the circuit pattern, wherein the cover layer is formed with a plurality of grounds The solder pads correspond to the plurality of openings one by one, and each of the ground pads is correspondingly exposed from one opening;
Forming a barrier pattern on a surface of the cover layer, the plurality of ground pads and a portion of the cover layer being exposed from a gap in the barrier pattern;
Forming an electromagnetic mask layer on a surface of the plurality of ground pads exposed from the barrier pattern and a surface of the partial cover layer by sputtering metal; and surface and partial coverage of the plurality of ground pads exposed from the barrier pattern The surface of the layer forms an electromagnetic shielding layer surface to form an insulating layer.
如申請專利範圍第1項所述之電路板之製作方法,其中,在形成絕緣層之後,還包括將所述阻擋圖形從電路基板表面去除之步驟。The method of manufacturing a circuit board according to the first aspect of the invention, wherein after the forming the insulating layer, the step of removing the blocking pattern from the surface of the circuit substrate is further included. 如申請專利範圍第2項所述之電路板之製作方法,其中,在濺鍍金屬時,所述電磁遮罩層還形成於阻擋圖形之表面,在去除阻擋圖形時,所述去除所述阻擋圖形時,形成於所述阻擋圖形表面之電磁遮罩層一併去除。The method of manufacturing the circuit board of claim 2, wherein the electromagnetic shielding layer is further formed on a surface of the blocking pattern when the metal is sputtered, and the blocking is removed when the blocking pattern is removed. When the pattern is formed, the electromagnetic mask layer formed on the surface of the barrier pattern is removed together. 如申請專利範圍第1項所述之電路板之製作方法,其中,形成所述電磁遮罩層採用之材料為鋅、鎳、銀、銅或者上述各金屬之合金。The method for fabricating a circuit board according to claim 1, wherein the material for forming the electromagnetic shielding layer is zinc, nickel, silver, copper or an alloy of the above metals. 如申請專利範圍第4項所述之電路板之製作方法,其中,藉由化學氣相沈積法或者物理氣相沈積法形成電磁遮罩層。The method of fabricating a circuit board according to the fourth aspect of the invention, wherein the electromagnetic mask layer is formed by a chemical vapor deposition method or a physical vapor deposition method. 如申請專利範圍第1項所述之電路板之製作方法,其中,所述電磁遮罩層之厚度為1微米至25微米。The method of fabricating a circuit board according to claim 1, wherein the electromagnetic shielding layer has a thickness of 1 micrometer to 25 micrometers. 如申請專利範圍第1項所述之電路板之製作方法,其中,所述阻擋圖形之形成包括如下步驟:
在所述電路基板之表面形成覆蓋整個電路基板表面感光之阻擋層;以及
對所述阻擋層進行曝光及顯影,從而形成阻擋圖形。
The method for manufacturing a circuit board according to claim 1, wherein the forming of the blocking pattern comprises the following steps:
Forming a barrier layer covering the entire surface of the circuit substrate on the surface of the circuit substrate; and exposing and developing the barrier layer to form a barrier pattern.
一種電路板之製作方法,包括步驟:
提供包括多個依次連接之基板單元之電路基板,每個所述電路基板單元形成有線路圖形,所述線路圖形包括多個接地焊墊及多根導電線路,所述基板單元還包括形成在線路圖形上之覆蓋層,所述覆蓋層內形成有與多個接地焊墊一一對應之多個開口,每個接地焊墊對應從一個開口露出;
依次在每個基板單元上之所述覆蓋層之表面形成阻擋圖形,所述多個接地焊墊和部分覆蓋層從阻擋圖形內之縫隙露出;
藉由濺鍍金屬之方式,依次在所述從每個基板單元上之阻擋圖形露出多個接地焊墊之表面和部分覆蓋層之表面形成電磁遮罩層;
依次在所述從阻擋圖形露出多個接地焊墊之表面和部分覆蓋層之表面形成電磁遮罩層表面形成絕緣層,從而將包括多個依次連接之基板單元之電路基板製成包括多個依次連接之電路板單元之電路板;以及
沿著每個電路板單元之邊界切割電路板,得到多個分離之電路板單元。
A method for manufacturing a circuit board, comprising the steps of:
Providing a circuit substrate including a plurality of sequentially connected substrate units, each of the circuit substrate units being formed with a line pattern, the circuit pattern comprising a plurality of ground pads and a plurality of conductive lines, the substrate unit further comprising a line formed a cover layer on the pattern, wherein the cover layer is formed with a plurality of openings corresponding to the plurality of ground pads in a one-to-one manner, and each of the ground pads is correspondingly exposed from the one opening;
Forming a barrier pattern on the surface of the cover layer on each of the substrate units, the plurality of ground pads and a portion of the cover layer being exposed from a gap in the barrier pattern;
Forming an electromagnetic shielding layer on the surface of the plurality of grounding pads and the surface of the partial covering layer by sequentially exposing the blocking pattern on each of the substrate units by means of sputtering metal;
Forming an insulating layer on the surface of the surface of the plurality of grounding pads and the surface of the partial covering layer from the blocking pattern to form an insulating layer, thereby forming the circuit substrate including the plurality of sequentially connected substrate units into a plurality of a circuit board of the connected circuit board unit; and cutting the circuit board along the boundary of each circuit board unit to obtain a plurality of separate circuit board units.
如申請專利範圍第8項所述之電路板之製作方法,其中,所述電路板之製作方法採用卷對卷工藝進行操作。The method for fabricating a circuit board according to claim 8, wherein the method of manufacturing the circuit board is performed by a roll-to-roll process. 一種電路板,所述電路板包括基材層、線路圖形、覆蓋層及電磁遮罩層,所述線路圖形形成於基材層上,並包括多根導電線路及多個用於進行接地之接地焊墊,所述覆蓋層覆蓋於線路圖形上,所述覆蓋層內形成有與多個接地焊墊一一對應之多個開口,使得每個接地焊墊從對應之一個覆蓋層開口中暴露出,所述電磁遮罩層形成於接地焊墊及部分覆蓋層之表面,所述電磁遮罩層藉由濺鍍金屬之方式形成。A circuit board comprising a substrate layer, a wiring pattern, a cover layer and an electromagnetic shielding layer, the circuit pattern being formed on the substrate layer and comprising a plurality of conductive lines and a plurality of grounding for grounding a solder pad, the cover layer covers the circuit pattern, and the cover layer is formed with a plurality of openings corresponding to the plurality of ground pads in a one-to-one manner, such that each of the ground pads is exposed from a corresponding one of the cover openings The electromagnetic shielding layer is formed on a surface of the grounding pad and the partial covering layer, and the electromagnetic shielding layer is formed by sputtering metal.
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