TWI407492B - 非揮發性奈晶記憶體及其製造方法 - Google Patents

非揮發性奈晶記憶體及其製造方法 Download PDF

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Publication number
TWI407492B
TWI407492B TW095100396A TW95100396A TWI407492B TW I407492 B TWI407492 B TW I407492B TW 095100396 A TW095100396 A TW 095100396A TW 95100396 A TW95100396 A TW 95100396A TW I407492 B TWI407492 B TW I407492B
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TW
Taiwan
Prior art keywords
insulating layer
forming
nitrogen content
nitrogen
semiconductor device
Prior art date
Application number
TW095100396A
Other languages
English (en)
Chinese (zh)
Other versions
TW200629383A (en
Inventor
Rajesh A Rao
Ramachandran Muralidhar
Bruce E White
Original Assignee
Freescale Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Freescale Semiconductor Inc filed Critical Freescale Semiconductor Inc
Publication of TW200629383A publication Critical patent/TW200629383A/zh
Application granted granted Critical
Publication of TWI407492B publication Critical patent/TWI407492B/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/69—IGFETs having charge trapping gate insulators, e.g. MNOS transistors
    • H10D30/694—IGFETs having charge trapping gate insulators, e.g. MNOS transistors characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H10D30/697—IGFETs having charge trapping gate insulators, e.g. MNOS transistors characterised by the shapes, relative sizes or dispositions of the gate electrodes having trapping at multiple separated sites, e.g. multi-particles trapping sites
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/68—Floating-gate IGFETs
    • H10D30/6891—Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode
    • H10D30/6893—Floating-gate IGFETs characterised by the shapes, relative sizes or dispositions of the floating gate electrode wherein the floating gate has multiple non-connected parts, e.g. multi-particle floating gate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/031—Manufacture or treatment of data-storage electrodes
    • H10D64/035—Manufacture or treatment of data-storage electrodes comprising conductor-insulator-conductor-insulator-semiconductor structures
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/681—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
    • H10D64/685—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being perpendicular to the channel plane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/693—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Formation Of Insulating Films (AREA)
  • Non-Volatile Memory (AREA)
  • Physical Or Chemical Processes And Apparatus (AREA)
  • Carbon And Carbon Compounds (AREA)
TW095100396A 2005-01-26 2006-01-04 非揮發性奈晶記憶體及其製造方法 TWI407492B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/043,826 US7361567B2 (en) 2005-01-26 2005-01-26 Non-volatile nanocrystal memory and method therefor

Publications (2)

Publication Number Publication Date
TW200629383A TW200629383A (en) 2006-08-16
TWI407492B true TWI407492B (zh) 2013-09-01

Family

ID=36697390

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095100396A TWI407492B (zh) 2005-01-26 2006-01-04 非揮發性奈晶記憶體及其製造方法

Country Status (9)

Country Link
US (1) US7361567B2 (OSRAM)
EP (1) EP1844492B1 (OSRAM)
JP (1) JP4980931B2 (OSRAM)
KR (1) KR101219067B1 (OSRAM)
CN (1) CN101438392A (OSRAM)
AT (1) ATE473515T1 (OSRAM)
DE (1) DE602005022229D1 (OSRAM)
TW (1) TWI407492B (OSRAM)
WO (1) WO2006080999A2 (OSRAM)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
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KR100673205B1 (ko) * 2004-11-24 2007-01-22 주식회사 하이닉스반도체 플래쉬 메모리소자의 제조방법
US20060166435A1 (en) * 2005-01-21 2006-07-27 Teo Lee W Synthesis of GE nanocrystal memory cell and using a block layer to control oxidation kinetics
US7338894B2 (en) * 2005-01-26 2008-03-04 Freescale Semiconductor, Inc. Semiconductor device having nitridated oxide layer and method therefor
JP2007036025A (ja) * 2005-07-28 2007-02-08 Nec Electronics Corp 不揮発性メモリ半導体装置およびその製造方法
US7525149B2 (en) * 2005-08-24 2009-04-28 Micron Technology, Inc. Combined volatile and non-volatile memory device with graded composition insulator stack
TWI289336B (en) * 2005-11-07 2007-11-01 Ind Tech Res Inst Nanocrystal memory component, manufacturing method thereof and memory comprising the same
US7767588B2 (en) * 2006-02-28 2010-08-03 Freescale Semiconductor, Inc. Method for forming a deposited oxide layer
US7773493B2 (en) * 2006-09-29 2010-08-10 Intel Corporation Probe-based storage device
US20080150009A1 (en) * 2006-12-20 2008-06-26 Nanosys, Inc. Electron Blocking Layers for Electronic Devices
US20080150004A1 (en) * 2006-12-20 2008-06-26 Nanosys, Inc. Electron Blocking Layers for Electronic Devices
US8686490B2 (en) * 2006-12-20 2014-04-01 Sandisk Corporation Electron blocking layers for electronic devices
US7847341B2 (en) 2006-12-20 2010-12-07 Nanosys, Inc. Electron blocking layers for electronic devices
US7846793B2 (en) * 2007-10-03 2010-12-07 Applied Materials, Inc. Plasma surface treatment for SI and metal nanocrystal nucleation
US7799634B2 (en) * 2008-12-19 2010-09-21 Freescale Semiconductor, Inc. Method of forming nanocrystals
US7871886B2 (en) 2008-12-19 2011-01-18 Freescale Semiconductor, Inc. Nanocrystal memory with differential energy bands and method of formation
US8021970B2 (en) * 2009-03-20 2011-09-20 Freescale Semiconductor, Inc. Method of annealing a dielectric layer
JP6125846B2 (ja) * 2012-03-22 2017-05-10 株式会社日立国際電気 半導体装置の製造方法、基板処理方法、基板処理装置およびプログラム
CN102709315A (zh) * 2012-05-22 2012-10-03 上海华力微电子有限公司 一种具有锥形能带的be-sonos结构器件及形成方法
CN102709330B (zh) * 2012-05-22 2016-04-27 上海华力微电子有限公司 一种具有低操作电压的be-sonos结构器件及形成方法
US8994006B2 (en) * 2012-10-02 2015-03-31 International Business Machines Corporation Non-volatile memory device employing semiconductor nanoparticles
US8895397B1 (en) 2013-10-15 2014-11-25 Globalfoundries Singapore Pte. Ltd. Methods for forming thin film storage memory cells
US9171858B2 (en) 2013-12-30 2015-10-27 Globalfoundries Singapore Pte. Ltd. Multi-level memory cells and methods for forming multi-level memory cells
US9953841B2 (en) * 2015-05-08 2018-04-24 Macronix International Co., Ltd. Semiconductor device and method of fabricating the same
US11756832B2 (en) * 2019-09-30 2023-09-12 Taiwan Semiconductor Manufacturing Company, Ltd. Gate structures in semiconductor devices
DE102020100099B4 (de) 2019-09-30 2025-09-11 Taiwan Semiconductor Manufacturing Co., Ltd. Gatestrukturen in halbleitervorrichtungen und deren herstellung

Citations (6)

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US6297095B1 (en) * 2000-06-16 2001-10-02 Motorola, Inc. Memory device that includes passivated nanoclusters and method for manufacture
US6320784B1 (en) * 2000-03-14 2001-11-20 Motorola, Inc. Memory cell and method for programming thereof
US6413819B1 (en) * 2000-06-16 2002-07-02 Motorola, Inc. Memory device and method for using prefabricated isolated storage elements
US6444545B1 (en) * 2000-12-19 2002-09-03 Motorola, Inc. Device structure for storing charge and method therefore
TW525263B (en) * 2000-09-28 2003-03-21 Chartered Semiconductor Mfg Formation of interfacial oxide layer at the Si3N4/Si interface by H2/O2 annealing
TW569377B (en) * 2002-03-20 2004-01-01 Taiwan Semiconductor Mfg Improvement method for thickness uniformity of super-thin nitridation gate dielectric

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WO2001099167A2 (en) * 2000-06-16 2001-12-27 Motorola, Inc. Memory device including nanoclusters and method for manufacture
JP2002261175A (ja) * 2000-12-28 2002-09-13 Sony Corp 不揮発性半導体記憶装置およびその製造方法
JP2002231834A (ja) * 2001-02-02 2002-08-16 Ricoh Co Ltd 半導体記憶装置
US6713127B2 (en) * 2001-12-28 2004-03-30 Applied Materials, Inc. Methods for silicon oxide and oxynitride deposition using single wafer low pressure CVD
JP2004207613A (ja) * 2002-12-26 2004-07-22 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
US7338894B2 (en) * 2005-01-26 2008-03-04 Freescale Semiconductor, Inc. Semiconductor device having nitridated oxide layer and method therefor

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6320784B1 (en) * 2000-03-14 2001-11-20 Motorola, Inc. Memory cell and method for programming thereof
US6297095B1 (en) * 2000-06-16 2001-10-02 Motorola, Inc. Memory device that includes passivated nanoclusters and method for manufacture
US6413819B1 (en) * 2000-06-16 2002-07-02 Motorola, Inc. Memory device and method for using prefabricated isolated storage elements
TW525263B (en) * 2000-09-28 2003-03-21 Chartered Semiconductor Mfg Formation of interfacial oxide layer at the Si3N4/Si interface by H2/O2 annealing
US6444545B1 (en) * 2000-12-19 2002-09-03 Motorola, Inc. Device structure for storing charge and method therefore
TW569377B (en) * 2002-03-20 2004-01-01 Taiwan Semiconductor Mfg Improvement method for thickness uniformity of super-thin nitridation gate dielectric

Also Published As

Publication number Publication date
KR101219067B1 (ko) 2013-01-18
CN101438392A (zh) 2009-05-20
EP1844492A2 (en) 2007-10-17
TW200629383A (en) 2006-08-16
KR20070099625A (ko) 2007-10-09
WO2006080999A2 (en) 2006-08-03
EP1844492B1 (en) 2010-07-07
US7361567B2 (en) 2008-04-22
WO2006080999A3 (en) 2009-04-23
JP2008532260A (ja) 2008-08-14
DE602005022229D1 (de) 2010-08-19
JP4980931B2 (ja) 2012-07-18
US20060166452A1 (en) 2006-07-27
ATE473515T1 (de) 2010-07-15
EP1844492A4 (en) 2009-10-21

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