TWI394212B - Substrate structure and manufacturing method thereof - Google Patents

Description

Substrate structure and manufacturing method thereof

The present invention relates to a substrate structure and a method of fabricating the same, and more particularly to a substrate structure having an embedded pattern and a method of fabricating the same.

Please refer to FIG. 1 , which illustrates a schematic structural view of a substrate having a buried line. The conventional substrate structure 100 includes a substrate 102, an insulating layer 104, and a buried wiring layer 106, and has a trench 108. A buried wiring layer 106 is formed in the trench 108. In general, the manner in which the trenches 108 are formed is by laser processing.

However, the processing path of the laser beam is only performed along the uniaxial direction, that is, the Z-axis direction, and the insulating layer 104 cannot be processed to both sides of the Z-axis at the same time, thereby causing the groove width of the groove 108 to follow the groove depth. Shrinking phenomenon. Thus, the groove 108 of the finished groove has a substantially curved surface. The surface area of the grooved bottom surface 110 is limited, so that the electrical quality of the subsequently formed buried wiring layer 106 is not good.

In addition, the laser processing can only perform groove processing on one side of the substrate 102 at a time. After the groove on the surface is completed, the groove can be continuously formed on the other side, which is quite time consuming and inconvenient.

The invention relates to a substrate structure and a manufacturing method thereof, wherein a trench of a buried circuit is formed by plasma etching, so that a bottom surface of the groove of the groove is formed into a plane. Thus, the area of the bottom surface of the groove is increased, so that the subsequently formed buried circuit layer has a relatively large electrical connection surface, which improves the electrical conductivity of the buried circuit layer.

According to the present invention, a substrate structure is proposed comprising a substrate and a first buried wiring layer. The substrate includes a first insulating layer. The first insulating layer has a first trench pattern, and a groove bottom surface of the first trench pattern is a flat surface. The first buried wiring layer is formed in the first trench pattern.

According to the present invention, a method of fabricating a substrate structure is proposed. The manufacturing method includes the following steps. A substrate is provided, the substrate comprising a first insulating layer. A first photomask is provided. A plasma is provided, and a first trench pattern is etched through the first mask on the first insulating layer, and a bottom surface of the first trench pattern is planar. Forming a first buried wiring layer on the first trench pattern.

In order to make the above-mentioned contents of the present invention more comprehensible, a preferred embodiment will be described below, and in conjunction with the drawings, a detailed description is as follows:

In the substrate structure of the present invention and the method of manufacturing the same, the trench of the buried wiring is formed by plasma etching to form a flat surface of the groove of the trench. Thus, the area of the bottom surface of the groove is increased, so that the subsequently formed buried circuit layer has a relatively large electrical connection surface, which improves the electrical quality of the buried circuit layer. The following description is made with two preferred embodiments.

First embodiment

Referring to FIG. 2, a schematic diagram of a substrate structure according to a first embodiment of the present invention is shown. The substrate structure 200 includes a substrate 202 and a first buried wiring layer 206. The substrate 202 has a first surface 208 and includes a first insulating layer 204 and a metal layer 214, such as a copper layer. The first insulating layer 204, such as a dielectric layer, is formed on the first surface 208 and in contact with the metal layer 214. The first insulating layer 204 has a first trench pattern 210, and the first buried wiring layer 206 is formed on the first trench pattern 210.

The first trench pattern 210 of the present embodiment is fabricated by plasma etching. Referring to FIG. 3, an enlarged schematic view of a portion A of the first trench pattern in FIG. 2 is illustrated. In order to clarify the feature of the first trench pattern by plasma etching, the first buried wiring layer 206 of FIG. 2 is omitted in FIG. Since the plasma processing direction is not only the Z-axis direction, but also the first insulating layer 204 is etched in the two directions D1 and D2 of the Z-axis, the slope of the groove sidewall 218 of the first trench pattern 210 is relatively moderate. Moreover, the groove bottom surface 212 of the first groove pattern 210 may be formed into a plane, such that the cross-sectional shape of the first groove pattern 210 may be trapezoidal or even rectangular. Compared with the conventional trench 108 of FIG. 1, the first trench pattern 210 of the present embodiment has a larger trench surface area, which contributes to the electrical quality of the subsequently formed first buried wiring layer 206.

In addition, the first trench pattern 210 exposes a first trench opening 220 on the upper surface 218 of the first insulating layer 204. Under the proper control of the plasma process parameters, the width W1 of the groove bottom surface 212 of the first groove pattern 210 is less than or substantially equal to the width W2 of the first groove opening 220, and the width W1 of the embodiment is three points of the width W2. One is an example. Therefore, the first trench pattern 210 fabricated using the plasma in this embodiment has a larger trench surface area and the slope of the trench sidewall 218 of the first trench pattern 210 is compared to the trench 108 conventionally illustrated in FIG. The degree is also moderate. As such, the first trench pattern 210 enables the subsequently formed first buried wiring layer 206 to have a better electrical quality. In practice, the ratio of the width W1 to the width W2 may depend on the requirements of the electrical quality, the process cost, and the process time. This embodiment is not intended to limit the ratio of the width W1 to the width W2.

In addition, although the first trench pattern 210 of the embodiment does not penetrate the first insulating layer, the first trench pattern of another embodiment may also penetrate the first insulating layer 204. Please refer to FIG. 4 , which illustrates a schematic diagram of a first trench pattern of another embodiment. A portion 226 of the first trench pattern 224 of the first insulating layer 204 penetrates the first insulating layer 204 and exposes a portion 228 of the first surface 208, and a second trench is exposed on the upper surface 216 of the first insulating layer 204. Opening 230. As such, the metal layer 214 can be electrically connected to other levels of circuitry by the portion 226 of the first trench pattern 224.

Since the plasma etching direction is multi-directional, although the plasma cannot etch the metal layer 214 when it hits the metal layer 214, the first insulating layer 204 is further etched on both sides of the Z-axis, so that one part of the first surface 208 The width of 228 is getting wider and wider. Therefore, the width W3 of one portion 228 of the first surface 208 can be close to or equal to the width W4 of the second slot opening 230, which helps to improve the electrical quality of the subsequently formed first buried wiring layer.

Hereinafter, a method of manufacturing a substrate structure according to a first embodiment of the present invention will be described in detail with reference to Fig. 5 in conjunction with Figs. 6A to 6C. Referring to FIG. 5, a flow chart of a method for manufacturing a substrate structure according to a first embodiment of the present invention is shown. The manufacturing method includes the following steps.

First, please refer to FIG. 6A at the same time, which shows a schematic diagram of the substrate of the substrate structure of the first embodiment. In step S502, a substrate 202 is provided. The substrate 202 has a first surface 208 and includes a first insulating layer 204 and a metal layer 214.

Next, please refer to FIG. 6B at the same time, which shows a schematic diagram of the first photomask provided in FIG. 6A. In step S504, a first mask 222 is provided, and the first mask 222 has a hollow pattern 234.

Next, please refer to FIG. 6C at the same time, which shows a schematic diagram of the plasma provided in FIG. 6B. In step S506, a plasma P is provided to pass through the hollow pattern 234 of the first mask 222 to etch the first trench pattern 210 on the first insulating layer 204. The working environment in which this step is completed is in a plasma chamber (not shown).

In addition, after the step S506, the impurities attached to the first trench pattern 210 must be removed (desmear) to facilitate the formation of the first buried wiring layer 206 in the next step S508. The cleaning method is, for example, performed by dry etching using a plasma device. Therefore, after the step S506, the first mask 222 can be removed, and then the plasma attached to the first trench pattern 210 can be removed by using plasma in the same plasma device. Furthermore, in the conventional laser mode, after the groove is completed, it takes time and labor to move the substrate to a plasma device or other wet process device capable of performing a cleaning action, which has affected the whole process. The fluency of the process. In contrast, in this embodiment, after the first mask 222 is removed, the cleaning operation can be directly performed by the original plasma device without changing the device and without moving the substrate 202, so that the entire process becomes equivalent in operation. Smooth, convenient and time saving.

In addition, in step S506, if the etched first trench pattern 210 includes a through portion of FIG. 4, that is, a portion 226 of the first trench pattern 224, the clearing object of course also includes the through portion. .

Then, in step S508, the first buried wiring layer 206 is formed on the first trench pattern 210. The manner in which the first buried wiring layer 206 is formed is, for example, an electroless plating method or a chemical deposition method. So far, the substrate structure 200 as shown in FIG. 2 is completed.

Further, the manufacturing method of another embodiment can also manufacture the first trench pattern 224 as shown in FIG. For example, refer to FIG. 7 and refer to FIG. 8A simultaneously. FIG. 7 is a flow chart of a manufacturing method of another embodiment, and FIG. 8A is a schematic view of a second photomask in the manufacturing method of FIG. Steps S502, S504, S506, and S508 have been described in FIG. 5, and will not be described again here. Here, description will be made from step S702. As shown in FIG. 8A, in step S702, a second mask 232 is provided. The second mask 232 has a hollow pattern 238.

Then, please refer to FIG. 8B at the same time, which shows a schematic diagram of the plasma provided in FIG. 8A. In step S704, the plasma P is supplied through the hollow pattern 238 of the second mask 232, and a through portion penetrating through the first insulating layer 204 is etched on the first insulating layer 204, and the through portion becomes the first trench. One portion 226 of pattern 224. So far, the first groove pattern 224 as shown in FIG. 4 is completed.

Moreover, in general, during the manufacturing process, the substrate 202 is deformed by the force of the process environment, such as pressure, temperature, or the forces generated by the substrate 202. In another embodiment of the fabrication method, a plurality of first reticles can be used to match the deformed dimensions of the substrate 202. For example, please refer to FIG. 9 , which illustrates a schematic diagram of deformation of the substrate of the embodiment. The substrate 202' is the appearance of the deformed substrate 202, and the line size thereon, for example, the size of the line pattern on the metal layer 214 (not shown) is stretched or shortened as the substrate 202' is deformed. There is a deviation from the original size. In this embodiment, a plurality of first masks can be designed. For example, the first masks 236a, 236b, and 236c respectively correspond to portions of different deformation ratios in the substrate 202', for example, corresponding to the substrate 202'. The first portion 202a', the second portion 202b', and the third portion 202c'. The dimensions of the first reticles 236a, 236b, and 236c are designed to match the deformation ratio of the substrate 202' such that the subsequently formed first groove pattern accurately corresponds to the deformed substrate 202'.

Hereinafter, the correspondence relationship between the first photomask 236a and the first portion 202a' of the substrate 202' will be described as an example. Please also refer to FIG. 10, which illustrates a first partial deformation diagram of the substrate of FIG. The first portion 202a' of the substrate 202' is part of the region 202a prior to deformation. The side length L4 of the first portion 202a' of the deformed substrate 202' is the side length L2 before the deformation, so the deformation ratio is L4/L2; and the side length L3 is the side length L1 before the deformation, so the deformation ratio is L3/L1. The first mask 236a of the present embodiment can be designed to match the deformation ratio of the first portion 202a' of the substrate 202'. That is, the hollow pattern on the first mask 236a (the hollow pattern of the first mask 236a is not shown) can be adjusted correspondingly to the deformation ratios L4/L2 and L3/L1, so that the first mask 236a The size of the upper hollow pattern is substantially the same as the size of the deformed first portion 202a' of the substrate 202' to ensure that the subsequently formed first groove pattern can accurately correspond to the deformed substrate 202'. .

Second embodiment

Please refer to FIG. 11 , which is a schematic diagram showing the structure of a substrate according to a second embodiment of the present invention. The second embodiment is different from the first embodiment in that the opposite sides of the substrate structure 300 of the second embodiment have a groove pattern. Other similarities are denoted by the same reference numerals and will not be described again. The features of the substrate structure 300 of the second embodiment will be described in detail below.

The substrate 302 of the substrate structure 300 further includes a metal layer 308, such as a copper layer and a second insulating layer 304. The second insulating layer 304 is formed on the second surface 306 of the substrate 302 and the second insulating layer 304 has a second trench pattern 322, and the second surface 306 is opposite to the first surface 208.

Similar to the first trench pattern 224, the second trench pattern 322 has a hole 320 penetrating through the second insulating layer 304. In addition, the groove bottom surface 310 of the second groove pattern 322 is also a flat surface. The second trench pattern 322 exposes a third trench opening 314 on the upper surface 312 of the second insulating layer 304. The width W6 of the trench bottom surface 310 of the second trench pattern 322 is less than or substantially equal to the third trench opening 314. The width W5, the width W6 of the present embodiment is described by taking one third of the width W5 as an example.

In addition, the substrate structure 300 of the present embodiment has a circuit structure on both sides, and those skilled in the art should understand that the metal layers 214 and 308 can be electrically connected through a common via (not shown). As such, the circuit structure on both sides of the substrate structure 300 can be electrically connected through the through hole, the portion 226 of the first trench pattern 224 of the substrate structure 300, and the hole 320 of the second trench pattern 322.

In addition, although the number of structural layers on both sides of the substrate structure 300 of the present embodiment is described by taking a single layer as an example, those skilled in the art should understand that the substrate structure 300 of the present embodiment can also be fabricated into a double-sided multilayer. structure.

Of course, although a buried wiring layer is not formed on the second trench pattern 322 of FIG. However, it should be apparent to those skilled in the art that a second buried wiring layer (not shown) may also be formed on the second trench pattern 322.

Hereinafter, a method of manufacturing the substrate structure 300 of Fig. 11 will be described in detail with reference to Fig. 12 in conjunction with Figs. 13A to 13B. Referring to FIG. 12, a flow chart of a method of fabricating a substrate structure in accordance with a second embodiment of the present invention is shown. Steps S502, S504, and S508 have been described in the manufacturing method of the first embodiment, and will not be described again. The following is explained starting from step S802.

Please refer to FIG. 13A at the same time, which shows a schematic view of the third reticle in FIG. In step S802, a third mask 316 is provided, and the third mask 316 has a hollow pattern 318. The first mask 222 is disposed adjacent to the first insulating layer 204, and the second mask 232 is disposed adjacent to the second insulating layer 304.

Then, please refer to FIG. 13B at the same time, which shows a schematic diagram of the plasma provided in FIG. 13A. In step S802, the plasma P is simultaneously etched through the hollow pattern 234 of the first mask 222 and the hollow pattern 318 of the third mask 314, and is first etched on the first insulating layer 204 and the second insulating layer 304, respectively. The groove pattern 210 and the second groove pattern 322.

The manner in which the holes 320 are formed is similar to the manner in which the portion 226 of the first groove pattern 224 is formed, which has been described in the above-mentioned FIG. 7, and will not be described again. Then, after the step S508 is completed, the substrate structure 300 of FIG. 11 is completed.

Of course, it should be understood by those skilled in the art that after the step S508, a second buried circuit layer (not shown) may be formed on the second trench pattern 322.

Since the plasma system is distributed throughout the plasma chamber, the first trench pattern 210 and the second trench pattern 322 of the embodiment can be simultaneously formed, which is quite time-saving.

The substrate structure and the manufacturing method thereof disclosed in the above embodiments of the present invention have at least the following advantages:

(1) A groove pattern formed by plasma etching, the groove bottom surface width being substantially equal to the width of the groove opening. As such, the surface area of the trench increases, contributing to the electrical quality of the subsequently formed buried wiring layer.

(2). Without removing the device and without moving the substrate, the desmear action can be performed directly on the original plasma device after removing the mask, which is quite convenient and time-saving.

(3) The reticle forming the groove pattern may be designed in plurality, corresponding to a plurality of portions of different deformation ratios in the deformed substrate, so that the subsequently formed groove pattern accurately corresponds to the deformed substrate .

In conclusion, the present invention has been disclosed in the above preferred embodiments, and is not intended to limit the present invention. A person skilled in the art can make various changes and modifications without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims.

100, 200, 300. . . Substrate structure

102, 202. . . Substrate

104. . . Insulation

106. . . Buried circuit layer

108. . . Trench

110, 212, 310. . . Groove bottom

202’. . . Deformed substrate

202a. . . region

202a’. . . first part

202b’. . . Second part

202c’. . . Part III

204. . . First insulating layer

206. . . First buried circuit layer

208. . . First surface

210, 224. . . First groove pattern

214, 308. . . Metal layer

216. . . Upper surface of the first insulating layer

218. . . Slot sidewall of the first groove pattern

220. . . First slot opening

222, 236, 236a, 236b, 236c. . . First mask

226. . . One part of the first groove pattern

228. . . One part of the first surface

230. . . Second slot opening

232. . . Second mask

234, 238, 318. . . Openwork pattern

304. . . Second insulating layer

306. . . Second surface

322. . . Second groove pattern

312. . . Upper surface of the second insulating layer

314. . . Third slot opening

320. . . hole

D1, D2. . . direction

L1, L2, L3, L4. . . Side length

P. . . Plasma

W1, W2, W3, W4, W5, W6. . . width

Z. . . Axial

FIG. 1 is a schematic view showing the structure of a substrate having a buried line.

2 is a schematic view showing the structure of a substrate in accordance with a first embodiment of the present invention.

FIG. 3 is an enlarged schematic view showing a portion A of the first groove pattern in FIG. 2 .

FIG. 4 is a schematic view showing a first trench pattern of another embodiment.

FIG. 5 is a flow chart showing a method of manufacturing a substrate structure according to a first embodiment of the present invention.

FIG. 6A is a schematic view showing the substrate of the substrate structure of the first embodiment.

FIG. 6B is a schematic view showing the first photomask provided in FIG. 6A.

Figure 6C is a schematic view showing the plasma provided in Figure 6B.

FIG. 7 is a flow chart showing a manufacturing method of another embodiment.

FIG. 8A is a schematic view showing the second photomask in the manufacturing method of FIG. 7.

FIG. 8B is a schematic view showing the plasma provided in FIG. 8A.

FIG. 9 is a schematic view showing the deformation of the substrate of the embodiment.

Figure 10 is a schematic view showing the deformation of the first portion of the substrate of Figure 9.

11 is a schematic view showing the structure of a substrate in accordance with a second embodiment of the present invention.

Figure 12 is a flow chart showing a method of fabricating a substrate structure in accordance with a second embodiment of the present invention.

FIG. 13A is a schematic view showing the third photomask in FIG. 12.

Figure 13B is a schematic view showing the provision of plasma in Figure 13A.

S502-S508. . . step

Claims (11)

A method for fabricating a substrate structure, comprising: providing a substrate, the substrate comprising a first insulating layer, wherein the substrate has a first surface, the first insulating layer is disposed on the first surface; a first mask; a plasma is provided, and a first trench pattern is etched on the first insulating layer through the first mask, wherein a groove bottom surface of the first trench pattern is flat; and a second light is provided And providing the plasma, through the second mask, etching a through portion of the first insulating layer, the through portion being a part of the first trench pattern, the through portion Forming a portion of the first surface on which the first insulating layer is disposed; and forming a first buried wiring layer on the first trench pattern. The manufacturing method of claim 1, wherein the first trench pattern exposes a first slot opening on an upper surface of the first insulating layer, and a width of the bottom surface of the first trench pattern is smaller than Or substantially equal to the width of the first slot opening. The manufacturing method of claim 1, wherein in the step of etching through the second mask, a second slot opening is exposed on the upper surface of the first insulating layer, and the first surface is The width of the portion is less than or substantially equal to the width of the second slot opening. The manufacturing method of claim 1, wherein the step of etching the first trench pattern and forming the first buried line Between the steps of the road layer, the manufacturing method further includes: removing the first mask; and providing the plasma to remove impurities attached to the first trench pattern. The manufacturing method of claim 1, wherein the substrate has a second surface opposite to the first surface and a second insulating layer, and the second insulating layer is formed on the second surface The manufacturing method further includes: providing a third mask; in the step of providing the plasma, the manufacturing method further comprises: etching the plasma through the third mask to etch a second insulating layer a second trench pattern, wherein a bottom surface of the trench pattern is a plane; and the manufacturing method further comprises: forming a second buried wiring layer on the second trench pattern. The manufacturing method of claim 1, wherein in the step of providing the first photomask, the manufacturing method comprises: providing a plurality of first photomasks, one of the first photomasks The dimensions correspond to the deformed dimensions of a portion of the substrate. A substrate structure comprising: a substrate comprising a first insulating layer, the first insulating layer having a first trench pattern, wherein a groove bottom surface of the first trench pattern is a plane, wherein the substrate has a a first surface, the first insulating layer is disposed on the first surface, and one of the first trench patterns partially penetrates the first insulating layer and exposes a portion of the first surface on which the first insulating layer is disposed And a first buried pattern layer formed on the first trench pattern. The substrate structure of claim 7, wherein the first trench pattern exposes a first trench opening on an upper surface of the first insulating layer, and a width of the bottom surface of the first trench pattern is less than Or substantially equal to the width of the first slot opening. The substrate structure of claim 8, wherein a surface of the first insulating layer exposes a second slot opening, the portion of the first surface having a width less than or substantially equal to the second slot opening The width. The substrate structure of claim 7, wherein the substrate has a second surface opposite to the first surface and a second insulating layer, the first insulating layer is formed on the first surface, The second insulating layer is formed on the second surface. The second insulating layer has a second trench pattern. The bottom surface of the second trench pattern is a flat surface. The substrate structure further includes: a second buried layer. The circuit layer is formed in the second trench pattern. The substrate structure of claim 10, wherein the second trench pattern exposes a third slot opening on an upper surface of the second insulating layer, and a width of the bottom surface of the second trench pattern is smaller than Or substantially equal to the width of the third slot opening.