TWI388681B - Divided sputtering target and method of producing the same - Google Patents
Divided sputtering target and method of producing the same Download PDFInfo
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- TWI388681B TWI388681B TW100126732A TW100126732A TWI388681B TW I388681 B TWI388681 B TW I388681B TW 100126732 A TW100126732 A TW 100126732A TW 100126732 A TW100126732 A TW 100126732A TW I388681 B TWI388681 B TW I388681B
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- 238000005477 sputtering target Methods 0.000 title claims abstract description 37
- 238000004544 sputter deposition Methods 0.000 title abstract description 20
- 239000000463 material Substances 0.000 claims abstract description 52
- 239000004065 semiconductor Substances 0.000 claims abstract description 36
- 229910000679 solder Inorganic materials 0.000 claims abstract description 30
- 238000002844 melting Methods 0.000 claims description 32
- 230000008018 melting Effects 0.000 claims description 27
- 238000003466 welding Methods 0.000 claims description 16
- 229910052738 indium Inorganic materials 0.000 claims description 9
- 238000004519 manufacturing process Methods 0.000 claims description 9
- 229910052733 gallium Inorganic materials 0.000 claims description 7
- 229910052718 tin Inorganic materials 0.000 claims description 7
- 229910052782 aluminium Inorganic materials 0.000 claims description 5
- 229910052725 zinc Inorganic materials 0.000 claims description 5
- 229910052802 copper Inorganic materials 0.000 claims description 3
- 229910052746 lanthanum Inorganic materials 0.000 claims description 3
- 238000000034 method Methods 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 229910052727 yttrium Inorganic materials 0.000 claims description 3
- 229910052788 barium Inorganic materials 0.000 claims description 2
- 229910052791 calcium Inorganic materials 0.000 claims description 2
- 229910052719 titanium Inorganic materials 0.000 claims description 2
- 239000010409 thin film Substances 0.000 abstract description 9
- 238000005304 joining Methods 0.000 abstract description 7
- 238000005476 soldering Methods 0.000 abstract description 5
- 238000011109 contamination Methods 0.000 abstract 1
- 239000010949 copper Substances 0.000 description 15
- 239000010408 film Substances 0.000 description 11
- 239000000758 substrate Substances 0.000 description 6
- 229910007541 Zn O Inorganic materials 0.000 description 4
- 238000011156 evaluation Methods 0.000 description 4
- 239000012535 impurity Substances 0.000 description 4
- 125000006850 spacer group Chemical group 0.000 description 4
- 239000000470 constituent Substances 0.000 description 3
- 239000003779 heat-resistant material Substances 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 229910019092 Mg-O Inorganic materials 0.000 description 2
- 229910019395 Mg—O Inorganic materials 0.000 description 2
- 230000002411 adverse Effects 0.000 description 2
- 238000001479 atomic absorption spectroscopy Methods 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 2
- 238000000576 coating method Methods 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 239000000843 powder Substances 0.000 description 2
- 238000007711 solidification Methods 0.000 description 2
- 230000008023 solidification Effects 0.000 description 2
- 229910014472 Ca—O Inorganic materials 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910005191 Ga 2 O 3 Inorganic materials 0.000 description 1
- 239000004372 Polyvinyl alcohol Substances 0.000 description 1
- 229910003077 Ti−O Inorganic materials 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910021417 amorphous silicon Inorganic materials 0.000 description 1
- 239000007864 aqueous solution Substances 0.000 description 1
- 239000011230 binding agent Substances 0.000 description 1
- 238000001354 calcination Methods 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 229910052749 magnesium Inorganic materials 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229920002451 polyvinyl alcohol Polymers 0.000 description 1
- 239000002994 raw material Substances 0.000 description 1
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/34—Sputtering
- C23C14/3407—Cathode assembly for sputtering apparatus, e.g. Target
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02551—Group 12/16 materials
- H01L21/02554—Oxides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02565—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
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- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Organic Chemistry (AREA)
- Materials Engineering (AREA)
- Metallurgy (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Mechanical Engineering (AREA)
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Abstract
Description
本發明係關於接合複數個靶構件所得之分割濺鍍靶，特別係關於靶構件為由氧化物半導體所構成時所適合之分割濺鍍靶。The present invention relates to a split sputtering target obtained by bonding a plurality of target members, and particularly to a split sputtering target suitable for a target member composed of an oxide semiconductor.
近年來，於資訊設備、AV設備、家電製品等各電子零件之製造時常使用濺鍍法，例如液晶顯示裝置等顯示裝置中，薄膜電晶體(簡稱：TFT)等半導體元件係藉由濺鍍法所形成。這是由於以濺鍍法作為以大面積且高精度形成構成透明電極層等之薄膜的製法時極為有效之故。In recent years, sputtering has been frequently used in the manufacture of electronic components such as information equipment, AV equipment, and home electric appliances. For example, in a display device such as a liquid crystal display device, a semiconductor element such as a thin film transistor (abbreviation: TFT) is sputtered. Formed. This is because the sputtering method is extremely effective in the production of a film constituting a transparent electrode layer or the like with a large area and high precision.
另外，最近半導體元件中，係以IGZO(In-Ga-Zn-O)為代表之氧化物半導體取代非晶矽(amorphous silicon)受到矚目。而有關於此氧化物半導體，係計畫利用濺鍍法而成膜氧化物半導體薄膜。但是，濺鍍所使用之氧化物半導體的濺鍍靶之素材為陶瓷，故難以由一個靶構件來構成大面積靶。因此，準備複數個具有一定程度大小之氧化物半導體靶構件，且接合於具有所希望面積之支承板(backing plate)上，藉此而製造大面積之氧化物半導體濺鍍靶。Further, in recent semiconductor devices, an oxide semiconductor typified by IGZO (In-Ga-Zn-O) has been attracting attention as an amorphous silicon. On the other hand, in this oxide semiconductor, it is planned to form a film of an oxide semiconductor film by sputtering. However, since the material of the sputtering target of the oxide semiconductor used for sputtering is ceramic, it is difficult to form a large-area target from one target member. Therefore, a plurality of oxide semiconductor target members having a certain size are prepared and bonded to a backing plate having a desired area, thereby producing a large-area oxide semiconductor sputtering target.
此濺鍍靶之支承板通常使用Cu製之支承板，此支承板與靶構件的接合係使用熱傳導良好之低熔點焊料，例如In系金屬。例如，於製造大面積板狀之半導體氧化物濺鍍靶時，準備大面積之Cu製支承板並將該支承板表面區劃為複數個區塊，並準備複數個具有與該區塊相符合之面積的氧化物半導體靶構件。接著在支承板上配置複數個靶構件，藉由In及Sn系金屬之低熔點焊料，而將全部靶構件接合於支承板。接合時係考慮到Cu與氧化物半導體之熱膨脹的差，而調整配置成使鄰接之靶構件彼此之間於室溫時可產生0.1mm至1.0mm的間隙。The support plate of the sputtering target is usually a support plate made of Cu, and the connection between the support plate and the target member is a low-melting solder having good heat conduction, such as an In-based metal. For example, when manufacturing a large-area plate-shaped semiconductor oxide sputtering target, a large-area Cu-made support plate is prepared and the surface of the support plate is divided into a plurality of blocks, and a plurality of pieces are prepared to conform to the block. An area of an oxide semiconductor target member. Next, a plurality of target members are placed on the support plate, and all of the target members are joined to the support plate by the low melting point solder of In and Sn metal. The bonding is made in consideration of the difference in thermal expansion between Cu and the oxide semiconductor, and is adjusted so that adjacent target members can generate a gap of 0.1 mm to 1.0 mm at room temperature.
使用接合此等複數個氧化物半導體靶構件而得之分割濺鍍靶，並藉由濺鍍而將薄膜成膜且形成半導體元件時，需擔心以下問題：濺鍍處理中，屬於支承板構成材料之Cu亦從靶構件間的間隙被濺鍍，而混入要形成之氧化物半導體之薄膜中。薄膜中的Cu混入量為數ppm程度，但對於氧化物半導體會造成極大影響，例如TFT元件特性中之場效應移動性(field-effect mobility)，與其他部分半導體元件相比，在相當於靶構件間的間隙之位置所形成之半導體元件(混入Cu的薄膜)之場效應移動性有變低的傾向，ON/OFF比亦有降低的傾向。此等缺失被指摘為造成近來邁向大面積化之一大阻礙的原因，現狀係要求儘速提出技術改善。When a sputtering target is obtained by bonding a plurality of oxide semiconductor target members, and a thin film is formed by sputtering to form a semiconductor element, there is a concern that the sputtering board is a supporting material. The Cu is also sputtered from the gap between the target members and mixed into the thin film of the oxide semiconductor to be formed. The amount of Cu mixed in the film is about several ppm, but it has a great influence on the oxide semiconductor, for example, field-effect mobility in the characteristics of the TFT element, which is equivalent to the target member as compared with other semiconductor elements. The field effect mobility of the semiconductor element (film in which Cu is mixed) formed at the position of the gap therebetween tends to be low, and the ON/OFF ratio tends to decrease. These shortcomings have been accused of causing a major obstacle to the recent large-scale, and the status quo requires technical improvements as soon as possible.
[專利文獻1]日本特開2005-232580號公報[Patent Document 1] Japanese Patent Laid-Open Publication No. 2005-232580
本發明係以上述情形為背景而研創者，其目的係提出如下述之分割濺鍍靶：一種大面積之氧化物半導體濺鍍 靶，其係接合複數個氧化物半導體靶構件所得之分割濺鍍靶，其可有效地防止因為被濺鍍而使得支承板的構成材料混入要形成之氧化物半導體的薄膜中。The present invention has been developed in the light of the above circumstances, and its object is to propose a split sputtering target as follows: a large-area oxide semiconductor sputtering The target is a split sputtering target obtained by bonding a plurality of oxide semiconductor target members, which can effectively prevent the constituent material of the support plate from being mixed into the thin film of the oxide semiconductor to be formed due to sputtering.
為了解決上述課題，本發明係藉由低熔點焊材將複數個由氧化物半導體所成之靶構件接合於支承板上而形成之分割濺鍍靶，其中，在接合之靶構件間所形成之間隙，存在有覆蓋支承板表面之低熔點焊材者。本發明中，意圖使接合支承板與靶構件時所使用之低熔點焊材存在於靶構件間所形成之間隙，藉此可使該間隙不會露出支承板的表面，而可有效地防止支承板之構成材料被濺鍍。In order to solve the above problems, the present invention is a split sputtering target formed by bonding a plurality of target members made of an oxide semiconductor to a support plate by a low melting point solder material, wherein a target is formed between the bonded target members. In the gap, there is a low-melting consumable that covers the surface of the support plate. In the present invention, it is intended that a low-melting-point soldering material used for joining the support plate and the target member exists in a gap formed between the target members, whereby the gap can be prevented from being exposed to the surface of the support plate, and the support can be effectively prevented. The constituent materials of the board are sputtered.
本發明之存在於間隙的低熔點焊材較佳為使接合時之低熔點焊材殘存於間隙者。關於間隙之低熔點焊材，係可於間隙充填低熔點焊材，但若為將接合時之低熔點焊材殘存於間隙者，則不需對以往分割濺鍍靶製造步驟做大幅的變更即可適用，故可謂特別有效者。此外，若考慮不易被濺鍍之情形，則存在於間隙之低熔點焊材係以氧化物之狀態優於金屬狀態，且存在於間隙之低熔點焊材的最表面成為氧化物之情形亦佳。It is preferable that the low melting point welding material existing in the gap of the present invention is such that the low melting point welding material at the time of joining remains in the gap. The low-melting-point soldering material for the gap can be filled with a low-melting-point solder material in the gap. However, if the low-melting-point solder material in the joint is left in the gap, the manufacturing step of the conventional split sputtering target does not need to be greatly changed. It is applicable, so it is particularly effective. Further, in the case where it is considered that it is not easily sputtered, the low-melting-point soldering material existing in the gap is superior to the metal state in the state of the oxide, and the outermost surface of the low-melting-point soldering material existing in the gap is preferably an oxide. .
本發明中，分割濺鍍靶構件係以板狀、圓筒狀者為對象。板狀靶構件之對象係為於板狀支承板上平面配置且接合複數個具有方形面之板狀靶構件者。此外，圓筒狀靶構件之對象為：於圓筒狀支承板中貫通複數個圓筒狀靶構件(中空圓柱)，並將其以多段狀配置且接合於圓筒狀支承板之圓柱軸方向者；或是將中空圓柱朝其圓柱軸方向橫切而成的彎曲狀靶構件排列複數個於圓筒狀支承板外側面之圓周方向且予以接合者。此等板狀或圓筒狀分割濺鍍靶係常用於大面積之濺鍍靶裝置。此外，本發明係以板狀、圓筒狀之形狀為對象，但適用於其他形狀之分割濺鍍靶亦無妨，亦無限制靶構件之形狀。In the present invention, the split sputtering target member is intended to be in the form of a plate or a cylinder. The object of the plate-shaped target member is a plate-shaped target member that is disposed in a plane on the plate-shaped support plate and that joins a plurality of plate-shaped target members having a square surface. Further, the cylindrical target member is formed by penetrating a plurality of cylindrical target members (hollow cylinders) in a cylindrical support plate, and arranging them in a plurality of stages and joining them to the cylindrical axis direction of the cylindrical support plate. Or a curved target member in which a hollow cylinder is transversely cut in the direction of the cylindrical axis thereof is arranged in a plurality of circumferential directions on the outer side surface of the cylindrical support plate and joined. These plate or cylindrical split sputtering targets are commonly used for large area sputtering target devices. Further, although the present invention is applied to a plate shape or a cylindrical shape, it is also applicable to a split sputtering target of another shape, and the shape of the target member is not limited.
本發明之低熔點焊材係可使用In、Sn、或含有In、Sn之合金。再者，此低熔點焊材所含Cu之雜質濃度較佳為1質量%以下。其原因為：例如使用含有1.5質量%之雜質Cu之In焊材時，若此In焊材被濺鍍而混入成膜之薄膜中，此時因一同混入之Cu會對於膜特性造成不良影響。The low melting point welding material of the present invention may be made of In, Sn, or an alloy containing In and Sn. Further, the impurity concentration of Cu contained in the low-melting-point solder material is preferably 1% by mass or less. The reason for this is that, for example, when an In-weld material containing 1.5% by mass of impurity Cu is used, if the In-weld material is sputtered and mixed into the film to be formed, Cu which is mixed together at this time adversely affects the film characteristics.
本發明中之低熔點焊材之間隙內之厚度較佳為靶構件間所形成的間隙深度之10至70%。若未達間隙深度之10%，則抑制支承板構成材料濺鍍之效果有降低的傾向，若超過70%，則濺鍍時低熔點焊材被濺鍍而混入成膜之薄膜中的量會變多，而對膜特性造成不良影響。此間隙深度係依據靶構件端部的厚度或是所製造之濺鍍靶整體周邊部之端部的厚度而決定者，且間隙深度係指使用於濺鍍前之製造分割濺鍍靶的初期間隙深度。The thickness in the gap of the low melting point welding material in the present invention is preferably from 10 to 70% of the depth of the gap formed between the target members. If the gap depth is less than 10%, the effect of suppressing the sputtering of the material of the support plate tends to be lowered. When the thickness exceeds 70%, the amount of the low-melting-point solder material being sputtered during sputtering and being mixed into the film formed will be It becomes more and more adversely affects the film properties. The depth of the gap is determined according to the thickness of the end portion of the target member or the thickness of the end portion of the entire peripheral portion of the sputtering target, and the depth of the gap refers to the initial gap used to manufacture the split sputtering target before sputtering. depth.
此外，本發明之氧化物半導體較佳為由含有In、Zn、Ga任一種以上之氧化物所構成者。具體來說可列舉：IGZO(In-Ga-Zn-O)、GZO(Ga-Zn-O)、IZO(In-Zn-O)、ZnO。Moreover, it is preferable that the oxide semiconductor of the present invention is composed of an oxide containing at least one of In, Zn, and Ga. Specific examples thereof include IGZO (In-Ga-Zn-O), GZO (Ga-Zn-O), IZO (In-Zn-O), and ZnO.
此外，本發明之氧化物半導體較佳為由含有Sn、Ti、Ba、Ca、Zn、Mg、Ge、Y、La、Al、Si、Ga任一種以上之氧化物所構成者。具體來說，可列舉：Sn-Ba-O、Sn-Zn-O、Sn-Ti-O、Sn-Ca-O、Sn-Mg-O、Zn-Mg-O、Zn-Ge-O、Zn-Ga-O、Zn-Sn-Ge-O，或是將此等氧化物之Ge變更為Mg、Y、La、Al、Si、Ga之氧化物。Further, the oxide semiconductor of the present invention preferably comprises an oxide containing at least one of Sn, Ti, Ba, Ca, Zn, Mg, Ge, Y, La, Al, Si, and Ga. Specific examples include Sn-Ba-O, Sn-Zn-O, Sn-Ti-O, Sn-Ca-O, Sn-Mg-O, Zn-Mg-O, Zn-Ge-O, and Zn. -Ga-O, Zn-Sn-Ge-O, or the Ge of these oxides is changed to an oxide of Mg, Y, La, Al, Si, Ga.
接著，本發明之氧化物半導體較佳為含有Cu、Al、Ga、In任一種以上之氧化物所成者。具體來說可列舉：Cu2 O、CuAlO2 、CuGaO2 、CuInO2 。Next, the oxide semiconductor of the present invention preferably contains one or more oxides of Cu, Al, Ga, and In. Specific examples thereof include Cu 2 O, CuAlO 2 , CuGaO 2 , and CuInO 2 .
本發明之分割濺鍍靶可由以下方式製造：藉由低熔點焊材將複數個靶構件接合於支承板上，並藉由去除位於接合之靶構件間所形成之間隙的低熔點焊材，使其成為預定量之間隙深度。本發明製造方法不需對以往分割濺鍍靶製造步驟做大幅的變更即可適用，故可非常有效率地實施。通常藉由低熔點焊材將靶構件接合於支承板上時，在相當於靶構件間所形成之間隙之位置介置耐熱性材料之間隔件(spacer)，以防止低熔點焊材侵入間隙部分，但本發明中未介置此等間隔物，而以低熔點焊材進行接合，藉由去除侵入間隙間之低熔點焊材，使其成為預定量之間隙深度，而可製造本發明之分割濺鍍靶。此低熔點焊材之去除較佳為於低熔點焊材凝固完成之前進行。The split sputtering target of the present invention can be manufactured by bonding a plurality of target members to a support plate by a low melting point solder material and by removing a low melting point solder material located in a gap formed between the bonded target members. It becomes a predetermined amount of gap depth. The manufacturing method of the present invention can be applied without a large change in the manufacturing steps of the conventional split sputtering target, and therefore can be carried out very efficiently. When the target member is usually joined to the support plate by a low melting point welding material, a spacer of the heat resistant material is interposed at a position corresponding to a gap formed between the target members to prevent the low melting point welding material from intruding into the gap portion. However, in the present invention, the spacers are not interposed, but are joined by a low-melting-point solder material, and the low-melting-point solder material intruding between the gaps is removed to have a predetermined amount of gap depth, thereby making the division of the present invention. Sputter target. The removal of the low melting point solder material is preferably performed before the solidification of the low melting point solder material is completed.
根據本發明，於接合複數個氧化物半導體靶構件所得之分割濺鍍靶中，可有效地防止因被濺鍍而造成支承板構成材料混入於要形成之氧化物半導體的薄膜中之情形。According to the present invention, in the split sputtering target obtained by bonding a plurality of oxide semiconductor target members, it is possible to effectively prevent the support plate constituent material from being mixed into the thin film of the oxide semiconductor to be formed due to sputtering.
以下參照圖式同時說明本發明之實施型態。Embodiments of the present invention will be described below with reference to the drawings.
本實施型態之板狀濺鍍靶如第1圖所示，係將複數個靶構件20配置並接合於Cu製支承板10者。在此等靶構件彼此之間形成有0.1mm至1.0mm之間隙30。As shown in Fig. 1, the plate-shaped sputtering target of the present embodiment is a structure in which a plurality of target members 20 are disposed and joined to a Cu-made support plate 10. A gap 30 of 0.1 mm to 1.0 mm is formed between the target members.
使用In及Sn之低熔點焊材，如第1圖所示配置並接合六個靶構件。此接合係藉由如下方式進行：將支承板與靶構件同時加熱至預定溫度，於支承板表面塗佈經熔融之低熔點焊材(In及Sn)，並將靶構件配置於該低熔點焊材上，而冷卻至室溫。Using the low melting point welds of In and Sn, the six target members are configured and joined as shown in FIG. The bonding is performed by simultaneously heating the support plate and the target member to a predetermined temperature, coating the surface of the support plate with the molten low-melting consumables (In and Sn), and disposing the target member at the low melting point welding. On the material, cool to room temperature.
第2圖表示本實施型態之分割濺鍍靶的概略截面圖。藉由低熔點焊材50接合支承板10與靶構件20。此外，係成為低熔點焊材50殘存於間隙30之狀態。使此低熔點焊材殘存之方法係如下進行：於靶構件間不介置耐熱材料之間隔件等，藉由低熔點焊材接合支承板10與靶構件20，並於低熔點焊材凝固完成之前，去除侵入間隙之低熔點焊材50而使其成為預定量之間隙深度。Fig. 2 is a schematic cross-sectional view showing a split sputtering target of the present embodiment. The support plate 10 and the target member 20 are joined by the low melting point welding material 50. Further, the low-melting-point solder material 50 remains in the gap 30. The method of retaining the low-melting-point solder material is carried out by interposing a spacer or the like of a heat-resistant material between target members, joining the support plate 10 and the target member 20 with a low-melting-point solder material, and solidifying the low-melting-point solder material. Previously, the low-melting-point solder material 50 that has entered the gap is removed to have a predetermined amount of gap depth.
以下說明具體之實施例，所製造之分割濺鍍靶係將無氧銅製之支承板(厚度30mm、縱630mm、寬710mm)與六個IGZO製靶構件(厚度6mm、縱210mm、寬355mm)接合而製造者。接合用之低熔點焊材係使用In(含有0.1質量%之雜質Cu)。此外，靶構件間的間隙為0.5mm。Hereinafter, a specific embodiment will be described. The manufactured split sputtering target is formed by bonding an oxygen-free copper support plate (thickness: 30 mm, length: 630 mm, width: 710 mm) to six IGZO target members (thickness: 6 mm, length: 210 mm, width: 355 mm). And the manufacturer. In the low melting point welding material for bonding, In (containing 0.1% by mass of impurity Cu) was used. Further, the gap between the target members was 0.5 mm.
IGZO製靶構件係將In2 O3 、Ga2 O3 、ZnO之各原料粉末以1mol：1mol：2mol的比例秤量，並藉由球磨機進行20小時之混合處理。接著，將作為黏結劑(binder)之稀釋為4質量%之聚乙烯醇水溶液，以對於粉體總量之8質量%添加混合後，在500kgf/cm2 之壓力下成形。其後在大氣中進行1450℃、8小時之鍛燒處理，而得板狀之燒結體。接著藉由平面研磨機研磨此燒結體之兩面，而製造厚度6mm、縱210mm、寬355mm之IGZO製靶構件。In the IGZO target member, each raw material powder of In 2 O 3 , Ga 2 O 3 , and ZnO was weighed in a ratio of 1 mol:1 mol:2 mol, and mixed by a ball mill for 20 hours. Next, a polyvinyl alcohol aqueous solution diluted to 4% by mass as a binder was added and mixed with 8 mass% of the total amount of the powder, and then molded under a pressure of 500 kgf/cm 2 . Thereafter, the calcination treatment was carried out at 1450 ° C for 8 hours in the atmosphere to obtain a plate-shaped sintered body. Then, both surfaces of the sintered body were ground by a plane grinder to produce a IGZO target member having a thickness of 6 mm, a length of 210 mm, and a width of 355 mm.
使用In之低熔點焊材，如第1圖所示配置並接合如上方式所製作之六個靶構件。此接合係藉由如下方式進行：將支承板與靶構件同時加熱至200℃，於支承板表面塗佈經熔融之低熔點焊材(In)，並將靶構件配置於該低熔點焊材上，而冷卻至室溫。此接合中，不在相當於靶構件間所形成之間隙之位置介置耐熱性材料之間隔件，以使低熔點焊材侵入間隙部分。接著，於低熔點焊材凝固完成之前，將侵入該間隙之In低熔點焊材去除預定量，並使低熔點焊材存在於間隙，以使間隙深度為3.5mm(從支承板表面至殘存之低熔點焊材表面的距離)。Using the low melting point welding material of In, the six target members produced as described above were arranged and joined as shown in Fig. 1. The bonding is performed by simultaneously heating the support plate and the target member to 200 ° C, coating the surface of the support plate with a molten low-melting consumable (In), and disposing the target member on the low-melting consumable. And cooled to room temperature. In this joining, the spacer of the heat-resistant material is not interposed at a position corresponding to the gap formed between the target members, so that the low-melting-point solder material intrudes into the gap portion. Then, before the solidification of the low-melting-point solder material is completed, the In low-melting-point solder material invading the gap is removed by a predetermined amount, and the low-melting-point solder material is present in the gap so that the gap depth is 3.5 mm (from the surface of the support plate to the remaining The distance from the surface of the low melting solder material).
如上述方式製作分割濺鍍靶並進行濺鍍評價試驗。此濺鍍評價試驗係使用濺鍍裝置(SMD-450B、ULVAC公司製)，於無鹼玻璃基板(日本電氣硝子公司製)成膜厚度14μm之IGZO薄膜。接著，針對此成膜的基板，將相當於分割濺鍍靶之間隙部分之正上方部分的基板及間隙部分以外的基板予以切割取出。針對所切割取出之基板，藉由原子吸收光譜法(atomic absorption spectroscopy)測定IGZO薄膜中之Cu混入量，而進行濺鍍評價。此外，對於在間隙部分無低熔點焊材In且露出有Cu製支承板表面之狀態的分割濺鍍靶，亦進行同樣的濺鍍評價試驗。A split sputtering target was produced as described above and subjected to a sputtering evaluation test. In the sputtering evaluation test, an IGZO film having a thickness of 14 μm was formed on an alkali-free glass substrate (manufactured by Nippon Electric Glass Co., Ltd.) using a sputtering apparatus (SMD-450B, manufactured by ULVAC Co., Ltd.). Next, for the substrate to be formed, a substrate other than the substrate directly above the gap portion where the sputtering target is divided and a substrate other than the gap portion are cut out. The amount of Cu mixed in the IGZO thin film was measured by atomic absorption spectroscopy on the substrate which was cut out, and sputtering evaluation was performed. In addition, the same sputtering evaluation test was performed on the divided sputtering target in a state where the low-melting-point solder material In was not formed in the gap portion and the surface of the Cu-made support plate was exposed.
結果，使In殘存於間隙時，混入IGZO薄膜中之Cu混入量係未達2ppm(原子吸收光譜法之偵測極限以下)。對此，在間隙未殘存有In時，混入IGZO薄膜中之Cu混入量在間隙部分為19ppm。As a result, when In remains in the gap, the amount of Cu mixed in the IGZO film is less than 2 ppm (below the detection limit of the atomic absorption spectrometry). On the other hand, when In did not remain in the gap, the amount of Cu mixed in the IGZO thin film was 19 ppm in the gap portion.
本發明係可有效地防止形成大面積之氧化物半導體的薄膜時，於濺鍍中混入有雜質。In the present invention, when a thin film of a large-area oxide semiconductor is formed, impurities are mixed in the sputtering.
10‧‧‧支承板10‧‧‧Support plate
20‧‧‧靶構件20‧‧‧ target components
30‧‧‧間隙30‧‧‧ gap
50‧‧‧低熔點焊材50‧‧‧low melting point welding consumables
第1圖係分割濺鍍靶之概略斜視圖。Fig. 1 is a schematic perspective view of a split sputtering target.
第2圖係本實施型態之概略截面圖。Fig. 2 is a schematic cross-sectional view showing the present embodiment.
10．．．支承板10. . . Support plate
20．．．靶構件20. . . Target member
30．．．間隙30. . . gap
50．．．低熔點焊材50. . . Low melting point welding consumables
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