TW201237199A - Divided sputtering target and method of producing the same - Google Patents

Divided sputtering target and method of producing the same Download PDF

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Publication number
TW201237199A
TW201237199A TW100126732A TW100126732A TW201237199A TW 201237199 A TW201237199 A TW 201237199A TW 100126732 A TW100126732 A TW 100126732A TW 100126732 A TW100126732 A TW 100126732A TW 201237199 A TW201237199 A TW 201237199A
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Taiwan
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low
gap
target
oxide semiconductor
support plate
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TW100126732A
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Chinese (zh)
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TWI388681B (en
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Takashi Kubota
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Mitsui Mining & Smelting Co
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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34—Sputtering
    • C23C14/3407—Cathode assembly for sputtering apparatus, e.g. Target
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02551—Group 12/16 materials
    • H01L21/02554—Oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02565—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Organic Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Mechanical Engineering (AREA)
  • Physical Vapour Deposition (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
  • Ceramic Products (AREA)
  • Compositions Of Oxide Ceramics (AREA)

Abstract

Provided is a divided sputtering target obtained through bonding a plurality of oxide semiconductor target members, which allows a constituent material for a backing plate to be prevented effectively from getting mixed, due to sputtering, in with a thin film of an oxide semiconductor target member being formed. The present invention is characterized in that, in a divided sputtering target formed through bonding a plurality of target members comprising oxide semiconductors on a backing plate with low-melting solder, the low-melting solder covering a surface of the backing plate remains in the gaps formed among the target members bonded. It is preferable that the thickness in the gaps of the low-melting solder ranges between 10% and 70% of the gap depths formed among the target members.

Description

201237199 六、發明說明· 【發明所屬之技術領域】 本發明係關於接合複數個靶構件所得之分割濺鐘乾， 特別係關於粑構件為由氧化物半導體所構成時所適合之分 割濺锻乾° 【先前技術】 近年來，於資訊設備、AV設備、家電製品等各電子零 件之製造時常使用濺鍍法’例如液晶顯示裝置等顯示裝置 中’薄膜電晶體（簡稱：TFT)等半導體元件係藉由濺鍍法所 形成。這是由於以賤鑛法作為以大面積且高精度形成構成 透明電極層等之薄膜的製法時極為有效之故。 另外，最近半導體元件中，係以IGZO(In-Ga-Zn-O)為 代表之氧化物半導體取代非晶矽（amorph〇us silic〇n)受 到矚目。而有關於此氧化物半導體，係計晝利用濺鍍法而 成膜氧化物半導體薄膜。但是，濺鍍所使用之氧化物半導 體的濺鍍靶之素材為陶瓷，故難以由一個靶構件來構成大 面積鞋* °因此’準備複數個具有一定程度大小之氧化物半 ^體乾構件，且接合於具有所希望面積之支承板（backing Plate)上’藉此而製造大面積之氧化物半導體濺鍍靶。 此激链把之支承板通常使用Cu製之支承板，此支承板 妹構件的接合係、使用熱傳導良好之低熔點焊料，例如In 系金屬。例如’於製造大面積板狀之半導體氧化物濺鍍靶 時’準備大面積之Cu製支承板並將該支承板表面區劃為複 數個區塊’並準備複數個具有與該區塊相符合之面積的氧 4 323360 201237199 化物半導體靶構件。接著在支承板上配置複數個靶構件， 藉由In及Sn系金屬之低熔點焊料，而將全部靶構件接合 於支承板。接合時係考慮到Cu與氧化物半導體之熱膨脹的 差’而調整配置成使鄰接之靶構件彼此之間於室溫時可產 生〇. lmm至1_ 〇则j的間隙。 使用接合此等複數個氧化物半導體靶構件而得之分割 減鑛乾’並藉由濺鍍而將薄膜成膜且形成半導體元件時， 需擔心以下問體：濺鍍處理中，屬於支承板構成材料之Cu 亦從乾構件間的間隙被賤鍍，而混入要形成之氧化物半導 體之薄膜中。薄膜中的Cu混入量為數ppm程度，但對於氧 化物半導體會造成極大影響，例如TFT树特性中之場效 應移動性（field-effeet mobility)，與其他部分半導體元 件相比，在相當於靶構件間的間隙之位置所形成之半導體 疋件（混人CU的薄膜）之場效應移動性有變低的傾向，0N/ 〇FF比亦有降低的傾向。此等缺失被指摘為造成近來邁向 ^面積化之-纽礙的，現㈣要求儘速提出技術改 [先前技術文獻] [專利文獻] [專利文獻1]日本特開2005-232580號公報 【發明内容】 (發明欲解決之課題） 本發明係以上述情形為背景而研創者，其目的係提出 下述之分割濺鑛乾：一種大面積之氧化物半導體濺鑛 323360 $ 201237199 乾’其係接合複數個氧化物半導體靶構件所得之分割濺鍍 乾’其可有效地防止因為被濺鍍而使得支承板的構成材料 混入要形成之氧化物半導體的薄膜中。 (解決課題之手段） 為了解決上述課題，本發明係藉由低熔點烊材將複數 個由氧化物半導體所成之靶構件接合於支承板上而形成之 分割濺鍍靶，其中，在接合之靶構件間所形成之間隙，存 在有覆蓋支承板表面之低熔點焊材者。本發明中，意圖使 接合支承板與靶構件時所使用之低熔點焊材存在於靶構件 間所形成之間隙，藉此可使該間隙不會露出支承板的表 面，而可有效地防止支承板之構成材料被濺鍍。 本發明之存在於間隙的低熔點焊材較佳為使接合時之 低炫點焊㈣存於_者1於_之低熔點焊材，係可 =間隙域低熔轉材，但若為將接合狀⑽點焊材殘 ^於_者’财需對以往分襲雜製造㈣做大幅的 燹更即可適用’故可謂特別有效者。此外，芒去磨〜1201237199 VI. Description of the Invention [Technical Field] The present invention relates to a split-spray stem obtained by joining a plurality of target members, in particular, a split-spray forging which is suitable for a crucible member composed of an oxide semiconductor. [Prior Art] In recent years, in the manufacture of electronic components such as information equipment, AV equipment, and home electric appliances, a sputtering method such as a semiconductor device such as a thin film transistor (abbreviation: TFT) is often used in a display device such as a liquid crystal display device. It is formed by sputtering. This is because the bismuth ore method is extremely effective as a method for forming a film constituting a transparent electrode layer or the like with a large area and high precision. Further, in recent semiconductor devices, an oxide semiconductor represented by IGZO (In-Ga-Zn-O) has been attracting attention in place of an amorphous germanium (amorph〇us silic〇n). On the other hand, in this oxide semiconductor, an oxide semiconductor thin film is formed by sputtering. However, since the material of the sputtering target of the oxide semiconductor used for sputtering is ceramic, it is difficult to form a large-area shoe by one target member. Therefore, a plurality of oxide half-body dry members having a certain degree of size are prepared. And bonding to a backing plate having a desired area, thereby producing a large-area oxide semiconductor sputtering target. The support chain of the chain is usually a support plate made of Cu, and the joint of the support plate member is made of a low melting point solder having good heat conduction, such as an In metal. For example, 'when manufacturing a large-area plate-shaped semiconductor oxide sputtering target', prepare a large-area Cu-made support plate and divide the surface of the support plate into a plurality of blocks' and prepare a plurality of pieces to conform to the block. Area of oxygen 4 323360 201237199 compound semiconductor target component. Next, a plurality of target members are placed on the support plate, and all of the target members are joined to the support plate by the low-melting solder of the In and Sn-based metals. The bonding is made in consideration of the difference in thermal expansion of Cu and the oxide semiconductor, and is adjusted so that the adjacent target members can generate a gap of 〇. lmm to 1_ j j at room temperature. When a thin film is formed by joining a plurality of oxide semiconductor target members and a thin film is formed by sputtering to form a semiconductor element, there is a concern that the sputtering body is a support plate. The Cu of the material is also plated from the gap between the dry members and mixed into the film of the oxide semiconductor to be formed. The amount of Cu mixed in the film is about several ppm, but it has a great influence on the oxide semiconductor, for example, field-effeet mobility in the characteristics of the TFT tree, which is equivalent to the target member as compared with other semiconductor elements. The field effect mobility of the semiconductor element (film of the mixed CU) formed at the position of the gap between them tends to be low, and the 0N/〇FF ratio tends to decrease. These deficiencies have been accused of causing the recent stagnation of the area, and now (4) demanding that technical changes be made as soon as possible [Preliminary Technical Literature] [Patent Literature] [Patent Document 1] Japanese Patent Laid-Open Publication No. 2005-232580 Disclosure of the Invention (Problems to be Solved by the Invention) The present invention has been made in view of the above circumstances, and its object is to propose the following split sputtering dry: a large-area oxide semiconductor splashing 323360 $ 201237199 The split sputtering dryness obtained by joining a plurality of oxide semiconductor target members can effectively prevent the constituent material of the support plate from being mixed into the thin film of the oxide semiconductor to be formed because of sputtering. (Means for Solving the Problem) In order to solve the above problems, the present invention is a split sputtering target formed by bonding a plurality of target members made of an oxide semiconductor to a support plate by a low melting point material, wherein The gap formed between the target members has a low melting point weld material covering the surface of the support plate. In the present invention, it is intended that a low-melting-point soldering material used for joining the support plate and the target member exists in a gap formed between the target members, whereby the gap can be prevented from being exposed to the surface of the support plate, and the support can be effectively prevented. The constituent materials of the board are sputtered. The low-melting-point welding material existing in the gap of the present invention is preferably such that the low-point welding (4) at the time of joining is stored in the low melting point welding material of the _1, which can be a low-melting material in the gap region, but if Bonded (10) spot welding consumables ^ _ those 'financial needs for the previous classification of manufacturing (four) to make a large change can be applied 'is therefore particularly effective. In addition, Mang went to grind ~1

於圓筒狀支承板中貫通複數個ϋ Μ狀歡構件 並將其以多段狀配置且接合於®筒狀支承板 件之對象為： (中空圓柱）， 323360 6 201237199 : 方向者；或是將中空圓柱朝其圓枉軸方向橫切而 的曲狀靶構件排列複數個於圓筒狀支承板外側面之圓 周方向且予以接合者。此等板狀或圓筒狀分割濺鍍粑係常 用於大面積之賤鍍乾裝置。此外，本發明係以板狀、圓筒 狀之升y狀為對象，但適用於其他形狀之分割錢鐘乾亦無 妨，亦無限制乾構件之形狀。 本發明之低溶點焊材係可使用In、Sn、或含有In、Sn 之合金。再者’此低熔點焊材所含Cu之雜質濃度較佳為1 質量％以下。其原因為：例如使用含有1. 5質量％之雜質 Cu之In焊材時，若此In烊材被濺鍍而混入成膜之薄膜中， 此時因一同混入之(^會對於膜特性造成不良影響。 本發明中之低熔點焊材之間隙内之厚度較佳為靶構件 間所形成的間隙深度之10至7〇%。若未達間隙深度之 %，則抑制支承板構成材料濺鍍之效果有降低的傾向，若 超過70%，則濺鍍時低熔點焊材被濺鍍而混入成瞑之薄膜 中的量會變多，而對膜特性造成不良影響。此間隙深户係 依據靶構件端部的厚度或是所製造之濺鍍靶整體周邊 端部的厚度而決定者’且_深錢指使用㈣ ^ 造分割濺鍍靶的初期間隙深度。 我 此外，本發明之氧化物半導體較佳為由含有^、The object of the plurality of Μ Μ 构件 in the cylindrical support plate and arranged in a plurality of sections and joined to the tube-shaped support plate is: (hollow cylinder), 323360 6 201237199: direction; or The curved target members which are transversely cut in the direction of the circular axis of the hollow cylinder are arranged in a plurality of circumferential directions on the outer side surface of the cylindrical support plate and are joined. These plate or cylindrical split sputter systems are commonly used for large area ruthenium plating devices. Further, the present invention is applied to a plate-like or cylindrical shape, but it is also applicable to other shapes of the split clock, and the shape of the dry member is not limited. In the low-melting spot welding material of the present invention, In, Sn, or an alloy containing In, Sn may be used. Further, the impurity concentration of Cu contained in the low-melting-point solder material is preferably 1% by mass or less. The reason is that, for example, when an In-weld material containing 1.5% by mass of impurity Cu is used, if the In-coffin material is sputtered and mixed into the film formed film, it is mixed together at this time (^ will cause film characteristics) The thickness in the gap of the low-melting-point solder material in the present invention is preferably 10 to 7〇% of the gap depth formed between the target members. If the gap depth is not reached, the material splashing of the support plate is suppressed. The effect is lowered. If it exceeds 70%, the amount of the low-melting-point solder material to be sputtered during sputtering and the amount of the film mixed into the film becomes large, which adversely affects the film characteristics. The thickness of the end portion of the target member or the thickness of the entire peripheral end portion of the sputtering target is determined by the use of (4) ^ the initial gap depth of the sputtering target. Further, the oxide of the present invention The semiconductor preferably contains ^,

Ga任-種以上之氧化物所構成者。具體來說可 = (In-Ga-Zn-0).GZ0CGa-Zn-0)MZ0(i^^ 此外，本發明之氧化物半導體較佳為由含有Ga is composed of any of the above oxides. Specifically, it can be = (In-Ga-Zn-0). GZ0CGa-Zn-0) MZ0 (i^^ Further, the oxide semiconductor of the present invention is preferably contained

Ba、Ca、Zn、Mg、Ge、Y、La、M、Si、G^ii、 323360 7 201237199 氧化= 斤構成者。具體來說，可列舉：Sn—Ba〇、ϋ〇、 Sn-Tl-0 ^ Sn-Ca-0 ^ Sn-Mg-〇. Zn^〇, Zn_Ge_〇 ^ Zn_Ga 〇 ^ zmGe-〇，或是將此等氧化物之Ge變更為^、γ、u、 A1、Si、Ga之氧化物。 接著，本發明之氧化物半導體較佳為含#CuAiGa、 &任一種以上之氧化物所成者。具體來說可列舉：Cu2〇、 C11AIO2、CuGa〇2、CuIn〇2。 本發明之分割舰乾可由以下方式製造：藉由低溶點 焊材將複數個㈣件接合於支承板上，域由去除位於接 合之把構件間所形成之_的低炫轉材，使其成為預定 量之間隙深度。本發明製造方法不需對以往分_餘製 造步驟做大幅的變更即可適用，故可非常有效率地實施。 通常藉由低熔點焊材將㈣件接合於支承板上時，在相當 於乾構件間所形成之間隙之位置介置财熱性材料之間隔件 (spacer)，以防止低熔點焊材侵入間隙部分，但本發明中 未介置此料隔物，而以低魅焊材進行接合，藉由去除 侵入間Μ之赌點焊材，使其成為預定量之_深度了 而可製造本發明之分割濺鍍靶。此低熔點焊材之去除較佳 為於低熔點焊材凝固完成之前進行。 (發明之效果） 根據本發明，於接合複數個氧化物半導體靶構件所得 之分割濺鍍靶中，可有效地防止因被濺鍍而造成支承板構 成材料混入於要形成之氧化物半導體的薄膜中之情形。 【實施方式】 $ 323360 201237199 以下參照圖式同時說明本發明之實施型態。 本實施型態之板狀濺錄如第丨_示，係將複數個 靶構件20配置並接合於Cu製支承板1〇者。在此等乾構件 彼此之間形成有〇. 1则！至之間隙3〇。 使用In及Sn之低熔點焊材，如第！圖所示配置並接 合六㈣構件。此接合係藉由如下方式進行：將支承板與 乾構件㈣加熱至預定溫度，於支承録面塗佈贿融之 低熔點焊材（In及Sn)，並㈣構件配置於該低熔點焊材 上，而冷卻至室溫。 第2圖表示本實施型態之分割濺錢無的概略截面圖。 藉由低熔點谭材50接合支承板10與乾構件20。此外，係 成為低、熔點特5G殘存㈣隙3Q之狀態。使此低熔點焊 材殘存之方法係如下進行：妹構件間不介置耐熱材料之 間隔件等，藉由低㈣焊材接合支承板1()與姆件2〇， 並於低炼點焊材;成之前，去除侵人間隙之低炼點焊 材50而使其成為預定量之間隙深度。 (實施例） "以下說明具體之實施例，所製造之分割錢鑛乾係將無 乳銅製之支承板（厚度3〇mm、縱63〇_、寬71〇丽)與六個 製乾構件（厚度6咖、縱210咖、寬355mm)接合而製造 者。接合用之低熔點焊材係使用In(含有〇1質量％之雜 質Cu)。此外，靶構件間的間隙為〇. 5_。 IGZ0製乾構件係將In2〇3、_、Zn〇之各原料粉末以 lmol · lmol : 2m〇i的比例秤量’並藉由球磨機進行2〇小 323360 9 201237199 時之混合處理。接著，將作為黏結劑（binder)之稀釋為4 質量％之聚乙烯醇水溶液，以對於粉體總量之8質量％添 加混合後，在5GGkgf/c：m2之壓力下成形。其後在大氣中進 行1450 C、8小時之鍛燒處理，而得板狀之燒結體。接著 藉由平面研磨機研磨此燒結體之兩面，而製造厚度6咖、 縱210mm、寬355ram之IGZ0製乾構件。 使用In之低熔點焊材，如第丨圖所示配置並接合如上 方式所製作之六個靶構件。此接合係藉由如下方式進行： 將支承板妹構件同時加熱至2G(rc，於支承板表面塗佈 經熔融之低熔點焊材（ln)，並將靶構件配置於該低熔點焊 材上，.而冷卻至室溫。此接合中，不在相當於靶構件間所 形成之間隙之位置介置耐熱性材料之間隔#，以使低炼點 焊材k入間隙部分。接著，於低熔點焊材凝固完成之前， 將侵入該卩《之In低炫點焊材去除預定量，並使低炼點焊 材存在於間隙，以使間隙深度為3. 5mm(從支承板表面至殘 存之低炼點焊材表面的距離）。 如上述方式製作分割濺鍍靶並進行濺鍍評價試驗。此 濺鍍評價試驗係使用濺鍍裝置（SMD_45〇B、ULVAC公司製）， 於無鹼玻璃基板（日本電氣硝子公司製）成膜厚度14/zm之 IGZ0薄膜。接|，針對此成膜的基板，將相當於分割減鑛 乾之間隙部分之正上方部分的基板及間隙部分以外的基板 予以切割取出。針對所㈣取出之基板，藉由原子吸收光 δ普法（atomic absorpti0n spectroscopy)測定 薄膜中 之Cu混入量，而進行濺鍍評價。此外，對於在間隙部分無 10 323360 201237199 低熔點焊材In且露出有Cu製支承板表面之狀態的分割濺 鍍靶，亦進行同樣的濺鍍評價試驗。 結果，使In殘存於間隙時，混入IGZ0薄膜中之Cu混 入量係未達2ppm(原子吸收光譜法之偵測極限以下）。對 此，在間隙未殘存有I η時，混入IGZ0薄膜中之Cu混入量 在間隙部分為19ppm。 (產業上的可利用性） 本發明係可有效地防止形成大面積之氧化物半導體的 薄膜時，於濺鍍中混入有雜質。 【圖式簡單說明】 第1圖係分割濺鍍靶之概略斜視圖。 第2圖係本實施型態之概略截面圖。 【主要元件符號說明】 10 支承板 20 靶構件 30 間隙 50 低熔點焊材 11 323360Ba, Ca, Zn, Mg, Ge, Y, La, M, Si, G^ii, 323360 7 201237199 Oxidation = jin. Specifically, it can be exemplified by: Sn—Ba〇, ϋ〇, Sn-Tl-0 ^ Sn-Ca-0 ^ Sn-Mg-〇. Zn^〇, Zn_Ge_〇^ Zn_Ga 〇^ zmGe-〇, or The Ge of these oxides is changed to an oxide of ^, γ, u, A1, Si, and Ga. Next, the oxide semiconductor of the present invention is preferably one containing any of oxides of #CuAiGa, & Specifically, Cu2〇, C11AIO2, CuGa〇2, and CuIn〇2 are mentioned. The split shipboard of the present invention can be manufactured by joining a plurality of (four) pieces to a support plate by means of a low-melting spot welding material, the field being removed by removing the low-profile material formed between the joined members. Become a predetermined amount of gap depth. The manufacturing method of the present invention can be applied without a large change in the conventional steps, so that it can be carried out very efficiently. Usually, when the (4) member is joined to the support plate by the low-melting-point welding material, a spacer of the heat-sensitive material is interposed at a position corresponding to the gap formed between the dry members to prevent the low-melting-point welding material from intruding into the gap portion. However, in the present invention, the spacer is not interposed, and the bonding is performed with a low-profile welding consumable, and the segmentation of the present invention can be made by removing the in-situ smashing consumable material to a predetermined amount of depth. Sputter target. The removal of the low melting point solder material is preferably carried out before the solidification of the low melting point solder material is completed. According to the present invention, in the split sputtering target obtained by bonding a plurality of oxide semiconductor target members, it is possible to effectively prevent the support plate constituent material from being mixed into the thin film of the oxide semiconductor to be formed due to sputtering. The situation in the middle. [Embodiment] $ 323360 201237199 An embodiment of the present invention will be described below with reference to the drawings. The plate-like smear of this embodiment is shown in Fig. _, and a plurality of target members 20 are disposed and joined to a Cu-made support plate. In these dry members, there are 〇. 1! The gap is 3 至. Use In and Sn low melting solder materials, such as the first! The configuration shown in the figure and the six (four) components are combined. The joining is performed by heating the support plate and the dry member (4) to a predetermined temperature, coating the low melting point welding consumables (In and Sn) on the supporting recording surface, and (4) disposing the member in the low melting point welding consumable. On, while cooling to room temperature. Fig. 2 is a schematic cross-sectional view showing the division and splashing of the present embodiment. The support plate 10 and the dry member 20 are joined by a low melting point tan 50. In addition, it is in a state in which the low and the melting point are 5G residual (four) gap 3Q. The method for remaining the low-melting-point solder material is as follows: a spacer for the heat-resistant material is not interposed between the sister members, and the support plate 1 () and the member 2 are joined by the low (four) solder material, and the low-weld spot is welded. Before the formation, the low-point welding material 50 of the invading gap is removed to make it a predetermined amount of gap depth. (Embodiment) "The following describes a specific embodiment, and the manufactured split ore dry joint is made of a support plate made of non-breasted copper (thickness 3 mm, vertical 63 〇 _, width 71 )) and six dry members Produced by bonding (thickness 6 coffee, vertical 210 coffee, width 355 mm). In the low melting point welding material for bonding, In (containing 1% by mass of the impurity Cu). Further, the gap between the target members is 〇. 5_. The IGZ0 dry member is obtained by mixing each raw material powder of In2〇3, _, and Zn〇 in a ratio of 1 mol·lmol: 2m〇i and mixing by 2 〇 323360 9 201237199 by a ball mill. Then, a polyvinyl alcohol aqueous solution diluted to 4% by mass as a binder was added and mixed with 8 mass% of the total amount of the powder, and then molded under a pressure of 5 GGkgf/c:m2. Thereafter, it was subjected to calcination treatment at 1450 C for 8 hours in the atmosphere to obtain a plate-like sintered body. Next, both sides of the sintered body were ground by a plane grinder to produce an IGZ0 dry member having a thickness of 6 coffee, a length of 210 mm, and a width of 355 ram. Using the low melting point weld of In, the six target members fabricated as described above were configured and joined as shown in the figure. The bonding is performed by heating the support member member to 2G (rc, coating the surface of the support plate with the molten low-melting consumable (ln), and disposing the target member on the low-melting consumable. And cooling to room temperature. In this bonding, the space of the heat-resistant material is not placed at a position corresponding to the gap formed between the target members, so that the low-welding spot material k enters the gap portion. Then, at a low melting point 5毫米 (from the surface of the support plate to the low residual), the depth of the gap is 3. 5mm (from the surface of the support plate to the low residual). The distance from the surface of the spot welding material was prepared. The split sputtering target was prepared as described above and subjected to a sputtering evaluation test. This sputtering evaluation test was performed using a sputtering apparatus (SMD_45〇B, manufactured by ULVAC) on an alkali-free glass substrate ( IGZ0 film of a film thickness of 14/zm manufactured by Nippon Electric Glass Co., Ltd., for the substrate to be formed, a substrate other than the substrate directly above the gap portion of the divided ore-drying portion and a substrate other than the gap portion are cut. Take out. (4) The substrate to be taken out is subjected to sputtering evaluation by measuring the amount of Cu mixed in the film by atomic absorption light δ method. Further, there is no 10 323360 201237199 low-melting-point solder material In in the gap portion and Cu is exposed. The same sputtering evaluation test was carried out on the split sputtering target in the state of the surface of the support plate. As a result, when In remains in the gap, the amount of Cu mixed in the IGZ0 film is less than 2 ppm (Atomic Absorption Spectrometry Detection) In the case where I η is not present in the gap, the amount of Cu mixed in the IGZ0 film is 19 ppm in the gap portion. (Industrial Applicability) The present invention can effectively prevent formation of large-area oxidation. In the case of a thin film of a semiconductor, impurities are mixed in the sputtering. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic perspective view showing a sputtering target. Fig. 2 is a schematic cross-sectional view of the present embodiment. Description] 10 support plate 20 target member 30 gap 50 low melting point welding material 11 323360

Claims (1)

201237199 七、申請專利範圍： 1 · 一種分割濺鍍靶，係藉由低熔點焊材將複數個由氧化物 半導體所構成之靶構件接合於支承板上而形成之分割 濺鍍靶，其中，於所接合之靶構件間所形成之間隙，存 在有覆蓋支承板表面之低熔點焊材。 2. 如申請專利範圍第1項所述之分割濺鍍乾，其中，低熔 點焊材係使接合時之低熔點焊材殘存於間隙者。 3. 如申請專利範圍第丨項所述之分割濺錢輕，其中，低熔 點焊材之間隙内的厚度係為靶構件間所形成之間隙深 度之10%至70%。 4. 如申请專利範圍第2項所述之分割賤錢乾，其中，低溶 點焊材之間隙内的厚度係為靶構件間所形成之間隙深 度之10%至70%。 5. 如申請專利範圍第1項至第4項中任一項所述之分割濺 鍍靶，其中，氧化物半導體係由含有In、Zn、Ga任一 種以上之氧化物所構成。 6. 如申請專利範圍第1項至第4項中任一項所述之分割濺 鍍靶’其中，氧化物半導體係由含有Sn、Ti、Ba、Ca、 Zn、Mg、Ge、Y、La、A1、Si、Ga任一種以上之氧化物 所構成。 7_如申請專利範圍第1項至第4項中任一項所述之分割濺 鍍靶’其中，氧化物半導體係由含有Cu、Al、Ga、In 任一種以上之氧化物所構成。 一種分割濺鍍靶之製造方法，係藉由低熔點焊材將複數 323360 1 8. 201237199 個氧化物半導體 成的絲構件接合於支承板上而形 複數個法’其中，藉純熔點特將 ,1回祀構件接合於支承板上1去除位於所接合之乾 構件間所形成之間隙的低熔點焊材，使其成為預定量之 間隙深度。 323360 2201237199 VII. Patent application scope: 1 · A split sputtering target is a split sputtering target formed by bonding a plurality of target members composed of an oxide semiconductor to a support plate by a low melting point solder material, wherein A gap formed between the joined target members has a low melting point solder material covering the surface of the support plate. 2. The split sputter dry as described in claim 1, wherein the low-melting-point solder material is such that the low-melting-point solder material remains in the gap during bonding. 3. The splitting is as light as described in the scope of the patent application, wherein the thickness in the gap of the low-melting spot welding material is 10% to 70% of the depth of the gap formed between the target members. 4. The splitting of the money as described in claim 2, wherein the thickness in the gap of the low-melting spot welding material is 10% to 70% of the depth of the gap formed between the target members. 5. The split sputtering target according to any one of claims 1 to 4, wherein the oxide semiconductor is made of an oxide containing at least one of In, Zn, and Ga. 6. The split sputtering target according to any one of claims 1 to 4 wherein the oxide semiconductor is composed of Sn, Ti, Ba, Ca, Zn, Mg, Ge, Y, La. Any one or more of oxides of A1, Si, and Ga. The split sputtering target according to any one of the items 1 to 4, wherein the oxide semiconductor is composed of an oxide containing at least one of Cu, Al, Ga, and In. A method for manufacturing a split sputtering target is to form a plurality of methods by bonding a plurality of 323360 1 8. 201237199 oxide semiconductor wire members to a support plate by a low melting point welding material, wherein a pure melting point is used. The returning member is joined to the support plate 1 to remove the low-melting consumable material located in the gap formed between the joined dry members, so as to have a predetermined amount of gap depth. 323360 2
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