TWI367156B - Method of compression-molding electronic components and mold - Google Patents

Method of compression-molding electronic components and mold

Info

Publication number
TWI367156B
TWI367156B TW097143675A TW97143675A TWI367156B TW I367156 B TWI367156 B TW I367156B TW 097143675 A TW097143675 A TW 097143675A TW 97143675 A TW97143675 A TW 97143675A TW I367156 B TWI367156 B TW I367156B
Authority
TW
Taiwan
Prior art keywords
mold
compression
electronic components
molding electronic
molding
Prior art date
Application number
TW097143675A
Other languages
English (en)
Other versions
TW200930550A (en
Inventor
Takashi Tamura
Original Assignee
Towa Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Towa Corp filed Critical Towa Corp
Publication of TW200930550A publication Critical patent/TW200930550A/zh
Application granted granted Critical
Publication of TWI367156B publication Critical patent/TWI367156B/zh

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565Moulds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93Batch processes
    • H01L2224/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12041LED
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/14Integrated circuits
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Casting Or Compression Moulding Of Plastics Or The Like (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Moulds For Moulding Plastics Or The Like (AREA)
TW097143675A 2007-11-16 2008-11-12 Method of compression-molding electronic components and mold TWI367156B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007297846A JP2009124012A (ja) 2007-11-16 2007-11-16 電子部品の圧縮成形方法及び金型

Publications (2)

Publication Number Publication Date
TW200930550A TW200930550A (en) 2009-07-16
TWI367156B true TWI367156B (en) 2012-07-01

Family

ID=40641043

Family Applications (1)

Application Number Title Priority Date Filing Date
TW097143675A TWI367156B (en) 2007-11-16 2008-11-12 Method of compression-molding electronic components and mold

Country Status (6)

Country Link
US (1) US20090127732A1 (zh)
JP (1) JP2009124012A (zh)
KR (2) KR20090050947A (zh)
CN (1) CN101436558B (zh)
MY (1) MY149333A (zh)
TW (1) TWI367156B (zh)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4858966B2 (ja) * 2006-11-02 2012-01-18 Towa株式会社 電子部品の圧縮成形方法及び成形装置
TWI344226B (en) * 2007-10-29 2011-06-21 Ind Tech Res Inst Method of packaging light emitted diode
US9005504B2 (en) 2009-06-17 2015-04-14 Panasonic Intellectual Property Management Co., Ltd. Method of manufacturing resin molded electronic component
JP2011086745A (ja) * 2009-10-15 2011-04-28 Sanyu Rec Co Ltd 電子部品の樹脂封止方法
KR101102912B1 (ko) * 2009-11-05 2012-01-11 삼성전기주식회사 압축 몰딩 시스템
JP5507271B2 (ja) * 2010-01-14 2014-05-28 ラピスセミコンダクタ株式会社 モールド樹脂封止装置及びモールド方法
KR101160887B1 (ko) * 2010-02-25 2012-06-29 한미반도체 주식회사 압축 성형 장치 및 방법
JP5576197B2 (ja) * 2010-07-08 2014-08-20 Towa株式会社 電子部品の圧縮成形方法及び成形装置
JP5174874B2 (ja) * 2010-09-16 2013-04-03 Towa株式会社 圧縮成形型及び圧縮成形方法
JP5385886B2 (ja) * 2010-11-02 2014-01-08 Towa株式会社 電気回路部品の樹脂封止成形方法及び装置
JP5764821B2 (ja) * 2011-08-25 2015-08-19 アピックヤマダ株式会社 圧縮成形方法及び装置
KR200471305Y1 (ko) * 2012-05-23 2014-02-13 세메스 주식회사 전자 부품의 몰딩 장치
CN105247598B (zh) * 2013-05-21 2017-12-26 夏普株式会社 显示装置的制造方法、显示装置以及膜器件
JP5944866B2 (ja) * 2013-06-20 2016-07-05 Towa株式会社 電子部品の圧縮樹脂封止方法及び圧縮樹脂封止装置
KR101492054B1 (ko) * 2013-11-08 2015-02-10 한국정보통신주식회사 카드 리더, 단말기 및 그를 이용한 결제 정보 처리 방법
CN105917451B (zh) * 2014-01-14 2018-07-06 山田尖端科技株式会社 树脂模制模具及树脂模制方法
JP6431757B2 (ja) * 2014-12-04 2018-11-28 アピックヤマダ株式会社 成形金型
CN105098030A (zh) * 2015-06-17 2015-11-25 苏州迈瑞微电子有限公司 一种ic封装方法及其封装结构
JP6440599B2 (ja) * 2015-08-28 2018-12-19 Towa株式会社 樹脂成形装置及び樹脂成形方法
KR20170092323A (ko) 2016-02-03 2017-08-11 삼성전자주식회사 반도체 패키지의 몰딩 장치
JP6580519B2 (ja) * 2016-05-24 2019-09-25 Towa株式会社 圧縮成形装置、樹脂封止品製造装置、圧縮成形方法、及び樹脂封止品の製造方法
JP6654994B2 (ja) * 2016-10-31 2020-02-26 Towa株式会社 回路部品の製造方法
TWI787417B (zh) * 2018-02-09 2022-12-21 日商山田尖端科技股份有限公司 壓縮成形用模具及壓縮成形裝置
JP6703029B2 (ja) * 2018-03-26 2020-06-03 キヤノン株式会社 電子モジュールおよび撮像システム
CN110103381B (zh) * 2019-04-03 2021-06-22 杭州富春江水电设备有限公司 一种定子线圈热模压机以及区间式定子线圈热模压工艺
CN110370520A (zh) * 2019-06-05 2019-10-25 江苏明珠硅橡胶材料有限公司 一种超高分子量聚乙烯板生产方法
JP7530769B2 (ja) 2020-08-25 2024-08-08 Towa株式会社 樹脂成形装置及び樹脂成形品の製造方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2524955B2 (ja) * 1993-04-22 1996-08-14 トーワ株式会社 電子部品の樹脂封止成形方法及び装置
EP0688650B1 (en) * 1994-01-13 2000-11-02 Citizen Watch Co. Ltd. Method of resin-sealing semiconductor devices
JP3545507B2 (ja) * 1995-08-23 2004-07-21 アピックヤマダ株式会社 リリースフィルムを用いる自動モールド装置
JP2001160564A (ja) * 1999-12-03 2001-06-12 Apic Yamada Corp 樹脂封止装置
US6770236B2 (en) * 2000-08-22 2004-08-03 Apic Yamada Corp. Method of resin molding
JP3897565B2 (ja) * 2001-10-25 2007-03-28 アピックヤマダ株式会社 樹脂封止装置及び樹脂封止方法
JP2003229444A (ja) * 2001-11-30 2003-08-15 Apic Yamada Corp 成形品収納装置及び樹脂封止装置
JP4268389B2 (ja) * 2002-09-06 2009-05-27 Towa株式会社 電子部品の樹脂封止成形方法及び装置
JP2006027098A (ja) * 2004-07-16 2006-02-02 Apic Yamada Corp 樹脂モールド方法および樹脂モールド装置
US20070243667A1 (en) * 2006-04-18 2007-10-18 Texas Instruments Incorporated POP Semiconductor Device Manufacturing Method

Also Published As

Publication number Publication date
MY149333A (en) 2013-08-30
KR101373483B1 (ko) 2014-03-13
KR20090050947A (ko) 2009-05-20
TW200930550A (en) 2009-07-16
CN101436558A (zh) 2009-05-20
CN101436558B (zh) 2011-04-20
KR20110099198A (ko) 2011-09-07
JP2009124012A (ja) 2009-06-04
US20090127732A1 (en) 2009-05-21

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