TWI366891B - Method of fabricating semiconductor devices - Google Patents
Method of fabricating semiconductor devicesInfo
- Publication number
- TWI366891B TWI366891B TW097123210A TW97123210A TWI366891B TW I366891 B TWI366891 B TW I366891B TW 097123210 A TW097123210 A TW 097123210A TW 97123210 A TW97123210 A TW 97123210A TW I366891 B TWI366891 B TW I366891B
- Authority
- TW
- Taiwan
- Prior art keywords
- semiconductor devices
- fabricating semiconductor
- fabricating
- devices
- semiconductor
- Prior art date
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823828—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
- H01L21/823842—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823814—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66492—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a pocket or a lightly doped drain selectively formed at the side of the gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020070062635A KR100877673B1 (ko) | 2007-06-26 | 2007-06-26 | 반도체 소자 제조방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200908223A TW200908223A (en) | 2009-02-16 |
TWI366891B true TWI366891B (en) | 2012-06-21 |
Family
ID=40157546
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW097123210A TWI366891B (en) | 2007-06-26 | 2008-06-20 | Method of fabricating semiconductor devices |
Country Status (6)
Country | Link |
---|---|
US (1) | US20090004804A1 (zh) |
JP (1) | JP2009010374A (zh) |
KR (1) | KR100877673B1 (zh) |
CN (1) | CN101335210A (zh) |
DE (1) | DE102008029791A1 (zh) |
TW (1) | TWI366891B (zh) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102044436B (zh) * | 2009-10-21 | 2012-09-05 | 中芯国际集成电路制造(上海)有限公司 | 制作半导体器件的方法 |
CN102347280B (zh) * | 2010-07-29 | 2014-03-19 | 中芯国际集成电路制造(上海)有限公司 | 一种用于形成半导体器件结构的方法 |
US8598005B2 (en) * | 2011-07-18 | 2013-12-03 | Spansion Llc | Method and manufacture for embedded flash to achieve high quality spacers for core and high voltage devices and low temperature spacers for high performance logic devices |
CN113257790B (zh) * | 2021-06-30 | 2021-10-12 | 广州粤芯半导体技术有限公司 | 漏电测试结构及漏电测试方法 |
Family Cites Families (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH1056171A (ja) * | 1996-08-09 | 1998-02-24 | Matsushita Electric Ind Co Ltd | Mis半導体装置及びその製造方法 |
US7560779B2 (en) * | 1999-11-30 | 2009-07-14 | Texas Instruments Incorporated | Method for forming a mixed voltage circuit having complementary devices |
KR20010058484A (ko) * | 1999-12-30 | 2001-07-06 | 박종섭 | 모스형 트랜지스터의 제조방법 |
KR100317337B1 (ko) * | 2000-03-15 | 2001-12-22 | 박종섭 | 고전압 트랜지스터의 제조방법 |
US6437406B1 (en) * | 2000-10-19 | 2002-08-20 | International Business Machines Corporation | Super-halo formation in FETs |
US6933248B2 (en) * | 2000-10-19 | 2005-08-23 | Texas Instruments Incorporated | Method for transistor gate dielectric layer with uniform nitrogen concentration |
US6773999B2 (en) * | 2001-07-18 | 2004-08-10 | Matsushita Electric Industrial Co., Ltd. | Method for treating thick and thin gate insulating film with nitrogen plasma |
US20030124824A1 (en) * | 2001-12-28 | 2003-07-03 | Manoj Mehrotra | High yield and high speed CMOS process |
US6987240B2 (en) * | 2002-04-18 | 2006-01-17 | Applied Materials, Inc. | Thermal flux processing by scanning |
KR100414736B1 (ko) * | 2002-05-20 | 2004-01-13 | 주식회사 하이닉스반도체 | 반도체소자의 트랜지스터 형성방법 |
JP2003347422A (ja) * | 2002-05-28 | 2003-12-05 | Fujitsu Ltd | 半導体装置の製造方法 |
US6780720B2 (en) * | 2002-07-01 | 2004-08-24 | International Business Machines Corporation | Method for fabricating a nitrided silicon-oxide gate dielectric |
JP2004228528A (ja) * | 2003-01-27 | 2004-08-12 | Nec Electronics Corp | 半導体装置の製造方法 |
JP2004289125A (ja) * | 2003-03-04 | 2004-10-14 | Matsushita Electric Ind Co Ltd | 半導体装置及びその製造方法 |
WO2004097942A1 (ja) * | 2003-04-30 | 2004-11-11 | Fujitsu Limited | 半導体装置の製造方法 |
US6855984B1 (en) * | 2003-10-30 | 2005-02-15 | Texas Instruments Incorporated | Process to reduce gate edge drain leakage in semiconductor devices |
US7429771B2 (en) * | 2004-05-07 | 2008-09-30 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device having halo implanting regions |
US7045433B1 (en) | 2004-04-06 | 2006-05-16 | Advanced Micro Devices, Inc. | Tip architecture with SPE for buffer and deep source/drain regions |
JP2006024587A (ja) * | 2004-07-06 | 2006-01-26 | Renesas Technology Corp | 半導体装置の製造方法 |
JP2006165480A (ja) * | 2004-12-10 | 2006-06-22 | Toshiba Corp | 半導体装置 |
NL1029206C2 (nl) * | 2005-06-07 | 2006-12-08 | Assembleon Nv | Componenttoevoerinrichting alsmede werkwijze. |
KR100752179B1 (ko) * | 2005-08-29 | 2007-08-24 | 동부일렉트로닉스 주식회사 | 모스 트랜지스터 제조 방법 |
KR100865887B1 (ko) | 2005-12-13 | 2008-10-29 | 삼성전자주식회사 | 무선 릴레이 네트워크에서 채널 상태 정보를 얻기 위한장치 및 방법 |
US7491630B2 (en) * | 2006-03-15 | 2009-02-17 | Freescale Semiconductor, Inc. | Undoped gate poly integration for improved gate patterning and cobalt silicide extendibility |
US7396717B2 (en) * | 2006-04-03 | 2008-07-08 | United Microelectronics Corp. | Method of forming a MOS transistor |
US7750416B2 (en) * | 2006-05-03 | 2010-07-06 | Taiwan Semiconductor Manufacturing Company, Ltd. | Modifying work function in PMOS devices by counter-doping |
-
2007
- 2007-06-26 KR KR1020070062635A patent/KR100877673B1/ko not_active IP Right Cessation
-
2008
- 2008-06-19 JP JP2008160927A patent/JP2009010374A/ja active Pending
- 2008-06-20 TW TW097123210A patent/TWI366891B/zh not_active IP Right Cessation
- 2008-06-23 US US12/143,866 patent/US20090004804A1/en not_active Abandoned
- 2008-06-24 DE DE102008029791A patent/DE102008029791A1/de not_active Ceased
- 2008-06-25 CN CNA2008101278057A patent/CN101335210A/zh active Pending
Also Published As
Publication number | Publication date |
---|---|
DE102008029791A1 (de) | 2009-01-29 |
US20090004804A1 (en) | 2009-01-01 |
JP2009010374A (ja) | 2009-01-15 |
KR100877673B1 (ko) | 2009-01-08 |
CN101335210A (zh) | 2008-12-31 |
TW200908223A (en) | 2009-02-16 |
KR20080113766A (ko) | 2008-12-31 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |