TWI343006B - Portable module interface with timeout prevention by dummy blocks - Google Patents

Portable module interface with timeout prevention by dummy blocks Download PDF

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Publication number
TWI343006B
TWI343006B TW096146179A TW96146179A TWI343006B TW I343006 B TWI343006 B TW I343006B TW 096146179 A TW096146179 A TW 096146179A TW 96146179 A TW96146179 A TW 96146179A TW I343006 B TWI343006 B TW I343006B
Authority
TW
Taiwan
Prior art keywords
bus
memory
application
memory system
period
Prior art date
Application number
TW096146179A
Other languages
English (en)
Chinese (zh)
Other versions
TW200842584A (en
Inventor
Reuven Elhamias
David Zehavi
Roni Barzilai
Vivek Mani
Simon Stolero
Original Assignee
Sandisk Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/566,685 external-priority patent/US7917719B2/en
Application filed by Sandisk Corp filed Critical Sandisk Corp
Publication of TW200842584A publication Critical patent/TW200842584A/zh
Application granted granted Critical
Publication of TWI343006B publication Critical patent/TWI343006B/zh

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Storage Device Security (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Debugging And Monitoring (AREA)
TW096146179A 2006-12-04 2007-12-04 Portable module interface with timeout prevention by dummy blocks TWI343006B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/566,685 US7917719B2 (en) 2006-12-04 2006-12-04 Portable module interface with timeout prevention by dummy blocks
US61883906A 2006-12-31 2006-12-31

Publications (2)

Publication Number Publication Date
TW200842584A TW200842584A (en) 2008-11-01
TWI343006B true TWI343006B (en) 2011-06-01

Family

ID=39492837

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096146179A TWI343006B (en) 2006-12-04 2007-12-04 Portable module interface with timeout prevention by dummy blocks

Country Status (6)

Country Link
EP (1) EP2104895B1 (enExample)
JP (1) JP4682263B2 (enExample)
KR (1) KR101276559B1 (enExample)
CN (1) CN101589378B (enExample)
TW (1) TWI343006B (enExample)
WO (1) WO2008070053A2 (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8516232B2 (en) 2009-06-30 2013-08-20 Sandisk Technologies Inc. Method and memory device for performing an operation on data
CN107885622B (zh) * 2016-09-30 2021-03-09 伊姆西Ip控股有限责任公司 处理虚拟数据移动器（vdm）故障备援情况
CN106341488A (zh) * 2016-10-08 2017-01-18 深圳市云舒网络技术有限公司 一种基于tcmu虚拟块设备的网络存储后端超时处理方法
TWI659310B (zh) * 2018-01-04 2019-05-11 旺宏電子股份有限公司 儲存裝置操作方法及其應用其的儲存系統
JP7522547B2 (ja) * 2019-09-20 2024-07-25 キヤノン株式会社 情報処理装置及びリセット制御方法
US11409468B2 (en) 2020-06-03 2022-08-09 Western Digital Technologies, Inc. Storage system and method for using proactive device timeout information
US12081892B1 (en) * 2023-03-10 2024-09-03 Apple Inc. Generation of dummy frame in image sensor interface circuit responsive to detection of timeout error

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57212535A (en) * 1981-06-25 1982-12-27 Nec Corp Terminal equipment having cut avoiding mechanism of logical communication channel
JPS59123361A (ja) * 1982-12-29 1984-07-17 Fujitsu Ltd インタフエ−ス制御方式
JPH0748758B2 (ja) * 1986-05-10 1995-05-24 カシオ計算機株式会社 デ−タ処理装置
JPH02196355A (ja) * 1989-01-26 1990-08-02 Nec Corp 記憶処理システム
US5258952A (en) * 1990-12-14 1993-11-02 Sgs-Thomson Microelectronics, Inc. Semiconductor memory with separate time-out control for read and write operations
JP2972491B2 (ja) * 1993-07-09 1999-11-08 株式会社日立製作所 バス制御機構及び計算機システム
JP3648820B2 (ja) * 1995-12-07 2005-05-18 ソニー株式会社 通信制御方法及び電子機器
JP2001148717A (ja) * 1999-11-19 2001-05-29 Sharp Corp データサーバ装置
US7051145B2 (en) * 2001-12-10 2006-05-23 Emulex Design & Manufacturing Corporation Tracking deferred data transfers on a system-interconnect bus
WO2004105021A1 (en) * 2003-05-20 2004-12-02 Koninklijke Philips Electronics N.V. Handling real-time write errors
JP4026069B2 (ja) * 2003-08-29 2007-12-26 サクサ株式会社 遠隔監視システム

Also Published As

Publication number Publication date
EP2104895B1 (en) 2014-02-12
WO2008070053A3 (en) 2008-08-21
JP4682263B2 (ja) 2011-05-11
EP2104895A4 (en) 2010-12-08
KR20090095578A (ko) 2009-09-09
EP2104895A2 (en) 2009-09-30
CN101589378A (zh) 2009-11-25
CN101589378B (zh) 2014-02-12
TW200842584A (en) 2008-11-01
JP2010511934A (ja) 2010-04-15
WO2008070053A2 (en) 2008-06-12
KR101276559B1 (ko) 2013-06-24

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MM4A Annulment or lapse of patent due to non-payment of fees