TWI318998B - Stopper for chemical mechanical planarization, method for manufacturing same, and chemical mechanical planarization method - Google Patents

Stopper for chemical mechanical planarization, method for manufacturing same, and chemical mechanical planarization method

Info

Publication number
TWI318998B
TWI318998B TW092133892A TW92133892A TWI318998B TW I318998 B TWI318998 B TW I318998B TW 092133892 A TW092133892 A TW 092133892A TW 92133892 A TW92133892 A TW 92133892A TW I318998 B TWI318998 B TW I318998B
Authority
TW
Taiwan
Prior art keywords
chemical mechanical
mechanical planarization
stopper
manufacturing same
planarization
Prior art date
Application number
TW092133892A
Other languages
English (en)
Other versions
TW200420687A (en
Inventor
Mutsuhiko Yoshioka
Eiji Hayashi
Norihiko Ikeda
Original Assignee
Jsr Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jsr Corp filed Critical Jsr Corp
Publication of TW200420687A publication Critical patent/TW200420687A/zh
Application granted granted Critical
Publication of TWI318998B publication Critical patent/TWI318998B/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/042—Lapping machines or devices; Accessories designed for working plane surfaces operating processes therefor
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09D—COATING COMPOSITIONS, e.g. PAINTS, VARNISHES OR LACQUERS; FILLING PASTES; CHEMICAL PAINT OR INK REMOVERS; INKS; CORRECTING FLUIDS; WOODSTAINS; PASTES OR SOLIDS FOR COLOURING OR PRINTING; USE OF MATERIALS THEREFOR
    • C09D183/00—Coating compositions based on macromolecular compounds obtained by reactions forming in the main chain of the macromolecule a linkage containing silicon, with or without sulfur, nitrogen, oxygen, or carbon only; Coating compositions based on derivatives of such polymers
    • C09D183/16—Coating compositions based on macromolecular compounds obtained by reactions forming in the main chain of the macromolecule a linkage containing silicon, with or without sulfur, nitrogen, oxygen, or carbon only; Coating compositions based on derivatives of such polymers in which all the silicon atoms are connected by linkages other than oxygen atoms
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/312—Organic layers, e.g. photoresist
    • H01L21/3121—Layers comprising organo-silicon compounds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/32115—Planarisation
    • H01L21/3212—Planarisation by chemical mechanical polishing [CMP]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/7684—Smoothing; Planarisation

Landscapes

  • Engineering & Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Mechanical Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Materials Engineering (AREA)
  • Wood Science & Technology (AREA)
  • Organic Chemistry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
  • Silicon Polymers (AREA)
TW092133892A 2002-12-06 2003-12-02 Stopper for chemical mechanical planarization, method for manufacturing same, and chemical mechanical planarization method TWI318998B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002354528A JP3918933B2 (ja) 2002-12-06 2002-12-06 化学機械研磨ストッパー、その製造方法および化学機械研磨方法

Publications (2)

Publication Number Publication Date
TW200420687A TW200420687A (en) 2004-10-16
TWI318998B true TWI318998B (en) 2010-01-01

Family

ID=32310752

Family Applications (1)

Application Number Title Priority Date Filing Date
TW092133892A TWI318998B (en) 2002-12-06 2003-12-02 Stopper for chemical mechanical planarization, method for manufacturing same, and chemical mechanical planarization method

Country Status (5)

Country Link
US (2) US7189651B2 (zh)
EP (1) EP1426424A1 (zh)
JP (1) JP3918933B2 (zh)
KR (1) KR101058963B1 (zh)
TW (1) TWI318998B (zh)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3951124B2 (ja) * 2002-12-06 2007-08-01 Ｊｓｒ株式会社 絶縁膜
JP2005175060A (ja) * 2003-12-09 2005-06-30 Jsr Corp 絶縁膜およびその形成方法、ならびに膜形成用組成物
JP4756128B2 (ja) * 2004-10-20 2011-08-24 日揮触媒化成株式会社 半導体加工用保護膜形成用塗布液、その調製方法およびこれより得られる半導体加工用保護膜
US20090115060A1 (en) * 2007-11-01 2009-05-07 Infineon Technologies Ag Integrated circuit device and method
US9559059B2 (en) * 2014-10-29 2017-01-31 Globalfoundries Inc. Methods of forming an improved via to contact interface by selective formation of a conductive capping layer
US9466530B2 (en) 2014-10-29 2016-10-11 Globalfoundries Inc. Methods of forming an improved via to contact interface by selective formation of a metal silicide capping layer
US10556317B2 (en) 2016-03-03 2020-02-11 P.R. Hoffman Machine Products Inc. Polishing machine wafer holder
CN111575713A (zh) * 2020-06-03 2020-08-25 常州龙润环保科技有限公司 激光加工金属辊面表层环保型酸性处理液及处理方法

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US5198298A (en) * 1989-10-24 1993-03-30 Advanced Micro Devices, Inc. Etch stop layer using polymers
JPH07102069A (ja) 1993-03-24 1995-04-18 Mitsui Toatsu Chem Inc ポリ（シリレンエチニレンフェニレンエチニレン）類、その製造方法及びその硬化物
JP3418458B2 (ja) * 1993-08-31 2003-06-23 富士通株式会社 半導体装置の製造方法
JP3322949B2 (ja) 1993-09-22 2002-09-09 三井化学株式会社 固体塩基触媒を用いた有機ケイ素高分子の製造方法
JPH09143271A (ja) 1995-09-21 1997-06-03 Mitsui Toatsu Chem Inc 新規なケイ素系ポリマー及びその製造方法
US5907008A (en) * 1996-03-18 1999-05-25 Kabushiki Kaisha Toshiba Black coloring composition, high heat resistance light-shielding component, array substrate, liquid crystal and method of manufacturing array substrate
JPH10120689A (ja) 1996-10-17 1998-05-12 Mitsui Chem Inc ケイ素系化合物およびケイ素系ポリマーの製造方法
JPH10204181A (ja) 1997-01-23 1998-08-04 Mitsui Chem Inc 含ケイ素高分子化合物の分別方法
JPH11158187A (ja) 1997-04-10 1999-06-15 Mitsui Chem Inc 含ケイ素化合物および含ケイ素ポリマーの製造方法
KR100266749B1 (ko) * 1997-06-11 2000-09-15 윤종용 반도체 장치의 콘택 플러그 형성 방법
JPH1129579A (ja) 1997-07-04 1999-02-02 Mitsui Chem Inc 有機ケイ素化合物およびその製造方法
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Also Published As

Publication number Publication date
EP1426424A1 (en) 2004-06-09
JP3918933B2 (ja) 2007-05-23
US7189651B2 (en) 2007-03-13
JP2004186611A (ja) 2004-07-02
US20040110379A1 (en) 2004-06-10
KR20040049802A (ko) 2004-06-12
KR101058963B1 (ko) 2011-08-23
TW200420687A (en) 2004-10-16
US20070151951A1 (en) 2007-07-05

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Legal Events

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MM4A Annulment or lapse of patent due to non-payment of fees