TWI306646B - Microelectromechanical systems (mems) device including a superlattice - Google Patents

Microelectromechanical systems (mems) device including a superlattice Download PDF

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TWI306646B
TWI306646B TW95119421A TW95119421A TWI306646B TW I306646 B TWI306646 B TW I306646B TW 95119421 A TW95119421 A TW 95119421A TW 95119421 A TW95119421 A TW 95119421A TW I306646 B TWI306646 B TW I306646B
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Taiwan
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superlattice
mems
component
substrate
semiconductor
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TW95119421A
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Chinese (zh)
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TW200707650A (en
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A Blanchard Richard
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Mears Technologies Inc
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81BMICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
    • B81B3/00Devices comprising flexible or deformable elements, e.g. comprising elastic tongues or membranes
    • B81B3/0035Constitution or structural means for controlling the movement of the flexible or deformable elements

Description

'1306646 八、本案若有化學式時’請揭示最能顯示發明特徵的化學式 九、發明說明: 【相關申請案】'1306646 VIII. If there is a chemical formula in this case, please disclose the chemical formula that best shows the characteristics of the invention. IX. Description of the invention: [Related application]

本申凊案主張2〇〇5年5月Ή曰提出之美國專利臨時申請案 (provisional appiication)f 6〇/685,995 號之優先權且本諳 =04年11 $ 18日翻之類·巾請第_92,422號之部^連^ 請案(Contmuation-in-partappiication),美國專利申請第 1〇/992,422 號 係為2003年8月22日提出之類專利巾請第1()/647,_號,現^ 國專利第6,958,486號之部份連續申請案,美國專利第6,·,概號夺 為2003年6月26日提出之美國專利申請第10/603,696號及第&amp; _,621號兩申請案之部份連續申請案,上述各申請案之整體揭开 内容在此列為本發明之參考資料。 【發明所屬之技術領域】 本發明係有關半導體之領域’且特別是有關於包含超晶格之半導體元 件及其相關之方法。 【先前技術】 $用,如增強電荷載體(charge carriers)之動性(mobility),以便增進半 導體元件性能之相關構造及技術,已多有人提出。例如,Qurie等人 之美國專利申請第2003/0057416號案中揭示了矽、石夕-鍺 、 (sil^〇n-germanium)、以及釋力石夕(reiaxe(j siiic〇n)與包括原本將會導致 性能劣退的無雜質區(impurity-free zones)等的形變材質層(strained material layers)。其在上矽層中所形成的雙軸向形變__ stmin)改變 了載體的動性’並得以製作較高速與/或較低功率的元件。Fitzgerald 1306646 利申請公告第2003/0034529號案中則揭示了同樣亦以 矽技術(Stramed SlllC〇ntechno10双)為基礎的一種 CMOS 反 向态(CMOSinvertei*;)。 =^的第6,472,685 82號美國專利中揭示了一種半導體元件,包含 f夹f矽層之間的一層矽及碳層,以使其第二矽層的傳導能帶 (conduction band)及鍵結能帶(valence band)承受伸張形變(tensile 具有較小等效質量(effeCtive刪厶由丄二IS的電場 的電子,便會被限制在其第二石夕層内,因此即可認定其η通i MOSFET得以具有較高的動性。 ^ 等人的第4,937,204號美國專利中揭示了 一種超晶格,其中自 3 —整層的或部份層的雙元化合钤0inary c〇mp〇und)的半導體層 ^、於j單層(,祕㈣)構造,係交替地以蟲晶成長_祕日 ny^方式增長而成。其巾社電赫動方向麵直於超晶格中的 ^人的第5,357,119號美國專利中揭示了 si_Ge的一種短週期 日日格(shortpenodsuperlattice),利用減低超晶格中的合金散佈⑽义 種 幻而達成其較高的動性。依據類似的原理,Candelaria的美國 ^ 5,683,943號專利中揭示了一種增進動性之M〇SFET,其包含_ fj(channel layer),該通道層包括有矽合金與第二種物質,此第二 現,魏分百蝴麵道層處於伸 p6,262齡目翻巾揭示了—種量子Mqu_m w 故’,、包s有兩個屏蔽區(barnerregion)以及夹在屏蔽區之間的一簿的 ,J長成半導,層。其每-屏蔽區各係由厚度致在S六g fc的S1O2/S1單層所構成。屏蔽區之間亦另夹有更厚的矽材質區 (section)。 、 2^00年Μ 6日線上發行的_物理及材料群及製程(Applied &amp;加⑽峋)391 — 402頁,一篇題為「矽 貝不米構中之現象」(“Phenomenainsilie()nnan()Stmetoe deuces )的文章中,Tsu揭示了一種矽及氧的半導體_原子超晶格 (semiconductoi-atomic superlattice,SAS)。此 Si/〇 超晶格構造被 -種有用_量子及發光元件。其中特職示了如何製作並測試―‘This application claims the priority of the US patent provisional application (provisional appiication) f 6〇/685,995, which was filed in May, 1955, and this 谙 4 4 4 4 4 $ $ $ $ 巾 巾 巾 巾_92, 422, ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ U.S. Patent No. 6, 958, 486, U.S. Patent No. 6, </ RTI> </ RTI> U.S. Patent No. 10/603,696 and &amp; _, 621, filed on Jun. 26, 2003. In the case of a number of consecutive applications for the two applications, the overall disclosure of each of the above applications is hereby incorporated by reference. TECHNICAL FIELD OF THE INVENTION The present invention relates to the field of semiconductors and, more particularly, to semiconductor elements including superlattices and related methods. [Prior Art] $, such as the structure and technology for enhancing the mobility of charge carriers in order to improve the performance of semiconductor components, has been proposed. For example, U.S. Patent Application Serial No. 2003/0057416 to Qurie et al. discloses that 矽, 石夕-锗, (sil^〇n-germanium), and reiaxe (j siiic〇n) and including the original Strained material layers, such as imper-free zones, which cause poor performance. The biaxial deformation __ stmin formed in the upper layer changes the mobility of the carrier. And to make higher speed and / or lower power components. Fitzgerald 1306646, in the application for publication No. 2003/0034529, discloses a CMOS inverted state (CMOS invertei*;) which is also based on the technique (Stramed SlllC〇ntechno10). U.S. Patent No. 6,472,685, issued to U.S. Patent No. 6, 472,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, The valence band is subjected to tensile deformation (tensile has a small equivalent mass (effeCtive is deleted by the electric field of the second IS), and it is confined in its second layer, so it can be identified as η通i MOSFETs have a high degree of kinetics. A superlattice is disclosed in U.S. Patent No. 4,937,204, the entire disclosure of which is incorporated herein by reference. The semiconductor layer ^, in the j single layer (, secret (4)) structure, is alternately grown in the form of insect crystal growth _ secret day ny ^. Its towel social eccentric direction is straighter than the super-lattice U.S. Patent No. 5,357,119, the disclosure of which is incorporated herein by reference in its entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire entire disclosure U.S. Patent No. 5,683,943 discloses an M for enhancing mobility. 〇SFET, which includes _fj (channel layer), the channel layer includes a bismuth alloy and a second substance, and the second is now, the Wei bai bai mask layer is in the stretch p6, and the 262-year-old snail reveals Quantum Mqu_m w, ', package s has two shielding areas (barnerregion) and a book sandwiched between the shielding areas, J length into a semi-conductive layer, each of which is made up of thicknesses in S six g fc is composed of S1O2/S1 single layer. There is also a thicker section of the material between the shielding areas. 2,00 years Μ 6th online _ physics and materials group and process (Applied &amp Add (10) 峋 391 - 402 pages, an article entitled "Phenomenainsilie () nnan () Stmetoe deuces), Tsu reveals a semiconductor of yttrium and oxygen _ atom Superconductoi-atomic superlattice (SAS). This Si/〇 superlattice structure is useful as a quantum and luminescent element. The special job shows how to make and test it.

Hi 2 3 ⑽nee diGde)的構造。二極體構造中 ί 電⑽。動方向疋垂直的,亦即’垂直於SAS的層面。該文中所揭^ 1306646 的SAS可以包含半導體層,半導體層之間係由諸如氧原子及c〇分子 等被吸收的物質(adsorbed species)所分離開。被吸收的氧單層以外所 長成的矽’被描述為磊晶層,其具有相當低的缺陷密度(defect density)。其中的一種SAS構造包含有一個1.1 nm厚度的矽質部份, 斤係約為八個矽原子層,而其另一種構造中的矽質部份的厚度則有其 述厚度的兩倍。物理評論通訊(Physics Review Letters),Vol. 89, No. 7 (2002 ^8月12日)中,Luo等人所發表的一篇題為「直接間隙發光矽 之化學設計」(“Chemical Design of Direct-Gap Light-Emitting Silicon”) 的文章,更進一步地討論了 Tsu的發光SAS構造。Hi 2 3 (10) nee diGde). In the diode structure ί (10). The direction of motion is vertical, that is, perpendicular to the level of the SAS. The SAS disclosed in the document 1306646 may comprise a semiconductor layer separated by adsorbed species such as oxygen atoms and c〇 molecules. The 矽' grown outside of the absorbed oxygen monolayer is described as an epitaxial layer having a relatively low defect density. One of the SAS structures contains a 1.1 nm thick tantalum portion, which is about eight tantalum layers, and the tannin portion of the other structure has a thickness that is twice the thickness. Physics Review Letters, Vol. 89, No. 7 (2002 ^ August 12), an issue by Luo et al. entitled "Chemical Design of Direct Gap Luminescence" ("Chemical Design of The article "Direct-Gap Light-Emitting Silicon") further discusses the luminescent SAS structure of Tsu.

Wmig、ysu及Lofgren等人的國際申請公報w〇 02/103,767 A1號案中 揭示了薄矽及氧,碳,氮,磷,銻,砷或氫的一種屏蔽建構區塊,其 可以將垂直流經晶格的電流減小超過四個十之次方冪次尺度(f〇ur八 ontoofmagnitudeh其絕緣層/屏蔽層可容許在鄰接著絕緣層之處沉 積有低缺陷度的蟲晶石夕。A shielded construction block of thin bismuth and oxygen, carbon, nitrogen, phosphorus, antimony, arsenic or hydrogen, which can be used for vertical flow, is disclosed in the International Application Bulletin of Wmig, ysu and Lofgren et al., WO 02/103,767 A1. The current through the crystal lattice is reduced by more than four powers of the power level (f〇ur eight ontoofmagnitudeh, its insulating layer/shield layer can allow the deposition of low-defective serpentine at the place adjacent to the insulating layer.

Mears等人在已公告的英國專利申請第2,347,52〇號案中揭示,非週期 性光子能帶間隙的原理構造(aperiodic photonic band-gap, APBG)可應 用於電子此帶間隙工程(elec^onjc bandgap engineering)之中。特別是, 該申請案中揭示,材料參數(materialparameters),例如,能帶最小值 的位置,等效質量,等等,皆可加以調節,以便獲致具有所要能帶構 造的特性之新的非週期性材料。其他的參數,諸如導電性(electrical COnductlvlty) ’ 熱傳導性(thermal conductivity)及介電係數(dielectric permittivity)或導磁係數(magneticpermeability),皆被宣稱亦可能被設 計於材料之中。 【發明内容】 微機電系統(MEMS)元件’其可包含一底材以及由底材所支 '勺ΣΪΪΐί可移動部件。再者’該至少—可移動部件可移動部 有ΐ數個堆疊層群組之一超晶格,且超晶格的每一層群组 ΐίϊ部份之複數個堆疊之基底半導體單層,以及 在相鄰於基底半導體部份之一晶體晶格内的至少一非半導體 更特別地是,超晶格可以是一壓電超晶格。MEMS元件更可包含由底 6 1306646 ,^承^之一驅動器(此代1*),用以驅動該至少一可移動部件。還有 第一導電接點(electrjcally c〇nductive contact)可被該至少一可较i ’ 承載’而—第二導電接點則可由底材所承載,且與第—導t接 舰接點作咖她哪⑽㈣,用“施加一偏壓至超晶格,之 ί動少可移動部件。再者,超晶格之—些部份係與底材分隔 二· 1還有,MEMS元件可進一步包含由底材所承载之一介i質錯 (dielectric anchor),且其中該至少一可移動部件可由介電質錨所支撐。 ίΐίϊϊif例而言,基底半導體可包含石夕,而該至少-非半導钟 特定而言,該至少—非半_單層可包含由3 厚度。再者,在該至少-超晶格的相鄰層2 相對置的基底轉體部份可以是以化學方式鍵結在—起。 、、 【實施方式】 =合本發明說明書所關式,後面的說明文字段落之中將詳細說明本 么明’而圖式之中所顯示的係為本發明之較佳實施例。不過,本 仍可以許多種不同的形式實地施行,因此本發明之範轉然不應限定 斤顯:之實施例上。相對地’此些實施例僅是被提供來使本 發咖錢為完⑽盡,並得使習於本技藝者能夠完全 本發明1鱗]在本發明的整篇說明文字之中,相同的圖式參 -不二Ϊ用以t不相同或相當的元件’而加撇㈣㈣符號則係用以標 不不同貫施例中的類似元件。 f發明係相關於在原子或分子的層級上控制半導體材料的特性,以達 ,增進半導紅狀性能。料,本發明亦猶關於魏㈣的辨別、 創造以及使用,以便將其應用於轉體元件的導電性通路之中。 1306646 本案申請^所提,理論顯示,本發明此地所揭示描述的某些超晶格構 荷載體的等效質量’並藉由於此種降低可導致較高的 電何 生但巾4人同時聲明本發明之範4不應限定於此理論 上。本個蘭輯領域_文獻之巾,對轉效質量有綠定義加 以描述說曰月。作為等效質量上之增進的一種量測尺度,申請人使用「導 CWductivityreciproealeffectivemasstensor»), 以]\^及1^分別代表電子及電洞,其定義: Σ J&quot; (Vk雖,《)); ^kE(k,n)).^^}l^FjIld3k £&gt;£f B.Z. Q£Mears et al., in the published U.S. Patent Application Serial No. 2,347,52, discloses that the aperiodic photonic band-gap (APBG) can be applied to electronic tape gap engineering (elec^). Onjc bandgap engineering). In particular, it is disclosed in the application that material parameters, for example, positions with minimum values, equivalent masses, etc., can be adjusted to achieve a new aperiodic characteristic of the desired band structure. Sexual material. Other parameters, such as electrical COnductlvlty' thermal conductivity and dielectric permittivity or magnetic permeability, are all claimed to be designed into the material. SUMMARY OF THE INVENTION A microelectromechanical system (MEMS) component 'which can include a substrate and a scoop 可 movable member that is supported by the substrate. Furthermore, the at least one movable part has a plurality of stacked layer groups of superlattices, and each layer of the superlattice is a plurality of stacked base semiconductor single layers, and At least one non-semiconductor adjacent to the crystal lattice of one of the base semiconductor portions, more particularly, the superlattice may be a piezoelectric superlattice. The MEMS component may further comprise a driver (this generation 1*) from the bottom 6 1306646 for driving the at least one movable component. Also, the first conductive contact (electrjcally c〇nductive contact) can be carried by the at least one of the 'i', and the second conductive contact can be carried by the substrate, and is connected to the first guide Coffee (10) (4), use "apply a bias to the superlattice, which moves less moving parts. Furthermore, the superlattice - some parts are separated from the substrate. 2. Also, MEMS components can be further Included is a dielectric anchor carried by the substrate, and wherein the at least one movable component can be supported by a dielectric anchor. For example, the base semiconductor can include a stone eve, and the at least half In particular, the at least one non-semi-monolayer may comprise a thickness of 3. Further, the substrate swivel portion opposite the adjacent layer 2 of the at least superlattice may be chemically bonded. In the following description of the specification of the present invention, the following description will be described in detail, and the preferred embodiment of the present invention is shown in the drawings. However, this can still be implemented in many different forms, because The invention is not limited to the embodiment of the invention: relatively, 'these embodiments are provided only to make the present payment (10) complete, and to enable the skilled person to fully Invention 1 Scale] In the entire description of the present invention, the same pattern is used for the same or equivalent elements, and the (four) (four) symbols are used in different embodiments. Similar to the f. The invention relates to controlling the properties of a semiconductor material at the atomic or molecular level to enhance the semi-conductive red-like properties. The invention also relates to the identification, creation and use of Wei (IV) in order to It is applied to the conductive path of the swivel element. 1306646 The application of the present application, the theory shows that the equivalent mass of certain superlattice load carriers disclosed herein is also reduced by this reduction The result is that the higher the electricity, but the four people at the same time declare that the invention of the invention 4 should not be limited to this theory. This field of the blue field _ literature towel, the green definition of the quality of the transfer is described as 曰月. a measure of the improvement in equivalent mass Degree, the applicant uses "guided CWductivityreciproealeffectivemasstensor»), with \\^ and 1^ respectively representing electrons and holes, which are defined as: Σ J&quot; (Vk though, ")); ^kE(k,n)).^^ }l^FjIld3k £&gt;£f BZ Q£

為電子之定義,以及 -Σ i (Vk紙《)),. (Vk£(k,„)). ^XE(Kn),EF,T) E&lt;EF B.Z. ^ Q£ Λ Σ i(l-/XE(k,n)』F,r))i/3k t&lt;EF B.Z. 5為?洞,定義’其中,係為f *狄拉克分佈(Fermi-Dimc 旦Ε/ ί Ϊ求能量(Ferml咖㈣,T為溫度,E(k,n)為電子在 Ϊί及第η個能帶的狀態之中的能量,下標i及j係對應笛 ΪΪ^Ϊίί中默在電子及麵能帶分職於 申請人對導電性反等效質量張量之定義,係使得材料之導電 質量張量之對應分量情較大數值者,其導電性=量II component)亦得以較大些。在此申請人再度提起下述理論, 述說明之雜格其針料錄反粒f錄量咐蚊之錄卩, ^材,的導電性質’諸如典型地可使電荷載體傳輸有較佳之方向。‘ 虽張量項數的倒數’在此被稱為是導電性等效質量。換句話 — 描述半導體材料構造的特性,則前述電子/電洞的導電性等β 及在載體預定要傳輸的方向上的計算結果,便可用來分辨出 有增進的該些材料。 田,、力政已 。這樣 一超晶 應用前述方式便可為特定目的而選出具有較佳能帶構造的材 的一種實例’可以是應用在一微機電系統(MEMS)元件20中的 1306646 ^ 25材料(將於下文中進一步詳盡討論)。某些應用已被發展出來, • ^中相對較小的元件,諸如可調式電容(加沿恤capacit〇1^、開_switehes) 等’都是所需之應用。此類元件可以有利地利用MEMS製程製造,其 中非常小型之可移動零件係利用一沉積,電鍍或其他額外製程,以及 選擇性蝕刻,及/或其他剝離(lift_off)技術的組合而於一底材上製成。 這類技術典型可製成一種結構,其最終會有部份被釋放(released)或懸浮 (suspended)以容許機械式移動’其典型者係為靜電力之結果。藉由施加 一電壓至彼此分隔的導體(conductors)可以產生靜電力。一種常見的 MEMS結構係為由一導電樑(conductiVe beam)所提供之開關,其一端被 錨定,且其反對端藉由施加靜電力可使其與相鄰的接點相接冷;、。For the definition of electrons, and -Σ i (Vk paper ")),. (Vk£(k,„)). ^XE(Kn), EF,T) E&lt;EF BZ ^ Q£ Λ Σ i(l- /XE(k,n)』F,r))i/3k t&lt;EF BZ 5 is the hole, defined 'where the system is f *Dirac distribution (Fermi-Dimc Ε / Ϊ 能量 energy (Ferml coffee (4), T is the temperature, E(k,n) is the energy of the electron in the state of Ϊί and the ηth band, and the subscript i and j are corresponding to the flute. Applicants' definition of the conductivity inverse equivalent mass tensor is such that the corresponding component of the conductive mass tensor of the material has a larger value, and its conductivity = component II is also larger. Again, the following theory is mentioned, and the description of the singularity of the needles is recorded. The conductive properties of the materials are such that the charge carriers are typically transported in a preferred direction. The reciprocal of the number of items 'herein referred to as the conductive equivalent mass. In other words - describing the characteristics of the semiconductor material structure, the conductivity of the aforementioned electron/hole, etc. β and the calculation in the direction in which the carrier is intended to be transmitted The result is available Identifying the materials that have been enhanced. Tian, Lizheng. An example of such a super-crystal application that can be selected for a specific purpose for a specific purpose can be applied to a MEMS ( 1306646^25 material in MEMS) component 20 (discussed in further detail below). Some applications have been developed, • relatively small components such as adjustable capacitors (plus accompaniment capacit〇1^, Open _switehes) etc. are all required applications. Such components can advantageously be fabricated using MEMS processes, where very small moving parts utilize a deposition, electroplating or other additional process, and selective etching, and/or A combination of other lift-off techniques is made on a substrate. Such techniques are typically made into a structure that will eventually be partially released or suspended to allow mechanical movement. Typically, this is the result of electrostatic forces. Electrostatic forces can be generated by applying a voltage to the conductors that are separated from each other. A common MEMS structure is made up of a conductive beam (conductiVe be The switch provided by am) is anchored at one end, and its opposite end can be connected to the adjacent contact by applying an electrostatic force;

Los Santo等人之文獻,題為”無所不在的無線連接之取p 籲 MEMS for Ubiquitous Wireless Connectivity):第 1 部份一製造”,發表於 2004 年 12 月的 IEEE 微波雜誌(IEEE Microwave Magazine),其中討‘ 各種MEMS元件的應用,該論文之整體揭示内容在此列為本發明之參 考資料。該文陳述MEMS技術可被應用在射頻(Rpy微波系統上,因為 可提供被動元件❻assivedevices),例如開關、可切換(兩態) 電谷器(switchable (two-state) capacitors)、可調式電容(變容器 (varactors))、電感器(inductors)、傳輸線(transmission lines)及共振器 (resonators)。因此,這些元件可被用於無線用品之中,於家中'/地°面、 可携,及太空’諸如電話手機(handsets)、基地台(base stations),及衛星。 •^先參閱圖1與圖2,其顯示包含超晶格25之一 MEMS元件2〇的例 示(亦即,一開關)。應注意的是,如習於本技藝者基於文中所揭示内容 而可以理解者,儘管本說明係描述一 MEMS開關的較佳實施例,但超 響 晶格25亦可有利地應用於許多態樣的MEMS元件中,包含先前所描述 如L〇?Saili〇s.等人的論文中所描述的,啟動一 MEMS的物理基礎其中 之一係為壓電效應(inversepiezoelectric effect)。當在一壓電層兩端施 丨該層的機械形變。此形變的結果能打開一關閉 ,關-打”11 °習知製造MEMS開關的方法 係利形(ca=^rstructure)形成一繼電器。雖然此種結構能提 供所需的功此,但疋其製造卻有困難0 如則所述二亨MEMS ?件2〇中,超晶格μ係電性切製㈣㈣為具有 壓電^ 5 =E]V^S元件提供—可辞動部件。特別是,咖娜元件2〇 進一步颁不G 3 —底材21,諸如一丰導體底材(例如,矽、s〇I等)。如 *1306646 = =格25下面及其附近, 者所可以轉的在Ι^ίίϊίί脱&quot;。^,如冑於本技藝 驅動器電ί 2^ 所承載’用以驅動超晶格25的- 第一導電接點開關的實施例中― 且二“ 5 動器電路24的正盥心查姓以 ?乃'麼接點30,31連接至驅 偏壓接點3G=S^t接此,當鶴11電路24經由 形變,其接t纽的機械 55厳、*狡队F訊號〕在第一與第二訊號線28,29之間傳導。再; 26 &gt; jiisssssr^ (exP〇sed)半導體材料上形成諸如Si〇2之-介電層是有可能。“备的 現在額外地參考圖3與圖4,超晶格25具有一構造,JL传於肩子劣八 可關用已知的原子或分子層沉積的刀 超曰日格25包括有以堆疊形式安排的複數個層群組(layer群 也峨及,透過參考自目3綠之纖賴也許可最為清 導體單層(basesemiconductormonolayer)46,以及其上的一能帶修改層 Ί306646 了晴㈣,鮮修改層50 就是,在;相^之基底半導體部份的晶體晶格内。也 H的較上端或頂端半導體單層中的# s ΐί ίϊ,ΐ=ίϋί的情況下,仍可透過這些層群組延續 嚇罟沾Μ同^本技藝者所可理解,在相鄰的群組45a-45n中相 bond) 5 0 例中故中某原會被結合至非半導體原子(亦即本 ί ίίίϊ 50%#/^ ° 5 以藉此提觸欲獲得版⑽可桃紅個單層, 者’於此所指之非半導體單層或半導 之fiir則仙在單層的材料可以或ίίί 並不必_猶其絲祕歷塊仙狀生早層, 中請人仍聲明本發明之範疇不應限定t ,,之基底半導體部二以 之方向上的電荷載體,較之盔此安排去,曰曰千仃於層面 技藝者所驗“ ,於本 ϊί;ΙΪΑΐ;?:ϊ; 5 格25之胜Μ: Λ*較的電何載體移動性。當然,所有上述招曰 ^ ^41;; -蓋層52係位於超晶格25的頂部層群組咖之上。蓋層a可包含複 Ί306646 π川主50個早層。其他的厚度也可使用。 卞 ί導ί底所 由1V族半導體,ΙΠ-V族 體。如同熟習於本技斤^^匕的群組之中所選定的-基底半導 了簡族的半解族半導體-詞當然亦J 其中之一。 、 疋基底半‘體可包含諸如石夕與鍺至少 合齓 V 5 以或 辦S生何f 鮮彻4種‘ ίΓ#穩藝一 Ϊ i熱4另 及續的本之 以K待i序 12:期習程 氟¥τ·同作 气ο較如製 ftor有,的 氧1UC擁-t體 ^and以之導 料§得例半 fmi亦施定 #-se而實特 轉|行|2 t體進其為 T1-'導的在可 Μ半程。亦 5非製le)體。 層種利ab導物 改一以St半^一 修的積lly非化 帶定沉ma’或 能選行err的物 各中漆沖解_ 應予注意的是, 丁…鄉—e ^ecuIar 1啊)。另亦應注音的、i ί半i;r=iiii;材料及以“㈣ 施^中以及/或者在不同材料的情況之下,如同習於太 技衣者所可以理解的,其並不必然是此種半佔滿 解原子沉積之技藝者所可以理解的情形,在本示意^中“看0同】 而其他的範圍亦可被用在特定的實施例中。 被佔滿然 由於矽及氧目前係被廣泛地應用於一般的半導體製程之 因此得以立即地使用本發明所描述的這些材料。原子者 亦是為目前所廣泛使用的技術。因此,如同習於本技藝紘 的,半導體兀件即得以立即地利用並實施本發明所揭示之超晶格25。 申請人仍聲明本發明之範疇不應限定於其理論上,就_趙a 像是Si/o超晶格,石夕單層的層數最好應為七層或更少;^曰=而日y 能帶在整體範圍内皆共通或相對地均勻,以便獲得所要的 所顯示的4/1重覆構造,就Si/O而言,其模型指出在 電洞的有較佳動性。例如,經計算過的電子(就整體區塊 12 1306646 0^12 4/1 〇;6 : 他ΐ導體元上^^課二件而言可能有利,但在i 晶S者之仏|以4二巾分,效質,要比非超 應注意的是,如同習於本技藝者所$以也是適當的。然而, ,之特別型態以及超晶格在元以的位作的MEMS 層群組45仍可維持實質上未經摻雜^ 超曰曰格25的一或更多的 f外^同時^圖5 ’接著將依據本卿. 25的另-貫施例。在此實施例之中顯示出3/1/5^^^超曰f 別的是,最底下的基底半導體部份46a,具有3個,、 Ϊίίί導J部5個單層。此種組合模“整個ίϊ格25 3==〒25’而言’其電荷載體動性的ΐ進2=層3^ 圖ϋ中在此未特別提及的其他構造部份係與前述圖: 中所纣淪者類似,故在此不再重覆討論。 在某些元件實施例之中,超晶格25的所有基底半導體部份46a_46n, 其厚度可能為相同數目單層疊合的厚度。在其他的實施例之中,至少 某些基底半導體部份46a-46n,其厚度可能是為不同數目單層疊合之厚 度。在另外的實施例之中’所有基底半導體部份46a_46n,其厚度則可 能是不同數目單層疊合之厚度。 圖6A至圖6C顯示應用密度功能理論(Density Functional Theory,DFT) 所計算的能帶構造。本技藝中所廣為習知的是,DFT通常低估能帶間 隙的絕對值。因此間隙以上的所有能帶皆可利用適當的「剪刀形修正」 (“scissorscorrection”)加以偏移。不過,此一能帶的形狀則是公認遠較 為可靠。垂直的能量軸(vertical energy axes)應在此等認知之下加以考 量。 圖6A為整體區塊的矽(bulk silicon,實線表示)以及如圖3中所顯示之 13 1306646 Πί圖超表示)’兩者由迦碼‘點⑹處計算而得之能帶構造 相符之方向讀與Si之一般單位晶元的(〇〇1)方向 簞付曰ί 係•曰4/1 sl/0結構之單位晶元(unitcell)而非Si的一般 顯示了Si傳導能帶最小值的期待位置。圖中的(_ 仕is向係與Sl之一般單位晶元的(110)及(_110)方向符合。習於本 構、:之;L圖中S1之能帶係以指合顯示’以表示它們在4/1 'si/o 構k之適 s 的反晶格方向(reciprocal lattice directions)。Los Santo et al., entitled "Ubiquitous Wireless Connectivity: Part 1 Manufacturing," IEEE Microwave Magazine, December 2004, in which IEEE Microwave Magazine The application of various MEMS components is set forth herein as a reference for the present invention. This paper states that MEMS technology can be applied to RF (Rpy microwave systems because passive components are available), such as switches, switchable (two-state) capacitors, and adjustable capacitors (switchable (two-state) capacitors) Varactors, inductors, transmission lines, and resonators. Therefore, these components can be used in wireless products, at home, in the portable, and in space, such as handsets, base stations, and satellites. • Referring first to Figures 1 and 2, an illustration (i.e., a switch) of a MEMS device 2A including one of the superlattice 25 is shown. It should be noted that, as will be understood by those skilled in the art based on the disclosure herein, although the description describes a preferred embodiment of a MEMS switch, the super-sound lattice 25 can be advantageously applied to many aspects. One of the physical bases for initiating a MEMS is the inverse piezoelectric effect, as described in the previously described papers such as L. Saili〇s. The mechanical deformation of the layer is applied across a piezoelectric layer. The result of this deformation can open a closed, off-hook "11 ° conventional method of manufacturing MEMS switches to form a relay (ca = ^ rstructure) to form a relay. Although this structure can provide the required work, but However, there are difficulties in manufacturing. For example, in the second MEMS device, the superlattice μ is electrically cut (4) and (4) is provided with a piezoelectric ^ 5 = E] V ^ S component - a reciprocable component. , the Gana component 2〇 further awards no G 3 — substrate 21, such as a ferroconductor substrate (eg, 矽, s〇I, etc.). If *1306646 = = below and near the grid 25, the person can turn In the embodiment of the present invention, the second conductive contact switch is used to drive the superlattice 25 - and the second "5" 24 is the right heart to check the surname to the ?? 'what contact 30, 31 connected to the drive bias contact 3G = S ^ t then, when the crane 11 circuit 24 through the deformation, its connection to the button machine 55 厳, * The F Team F signal] is conducted between the first and second signal lines 28, 29. Further; 26 &gt; jiisssssr^ (exP〇sed) It is possible to form a dielectric layer such as Si〇2 on the semiconductor material. Referring additionally to Figures 3 and 4, the superlattice 25 has a configuration, and the JL is transmitted over the shoulders. The knife is deposited with a known atomic or molecular layer. A plurality of layer groups arranged in a form (the layer group is also referred to, and the basesemiconductor monolayer 46 may be the most clear by reference to the self-seeking 3 green layer, and a band modification layer 306646 on it is fine (four), The freshly modified layer 50 is in the crystal lattice of the base semiconductor portion of the phase, and also in the upper end of the H or in the case of # s ΐ ίίίί in the top semiconductor single layer, 仍=ίϋί The group continues to be scared and the same as the skilled artisan understands that in the adjacent groups 45a-45n, in the case of 50, some of them will be combined to non-semiconductor atoms (ie, this ί ίίίϊ 50%#/^ ° 5 to obtain a version of the pink (single) single layer, which is referred to as a non-semiconductor single layer or a semi-conductive fiir, which can be either singly or singly _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ The charge carriers in the direction of the base semiconductor unit are arranged in comparison with the helmets. The millennium is tested by the level craftsman. "In this ϊ ΙΪΑΐ; ΙΪΑΐ;?: ϊ; 5 格 25 victory Μ: Λ*Compared with the carrier mobility. Of course, all the above measures ^ ^ 41;; - the cover layer 52 is located above the top layer group coffee of the superlattice 25. The cover layer a may include the Ί 306646 π川主50 early layers. Other thicknesses can also be used. 卞 导 ί 底 由 由 由 由 由 由 由 1 1 1 1 1 1 1 1 1 1 1 1 1 1 V V V V V V V 。 。 。 。 。 。 。 。 。 。 。 。 。 The semi-degenerate semiconductor of the Jane family - of course, one of the J. The 疋 basal half body can include, for example, Shi Xi and 锗 at least 齓 V 5 or to do S and ho ho fresh 4 kinds ' Γ Γ 稳Art Yi Ϊ i hot 4 and the continuation of the original K to wait i order 12: period of the process of fluorine ¥ τ · with the gas ο than the system ftor, the oxygen 1UC has -t body ^and with the guide § In the case of the example, the half-fmi is also set to #-se and the actual turn|row|2 t into the T1-' guide in the half of the path. Also 5 is not made. The layer of the ab lead is changed to a semi-finished product, the lly non-chemical zone is fixed, and the err, which can be selected, is lacquered. It should be noted that Ding... Township-e ^ecuIar 1 ah). It should also be phonetic, i ί half i; r = iiii; material and in the case of "(4) and / or in the case of different materials, as the acquaintance of the craftsman can understand, it is not necessarily It is a situation that can be understood by those skilled in the art of semi-filled atomic deposition. In the present description, "see 0" and other ranges can also be used in a specific embodiment. Occupied by the fact that niobium and oxygen are currently widely used in general semiconductor processes, the materials described in the present invention can be used immediately. Atomists are also the technology that is widely used today. Thus, as is conventional in the art, the semiconductor element is immediately utilized and implemented in the superlattice 25 disclosed herein. The Applicant still declares that the scope of the present invention should not be limited to its theory. For example, the Zhao a image is a Si/o superlattice, and the number of layers of the Shi Xi single layer should preferably be seven layers or less; The day y band can be common or relatively uniform over the entire range in order to obtain the desired 4/1 repeat structure. For Si/O, the model indicates that the hole has better mobility. For example, the calculated electrons (as for the overall block 12 1306646 0^12 4/1 〇; 6 : he may be advantageous in terms of the conductor element, but in the case of the i-crystal S | The second towel, the effect, is more important than the non-excessive attention, as is appropriate for the skilled person. However, the special type and the MEMS layer of the superlattice in the position of the element Group 45 can still maintain substantially one or more of the undoped 曰曰 25 同时 同时 同时 图 图 图 ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' 。 。 。 。 。 。 。 。 。 。 The other shows that the 3/1/5^^^ super 曰f is the bottom semiconductor part 46a, which has three, and five singular layers of the J part. This combination mode "the whole ϊ 25 3 == 〒 25 'in terms of its charge carrier dynamics 2 = layer 3 ^ The other structural parts not specifically mentioned in the figure are similar to those in the above figure: This is not discussed repeatedly. In some of the component embodiments, all of the base semiconductor portions 46a-46n of the superlattice 25 may have a thickness that is the same number of monolithic laminates. Among other embodiments, at least The thickness of the base semiconductor portions 46a-46n may be a different number of monolithic laminates. In other embodiments, the thickness of all of the base semiconductor portions 46a-46n may be a different number of monolithic laminates. Figures 6A through 6C show the energy band architecture calculated using Density Functional Theory (DFT). It is well known in the art that DFT generally underestimates the absolute value of the band gap. The energy bands can be offset by the appropriate "scissorscorrection". However, the shape of this band is recognized to be far more reliable. The vertical energy axis should be recognized here. Considered below. Figure 6A shows the bulk of the block (the solid line is shown) and the 13 1306646 Π 图 超 超 ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' 两者 ' The direction of the band can be read in accordance with the direction of the general unit cell of Si (〇〇1) direction 曰 系 曰 曰 4 / 1 sl / 0 structure of the unit cell (unitcell) instead of Si generally shows Si Conductive band The expected value of the small value. In the figure, the (_ shi is is in accordance with the (110) and (_110) directions of the general unit wafer of Sl. It is used in the constitutive and constitutive elements; the energy band of S1 in the L diagram is indicated by the indication They are in the 4/1 'si/o configuration k's s in the reciprocal lattice directions.

Si&quot;?&quot;出,與整體區塊鄉丨)相較之下,4/1 Si/〇構造之傳導能帶最 =點(G)之處,而其鍵結能帶的最小值則是出 構造與&amp;的傳導能帶最小值之曲率,ίί較ίΐί 之2較大的曲率’廷是因為額外氧層引入了擾亂所造成的能帶分離 線)以及4/1 Si/〇超晶格25 (虛線),兩者由Ζ點 ίίΐίΖΐϊ帶構造之。此圖巾所齡的是⑽)方向上鍵結 石夕(實線)以及圖5中所顯示之5/1/3/1如〇超晶格25, 由柄及z點之處計算得之能帶構造之曲線圖Ξί «/3/1^0構造的對稱性,在(100)及(010)方向上計算所得的铲帶社槿 si/〇的實例ι中,傳導^帶mm疋等向性的。注意到在5/ι/3/ι 於ζ=ί 傳¥此帶取小值及鍵結能帶最大值兩者皆位於或近 增加是等效質量減小的一指標,但經由導電性反等效質詈 ^ ^的sf异’仍可以進行適當的比較及判 太 ς “—乃是心的—=陣單元 工理論,但不限於此理論,對先前說 ίίΓΐίΐ:產生具有壓電特性之超晶格半導體材 =下將詳細說明形成可應用在MEMS元件 塵電Q域或膜(mm)而製作。於膜形成且金屬化之後,除了在圖^ 1306646 聲其蝴以使之 70加以充填。更特別地,s〇I底材包括電彳餘H“ 在介電質層上的一半_(例如,石夕)層72。—塾|=如’=)層71與 73形成於半導體層72上,隨後一氮化物(例如乳氮匕 ) 上,以及進行光遮罩與蝕刻步驟以形成溝渠7〇,)曰,儿積於,、 70 «125 MMM 74Si&quot;?&quot;, compared with the overall block nostalgia, the conduction energy band of the 4/1 Si/〇 structure is the most = point (G), and the minimum value of the bond energy band is The curvature of the minimum value of the conduction energy band of the structure and &amp; the larger curvature of the ίίίίί ' 是 is because the extra oxygen layer introduces the energy band separation line caused by the disturbance) and the 4/1 Si/〇 supercrystal Grid 25 (dashed line), both constructed by Ζ点ίίΐίΖΐϊ. The age of the towel is (10)) in the direction of the stone (solid line) and the 5/1/3/1 as shown in Figure 5, such as the superlattice 25, calculated from the shank and the z point Curve with construction Ξί «/3/1^0 structure symmetry, calculated in the (100) and (010) directions of the shovel 槿si / 〇 example ι, conduction ^ belt mm 疋 isotropic Sexual. Note that in 5/ι/3/ι ζ ί ί ί 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此 此The equivalent quality 詈 ^ ^ sf different 'can still be properly compared and judged too "" is the heart - = array unit work theory, but not limited to this theory, to the previous ίίΓΐίΐ: produce piezoelectric properties Superlattice semiconductor material = will be described in detail to form a dust cell Q domain or film (mm) that can be applied to the MEMS device. After the film is formed and metallized, in addition to the film in Fig. 1306646, it is filled to 70. More particularly, the s〇I substrate includes an electrical HH "half _ (eg, Shi Xi) layer 72 on the dielectric layer. - 塾 | = such as '=) layers 71 and 73 are formed on the semiconductor layer 72, followed by a nitride (such as milk nitrogen), and a light mask and etching step to form a trench 7 〇, 儿, 儿Yu, 70 «125 MMM 74

Sl?3於料。然後藉祕刻移除氮化與 以及釋放侧,_成上㈣M麵耕職其 iS ίΐϊ 類似地使用沉積步驟來填充 株在這些以及於下所討論之一系歹愤程圖Sl? 3 is expected. Then use the secret engraving to remove the nitriding and release side, _ into the upper (four) M surface till its iS ίΐϊ similarly use the deposition step to fill the strain in these and one of the discussed below

Lti 1^ 絲稍如,介㈣層71伽似於介電 貝層81,91等)。如此,這些元件僅於其第一次出現時加以描述說明。 係單晶超晶格半導體材料形成於溝渠8〇 了說層84上形成多晶超晶格半導體材料87 (為 似於上述Η 7A 7F 二雜點加以標不)之外,圖8A_8F的製程顯示類 備好可i4行與^物層金 ΐίί(^ 9^,可用以沿著—溝渠的每—側郷成—分離橫向壓 ί製i ft =t9F中所顯示的製程係相似於圖7a-7f中所顯示 於整個溝超晶格95係選擇性地沉積於溝渠壁9〇上,對照 s ί ϊ顯示的又另一種製程,即為圖i〇a_i〇f所顯示者。 製% 輮準半導體底材1〇2啟始,對照於一 S0I底材。其他不同 15 1306646 iUi if it,擇性沉積超晶格105之前,先於溝渠100的 t f(例如’Si〇2)(圖10B)。相似於圖8諸的是圖 溝湛110二程,其間之不同是超晶格115顧擇性地沉積於 3,壁對照轉個溝渠之填滿。再又另—種相似於圖 中所顯示的製程,其間之不同是其加入如圖 在接點門=,、夕曰曰石夕〉儿積。在圖9-12中顯示的所有製程程序之中, f Sii mg)形成之前,壓電超晶格材料的頂上已出現 =本技藝者在瞭解了本案於前述制文字及附_描述的發明揭示 内谷的巧之下,當可推知瞭騎對本發_許多修改變動以及其他 例作法。,因此,應予瞭解的是,本發明之範#不應限定於 働細,其他的修改魏及其他魏例仍應是屬本發 口月 &lt; 猾狎In臂。 【圖式簡單說明】 認。1為依據本發日月包含一超晶格的一微機電系统(mems)元件之上視 ϊ 歷!的MEMS元件之2-2線切出的橫截面圊。 格可應jit另—實施例之大比例放大橫截面圖,超晶 曰曰 mi知技藝中之整體區塊石夕以及圖 §6B 之處計算得之能帶構造之“ ^。 曰曰 si/0^ 81/0 ^ MEMS元件中^超’其顯不依據本發明製作應用在-=^ΐΪί;η方ί顯示依據本發明製作應用在- 方I顯爾本發咖應用在- 圖购⑽係—系列示意橫截面圖,其顯示依據本發明製作應用在一 1306646 MEMS元件中的超晶格之再一種方法。 圖11A-11F係一系列示意橫截面圖,其顯示依據本發明製作靡 一 MEMS元件中的超晶格之另一種方法。 &amp; 圖12A-12G係一系列示意橫截面圖,其顯示依據本發明製作 MEMS元件中的超晶格之又—種方法。 【主要元件符號說明】 20微積電系統(MEMS)元件 21底材 22溝渠 23介電質錨 24驅動器電路 25超晶格 25超晶格 26第一導電接點 27第二導電接點 28第一訊號線 29第二訊號線 30偏壓接點 31偏壓接點 32導電線/金屬化 33導電線/金屬化 34氧化層 45層群組 45a-45n 群組 45a’-45n’ 群組 46基底半導體單層 46’基底半導體單層 46a-46n基底半導體部份 46a’-46n’基底半導體部份 50能帶修改層 50’能帶修改層 52蓋層 52,蓋層 70溝渠 71介電層 72半導體層 17 1306646 ' 73塾氧化物層 74氮化物層 7 5超晶格 76介電質 80溝渠 81介電層 82半導體層 83墊氧化物層 84氮化物層 85超晶格 86介電質 87多晶超晶格半導體材料 88氧化層 φ 90溝渠 91介電層 92半導體層 93墊氧化物層 94氮化物層 95超晶格 96介電質 100溝渠 102半導體底材 103墊氧化物層 104氮化物層 105超晶格 .106介電質 攀 110溝渠 111介電層 t . 112半導體層 113墊氧化物層 • 114氮化物層 115超晶格 116介電質 117多晶超晶格半導體材料 118氧化層 120溝渠 - 122半導體層 . 123墊氧化物層 124氮化物層 18 1306646 125超晶格 126介電質 127多晶超晶格半導體材料 128氧化層 十、申請專利範圍: 1· 一種微機電系統(MEMS)元件,包含: 一底材;以及 ^少二可移動部件.,其係由該底材所支禮,並包括含有複數 疊的層群組之-超晶格,且該超晶格的每—層群組包含 2 基底半導體部份之複數個堆疊之基底半導體單層,以及被丄 相鄰於基底半導體部份之一晶體晶格内的至少一非半導體單^在 2.申請專利範圍第1項之MEMS元件,其中該超晶格包含—壓電 超晶格。 3. 如申請專利範圍第1項之MEMS元件,更包含由該底材所承 之一驅動器,用以驅動該至少一可移動部件。 4·如申請專利範圍第1項之MEMS元件,更包含由該至少— 動部件所承載之一第一導電接點,以及由該底材所承載之一 導電接點,其並與該第一導電接點對齊》 一 5-如申清專利範圍第1項之MEMS元件,更包含連接至該第一導 電接點之一第一射頻(RF)訊號線,以及連接至該第二導^接點之 一第二RF訊號線。 6. 如申請專利範圍第1項之MEMS元件,更包含—對偏壓接點, 用於對該超晶格施加一偏壓,以移動該至少一可移動部件: 7. 如申請專利範圍第1項之MEMS元件,其中該超晶格之—些部 份係與該底材分隔開。 二口The Lti 1^ wire is slightly the same, and the (four) layer 71 is similar to the dielectric layer 81, 91, etc.). As such, these elements are described only as they appear for the first time. The single crystal superlattice semiconductor material is formed on the trench 8 and the polycrystalline superlattice semiconductor material 87 is formed on the layer 84 (for the above-mentioned Η 7A 7F two-noise point), the process display of FIG. 8A_8F The class is ready for i4 lines and ^1 layer of gold ΐίί (^ 9^, can be used along the - each side of the ditch - separation lateral pressure i i ft = t9F shown in the process is similar to Figure 7a - 7f shows that the entire trench superlattice 95 is selectively deposited on the trench wall 9〇, and another process shown by s ί ϊ is shown in Figure i〇a_i〇f. The semiconductor substrate 1〇2 is initiated, compared to a S0I substrate. Others 15 1306646 iUi if it, before the selective deposition of the superlattice 105, precede the tf of the trench 100 (eg 'Si〇2) (Fig. 10B) Similar to Figure 8, the two are the two passes of Tugou Chan, the difference between which is that the superlattice 115 is selectively deposited on the wall, and the wall is filled with a ditch. The other is similar to the one shown in the figure. The process displayed, the difference between which is the addition of the process shown in Fig. =, 夕曰曰石夕〉儿积. All the process procedures shown in Figure 9-12 , f Sii mg) before the formation of the piezoelectric superlattice material has appeared = the skilled person understands the case in the above-mentioned system and the description of the invention reveals the inner valley, when it can be inferred that the ride is _ Many changes and other examples. Therefore, it should be understood that the scope of the present invention should not be limited to fine, and other modifications, Wei and other Wei cases, should still belong to the present month &lt; 猾狎In arm. [Simple description of the diagram] Recognition. 1 is a cross-section 切 cut out of line 2-2 of the MEMS component of a micro-electromechanical system (mems) component including a superlattice according to the present day and the month. Ge Ke should be a large-scale enlarged cross-sectional view of the embodiment, the overall block in the super-crystal 曰曰mi knowing technology and the energy band structure calculated in the §6B figure. ^. 曰曰si/ 0^ 81/0 ^ MEMS component ^ super ' it is not produced according to the invention in -=^ΐΪί; η square ί display according to the invention made in the application - Fang I Xianer this coffee application in - Figure (10) A series of schematic cross-sectional views showing yet another method of fabricating a superlattice for use in a 1306646 MEMS component in accordance with the present invention. Figures 11A-11F are a series of schematic cross-sectional views showing the fabrication of a crucible in accordance with the present invention. Another method of superlattice in MEMS elements. &amp; Figures 12A-12G are a series of schematic cross-sectional views showing yet another method of fabricating a superlattice in a MEMS element in accordance with the present invention. 20 micro-electric system (MEMS) component 21 substrate 22 trench 23 dielectric anchor 24 driver circuit 25 superlattice 25 superlattice 26 first conductive contact 27 second conductive contact 28 first signal line 29 Two signal line 30 bias contact 31 bias contact 32 conductive line / metallized 33 conductive /metallization 34 oxide layer 45 layer group 45a-45n group 45a'-45n' group 46 base semiconductor single layer 46' base semiconductor single layer 46a-46n base semiconductor portion 46a'-46n' base semiconductor portion 50 Band modification layer 50' can be modified layer 52 cap layer 52, cap layer 70 trench 71 dielectric layer 72 semiconductor layer 17 1306646 '73 塾 oxide layer 74 nitride layer 7 5 superlattice 76 dielectric 80 ditch 81 Dielectric layer 82 semiconductor layer 83 pad oxide layer 84 nitride layer 85 superlattice 86 dielectric 87 polycrystalline superlattice semiconductor material 88 oxide layer φ 90 trench 91 dielectric layer 92 semiconductor layer 93 pad oxide layer 94 Nitride layer 95 superlattice 96 dielectric 100 trench 102 semiconductor substrate 103 pad oxide layer 104 nitride layer 105 superlattice. 106 dielectric climbing 110 trench 111 dielectric layer t. 112 semiconductor layer 113 pad oxidation Particle layer • 114 nitride layer 115 superlattice 116 dielectric 117 polycrystalline superlattice semiconductor material 118 oxide layer 120 trench - 122 semiconductor layer. 123 pad oxide layer 124 nitride layer 18 1306646 125 superlattice 126 127 polycrystalline superlattice semiconductor material oxide layer 10, application Scope: 1 · A microelectromechanical system (MEMS) component, comprising: a substrate; and a second movable part, which is bound by the substrate, and includes a group of layers containing a plurality of stacks - a superlattice, and each layer group of the superlattice comprises a plurality of stacked base semiconductor monolayers of 2 base semiconductor portions, and at least one of the tantalum lattices adjacent to one of the base semiconductor portions A non-semiconductor MEMS device according to claim 1, wherein the superlattice comprises a piezoelectric superlattice. 3. The MEMS component of claim 1 further comprising a driver carried by the substrate for driving the at least one movable component. 4. The MEMS component of claim 1, further comprising a first conductive contact carried by the at least one moving component, and a conductive contact carried by the substrate, and the first Alignment of the conductive contacts. A MEMS component according to claim 1 of the scope of the patent, further comprising a first radio frequency (RF) signal line connected to the first conductive contact, and connected to the second conductive connection One of the second RF signal lines. 6. The MEMS component of claim 1 further comprising a pair of bias contacts for applying a bias voltage to the superlattice to move the at least one movable component: 7. A MEMS component of the first aspect, wherein portions of the superlattice are separated from the substrate. Two

Claims (1)

1306646 125超晶格 126介電質 127多晶超晶格半導體材料 128氧化層 十、申請專利範圍: 1· 一種微機電系統(MEMS)元件,包含: 一底材;以及 ^少二可移動部件.,其係由該底材所支禮,並包括含有複數 疊的層群組之-超晶格,且該超晶格的每—層群組包含 2 基底半導體部份之複數個堆疊之基底半導體單層,以及被丄 相鄰於基底半導體部份之一晶體晶格内的至少一非半導體單^在 2.申請專利範圍第1項之MEMS元件,其中該超晶格包含—壓電 超晶格。 3. 如申請專利範圍第1項之MEMS元件,更包含由該底材所承 之一驅動器,用以驅動該至少一可移動部件。 4·如申請專利範圍第1項之MEMS元件,更包含由該至少— 動部件所承載之一第一導電接點,以及由該底材所承載之一 導電接點,其並與該第一導電接點對齊》 一 5-如申清專利範圍第1項之MEMS元件,更包含連接至該第一導 電接點之一第一射頻(RF)訊號線,以及連接至該第二導^接點之 一第二RF訊號線。 6. 如申請專利範圍第1項之MEMS元件,更包含—對偏壓接點, 用於對該超晶格施加一偏壓,以移動該至少一可移動部件: 7. 如申請專利範圍第1項之MEMS元件,其中該超晶格之—些部 份係與該底材分隔開。 二口 1306646 9· g申請專利範圍第1項之MEMS元件,其中該基底半 10·如申請專利範圍第1項之MEMS元件,J:中該至少— 單層包含氧。 導體包含 非半導體 UiU;™元件,其中該至少-非半 導體 13. 如申請專利範圍第i項之mems元件, 導體部份全皆為相同數目單層之厚度。〃 、〇些基底半. 14. 如^請專利範圍第1項之MEMS元件,直中兮此其m 之中的至少某些係為不同數目單層之厚度、中^基底半導體部份 l5’f ^請專利範圍第1項之MEMS元件,中在令 目鄰層群組内相對置的基底半導體部份係以化學;式;:纟^ 16·種微機電系統(MEMS)元件,包含: _底材; =可移動部件,其係由該底材所支撐; -第點,其係由該至少—可移動部件所承載· 之第2電接點,其係由該底材所承载’並與該第Λ電接點對齊 =器’其係由該底材所承載,用以驅動小 …一可移動部件包括含有複數個堆疊層群組超1格部=亥 20 1306646 超晶格的每一層群組包含有界定一基底半導體部份之複數個堆疊 之基底半導體單層,以及被限定在相鄰於基底半導體部份之一晶體 晶格内的至少一非半導體單層。 17_如申凊專利範圍第μ項之MEMS元件,莫中該超晶格包含一壓電 超晶格。 I8·如申睛專利範圍第16項之MEMS元件,更包含連接至該第一導電 接點之一第一射頻(RF)訊號線,以及連接至該第二導電接點之一第 二RF訊號線。 19=申請專利範圍$ 16項之ΜΕ·元件,更包含由該超晶格所 的一對偏壓接點,且其係耦接至該驅動器。 2〇ΪίΪί項之臟S元件,其中該超晶格之—些部份 範項之Μ簡元件,更包含由該底材所承载之 电質!田,且其中該至少一可移動部件係由該介電質錦所支擇。 22ΐ申ϊίϋ範圍第16項之mems元件,其中該基底半導體包人 ,且其中該至少一非半導體單層包含氧。 包3 23ΐ ί ϊίΓΐ圍第16項之MEMS元件,其中在該至少—赶曰格沾 相㈣群組内相對置的基底半導體部份係以化學方式鍵結H的 211306646 125 superlattice 126 dielectric 127 polycrystalline superlattice semiconductor material 128 oxide layer ten, patent application scope: 1 · A microelectromechanical system (MEMS) component, comprising: a substrate; and ^ two movable parts , which is bound by the substrate, and includes a superlattice comprising a plurality of layers of layers, and each of the superlattice groups comprises a plurality of stacked bases of 2 base semiconductor portions a semiconductor monolayer, and at least one non-semiconductor monolayer in the crystal lattice of one of the base semiconductor portions, wherein the superlattice comprises a piezoelectric super Lattice. 3. The MEMS component of claim 1 further comprising a driver carried by the substrate for driving the at least one movable component. 4. The MEMS component of claim 1, further comprising a first conductive contact carried by the at least one moving component, and a conductive contact carried by the substrate, and the first Alignment of the conductive contacts. A MEMS component according to claim 1 of the scope of the patent, further comprising a first radio frequency (RF) signal line connected to the first conductive contact, and connected to the second conductive connection One of the second RF signal lines. 6. The MEMS component of claim 1 further comprising a pair of bias contacts for applying a bias voltage to the superlattice to move the at least one movable component: 7. A MEMS component of the first aspect, wherein portions of the superlattice are separated from the substrate. The MEMS component of the first application of the first aspect of the invention is the MEMS component of the first aspect of the invention, wherein the substrate is a MEMS component as in the first application of the patent scope, J: at least - the single layer contains oxygen. The conductor comprises a non-semiconductor UiU;TM component, wherein the at least-non-conductor 13. As in the MEMS element of the scope of claim i, the conductor portions are all the same number of single layer thicknesses. 〃 〇 〇 〇 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. 14. f ^Please refer to the MEMS component of the first item of the patent range, in which the opposite base semiconductor portion in the group of adjacent layers is chemically sized; ;^16·Microelectromechanical system (MEMS) components, including: _substrate; = movable part supported by the substrate; - point, which is the second electrical contact carried by the at least - movable part, which is carried by the substrate' And aligning with the second electrical contact = the device is carried by the substrate to drive the small... a movable component comprising a plurality of stacked layer groups exceeding one grid = Hai 20 1306646 superlattice Each layer group includes a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer defined adjacent to a crystal lattice of one of the base semiconductor portions. 17_ As for the MEMS component of the item μ of the patent scope, the superlattice comprises a piezoelectric superlattice. The MEMS component of claim 16 further comprising a first radio frequency (RF) signal line connected to one of the first conductive contacts, and a second RF signal connected to one of the second conductive contacts line. 19 = The component of the patent application range of $16, further comprising a pair of bias contacts connected by the superlattice and coupled to the driver. 2 〇Ϊ Ϊ Ϊ 脏 脏 , , , , , , , , , , , , , , , , 超 超 超 超 超 超 超 超 超 超 超 超 超 超 超 超 超 超 超 超 超 超 超 超 超 超 超 超 超The dielectric quality is chosen. The MEMS element of claim 16, wherein the base semiconductor is encapsulated, and wherein the at least one non-semiconductor monolayer comprises oxygen. Package 3 23 ΐ ί Γΐ 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第 第
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