TWI239647B - Semiconductor device including band-engineered superlattice - Google Patents
Semiconductor device including band-engineered superlattice Download PDFInfo
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1239647 玖、發明說明: 【發明所屬技術領域】 本發明係有關半導體之領域,且特別是有關於以能帶工程(energy band engineering)為基礎而具有增進特性之半導體及其相關之方法。 【相關申請案】 本申請案係為2003年6月26日申請,題為「具有增進之導電性等 效質量之半導體構造」(“Semiconductor Structures Having Improved1239647 发明 Description of the invention: [Technical field to which the invention belongs] The present invention relates to the field of semiconductors, and in particular, to semiconductors having improved characteristics based on energy band engineering and related methods. [Related Applications] This application was filed on June 26, 2003 and is entitled "Semiconductor Structures Having Improved
Conductivity Effective Mass”)及「製作具有增進之導電性等效質量半導 體構造之方法」(“Method of Fabricating Semiconductor Structures Having Improved Conductivity Effective Mass”)之美國專利第 號及第 --—.—號兩申凊案之部份連績申請案(Continuation-in-part application)。該兩案之整體揭示内容在此列為本發明之參考資料。 【先前技術】 …利用諸如增強電荷載體(charge carriers)之動性(mobility),以便增進 半導體元件性能之相關結構及技術,已多有人提出。例如,Currie等人 之美國專利申請第2003/0057416號案中揭示了矽,矽-鍺 、 (silicon-germanium),與釋力石夕(reiaxed silicon),以及包括了原本將會導 致性能劣退的無雜質區(impurity-free zones)等的形變材質層(strained material layers)。其在上矽層中所形成的雙軸向形變(biaxial sirain)改變 了載體的動性,並得以製作較高速與/或較低功率的元件。Fitzgerald等 人的1國專利申請公告第2003/0034529號案中則揭示了同樣亦以類似 的形變矽技術(strained silicon technology)為基礎的一種CM〇s反向哭 (CMOS iiwertei*)。"Conductivity Effective Mass") and "Method of Fabricating Semiconductor Structures Having Improved Conductivity Effective Mass" (U.S. Patent No. and No. ---.-) Part of the continuation-in-part application. The overall disclosures of the two cases are hereby incorporated by reference. [Prior Art]… Relevant structures and technologies that utilize the mobility of charge carriers to improve the performance of semiconductor devices have been proposed. For example, U.S. Patent Application No. 2003/0057416 to Currie et al. Discloses silicon, silicon-germanium, and reiaxed silicon, and includes materials that would otherwise cause poor performance. Deformed material layers such as impurity-free zones. The biaxial sirain formed in the upper silicon layer changes the mobility of the carrier and enables the production of higher speed and / or lower power components. Fitzgerald et al.'S National Patent Application Publication No. 2003/0034529 discloses a CMOS iiwertei *, which is also based on similar strained silicon technology.
Takagi的第6,472,685 B2號美國專利中揭示了一種半導體元件,包 έ有夾在矽層之間的一層矽及碳層,以使其第二矽層的傳導能帶 (conduction band)及鍵結能帶(vaience band)承受伸張形變(_此 strain)。具有較小等效質量(effective mass),並由 會被限制在其第二石夕層内,.因此即可β其η通I MOSFET侍以具有較高的動性。 I^ibashi等人的第4,937,2〇4號美國專利中揭示了一種超晶格,其 ^ δ整層的或部份層的雙元化合物(binary compound)的半導體層 ,1239647 多層(2了八個單層(monolayer))結構,係交替地以磊晶成長(epitaxiai 的方式增長而成。射的主電赫向赫直於超晶格中的 各盾平面。 办曰^ng等人的第5,3575119號美國專利中揭示了 Si_Ge的一種短週期 超曰曰秸㈤贈阿加哪沉恤㈣’利用減低超晶袼中的合金散佈⑽ SCattermg)而達成其較高的動性。依據類似的原理,Candelana的美國第 5,683,943號專利中揭示了一種具增進動性2M〇SFET,其通道層 包ί有石夕之一種合金與第二種物質,此第二種速質曰係以 通道層處於伸張應力(tensile stress)況態下的百分比 中替代性地出現。 二216,262號美國專利中揭示了一種量子井㈣她m wel1) 構仏,其包含有兩個屏蔽區(baiTierregion),以及夾於其間的一薄声 -晶長成半導,層。其每-屏蔽區各係由厚度範圍大致在二至六』 之單層所構成。屏蔽區之間另亦夹树材質的―段遠為較厚 抓2〇00 月6日線上發行的應削勿理及材料科學及製程(ΑΡΡΜTakagi's U.S. Patent No. 6,472,685 B2 discloses a semiconductor device that includes a silicon and carbon layer sandwiched between silicon layers so that the second silicon layer has a conduction band and a bonding energy. The band (vaience band) undergoes tensile deformation (_this strain). It has a small effective mass and is confined to its second layer, so it can be β-n-pass I MOSFETs with high mobility. U.S. Patent No. 4,937,204 by I ^ ibashi et al. Discloses a superlattice, which has a semiconductor layer of a binary compound of a full or partial layer, 1239647 multilayers (2) Eight monolayer (monolayer) structures are alternately grown in epitaxial growth (epitaxiai). The main radio waves of the shot are straight to the shield planes in the superlattice. U.S. Patent No. 5,3575119 discloses a short-period super-Si-Ge stalk that is donated to Agana ('SCattermg) by reducing the alloy dispersion in supercrystalline 而 to achieve its higher mobility. Based on similar principles, Candelana's U.S. Patent No. 5,683,943 discloses a 2 MoSFET with enhanced mobility, the channel layer of which contains an alloy of Shi Xi and a second substance. The channel layer appears instead of a percentage in the state of tensile stress. A US patent No. 216,262 discloses a quantum well structure, which includes two shielded regions (baiTierregion) and a thin acoustic-crystal grown between them to form a semiconducting layer. Each of the shielding areas is composed of a single layer having a thickness ranging from approximately two to six. Between the shielded areas, the material of the tree is also thick-Duan Yuan is relatively thick.
Physics and Materials Science & Processing) ρρ· 391 - 402 之中,Τς” 於一 篇題為「石夕質奈米構造元件中之現象」(“Phen⑽㈣insmc〇n 、 nanostructure devices”)的文章之中揭示了矽及氧的一種半導體-原子超 晶格(semiconductor-atomic superlattice,.SAS)。此 Si/Ο 超晶格構造祐揭 露是為-種Μ _量子及發光元件。其帽職示 忒一種綠色電輝光一極體(electr〇luminescence di〇de)的結構。談二雕 結構士的電流流動方向是垂直的,亦即,垂直於SAS的層面。、文$ 所揭示的SAS可以包含由諸如氧原子及c〇分子等的被吸收雜^ (adsorbedspecies)所分離開的半導體層。在氧的此被吸收單層以外 Ϊ 5 5 density)^ ri冓,含有一個Unm厚度的石夕質部份,其係約為八 個原子層的石夕’而其另-種結構中的石夕質部份的厚度則有 倍。物理評論通訊(Physics Review Letters),Vol· 89 No 7 (20021/日 !2曰)中,Luo #人所發表的一篇題為「直接間隙發光石夕7^月 (“Chemical DeS1gn of Dlrect-Gap Light_Emittmg 观咖的 步地討論了 Tsu的發光SAS構造。Physics and Materials Science & Processing) ρρ · 391-402, Τς "revealed in an article entitled" Phen 现象 insmc〇n, nanostructure devices " A semiconductor-atomic superlattice (.SAS) containing silicon and oxygen. The Si / Ο superlattice structure is disclosed as a kind of M_quantum and light-emitting element. The cap's job description is a kind of structure of a green electric glow diode. Tan Erdiao The structure of the current flow is vertical, that is, perpendicular to the SAS level. The SAS disclosed in the article may include a semiconductor layer separated by absorbed species such as oxygen atoms and CO molecules. Beyond this single layer of absorbed oxygen (5 5 density) ^ ri 含有, it contains a stone part of Unm thickness, which is about eight atomic layers of stone, and its stone in another kind of structure The thickness of the evening part is doubled. In Physical Review Letters, Vol. 89 No 7 (20021 / Day! 2 Yue), an article published by Luo # 人 entitled "Direct Interstitial Luminous Stone Evening 7 ^ month (" Chemical DeS1gn of Dlrect- Gap Light_Emittmg Guanca discussed the structure of Tsu's light-emitting SAS step by step.
Wang,Tsu及L〇fgren等人的國際申請公報w〇 〇2/1〇3 中揭示了薄矽及氧,碳,氮,磷,銻,砷或氫的一種屏蔽^ 二木 其可以將垂直流經晶袼的電流減小超過四個十之次方冪次尺产7〇瓜 orders of magmtude)。其絕緣層/屏蔽層可容許在鄰 1 沉積的蠢㈣層中形成較少的缺陷。 m㉟之_要 Ϊ239647Wang, Tsu, and Lofgren et al. International Application Bulletin WO00 / 2/10 disclosed a thin silicon and a shield of oxygen, carbon, nitrogen, phosphorus, antimony, arsenic or hydrogen ^ Nimu can be vertical The current flowing through the crystal core is reduced by more than four powers of ten to produce orders of magmtude). Its insulating / shielding layer allows fewer defects to be formed in the silt layer deposited adjacently. m㉟ 之 _ 要 Ϊ239647
Mears等人的英國專利申請第2,347,52〇號案中揭示, 子能帶間隙構造(aperiodic photonic band-gap, APBG)可應用於電子微 ^隙工程(electronic bandgap engineering)之中。特別是,該申】安:: ?’#料參數(materialparameters},例如,能帶最小值的位置^ ^二 ^,等等,皆可加以調節,以便獲致具有所要能帶結構特^貝In British Patent Application No. 2,347,52 of Mears et al., It is disclosed that the sub-band photonic band-gap (APBG) can be applied to electronic bandgap engineering. In particular, the application: Ann ::? ’# Material parameters (materialparameters), for example, the position of the minimum band value ^ ^ ^ ^, etc., can be adjusted in order to obtain the required band structure characteristics.
^;f #f ° ( ^^^«^(^calconduct^) Z 生(咖遍1 conductivity)及介電係數(dielectnc permittivity)或^ (magneticpermeability),皆被宣稱亦可能被設計於材料之中。’ ’、 雖^材料工程領域之中已有投入相當的努力,冀圖增加半元 工f.電f載體之動性’但制仍有更大改進的需求。較大的動性可以 凡件的尺度縮得越來越小,元件仍可以維持較佳的性能。 則丨現者 【發明内容】 載體 ί 半s _ w ’#__荷 i包及其t目的’特徵及優點係由—種半導體元件提供, 亦包含可導致電荷載體於平行於堆疊層群組的方向輸 ϋ超β曰秸的區域。超晶格的每一個層群組各包含有界定 美麻 ,體部份的複數個的堆疊基底半導體單層,以及其上之I在改 ί林=2,改層包含有限定於其相鄰基底半導體部份的一 ϋ 非半導體單層,可使超晶格在平行方向上具有比益 g構k存在的電荷載體位移率。超晶格内亦可有—共同J帶^ 备一 電子及電洞兩者其中之-。在某些較佳實施例之中, 每一份f,而每—能帶修改層則各包含有氧。 皆小單層的厚度,而每—基底半導體部份則各 例中的情形層的厚度,例如二至六個單層的厚度,如同在某些實施 在井t H ^的^果’超晶格更可具有一實質直接能帶間隙,諸如 户声在it巧例之中,所有的基底半導體部份全皆為相同數目單層之 ίί單夕之中的至少某些係為不同 子又在另外其他的貝鈀例之中,所有的基底半導體部份 1239647 間具—穩g目早層之厚度。每-個非半導體單層在下—層沉積期 體,族半導體,财族半導 二個能帶修改層财可包含有由氧且半導體。此外,每 疋的一非半導體。 虱,氣及碳-氧所構成之群組中選 〇 一為低。當然,超晶袼内a/妁蛤电性寻效質量之三分之 々曰曰㈣更了包含有至少_種導電性接雜物。 【實施方式】 本^合所附圖式,後面的說明文字段落之中將詳細說明 明^可以中所顯示??係為本發明之較佳實施例。不過,S 定於图力ί同的形式實地施行,因此本發明之範•當缺不鹿 本所,之實施例上。相反的,此些實施例僅是被提供i使 全ίί解本發明之料。在本發明的整篇說明文字之 示相同或相當的元件,而加撇(P_e)符號則係用^ 才禾不不同貫施例中的類似元件。 、本發相係相關於在原子或分子的位階上控制半導體材料的特性,以 便達成半導體元件性能之增進。此外,本發明亦係有關於性能增進材 料的辮別,創造以及使用,以便將其應用於半導體元件的導電性通路 之中。 · 本發明案申請人所提之理論顯示,本發明此地所揭示描述的某些超 晶格構造,可以減小電荷載體的等效質量,並可由於此種減小而導致 電荷載體的較高動性,但申請人同時聲明本發明之範疇不應限定於此 理論上。本發明所屬技藝領域内的文獻之中,對於等效質量有多種定 義加以描述說明。作為等效質量上之增進的一種量測尺度,申請人分 別為電子及電洞分別使用「導電性反等效質量張量」(“conductivity reciprocal effective mass tensor”)Me-1 及 Μ/1 的定義: X \f{E{Kn\EFJ)d\ e>ef B.Z. 1239647 為電子之定義,以及·· - Σ { (V^(k?,))/(V^(k9;,)); d\ e<ef b.z.^______ Σ \{l-f{E{Kn\EFJ))d\ e<ef B.Z. 則為電洞之定義,其中/係為費米-狄拉克分佈(Fermi-Dirac distribution),EF 為費米能量(Fermi energy),T 為溫度,E(k,n)為電子在 對應於波向量k及第η個能帶的狀態之中的能量,下標i及j媒指直交 座標X,y及z,積分係在布里羅因區(B.Z·,Brillouin zone)内進行,而加 總則是在電子及電洞的能帶分別高於及低於費米能量的能帶之中進 行0 申請人對導電性反等效質量張量之定義,係使得材料之導電性反等 效質量張量之對應分章中的較大數值者,其導電性的一張量分量 (tensorial component)亦得以較大些。在此申請人再度提起下述理論,即 此地所描述說明之超晶格所設定導電性反等效質量張量之數值,係可 增進材料的導電性質,諸如電荷載體傳輸的典型較佳方向之性質,'不 過,同樣地,申請人仍聲明本發明之範疇不應限定於此理論上。適當 張量·項數的倒數,在此被稱為是導電性等效質量。換句話說,若要^ 述半導體材料構造的特性,則前述電子/電洞的導電性等效質量,以及 f載體,定要傳輸的方向上的計算結果,便可用來分辮出其功效已有 增進的該些材料。 應用前述方法便可為特定目的而選出具有較佳能帶構造的材料^ 〇S 70件通道區(channel region)内具有超晶格25的材料,便是 Ιιΐ種貫例。下面將參考圖1說明包含有依據本發明之超晶袼乃的- 20 °不過,習於本技藝者所可以理解的是,此地月 於許多種不同型態的半導_上,諸女 圖中^ ^的M0SFET 20包括有一底材(sub伽te) 21,源極㈣ 的^ fUf 26,27 ’以及由超晶格25所提供的, layeM'30,Ή 極/汲極金屬矽化物層(source/drain silicid 如同習於太枯蓺去所二、★ 1極接觸32,33係疊覆於源極/汲極區上, 原先與超晶格二起形二所標示的區域係篇 35亦可能不存在,如同於列之中,此些殘跡超晶格區34 、本技云者所可以理解的。圖中顯示閘極& 1239647 包括有鄰接著由超晶格25所提供通道的一閘極絕緣層37,以及在閘極 絕緣層之上的一閘電極層36。圖中之MOSFET20亦顯示包含有側壁隔 絕層(sidewall spacer) 40,41。 土 岡 >申請今已分辮出MOSFET20之通道區的改良材料或結構。更特定 而言,申請人已分辮出一些材料或構造,其能帶結構之中,電子與/或 電洞之導,性等效質量,較之㈣對應數值,乃是相當低得^、。 甘時參考圖2及3?其中的材料或結構係屬超晶格25的形式, /、構le係在原子或分子的尺度上加以控制的,並可以利用習知的原子 f tecMques of atonic or molecular layer deposxtion) =作5产。格25包括有以堆疊形式安排的多個層組(layer groups) '心中的示意橫截面圖即可以瞭解其堆疊關係。 λ底^ ^^一個層組45a—45n,如圖所示包含有界定了 一個別 ί JM^^(base semiconductor 為了說賴之故,能帶修^ ;ίί樣單層亦是可行的。中請人再 巧益:方逆翅ίΐ= 本發明之理兔^日曰才口 25 有身又吊見的能帶構造。 件,基於ill者示的M0SFET 20之類的半導體元 載體位移率。在苹效質量’亦可以享有更高的電荷 言乃如 =本合技逆,其對光電元㈣ I · 23 α'„*·35 同樣方式考量類似的ΪΙί向傳輸通過超晶格的侧區域。本發明亦以 _Γ)ϋ層部層、组45η之上的一個蓋層(cap 有2至100個單層的基底m 層46。蓋層52可以擁 每—個的基底半導體以 10 1239647 Ι^Ι-ν族半導體,以及Π·νι族半導體等所組成的群组 導體。如同熟習於本技藝者所可以理解的 一 3 然亦包含了 IV-IV族的半導體。 夫牛¥脰一巧备 〜每一層的能帶修改層50可以包含有由諸如氧,氮 之中選定的—種非半導體(麵咖) 層進行沉積以利製程的進行,而亦得以)擁Κίίί的 疋性{thermally stable}。在其他的實施例之中,如^ 一 可為姆雜定铸賴«理程序^ -S f ^ ^ 提供的該些能帶修改層5〇,亦應包含苴層^並未=子層所 子位置的該些單層。例如.,參考圖3,$中 斤有可能原 數的氧的可能位置被佔滿。在其他的實 1=之的重^^^中只有半 由於石夕及氧目前係被廣泛地應用於一船本逡 ,用本發明所描述的方式來應用此些材 最好靡I起曰日格&,諸如Si/〇超晶袼,矽單声的屏鉍 =/〇材質而言,其構形顯現了 χ方 及帝、气復構造,就 0.46 〇 °·12; S./0 〇.36,4/1 其他半導有利,但在 句增加,則可能更為有J。,,方向上動性的均 的同時增加’或只種電荷子 1239647 好處。 超晶格25之4/1 Si/O實施例的較低導電性等效暂旦 超晶格者之導電性等效質量的三分之二之值 j里^ 要比非 子及電洞兩者而言皆然。當然,超晶格25其中更亦可以勺就電 導電性_質(⑽杨lty dGpant),如同f於本技 ,參考,乂接著描述依據本發明具有不同性 ,,最底下的基底半導體部份具litif 定 揚猶五鮮層。此她合模式 之中重覆。每一能帶修改層5〇,則各可以包含一個置曰曰格25 了,的此種超晶格25,而言,其電荷載體位移率丄宜 向無關的。圖4之中在此未特別提及的以5ϊίίίί 述圖2中所討論者類似,故在此不再重覆討論。 々係人則 ,气元件實施例之中’超晶格的所“底半導體部份, =為相同數目單層疊合的厚度。在其他的實施例之中,is,: $基,半導體部份,其厚度可能是為不同數目單 g声;^; F #f ° (^^^ «^ (^ calconduct ^) Z Health (Capon 1 conductivity) and dielectric coefficient (dielectnc permittivity) or ^ (magneticpermeability) are claimed and may be designed into the material "', Although considerable efforts have been invested in the field of materials engineering, hoping to increase the mobility of the semi-conductor f. Electric f carrier, but the system still needs greater improvement. The greater mobility can be The dimensions of the components are shrinking and getting smaller, and the components can still maintain better performance. The present invention [Content of the Invention] The carrier ‚s _ w '#__ Netherlands i package and its features and advantages are due to -Provided by a semiconductor device, it also contains a region that can cause the charge carrier to enter the super β-straw in a direction parallel to the stacked layer group. Each layer group of the superlattice contains a plurality of body lines that define beauty and body. Stacked single-layer semiconductor single-layers, and I on them = 2, the modified layer contains a non-semiconductor single-layer limited to the semiconductor portion of the adjacent base, which can make the superlattice parallel The charge carrier displacement rate with the existence of the specific g structure k. There may also be in the superlattice-common J The band ^ prepares one of an electron and a hole.-In some preferred embodiments, each part f, and each band modification layer contains oxygen. Both are small in thickness, and The thickness of the layer in each case of the base semiconductor part, such as the thickness of two to six single layers, as in some implementations of the super-lattice in the well t H ^ can have a substantially direct energy With gaps, such as the household voice in the clever example, all the base semiconductor parts are all the same number of single-layered ones. At least some of them are different and in other other examples of palladium. All the base semiconductors have a thickness of 1239647 between the stable and early layers. Each non-semiconductor single layer is in the lower-layer deposition period, family semiconductor, and family semiconductor. Two bands can be modified. Oxygen and semiconductor. In addition, one non-semiconductor per tadpole. Among the group consisting of lice, gas, and carbon-oxygen, one is selected as low. Of course, the electrical quality of a / toad in supercrystalline tadpoles is the third. It is said that it contains at least one kind of conductive inclusions. [Embodiment] This appendix is attached The drawings, which will be described in detail in the following explanatory text paragraphs, are shown in ^ can be a preferred embodiment of the present invention. However, S is intended to be implemented in the form of illustration, so the model of the present invention • In the absence of Kumamoto, the examples are provided. Conversely, these examples are only provided to make the materials of the present invention fully understood. Throughout the description of the present invention, the same or equivalent elements are shown, and The plus sign (P_e) symbol is used to describe similar elements in different embodiments. The present phase is related to controlling the characteristics of semiconductor materials at the atomic or molecular level in order to achieve the improvement of the performance of semiconductor elements. In addition, the present invention also relates to the identification, creation, and use of performance-enhancing materials in order to apply them to the conductive paths of semiconductor devices. · The theory proposed by the applicant of the present invention shows that certain superlattice structures disclosed and described herein can reduce the equivalent mass of the charge carrier, and can lead to a higher charge carrier due to this reduction. Mobile, but the applicant also stated that the scope of the invention should not be limited to this theory. In the literature of the technical field to which the present invention pertains, various definitions of equivalent mass are described. As a measure of the improvement in equivalent mass, the applicants use the "conductivity reciprocal effective mass tensor" (Me-1 and M / 1) for electrons and holes, respectively. Definition: X \ f {E {Kn \ EFJ) d \ e > ef BZ 1239647 is the definition of electron, and ...-Σ {(V ^ (k?,)) / (V ^ (k9 ;,)); d \ e < ef bz ^ ______ Σ \ {lf {E {Kn \ EFJ)) d \ e < ef BZ is the definition of the hole, where / is the Fermi-Dirac distribution, EF is Fermi energy, T is temperature, E (k, n) is the energy of the electron in a state corresponding to the wave vector k and the nth energy band, and the subscripts i and j refer to orthogonal coordinates X, y and z are integrated in the Brillouin zone (BZ ·, Brillouin zone), and the totalization is in the energy bands of the electrons and holes, respectively, above and below the Fermi energy bands. 0 The applicant's definition of the anti-equivalent mass tensor of conductivity is the tensorial component of the material that makes the larger value in the corresponding chapter of the anti-equivalent mass tensor of conductivity of the material. ) To some larger. Here, the applicant once again brings up the theory that the value of the inverse equivalent mass tensor set by the superlattice described here describes the material's conductive properties, such as the typical preferred direction of charge carrier transport. The nature, 'However, the applicant still stated that the scope of the present invention should not be limited to this theory. The appropriate tensor and the reciprocal of the number of terms are referred to herein as the conductive equivalent mass. In other words, if the characteristics of the semiconductor material structure are to be described, the above-mentioned electron / hole conductivity equivalent mass, and the calculation result of the f carrier in the direction to be transmitted can be used to distinguish its efficacy. There are enhancements to these materials. By applying the aforementioned method, a material having a better band structure can be selected for a specific purpose. ^ 70S A material having a superlattice 25 in a channel region is a conventional example. The following description will refer to FIG. 1 with reference to the -20 ° containing the super crystal 袼 NO according to the present invention. However, as will be understood by those skilled in the art, this place is on many different types of semiconductors. The middle MOSFET 20 includes a substrate 21, a source ㈣ fUf 26, 27 ′, and a layeM'30, Ή / drain metal silicide layer provided by superlattice 25. (The source / drain silicid is like Xi Yu's desolation. The 1-pole contact 32, 33 is superimposed on the source / drain region. Originally marked with the superlattice II, the area series 35. It may not exist, as in the column, these residual superlattice regions 34 can be understood by those skilled in the art. The gate & 1239647 shown in the figure includes a gate adjacent to the channel provided by the superlattice 25 A gate insulating layer 37, and a gate electrode layer 36 on top of the gate insulating layer. The MOSFET 20 in the figure is also shown to include sidewall spacers 40, 41. Tugang > Improved material or structure of the channel region of the MOSFET 20. More specifically, the applicant has identified some materials or structures In its band structure, the conductance of electrons and / or holes, the equivalent mass, is quite low compared to the corresponding value of ㈣. For reference, please refer to Figures 2 and 3 for materials or structures. It belongs to the form of superlattice 25, and the structure is controlled on the atomic or molecular scale, and the conventional atom f tecMques of atonic or molecular layer deposxtion) can be used. The cell 25 includes a plurality of layer groups arranged in a stacked form. The schematic cross-sectional view in the heart can understand its stacking relationship. λ bottom ^ ^^ A layer group 45a-45n, as shown in the figure, contains a definition of a single JM ^^ (base semiconductor In order to say that the reason, band repair ^; ί a single layer is also feasible. Medium Please help again: Fang Ningyi = 理 Rabbit of the present invention ^ Riyue Caikou 25 has a band structure that is visible and visible. It is based on the displacement rate of semiconductor element carriers such as MOSFET 20 shown by ill. You can also enjoy a higher charge in the quality of the Ping effect, such as = this synergy inverse, which has the same effect on the photoelectric element ㈣ I · 23 α '„* · 35 in the same way considering the transmission of ΪΙί to the side region of the superlattice The present invention also uses _Γ) to form a cover layer (cap has 2 to 100 single-layer base m layers 46 above the group 45η). The cover layer 52 can hold each of the base semiconductors at 10 1239647. Group conductors composed of Ι ^ Ι-ν semiconductors, and Π · νι semiconductors, etc. As understood by those skilled in the art, 3 semiconductors of IV-IV are also included. 牛牛 ¥ 脰 一How to prepare ~ Each layer of the band modification layer 50 may contain a non-semiconductor (noodle) layer selected from among oxygen and nitrogen. The deposition is carried out in order to facilitate the process, and it is also possible to have the thermally stable {thermally stable}. In other embodiments, such as ^ one can be provided for the processing of the molybdenum. ─ 理 程序 ^ -S f ^ ^ These band modification layers 50 should also include the monolayers ^ not = the sub-positions of the sub-layers. For example, referring to Figure 3, the possible positions of the original oxygen in $ It is full. Only half of the other heavy weights ^^^ are because Shi Xi and oxygen are currently widely used in a ship, and it is best to use these materials in the manner described in the present invention. From the beginning of the day I said, such as Si / 〇 supercrystalline 袼, silicon monolithic screen bismuth = / 〇 material, its configuration shows the χ square and Emperor, Qi complex structure, as 0.46 0 ° 12; S./0 〇.36,4 / 1 Other semiconductors are beneficial, but the increase in the sentence may be more J., the increase in the direction of the mobility at the same time, or the benefit of only one kind of charge electron 1239647. Super crystal The lower conductive equivalent temporary temporary superlattice of the lattice 25 of the 4/1 Si / O embodiment has a value of two thirds of the conductive equivalent mass. Everything is true. Of course, the superlattice 25 can also be used for electrical conductivity. (As a result of this technique, reference is made, and reference is made.) Then, the bottom semiconductor part with different characteristics according to the present invention will be described. With litif, there are five fresh layers. It is repeated in this combination mode. Each band modification layer 50 can each contain a super lattice 25, in terms of, The charge carrier displacement rate 丄 should be irrelevant. In FIG. 4, 5ϊίίίί is not mentioned here, and the discussion in FIG. 2 is similar, so it is not repeated here. For people, the bottom semiconductor part of the 'superlattice' in the embodiment of the gas element = the thickness of the same number of single stacks. In other embodiments, is, $ basis, semiconductor part , Its thickness may be a different number of single g sounds;
之中’超晶格的所有基底半導體部份,其 全疋為不同數目皁層疊合之厚度。 又則了肖bTL .丄-严况顯示應用密f功能理論(D—ty Functional Th_ 、 所什异的能帶構造。本技藝中所廣為習知的是,DFT ‘) 絕對值。因此,以上的所有能帶皆可利 遠較為可靠。縱軸的能帶尺度應在此則疋公認 圖5A為習知技藝中之整體區塊石夕(bulk silic〇n,實線 之月w構之曲線SI其中之方向係指4/1 Si/〇結構 cell)^# Sl , 位晶元的(001)方向符合,並因而顯示了 si僂導 二/; 2之欠早 置。圖中的_及_柏倾 向符合。習於本技藝者可以理解,圖中Si帶2 4 (-)方 4/1 Sl/0 t^^,^(reciprocal lattJd^ 魏區^石^交之下,4/1似〇構造傳導能帶最小值. 係位占(G)之處,而其鍵結能帶的最小值則是出現在 上,布里羅_的邊緣,稱之為2點之處。另亦可以注 構造的傳導能帶最小值之曲率,與Si的傳導能帶最小^曲率比較之 12 1239647 下,其較大的曲率,係起因於額外氧層引入了擾亂所造成的能帶分離 之故。 圖5B為習知技藝中之整體區塊矽(實線)以及圖〗—3中所顯示之4/1 Si/O超晶格25 (虛線),兩者由Z點之處計算得之能帶構造之曲線圖。 此圖中所顯示的是(1〇〇)方向上鍵結能帶之增加的曲:率。 圖5C為習知技藝中之整體區塊矽(實線)以及圖4中所顯示之 5/1/3/1 Si/O超晶格25’(虛線),兩者由迦碼及z點之處計算得之能帶構 造之曲線圖。由於5/1/3/1 Si/O構造的對稱性,在(1〇〇)及(〇1〇)方向上計 算所得的能帶結構是相當的。因此,在平行於各層的平面之内,亦即' 在垂直於(001)的堆疊方向上,導電性等效質量及動性,可以預期是等 ^的。注意到在5應1 Si/O的實例之中,傳導能帶最小值及鍵結能 忝取大值兩者皆位於或近於Z點之處。雖然曲率的增加是為等效質量 減小的一個指標,但經由導電性反等效質量張量的計算,仍可以進 適,^的比較及判別。此使得本案申請人進一步推論,5/1/3/1的超晶袼 25貫質上應是為直接的能帶間隙。如同習於本技藝者所可以理解的, 可供光學轉移(optical transition)的適當矩陣單元(matrix dement)乃是 接及間接能帶間隙行為間之區別的另一種指標。 下面同時參考圖6A-6H,其中討論利用前述超晶格25,在勢 PM^S ^NMOS電晶體的一種簡化CM0S製程中形成通道區的情‘。 此貫例製程係由具<100>指向的淡摻雜P型或N型單晶石夕 tUn實例之中顯示—NMC)S及―_s兩電晶體的形成情ί 在=6Α之中,深Ν井404被植入於底材402中以便進行隔絕。圖6Β 之中,使用已知技術所製備的Si02/Si3N4遮罩被用來分別形成Ν并 Ζ井區,糊。此會’例如,牽涉到η井及ρ井植人 ^(stnp) ’驅入(drive-in),清洗,以及再生長(re_gr〇wth)的步驟。剝) 步驟所指的是遮罩(在此實例中為光阻及氮化矽)的移除。姑闲 來將摻雜蚊置於適當的深度之處,妖假 =e=c^i=93(rri)陳人料 00 1150 C下植入處理9-10小日守。驅入的步驟亦同時將 的損傷予以回火(—t)。若植入處理是以足將離 的足夠能量進行的,則接著便進行回火處理步驟,此回 二^ 圖6C-6H之中顯示,一 NMOS元件在一側200,另一 p (0.3-0.8㈣,再生長一缚層氧化物’之後以叫填充淺溝,接!再$ 13 1239647 ίΓΓίο 412 ' 眉子声沉藉、、共、v笋拟士士乂 ^成層Si〇2層(圖中未顯示),再利用 ;,£乐充f一::⑽:在蓋 =::SSi,4厚4 的 ;ηίίί :^S 25 ^(angs"〇m)r«^^^ 造。圖為?層二=418本 矽沉積_#_1〇^步^^^=物^薄層’再進行多晶 沉積係指利用低壓^形’並再進行侧。多晶石夕 造上。姓刻的步驟典型是屬於針材料 ;或氮化物層)構 性,乾侧)處_如對=等向 的圖形轉移到相關的材料上。 愧化物决上10倍者),並將微影 424 Ξ 處理而製成的。”L加”係指植二回^以及清洗的 摻雜源極。此係為與源極/汲極相同離的則曲 :定 理。圖6H中顯示金屬石夕化物43δ的自動對準成㉟ 14 1239647 ^文,矽化合(sallcldation)的處理。自動對準金屬矽化合的製程處理包 t if 列如Τι),氮氣回火,金屬餘刻,以及第二次的回火等處理。 认二=1二疋本發明所可以應用於其中的製程及元件的一個實例,習 报本? 當_可瞭解其在許多其他製程及元件之中的應用及使用情 元件之中,本發明之構造可以在晶部份或 的,之另—種製程,其中不使用選擇性沉積的作法。相反 2用,例如,利用STI區域來作為侧的阻播層。此可 具^在某些實施,中可能是不需要的。例Ϊ』: ϋ ίϊ本技藝者所可以理解的。雖然前面討論了平坦化作i .區之則先形成,以便去掉遮罩的處理步驟。此外,在本 蛾晶量’本發明之方法可以包括形成一個包含有多個 tn t °;本發明之方法亦可以包括,在相對於堆ϊίΐ 、曰林^ 成r以造成電荷載體傳輸通過超晶格的區域。超 =含有界訂"'個基底半導體部份的多個堆ί 定於其相鄰基底半導體部份的—晶體晶格内的至ί 一 i^dit早,1,=^曰格中得以具有一個共同能帶(c麵職energy band);^,亚具有比其他方式為高的電荷载體位移率。 驭 「3黑1亦係揭示於與本案同時申請的,題為 /、有此孓工私建構起日日袼之含M〇SFET之 (“Semiconductor Device Including MOSFPT u , I ? Γ 十」 , (Method or Makmg Se^conductor Dev1Ce Incldm! 圖所描述的發明揭示内容的情況之下,當。附 ,細修改變動及其他 15 1239647 【圖式簡單說明】 圖1之示意圖顯示依據本發明一半導體元件之橫截面圖。 圖2之示意圖為圖1之超晶格之大比例放大橫截面圖。 圖3之立體圖顯示圖1中超晶格之一部份之原子結構。 圖4之不思圖為圖1之超晶格另一實施例之大比例放大橫截面圖。 ,5A為習知技藝中之整體區塊矽以及圖J - 3中所顯示之4/1 Si/o超 晶格’兩者由迦碼點(G)之處計算得之能帶構造之曲線圖。 圖5B為習知技藝中之整體區塊矽以及圖1 一 3中所顯示之4/1 Si/Ο超 晶格,兩者由Z點之處計算得之能帶構造之曲線圖: —5C為習知技藝中之整體區塊石夕以友圖4中所顯示之5/1/3/1 Si/Ο超 晶格,兩者由迦碼及Z點之處計算得之能帶構造之曲線圖。 廿圖6$-6H顯示依據本發明之另一半導體元件一部份之製作期間之 橫截面示意圖。 【主要元件符號說明】 20 金氧半電晶體 21 底材 22 源極 23 沒極區 25 超晶格 26 源極 27 汲極延伸區 30 源極 31 沒極金屬石夕化物層 32 · 源極 33 汲極接觸 34, 35 虛線 36 電極層 37 閘極絕緣層 40, 41 側壁隔絕層 45η .層組 45a-45n 堆疊層組 45b5 基底半導體部份 46 基底半導體單層 46a-46n’ 基底半導體部份 50 修改層 52 蓋層 200 NMOS元件 400 PMOS元件 402 底材 404 深N井 406 N井區 408 P井區 410 溝 412,414 通道區 416 閘極氧化物層 418 閘極 420,430,434 源極 422,432,436 源極區 424 相鄰通道 426 相鄰通道 16 1239647 428 隔離層 拾、申請專利範圍: 438 金屬矽化物 1. 半導體元件,其包含有·· 含有複數個堆疊的層群組;與 的區域Γ个了、體於平订於堆疊的層群組的方向上傳輸通過該超晶格 婁了—個基底半導體部份的複 底合體體晶格内的 造存在時體超晶格在平行方向上具有比無此構 能^^利1已圍1項之半導體元件,其中該超晶格之中具有-共同 含體元件,其中具較高動性之電荷載體包 部份^^項之半導體元件,其中每一個的該些基底半導體 5· ΐ申請專利軸1項之轉體元件,其中每-能帶修改層各包含有 -單層的厚量圍1項之半導體讀,其中每—能帶修改層各係為單 小於八個單之半導體几件,其中每-基底半導體部份各皆 8·如申請專利g/r岡 為二至六個4|的^轉體元件,其巾每—基底半導體部份各皆 9·如申請專利餘 、 接能帶間隙。項之半導體元件,其中該超晶格更具有一實質直 組ilSG;員讚I:其中該超晶格在最頂端的,層鮮 17All the base semiconductor portions of the 'superlattice' are all stacked with different thicknesses of soap. Then, we will describe the bTL. 丄 -Strict Condition Display Application D-functional Functional Theory (D-ty Functional Th_, a different band structure. It is widely known in the art that the absolute value of DFT ‘). Therefore, all the above energy bands are far more reliable. The energy band scale of the vertical axis should be here. It is generally recognized that Figure 5A is the bulk block in the conventional art (bulk silicoon, the solid line of the curve w of the structure SI, where the direction refers to 4/1 Si / 〇 structure cell) ^ # Sl, the (001) direction of the bit wafer coincides, and thus shows that the si 偻 2 /; 2 is too early. _ And _ Bai in the figure are in line. Those skilled in the art can understand that in the figure, the Si band 2 4 (-) square 4/1 Sl / 0 t ^^, ^ (reciprocal lattJd ^ under the intersection of Wei District ^ stone ^, 4/1 like 0 structural conduction energy Band minimum. Where the system occupies (G), the minimum value of its bonding energy band appears on the edge of Brilo, which is called 2 points. It is also possible to note the structural conduction The curvature of the minimum value of the band, compared with the minimum ^ curvature of the conduction band of Si, is 12 1239647. The larger curvature is due to the separation of the energy band caused by the introduction of disturbance by the extra oxygen layer. Figure 5B is a Xi The overall block silicon (solid line) and the 4/1 Si / O superlattice 25 (dotted line) shown in Figure 3—the two are calculated from the Z-band energy band structure Figure. This figure shows the increased curvature: ratio of the bond band in the (100) direction. Figure 5C shows the overall block silicon (solid line) in the conventional art and the one shown in Figure 4. 5/1/3/1 Si / O superlattice 25 '(dotted line), a graph of the band structure calculated from the yards and z points. Since 5/1/3/1 Si / O Structural symmetry, calculated in (100) and (〇10) directions The belt structure is equivalent. Therefore, in a plane parallel to the layers, that is, 'in the direction perpendicular to the stacking direction of (001), the equivalent mass and mobility of conductivity can be expected to be equal. Note that in In the case of 5 Ying 1 Si / O, both the minimum value of the conduction band and the large value of the bond energy are located at or near the Z point. Although the increase in curvature is an indicator of the decrease in equivalent mass However, through the calculation of the conductive inverse equivalent mass tensor, it is still possible to compare and discriminate. This makes the applicant further infer that the supercrystalline 袼 25 of 5/1/3/1 should be qualitatively Is a direct band gap. As can be understood by those skilled in the art, a suitable matrix dement for optical transition is another indicator of the difference between the behavior of the indirect band gap and the indirect band gap. 6A-6H, the use of the aforementioned superlattice 25 to discuss the formation of a channel region in a simplified CMOS process of a potential PM ^ S ^ NMOS transistor is discussed below. This conventional manufacturing process is described by < 100 >; Pointed to the lightly doped P-type or N-type single crystal evening tUn examples show Formed case ί NMC) S and -_s two transistors among = 6Α, Ν deep well 404 is implanted in the substrate 402 for isolation. In FIG. 6B, the SiO 2 / Si 3 N 4 masks prepared using known techniques are used to form N and Z well regions and pastes, respectively. This meeting ', for example, involves the steps of n- and p-well planting (drive-in), washing, and re-growing. The step of peeling refers to the removal of the mask (in this example, photoresist and silicon nitride). Let's take the time to place the adulterant mosquito at a proper depth. The demon fake = e = c ^ i = 93 (rri) Chen Renliu 00 1150 C. Implantation treatment 9-10 Xiao Rishou. The drive-in step also tempers the damage (-t). If the implantation process is performed with sufficient energy, then the tempering process is performed. This time, as shown in Figure 6C-6H, one NMOS device is on one side 200 and the other p (0.3- 0.8 ㈣, re-grow a bound layer of oxide, and then fill the shallow trench with a call, then! $ 13 1239647 ίΓΓίο 412 ′ The sound of the eyebrows, borrowed, republic, and v bamboo shoots 拟 士 成 ^ Si02 layer (Figure (Not shown in the figure), reused ;, Le Chong f :: ⑽: In the cover = :: SSi, 4 thick and 4; ηίίί: ^ S 25 ^ (angs " 〇m) r «^^^ made. Figure For? Layer 2 = 418 of this silicon deposition _ # _ 1〇 ^ step ^^^ = 物 ^ Thin layer 're-polycrystalline deposition refers to the use of low-pressure ^' and then to the side. Polycrystalline stone is made on it. Surname carved The step is typically a needle material; or the nitride layer) texture, dry side), such as the pattern of isotropic transfer to the relevant material. Ashamed matter is determined by 10 times), and the lithography 424 Ξ processed and made. "L plus" refers to the second doped source and the cleaned doped source. This series is the same as the source / drain: theorem. FIG. 6H shows the process of the automatic alignment of the metal lithidium compound 43δ to ㉟ 14 1239647, and silclization. A process package for automatically aligning metal silicidation, such as tif column, nitrogen tempering, metal die-cutting, and second tempering. Recognize two = one two. An example of the process and components to which the present invention can be applied. Study book? Dang _ can understand its application and use of components in many other processes and components. The structure can be in the crystal part or another process, in which selective deposition is not used. On the contrary, for example, the STI region is used as the side blocking layer. This may not be needed in some implementations. Example Ϊ: ϋ ϊ ϊ understandable by the artist. Although previously discussed flattening as an i. Area is formed first in order to remove the mask processing steps. In addition, in the present moth crystal size, the method of the present invention may include forming a plurality of tn t °; the method of the present invention may also include forming a charge carrier transport through the The area of the lattice. Ultra = multiple stacks containing bounded semiconductor substrates, which are located next to the semiconductor substrates adjacent to it—into the crystal lattice, i ^ dit is early, 1, and = ^ It has a common energy band (c face job energy band); ^, sub has a higher charge carrier displacement rate than other methods. Yu "3 Black 1 is also disclosed in the application filed at the same time with this case, and is entitled to" Semiconductor Device Including MOSFPT u, I? Γ Ten "with / Method or Makmg Se ^ conductor Dev1Ce Incldm! In the case of the disclosure of the invention described in the figure, when. Attached, fine-tuned changes and other 15 1239647 [Schematic description] Figure 1 is a schematic diagram showing a semiconductor device according to the present invention. Cross-sectional view. The schematic diagram of FIG. 2 is a large-scale enlarged cross-sectional view of the superlattice of FIG. 1. The perspective view of FIG. 3 shows the atomic structure of a part of the superlattice of FIG. 1. The schematic diagram of FIG. A large-scale enlarged cross-sectional view of another embodiment of the superlattice. 5A is the overall block silicon in the conventional art and the 4/1 Si / o superlattice shown in Figure J-3. A graph of the band structure calculated at the point of G (G). Figure 5B shows the overall block silicon in the conventional technique and the 4/1 Si / 0 superlattice shown in Figure 1-13. The graph of the band structure calculated from the point Z:-5C is the overall block Shi Xi in the conventional technique The 5/1/3/1 Si / Ο superlattice shown in Figure 4 is a graph of the band structure calculated from the yard and Z points. 廿 Figure 6 $ -6H A schematic cross-sectional view of another part of the invention during the fabrication of a part of the invention. [Description of Symbols of Main Components] 20 Metal Oxide Semiconductor 21 Substrate 22 Source 23 Impedance Region 25 Superlattice 26 Source 27 Drain Extension Area 30 source 31 non-metallic metal oxide layer 32 · source 33 drain contact 34, 35 dotted line 36 electrode layer 37 gate insulation layer 40, 41 sidewall insulation layer 45η. Layer group 45a-45n stacked layer group 45b5 substrate Semiconductor part 46 base semiconductor single layer 46a-46n 'base semiconductor part 50 modified layer 52 cap layer 200 NMOS device 400 PMOS device 402 substrate 404 deep N well 406 N well area 408 P well area 410 trench 412, 414 channel area 416 gate Electrode oxide layer 418 Gate electrode 420,430,434 Source electrode 422,432,436 Source region 424 Adjacent channel 426 Adjacent channel 16 1239647 428 Isolation layer, patent application scope: 438 metal silicide 1. Semiconductor element, which contains a number of Stacked layers Group; the region is Γ, and the body is transmitted through the superlattice in the direction of the layer group that is set on the stack—a chronochronic body in the complex substrate of the base semiconductor part The superlattice has a semiconductor element in the parallel direction that has no such energy. The superlattice has a common body element in the superlattice, and a charge carrier envelope with higher mobility. For semiconductor devices of ^^ items, each of these base semiconductors is a swivel component of the patent application shaft item 1, wherein each -band modification layer contains-a single-layer semiconductor with a thickness of 1 item. Read, each of the band-modifying layers is a semiconductor with less than eight orders, and each of the semiconductor parts of the base is 8 For body elements, each of the substrate semiconductor part is 9. If there is a patent application, there is a gap in the energy band. Of the semiconductor device, wherein the superlattice has a substantially straight group ilSG; Yuan Z I: Where the superlattice is at the top, the layer is fresh 17
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