TWI298861B - Display apparatus and its source driver - Google Patents

Description

1298861

达达编号·· TW2M5PA IX. Description of the Invention: • Technical Field of the Invention The present invention relates to a liquid crystal display, and more particularly to a resource driver and a method of driving the same. [Prior Art] • A conventional data driving circuit is used to receive RGB data and output a pixel voltage. The data driving circuit has an output buffer unit (〇 putput • drive buffe "), which is used to increase the driving capability of the pixel voltage, that is, the output buffer unit is electrically connected to the plurality of data lines for rotating the above The pixel voltage is applied to the data line to cause the pixel to have a corresponding brightness. When the data driving circuit receives the corresponding operating voltage but does not receive the pixel data, the output buffer unit outputs a random power level. To the data line, such random electric level will cause the pixel to produce random brightness, and finally, the liquid crystal display device can not display random color lines. In other words, when the liquid crystal display device enters the power saving mode or : In the standby mode (Power Save Mode/standby _e) (the data drive circuit in the standby mode will receive the operation power but will not receive the pixel data) 1 more θ can not show the random color line and cause the use The trouble of the person. Therefore, how to receive the operating voltage but does not receive the pixel data and the data generated by the random voltage level to the data line. SUMMARY OF THE INVENTION [Advantage of the Invention] The purpose of the present invention is to provide a display device and a capital transmission driving circuit, which can solve the problem of appearing in a standby mode, and the display of the color line according to the present invention. Show wk out a .4 not device 'it has a drive circuit x board with multiple data lines and at least one common electrode. Drive 1298861

The three-digit number: TW2315PA is used to output the display control signal to the display panel so that the display panel is displayed. The display device further includes an output buffer unit, a first switch and a (four) circuit. The output buffer unit is configured to selectively output the plurality of pixel data or the first voltage level to the data lines. The first-on relationship has a first end, a second end, and a third end. - The first end is used to receive - the common electrode voltage. The second end face is connected to the common electrode. The third end is connected to the second voltage level. The detecting circuit is configured to determine whether the driving circuit enters a standby state or a power saving mode according to the display control signal. Wherein, when the driving circuit is in the standby state or the power saving mode, the detecting circuit _ (4) the second end and the third end of the second switch are turned on and the control output buffer unit outputs the first voltage level to the plurality of data lines. According to another aspect of the present invention, a data driving circuit for displaying an attack is proposed. The display device has a drive circuit and a display panel. The driving circuit is used for outputting: displaying a control signal. The display panel has a plurality of data lines. The capital drive circuit includes an output buffer unit and a debt measurement circuit. The output buffer unit is configured to selectively output a plurality of pixel data or voltage levels to the data lines. The detecting circuit determines whether the driving circuit enters a standby state or a power saving mode according to the display control signal. When the detecting circuit determines that the driving circuit is in the standby state or the power saving mode, the detecting circuit controls the output buffer unit output voltage level to the data lines, otherwise the detecting circuit controls the output buffer unit to output the pixel data to the pieces. Information. Line. The above-mentioned objects, features, and advantages of the present invention will become more apparent and understood. Display apparatus, which solves the problem that the data driver receives the operating voltage but does not receive the book = 1 6298861

; 'Sanda number: TW2315PA material (RGB data), will output a random voltage level to the data line - the problem, let the display device in standby mode (Standby Mode) or power saving mode (Power Save Random color lines are not displayed under Mode). • Please refer to Figure 1, which is a schematic diagram of the display device. An example of a display device 200, such as a liquid crystal display, includes a drive circuit 202 and a display panel 204. The driving circuit 202 outputs the display control signal S1 to the display panel 204 to cause the display panel 204 to display the image. Further, the driving circuit 202 is configured to output the display control signal S1 according to the video signal S2, such as CVBS, Y/C, RGB or YCbCr. The driving circuit 202 is, for example, an integrated chip, which includes circuits such as a video processor, a timing control circuit, a phase locked loop, and a PWM control circuit. (The video processor, the timing control circuit, the phase-locked loop and the PWM control circuit are not shown in FIG. 1 ) The display panel 204 is a liquid crystal display module, which comprises a data driving circuit 206, a scan driving circuit and a plurality of components. The pixel array 21〇 (scan drive circuit and these elements are not shown in FIG. 1). The pixel array 210 has a plurality of data lines D(1) to d(N) and a common electrode 208. The video processor is configured to output RGB data to the data driving circuit 206 according to the video signal S2, such as CVBS. The data driving circuit 206 outputs the pixel voltage to the plurality of data lines d(1) to D(N) in the pixel array 210 according to the RGB data to drive the corresponding pixels. The timing control circuit is configured to output a control signal required to control the operation of the data driving circuit 206 and the scan driving circuit, so that the data driving circuit 206 and the scanning driving circuit drive the pixel array 21 to display the image screen. Therefore, as can be seen from the above, the display control signal 31 outputted by the driving circuit 2〇2 includes at least the RGB data and the control signals required for controlling the data driving circuit 2〇6 and the scanning driving circuit, for example, data driving. The clock signal CLK and the horizontal synchronization signal received by the circuit 206 (eg, horizontal start signal 7 1298861

'Sanda number: TW23】5PA STH) □ In the positive* operation, the drive circuit $(10) will continue to receive the video signal S2 and output the display control signal S1 to the display panel. However, when the display device 200 is in the state of receiving the power, but does not receive the video signal, or is additionally controlled via the external control signal (not shown) provided by the device, the drive package 202 is controlled to enter the standby mode or save power. In the mode, the driving circuit 2〇2 will no longer output the RGB data and the timing control signal (such as the horizontal synchronization signal) to the batting drive circuit 206, and the display device 2 will enter the so-called standby mode. Or % power saving. Furthermore, an external control signal (not shown) can be provided by the following control elements, and the control elements are electrically connected to the drive circuit 2〇2. The control component includes a camping control component (〇n_Screen Device, 〇SD), a standby or power saving button, or a signal provided by a human-machine interface system to directly control the driving circuit 202 to enter a standby mode or a power saving mode. . In the standby mode or the power saving mode described above, since the display device 2 〇〇 still receives an external power source, such as AC11 volts, the operating voltage required for the data driving circuit 206 is continuously supplied, for example, +5 or +3· 3 volts. When the data driving circuit 206 receives the operating voltages but does not receive the data (data), it outputs a random voltage level to the data lines d(1)~d(...). Therefore, the data line D (1 &gt ~D(N) will receive a random voltage level and cause the liquid crystal display 200 to display the vertical color line. ... Benming is based on the display control signal S1 to determine whether the drive circuit 2Q2 enters the above standby mode or In the power saving mode, when the driving circuit 2〇2 enters the standby mode, each of the data lines D(1) to D(N) and the common electrode 2〇8 receive the same voltage level. Because each piece of data Both the line and the common electrode receive = substantially the same voltage level, so when entering standby mode or power saving mode 1, the random color line will no longer be generated. 8 1298861

'Sanda Number: TW2315PA First Embodiment, please refer to FIG. 2, which is a schematic view of a display device according to a first embodiment of the present invention. The display device 200 further includes a common electrode voltage generating circuit 212 and a first switch SW1. The common electrode voltage generating circuit 212 generates a common electrode voltage Vcom under the control of the above-described timing control circuit, for example. The first switch SW1 has a first end T1, a second end T2, and a third end T3. The first terminal T1 is for receiving the common electrode voltage Vcom output by the common electrode voltage generating circuit 212. The second end T2 is coupled to the common electrode 208. The third terminal T3 is coupled to the second voltage level V2. The data driving circuit 206 includes an output buffer unit 302 and a detecting circuit 304. The output buffer unit 302 is configured to selectively output the plurality of pixel voltages VP(1) to VP(N) or the first voltage level V1 to the data lines D(1) to D(N). The detection circuit 304 is configured to determine whether the driving circuit 202 enters a standby state or a power saving mode according to the display control signal S1. The output buffer unit 302 includes a plurality of buffers 306(1) to 306(N) and a plurality of second switches SW2(1) to SW2(N). One of the buffers 306(1) to 306(N) is electrically connected to the corresponding data lines D(1) to D(N), respectively. The second switches SW2(1) to SW2(N) respectively have a first end T1, a second end T2' and a third end T3, and the first end T1 are respectively coupled to the corresponding > The other end of the buffer 306. The second terminals T2W receive the corresponding pixel voltages VP, for example, the analog voltages output by the analog sampling and holding circuit (Analog Sampling & hold). The third terminals T3' are both coupled to the first voltage level V1. The first voltage level V1 is substantially equivalent to the second voltage level V2, for example, both are grounding levels. When the detecting circuit 304 determines that the driving circuit 202 enters the standby state or the power saving mode according to the display control signal S1, the detecting circuit 304 controls the second end Τ2 of the first switch SW1 to be turned on with the third terminal Τ3, and controls the plurality of The first switch 21' of the second switch SW2 (1>~SW2(N) is turned on with the third end Τ3. Thus, all 9 1298861

: 'Sanda number: TW2315PA * The data lines D(1)~D(N) and the common electrode 208 both receive the same voltage level, so that the liquid crystal molecules will not rotate, that is, random color lines will not be generated. The situation. On the contrary, when the driving circuit 202 is not in the standby state or the power saving mode, the detecting circuit 304 controls the first terminal T1 and the second terminal T2 of the first switch SW to be turned on and controls the output buffer unit 302 to output the pixel voltage VP. (1)~VP(N) to data. On the lines D(1) to D(N), even the first end T1' and the second end T2' of the plurality of second switches SW2(1) to SW2(N) Turned on, so that the pixels can normally receive the pixel voltage | VP (1) ~ VP (N) and the common electrode voltage Vcom. Further, it is judged based on the display control signal S1 whether or not the drive circuit 202 enters the standby mode or the power saving mode. When the driving circuit 202 enters the standby mode or the power saving mode, the driving circuit 202 still outputs the clock signal CLK to the data driving circuit 206, but does not output a timing control signal (such as a horizontal synchronization signal) to the data driving circuit 206. Therefore, whether the driving circuit 202 enters the standby mode or the power saving mode can be determined by the clock signal CLK and the horizontal synchronization signal (eg, the horizontal start signal STH). For example, when the driving circuit 202 enters the standby mode or the power saving mode, the clock of the clock signal CLK is counted to determine whether a horizontal synchronization signal (such as the horizontal start signal STH) is enabled in a unit time. If not, the drive circuit 202 is judged to enter the standby mode or the power saving mode. However, in this embodiment, it is not limited to determine whether the driving circuit 202 enters the standby state or the power saving mode only by the clock signal CLK and the horizontal synchronization signal (eg, the horizontal start signal STH), as long as it can be displayed by The control signal S1 is used to determine and cause the switches SW1 and SW2 to operate correspondingly. The second embodiment is different from the above embodiment in that the first switch is disposed in the capital 1298861.

Sanda number: TW2315PA material drive circuit. Please refer to Fig. 3, which is a schematic diagram of a display device according to a second embodiment of the present invention. The data driving circuit 206' also includes a detecting circuit 304 and an output buffer unit 302'. The buffer unit 302' includes a plurality of buffers 306(1) to 306(N) and a plurality of second switches SW2(1) to SW2(N), and further includes a first switch SW1', and the N system is positive. Integer. The first switch SW1' has a first end T1', a second end T2'' and a third end T3''. The first terminal T1" is for receiving a common electrode voltage Vcom. The second terminal T2" is coupled to the common electrode 208. The third terminal T3'' is coupled to a voltage level V'. The connection manners of the plurality of second switches SW2(1) to SW2(N) are as described in the first embodiment, and the first ends TV(1) to T1'(N) are respectively coupled to each other. Punch 306. The second terminals T2'(1)~T2'(N) receive the pixel voltage Vp outputted by the corresponding upper stage circuit, and the upper stage circuit is, for example, an analog sampling hold circuit (Analog Sampling & hold). The third terminals T3'(1) to T3'(N) are all coupled to the voltage level V'. The voltage level V' is, for example, a ground level. As described above, when the driving circuit 202 enters the standby mode, the driving circuit 202 still outputs the above-mentioned clock signal CLK to the data driving circuit 206, but has no horizontal synchronization signal (for example, the horizontal start signal STH). Therefore, the detection circuit 304 determines whether the level of the horizontal synchronization signal (such as the horizontal start signal STH) is within one unit time by counting the clock of the clock signal CLK. If not, the judgment is performed. The drive circuit 202 enters a standby mode or a power saving mode. When the driving circuit 202 enters the standby mode or the power saving mode, the detecting circuit 304 controls the second end T2" of the first switch SW1' to be turned on with the third terminal T3", and controls the plurality of second switches SW2(1)~ The first end T1' of SW2(N) is electrically connected to the third end T3'. Thus, all of the data lines D(1) to D(N) and the common electrode 208 receive the same voltage level V', so that the liquid crystal molecules do not rotate. In this embodiment, as in the above embodiment, there is no limitation that the driving can be judged only by the clock signal CLK and the horizontal synchronization signal (for example, the horizontal start signal STH) 11 1298861

Sanda number: TW2315PA Circuit 202 is in (4) (4) ^ Q 1 rb ^ ± 'Electrical core' as long as it can be controlled according to the display control Λ唬 S1 towel related control is Ding system mode it # H,, moving circuit 2G2 S no entry Standby for eight A, 1: ,, and in the ^ nM, n / KIX t ^ machine board or power-saving mode so that the data line ^ N) and the common electrode 208 will receive substantially equal voltage level The arrangement position of the common electrode dust generating circuit 212 is not limited in the first embodiment and the second embodiment, and may be disposed outside the display panel 204 or in the display panel 204, for example, in the f-material driving circuit 2 (6). Internal or scan drive circuit (not shown). The display device disclosed in the above embodiments of the present invention can solve the problem of random color lines appearing in the standby mode or the power saving mode. That is to say, when the data driving circuit receives the operating voltage but does not receive the pixel data and the timing control signal, the parent data line and the common electrode receive substantially the same voltage level. The present invention has been described above in terms of a preferred embodiment, and is not intended to limit the invention, and various modifications may be made without departing from the spirit and scope of the invention. The scope of protection of the present invention is defined by the scope of the appended claims. 12 1298861

Sanda number: TW2315PA [Simple description of the diagram] - Figure 1 is a schematic diagram of the display device. Fig. 2 is a schematic view showing a display device according to a first embodiment of the present invention. Fig. 3 is a schematic view showing a display device of a second embodiment of the present invention. [Main component symbol description] 200: display device 202: drive circuit | 204: display panel 206: data drive circuit 208: common electrode 210: pixel array 212: common electrode voltage generation circuit 302: output buffer unit 304: detection circuit 306: Buffer switch: SW1, SW2(1)~SW2(N), SW1, > D(1)~D(N): data line 13

Claims (1)

1298861,, ♦ Erda number: TW2315PA X. Patent application scope: -1·- kinds of display device, having a driving circuit and a display panel, the display Z board having a plurality of data lines and at least a common electrode, the driving circuit The display device includes: 显 an output buffer unit for selectively outputting a plurality of pixel data or a first voltage level to the display panel for displaying the image according to the display panel These lines of information; At least one first switch having a first end, a second end and a third end 'the first end for receiving a common electrode voltage, the second end _ to the common electrode 'the third end (4) a second voltage level; and S, -_4, for determining whether the driving circuit enters a standby state or a power saving mode according to the display control signal. The display device of claim 2, wherein the detecting circuit controls the second end and the third end of the switch: when the driving circuit is in the standby state or the power saving mode The terminal is turned on and controls the output buffer unit to output the first voltage level to the plurality of data lines. The display device of claim 3, wherein the detecting circuit is controlled when the driving circuit is not in the standby state or the power saving mode. H is connected to the second end and controls the output buffer unit to output the halogen data to the data lines. The display device of claim 2, wherein the first voltage level is substantially equivalent to the second voltage level. 5. The display device of claim 4, wherein the first voltage level and the second voltage level are substantially grounded. The display device according to the above aspect of the invention, wherein the display control unit comprises a clock signal and a horizontal synchronization signal, the detection circuit is 1498861 three-number: TW2315PA = according to the clock The signal synchronizes with the horizontal signal to determine that the driving circuit has entered the standby state or the power saving mode.显"' 7) The display buffer unit described in the item of the patent scope includes: · In the direct, the plurality of buffers are respectively transmitted, and the corresponding plurality of second switches are electrically connected to the corresponding data lines. One of the first - connection, 乂 and @一二二弟一开关 respectively have a first end, 兮 矮 输 输 — 一 一 一 一 一 一 一 一 一 一 一 一 一 一 一 一 一 一 一 一 一 一 一 一 一 一 一 一 一The two end systems respectively receive the corresponding data of the halogen, and are connected to the first voltage level. When the driving circuit is in the (four) electrical mode, the (four) measuring circuit controls the second end of the second switch and the The third end is turned on, otherwise the detecting circuit controls the first end fish of the second switches to be turned on, and the first voltage level and the second voltage level are substantially The display device of the seventh aspect of the invention, wherein the display panel further comprises: a pixel array Γ and a batting drive circuit for receiving the display control signal and To drive the pixel array, the output buffer unit, the first switch and the detection The circuit device is configured in the data driving circuit. The display device according to claim 7, wherein the display device further comprises: a pixel array; a bucker driving circuit for receiving the display control The signal is driven to drive the pixel array, the output buffer unit and the detecting circuit are disposed in the data driving circuit; and a common electrode voltage generating circuit includes: 15 1298861 Sanda number: TW2315PA p · Operational Μ, for outputting the common electrode voltage, the first-on relationship is disposed in the common electrode voltage generating circuit. 1. A driving method of a display device, the display device includes a driving electric _:: panel, the driving The circuit is configured to output a display control signal, the display does not control the signal display image frame, the display panel has a plurality of strip-shells (10) and at least a common electrode, the method includes: Determining whether the driving circuit enters a standby state or a power saving mode according to the display control signal or via an external control signal; and when the driving circuit is in the standby state or the power saving mode, causing the plurality of data lines And the common electrode receives a voltage level. _ 11· The driver* as described in claim 10 (4), wherein the display control signal includes a clock signal and a horizontal synchronization signal. 12. The driving method of claim 2, wherein the method further comprises determining whether the driving circuit enters the standby state or the power saving mode according to the clock signal and the horizontal synchronization signal. 13. The driving method as described in claim 1 wherein the The voltage level is essentially a grounding level. A data driving circuit for a display device, the display device having a driving circuit and a display panel, the driving circuit for outputting a display control signal, the display panel having a plurality of data lines, the data driving circuit comprising: An output buffer unit for selectively outputting a plurality of pixel data or a voltage level to the data lines; and a circuit for determining a circuit to determine whether the driving circuit enters a standby state or a province according to the display control signal In the electrical mode, when the detecting circuit determines that the driving circuit is in the standby state or the power saving mode, the detecting circuit controls the output buffer unit to output the voltage level to the data lines, otherwise the detecting circuit controls Output 16 1298861 Sanda number: TW2315PA The buffer unit outputs the pixel data to the data lines. The data driving circuit of claim 14, wherein the voltage level is substantially a grounding level. The data driving circuit of claim 14, wherein the display control signal comprises a clock signal and a horizontal synchronization signal, and the detecting circuit is based on the % pulse § and the horizontal synchronization signal. It is judged whether the driving circuit has entered the standby state or the power saving mode. The data driving circuit of claim 14, wherein the output buffer unit further comprises: a plurality of buffers electrically connected to the corresponding data lines; and a plurality of second switches, Each of the second switches has a first end, a second end, and a third end, and each of the first end ends is coupled to the corresponding buffer. Each of the second end systems respectively receives Corresponding to the pixel data, the third end systems are secreted to the voltage level, and when the driving circuit is in the standby state or the electric mode, the _ circuit controls the second _ (four)-end With the The third terminals are turned on, otherwise the circuit controls the one ends of the second terminals to be electrically connected to the second terminals; wherein the voltage level is substantially a grounding level. The data driving circuit of claim 14, wherein the display panel further comprises a common electrode, and the output buffer unit is further configured to select (four) the output-common electrode voltage or the voltage level to the Same electrode. 19. The data driving circuit according to claim 18, wherein when the detecting circuit is in the standby state or the power saving, the detecting circuit controls the output buffer unit to output the voltage level to: The electrode 'other' controls the output buffer unit to output the common electrode voltage to the 17 '1298861 * tw2315pa electrode. The data buffer circuit as described in claim 18, the output buffer unit further includes: at least a first switch, having a first end, a second end, and the first end In order to receive the common electrician, the common electric blessing, the potential -. ^, one is coupled to the broken drive Φ ^ # coupled to the voltage level, when the guess circuit determines the ^ standby state In the state or the power saving mode, the _ circuit control = the second end of the switch is electrically connected to the third end, otherwise the second switch is controlled to be electrically connected to the second end, and the first voltage is The level and the second voltage are grounded.