CN100354919C - Display device and data driving circuit - Google Patents
Display device and data driving circuit Download PDFInfo
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- CN100354919C CN100354919C CNB2005100977328A CN200510097732A CN100354919C CN 100354919 C CN100354919 C CN 100354919C CN B2005100977328 A CNB2005100977328 A CN B2005100977328A CN 200510097732 A CN200510097732 A CN 200510097732A CN 100354919 C CN100354919 C CN 100354919C
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Abstract
The present invention relates to a display device and a data drive circuit thereof. When the display device receives operation voltage from the data drive circuit but does not receive pixel data, each data line and common electrode receive substantially equal voltage level.
Description
Technical field
The present invention relates to a kind of LCD, particularly relate to a kind of data drive circuit (sourcedriver) and driving method thereof.
Background technology
Traditional data drive circuit is in order to receive pixel data (RGB data) and output pixel voltage according to this.Has an output buffer cell (Output drive buffer) in the data drive circuit, it is in order to increase the driving force of pixel voltage, that is to say, the output buffer cell is electrically connected with many data lines, in order to export above-mentioned pixel voltage to data line, so that pixel produces corresponding brightness.When data drive circuit receives corresponding operating voltage, but when not receiving pixel data, can cause output buffer cell output voltage level at random to data line.These voltage levels at random just can cause pixel generation brightness at random, and are final, make liquid crystal indicator demonstrate multi-color cord at random.In other words, when liquid crystal indicator enters battery saving mode or be called standby mode (Power Save Mode/StandbyMode) (under the standby mode data drive circuit can receive operating voltage but can not receive pixel data), just can demonstrate multi-color cord at random and cause user's puzzlement.Therefore, how to solve that data drive circuit receives operating voltage but when not receiving pixel data and timing control signal, produce at random the problem of voltage level to the data line.
Summary of the invention
In view of this, the purpose of this invention is to provide a kind of display device and data drive circuit thereof, can solve the problem that occurs multi-color cord at random under the standby mode.
According to purpose of the present invention, a kind of display device is proposed, it has driving circuit and display panel.Display panel has many data lines and at least one common electrode.Driving circuit in order to output show controlling signal to display panel so that display panel show image according to this.Display device also comprises output buffer cell, first switch and testing circuit.The output buffer cell is in order to optionally to export many pixel datas or first voltage level to these data lines.First switch has first end, second end and the 3rd end.First end is in order to receive community electrode voltage.Second end is coupled to common electrode.The 3rd end is coupled to second voltage level.Testing circuit shows that in order to foundation controlling signal is to judge whether driving circuit enters a holding state or battery saving mode.
According to another object of the present invention, a kind of data drive circuit of display device is proposed.Display device has driving circuit and display panel.Driving circuit shows controlling signal in order to export one.Display panel has many data lines.Data drive circuit comprises output buffer cell and testing circuit.The output buffer cell is in order to optionally to export many pixel datas or voltage level to described data line.Testing circuit judges according to the demonstration controlling signal whether driving circuit enters a holding state or battery saving mode.When testing circuit judges that driving circuit is in holding state or battery saving mode, testing circuit control output buffer cell output-voltage levels is to described data line, otherwise testing circuit control output buffer cell is exported these pixel datas to described data line.
For above-mentioned purpose of the present invention, feature and advantage can be become apparent, a preferred embodiment cited below particularly, and be described with reference to the accompanying drawings as follows.
Description of drawings
Fig. 1 is the synoptic diagram of display device.
Fig. 2 is the synoptic diagram of the display device of first embodiment of the invention.
Fig. 3 is the synoptic diagram of the display device of second embodiment of the invention.
The reference numeral explanation
200: display device
202: driving circuit
204: display panel
206: data drive circuit
208: common electrode
210: pel array
212: common electrode voltage produces circuit
302: the output buffer cell
304: testing circuit
306: impact damper
Switch: SW1, SW2, SW1 '
D (1)~D (N): data line
Embodiment
The present invention proposes a kind of display device (display apparatus), solve that data drive circuit (source driver) receives operating voltage but when not receiving pixel data (RGB data), can the problem of output voltage level at random to the data line (data lines), allow display device be in the multi-color cord that can not demonstrate under standby mode (Standby Mode) or the battery saving mode (Power Save Mode) at random.
Please refer to Fig. 1, it is the synoptic diagram of display device.Display device 200 is LCD for example, and it comprises a driving circuit 202 and display panel 204.Driving circuit 202 output show controlling signal S1 to display panel 204 so that display panel 204 show image according to this.Furthermore, driving circuit 202 is in order to foundation video signal S2, and for example CVBS, Y/C, RGB or YCbCr show controlling signal S1 with output.Driving circuit 202 for example is an integral chip, and it comprises circuit such as video signal processor, sequential control circuit, phase-locked loop and pwm control circuit.(video signal processor, sequential control circuit, phase-locked loop and pwm control circuit are not plotted among Fig. 1)
Under above-mentioned standby mode or battery saving mode because display device 200 still receives external power source, AC110 volt for example, thus can continue to offer the required operating voltage of above-mentioned data drive circuit 206, for example+5 or+3.3 volts.Data drive circuit 206 receives these operating voltages but when not receiving pixel data (RGB data), just can export at random voltage level to data line D (1)~D (N).Make LCD 200 demonstrate the multi-color cord of vertical direction so just can receive voltage level at random on data line D (1)~D (N).
The present invention is according to showing that controlling signal S1 is to judge whether driving circuit 202 enters above-mentioned standby mode or battery saving mode, and when driving circuit 202 enters standby mode, make each bar data line D (1)~D (N) and common electrode 208 all receive identical in fact voltage level.Because each bar data line and common electrode all receive identical in fact voltage level, so, will no longer produce the situation of multiple random color line in entering standby mode or battery saving mode following time.
First embodiment
Please refer to Fig. 2, it is the synoptic diagram of the display device of first embodiment of the invention.Display device 200 comprises that also common electrode voltage produces the circuit 212 and first switch SW 1.Common electrode voltage produces circuit 212 and for example produces common electrode voltage Vcom down in above-mentioned sequential control circuit control.First switch SW 1 has the first end T1, the second end T2 and the 3rd end T3.The first end T1 produces the common electrode voltage Vcom that circuit 212 is exported in order to receive common electrode voltage.The second end T2 is coupled to common electrode 208.The 3rd end T3 is coupled to the second voltage level V2.
When testing circuit 304 enters holding state or battery saving mode according to demonstration controlling signal S1 with judgement driving circuit 202, the second end T2 and the 3rd end T3 conducting of testing circuit 304 controls first switch SW 1, and the first end T1 of control a plurality of second switch SW2 (1)~SW2 (N), with the 3rd end T3, conducting.So, all data line D (1)~D (N) just all receives identical voltage level with common electrode 208, makes liquid crystal molecule can not produce rotation, promptly can not produce the situation of multiple random color line.
Otherwise, when driving circuit 202 is not when being in holding state or battery saving mode, the first end T1 of testing circuit 304 these first switch SW of control and the second end T2 conducting and control output buffer cell 302 output pixel voltage VP (1)~VP (N) are to data line D (1)~D (N), even the first end T1 ' of a plurality of second switch SW2 (1)~SW2 (N) and the second end T2 ' conducting make pixel can normally receive pixel voltage VP (1)~VP (N) and common electrode voltage Vcom.
In addition, according to showing that controlling signal S1 judges whether driving circuit 202 enters standby mode or battery saving mode aspect.Because when driving circuit 202 enters standby mode or battery saving mode, driving circuit 202 still can be exported above-mentioned clock signal clk to data drive circuit 206, but can output timing controlling signal (as: horizontal synchronization signal) to data drive circuit 206, therefore can judge whether driving circuit 202 enters standby mode or battery saving mode by clock signal clk and horizontal synchronization signal (as: horizontal start signal STH).For example when driving circuit 202 enters standby mode or battery saving mode, to judge whether occur horizontal synchronization signal in the unit interval activation level of (as: horizontal start signal STH), do not judge by this that then driving circuit 202 enters in standby mode or the battery saving mode by the clock of counting clock signal CLK if having.Yet, in present embodiment, do not limit and to judge by clock signal clk and horizontal synchronization signal (as: horizontal start signal STH) whether driving circuit 202 enters holding state or battery saving mode, as long as can be by showing that controlling signal S1 judges and makes switch SW 1 and the corresponding action of SW2 generation.
Second embodiment
The place different with the foregoing description is above-mentioned first switch is disposed in the data drive circuit.Please refer to Fig. 3, it is the synoptic diagram of the display device of second embodiment of the invention.Data drive circuit 206 also comprises testing circuit 304 and output buffer cell 302.But buffer cell 302 also comprises first switch SW 1 ' except comprising a plurality of impact dampers 306 (1)~306 (N) and a plurality of second switch SW2 (1)~SW2 (N), and N is a positive integer.First switch SW 1 ' has the first end T1 ", the second end T2 " with the 3rd end T3 ".The first end T1 " in order to receive community electrode voltage Vcom.The second end T2 " be coupled to common electrode 208.The 3rd end T3 " be coupled to a voltage level V1.And the connected mode of a plurality of second switch SW2 (1)~SW2 (N) is described as first embodiment, and these first ends T1 ' (1)~T1 ' is (N) respectively in order to couple corresponding impact damper 306.These second ends T2 ' (1)~T2 ' (N) receives the pixel voltage VP that corresponding higher level's circuit is exported, and higher level's circuit is analog sample holding circuit (Analog Sampling﹠amp for example; Hold).These the 3rd ends T3 ' (1)~T3 ' (N) all is coupled to above-mentioned voltage level V1.Voltage level V1 for example is an earth level.
As mentioned above, when driving circuit 202 entered standby mode, driving circuit 202 still can be exported above-mentioned clock signal clk to data drive circuit 206, but did not have horizontal sync signal (as: horizontal start signal STH).Therefore, similarly testing circuit 304 to judge whether occur horizontal synchronization signal in the unit interval activation level of (as: horizontal start signal STH), does not then judge that driving circuit 202 enter in standby mode or battery saving mode if having by the clock of counting clock signal CLK.When driving circuit 202 enters standby mode or battery saving mode, testing circuit 304 is just controlled the second end T2 of first switch SW 1 ' " and the 3rd end T3 " conducting, and the first end T1 ' and the 3rd end T3 ' conducting of control a plurality of second switch SW2 (1)~SW2 (N).So, similarly all data line D (1)~D (N) just all receives identical voltage level V ' with common electrode 208, makes liquid crystal molecule can not produce rotation.
Wherein, in this enforcement as the foregoing description, also do not limit and to judge by clock signal clk and horizontal synchronization signal (as: horizontal start signal STH) whether driving circuit 202 enters holding state or battery saving mode, as long as can be according to showing relevant controlling signal among the controlling signal S1 judging whether driving circuit 202 enters standby mode or battery saving mode, and under standby mode or battery saving mode, make data line D (1)~D (N) and electrode 208 jointly just all receive the voltage level that equates in fact to get final product.And, in first and second embodiment, also do not limit the allocation position that common electrode voltage produces circuit 212, it is outer or be disposed in the display panel 204 to be disposed at display panel 204, for example is disposed in the data drive circuit 206 or (not shown)s in the scan drive circuit.
The display device that the above embodiment of the present invention is disclosed can solve the problem that occurs multi-color cord at random under standby mode or the battery saving mode.That is to say, receive operating voltage at data drive circuit but do not receive pixel data and during the sequential controlling signal, make each bar data line and common electrode all receive identical in fact voltage level.
In sum; though the present invention discloses as above with a preferred embodiment; right its is not in order to limit the present invention; those skilled in the art can be used for a variety of modifications and variations under the premise without departing from the spirit and scope of the present invention, so protection scope of the present invention is as the criterion with claim of the present invention.
Claims (20)
1. display device, have an one drive circuit and a display panel, this display panel has many data lines and at least one common electrode, this driving circuit in order to export one show controlling signal to this display panel so that this display panel show image according to this, this display device comprises:
One output buffer cell is in order to optionally to export many pixel datas or one first voltage level to described data line;
At least one first switch has one first end, one second end and one the 3rd end, and this first end is in order to receive community electrode voltage, and this second end is coupled to this common electrode, and the 3rd end is coupled to one second voltage level; And
One testing circuit, in order to according to this demonstration controlling signal to judge whether this driving circuit enters a holding state or battery saving mode.
2. display device as claimed in claim 1, wherein, when this driving circuit was in this holding state or battery saving mode, this testing circuit was controlled this second end and the 3rd end conducting of this first switch and is controlled this output buffer cell and export this first voltage level to described data line.
3. display device as claimed in claim 1, wherein, when this driving circuit is not when being in this holding state or battery saving mode, this testing circuit is controlled this first end and this second end conducting of this first switch and is controlled this output buffer cell and export described pixel data to described data line.
4. display device as claimed in claim 1, wherein, this first voltage level is equal to this second voltage level in fact.
5. display device as claimed in claim 4, wherein, this first voltage level and this second voltage level are essentially earth level.
6. display device as claimed in claim 1, wherein, this demonstration controlling signal comprises a clock signal and a horizontal synchronization signal, this testing circuit according to this clock signal and this horizontal synchronization signal to judge whether this driving circuit has entered this holding state or battery saving mode.
7. display device as claimed in claim 1, wherein, this output buffer cell comprises:
A plurality of impact dampers are respectively with corresponding described data line electric connection; And
A plurality of second switches, each described second switch has one first end respectively, one second end and one the 3rd end, each described first end is respectively in order to couple corresponding described impact damper, each described second end receives this corresponding pixel data respectively, each described the 3rd end all is coupled to this first voltage level, when this driving circuit is in this holding state or battery saving mode, this testing circuit is controlled described first end and described the 3rd end conducting of described second switch, otherwise this testing circuit is controlled described first end and the described second end conducting of described second switch, and this first voltage level and this second voltage level are essentially earth level.
8. display device as claimed in claim 7, wherein, this display panel also comprises:
One pel array; And
One data drive circuit, in order to receive this demonstration controlling signal and to drive this pel array according to this, this output buffer cell, this first switch and this testing circuit are disposed in this data drive circuit.
9. display device as claimed in claim 7, wherein, this display device also comprises:
One pel array;
One data drive circuit, in order to receive this demonstration controlling signal and to drive this pel array according to this, this output buffer cell and this testing circuit are disposed in this data drive circuit; And
The community electrode voltage generation circuit comprises:
One operational amplifier, in order to export this common electrode voltage, this first switch is disposed at this common electrode voltage and produces in the circuit.
10. the driving method of a display device, this display device comprises an one drive circuit and a display panel, this driving circuit shows controlling signal in order to export one, this display panel shows controlling signal show image picture according to this, this display panel has many data lines and at least one common electrode, and this driving method comprises:
Judge according to this demonstration controlling signal or via an external control signal whether this driving circuit enters a holding state or battery saving mode; And
When this driving circuit is in this holding state or battery saving mode, make these many data lines and this common electrode all receive a voltage level.
11. driving method as claimed in claim 10, wherein, this demonstration controlling signal comprises a clock signal and a horizontal synchronization signal.
12. driving method as claimed in claim 11, wherein, this method also comprises according to this clock signal and this horizontal synchronization signal to judge whether this driving circuit enters this holding state or battery saving mode.
13. driving method as claimed in claim 10, wherein, this voltage level is essentially earth level.
14. the data drive circuit of a display device, this display device have an one drive circuit and a display panel, this driving circuit shows controlling signal in order to export one, and this display panel has many data lines, and this data drive circuit comprises:
One output buffer cell is in order to optionally to export many pixel datas or a voltage level to described data line; And
One testing circuit, judge according to this demonstration controlling signal whether this driving circuit enters a holding state or battery saving mode, when this testing circuit judges that this driving circuit is in this holding state or battery saving mode, this testing circuit is controlled this output buffer cell and is exported this voltage level to described data line, otherwise this testing circuit control output buffer cell is exported described pixel data to described data line.
15. data drive circuit as claimed in claim 14, wherein, this voltage level is essentially earth level.
16. data drive circuit as claimed in claim 14, wherein, this demonstration controlling signal comprises a clock signal and a horizontal synchronization signal, and this testing circuit judges according to this clock signal and this horizontal synchronization signal whether this driving circuit has entered this holding state or battery saving mode.
17. data drive circuit as claimed in claim 14, wherein, this output buffer cell also comprises:
A plurality of impact dampers are respectively with corresponding described data line electrical connection; And
A plurality of second switches, each described second switch has one first end, one second end and one the 3rd end, each described first end couples this corresponding impact damper respectively, each described second end receives this corresponding pixel data respectively, described the 3rd end all is coupled to this voltage level, when this driving circuit is in this holding state or battery saving mode, this testing circuit is controlled described first end and described the 3rd end conducting of described second switch, otherwise this testing circuit is controlled described first end and the described second end conducting of described second switch;
Wherein, this voltage level is essentially earth level.
18. data drive circuit as claimed in claim 14, wherein, this display panel also comprises community electrode, and this output buffer cell is also in order to optionally to export community electrode voltage or this voltage level to this common electrode.
19. data drive circuit as claimed in claim 18, wherein, when this testing circuit judges that this driving circuit is in this holding state or battery saving mode, this testing circuit is controlled this output buffer cell and is exported this voltage level to this common electrode, exports this common electrode voltage to this common electrode otherwise control this output buffer cell.
20. data drive circuit as claimed in claim 18, wherein, this output buffer cell also comprises:
At least one first switch, have one first end, one second end and one the 3rd end, this first end is in order to receive this common electrode voltage, this second end is coupled to this common electrode, the 3rd end is coupled to this voltage level, when this testing circuit judges that this driving circuit is in this holding state or battery saving mode, this testing circuit is controlled second end and the 3rd end conducting of this first switch, otherwise control this first end and this second end conducting of this first switch, and this voltage level is essentially earth level.
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CNB2005100977328A CN100354919C (en) | 2005-08-24 | 2005-08-24 | Display device and data driving circuit |
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CNB2005100977328A CN100354919C (en) | 2005-08-24 | 2005-08-24 | Display device and data driving circuit |
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CN100354919C true CN100354919C (en) | 2007-12-12 |
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Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
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JP2009015104A (en) * | 2007-07-06 | 2009-01-22 | Nec Electronics Corp | Display controller and control method therefor |
JP5961125B2 (en) * | 2013-02-26 | 2016-08-02 | 株式会社ジャパンディスプレイ | Display device and electronic device |
CN114170950A (en) * | 2014-03-10 | 2022-03-11 | 硅工厂股份有限公司 | Source driver |
CN109346013A (en) * | 2018-12-20 | 2019-02-15 | 北京集创北方科技股份有限公司 | Driving circuit, driving chip and display device |
TWI698126B (en) * | 2019-05-23 | 2020-07-01 | 友達光電股份有限公司 | Display device and vcom signal generation circuit |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002358051A (en) * | 2001-05-31 | 2002-12-13 | Matsushita Electric Ind Co Ltd | Driving method for liquid crystal display device and liquid crystal display device |
CN1466120A (en) * | 2002-07-02 | 2004-01-07 | 明基电通股份有限公司 | Power source managemnt system for LCD |
US20040130543A1 (en) * | 2003-01-03 | 2004-07-08 | Wein-Town Sun | Method for reducing power consumption of an LCD panel in a standby mode |
JP2004212924A (en) * | 2003-01-03 | 2004-07-29 | Au Optronics Corp | Method for reducing power consumption of liquid crystal panel |
JP2005049651A (en) * | 2003-07-29 | 2005-02-24 | Iiyama Corp | Display device |
CN1599924A (en) * | 2001-12-05 | 2005-03-23 | 皇家飞利浦电子股份有限公司 | Method for driving a liquid crystal display device in normal and standby mode |
-
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Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002358051A (en) * | 2001-05-31 | 2002-12-13 | Matsushita Electric Ind Co Ltd | Driving method for liquid crystal display device and liquid crystal display device |
CN1599924A (en) * | 2001-12-05 | 2005-03-23 | 皇家飞利浦电子股份有限公司 | Method for driving a liquid crystal display device in normal and standby mode |
CN1466120A (en) * | 2002-07-02 | 2004-01-07 | 明基电通股份有限公司 | Power source managemnt system for LCD |
US20040130543A1 (en) * | 2003-01-03 | 2004-07-08 | Wein-Town Sun | Method for reducing power consumption of an LCD panel in a standby mode |
JP2004212924A (en) * | 2003-01-03 | 2004-07-29 | Au Optronics Corp | Method for reducing power consumption of liquid crystal panel |
JP2005049651A (en) * | 2003-07-29 | 2005-02-24 | Iiyama Corp | Display device |
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