CN214847676U - Liquid crystal display circuit and liquid crystal display device - Google Patents
Liquid crystal display circuit and liquid crystal display device Download PDFInfo
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Abstract
The embodiment of the application discloses liquid crystal display circuit and liquid crystal display equipment, the liquid crystal display circuit includes: the device comprises a digital voltage module, a switch module, a driving module, a data processing module and a liquid crystal display screen, wherein the switch module is respectively connected with the digital voltage module, a first end of the driving module and one end of the data processing module; the second end of the driving module is connected with the other end of the data processing module, and the third end of the driving module is connected with the liquid crystal display screen. By adopting the embodiment of the application, the display frame on the liquid crystal display screen can be prevented from shaking when the computer is started.
Description
Technical Field
The application relates to the field of circuits, in particular to a liquid crystal display circuit and liquid crystal display equipment.
Background
When the liquid crystal display is turned off, the power supply to the liquid crystal display is stopped, and at the moment, liquid crystal molecules in the liquid crystal display discharge. The liquid crystal molecules are slowly discharged under the influence of the manufacturing process of the liquid crystal display screen and the turning characteristics of the liquid crystal molecules.
When the liquid crystal molecules are not completely discharged, the liquid crystal display device is started, and the liquid crystal display screen is electrified again, so that the charge in the liquid crystal molecules is disordered, and the display picture on the liquid crystal display screen is shaken when the liquid crystal display screen is started.
SUMMERY OF THE UTILITY MODEL
The embodiment of the application provides a liquid crystal display circuit and liquid crystal display equipment, which can avoid the display image on a liquid crystal display screen from shaking. The technical scheme is as follows:
in a first aspect, an embodiment of the present application provides a liquid crystal display circuit, including a digital voltage module, a switch module, a driving module, a data processing module, and a liquid crystal display screen, wherein:
the switch module is respectively connected with the digital voltage module, the first end of the driving module and one end of the data processing module;
the second end of the driving module is connected with the other end of the data processing module, and the third end of the driving module is connected with the liquid crystal display screen;
the low-level backlight signal output by the data processing module is transmitted to the switch module, the analog voltage signal output by the driving module is transmitted to the switch module, the digital voltage signal output by the digital voltage module is transmitted to the data processing module through the switch module, and the BIST data generated by the data processing module is output to the liquid crystal display screen through the driving module when the data processing module receives the digital voltage signal.
In a second aspect, the present application provides a liquid crystal display device, which includes the liquid crystal display circuit described above.
The beneficial effects brought by the technical scheme provided by some embodiments of the application at least comprise:
in the embodiment of the present application, the liquid crystal display circuit includes a digital voltage module, a switch module, a driving module, a data processing module and a liquid crystal display, wherein: the switch module is respectively connected with the digital voltage module, the first end of the driving module and one end of the data processing module, the second end of the driving module is connected with the other end of the data processing module, and the third end of the driving module is connected with the liquid crystal display screen to form a structure of the liquid crystal display circuit. The low-level backlight signal output by the data processing module is transmitted to the switch module, the analog voltage signal output by the driving module is transmitted to the switch module, the digital voltage signal output by the digital voltage module is transmitted to the data processing module through the switch module, and the BIST data generated by the data processing module is output to the liquid crystal display screen through the driving module when the data processing module receives the digital voltage signal. The electrodes of the liquid crystal molecules are electrified through the BIST data, and the charge stability of the liquid crystal molecules in the liquid crystal display screen is established, so that the charge stability of the liquid crystal molecules when the liquid crystal display screen displays the picture is ensured, and the display picture on the liquid crystal display screen is prevented from shaking when the liquid crystal display screen is started.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a liquid crystal display circuit according to an embodiment of the present disclosure;
fig. 2 is an exemplary schematic diagram of a switch module provided in an embodiment of the present application;
fig. 3 is an exemplary schematic diagram of another switch module provided in the embodiments of the present application;
fig. 4 is an exemplary schematic diagram of a driving module according to an embodiment of the present disclosure;
fig. 5 is an exemplary schematic diagram of a source driver provided in an embodiment of the present application;
fig. 6 is an exemplary schematic diagram of a data processing module according to an embodiment of the present application;
FIG. 7 is a circuit diagram of a liquid crystal display circuit according to an embodiment of the present disclosure;
fig. 8 is a topological circuit diagram of another liquid crystal display circuit provided in an embodiment of the present application.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description of the present application, it is to be understood that the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. In the description of the present application, it is noted that, unless explicitly stated or limited otherwise, "including" and "having" and any variations thereof, are intended to cover non-exclusive inclusions. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those steps or elements listed, but may alternatively include other steps or elements not listed, or inherent to such process, method, article, or apparatus. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art. Further, in the description of the present application, "a plurality" means two or more unless otherwise specified. "and/or" describes the association relationship of the associated objects, meaning that there may be three relationships, e.g., a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship.
The liquid crystal display circuit provided by the embodiment of the application can be applied to liquid crystal display equipment, wherein the liquid crystal display equipment is equipment for displaying pictures through a liquid crystal display screen, and the liquid crystal display equipment comprises but is not limited to: televisions, tablets, wearable devices, and other processing devices connected to a liquid crystal display, and the like. In the liquid crystal display circuit, the data processing module can output Built-in self test (BIST) data, the BIST data is transmitted to the liquid crystal display screen through the driving module, and electrodes of liquid crystal molecules in the liquid crystal display screen are electrified again, so that the charge stability of the liquid crystal molecules in the liquid crystal display screen is established. The BIST data is transmitted to the liquid crystal display screen through the driving module, and the driving module can modulate the BIST data and apply the BIST data to the liquid crystal display screen so as to realize the charge stabilization of liquid crystal molecules in the liquid crystal display screen.
The present application will be described in detail with reference to specific examples.
As shown in fig. 1, fig. 1 is a schematic structural diagram of a liquid crystal display circuit provided in an embodiment of the present application, where the liquid crystal display circuit 1 includes a digital voltage module 11, a switch module 12, a driving module 13, a data processing module 14, and a liquid crystal display screen 15, where:
the switch module 12 is respectively connected to the digital voltage module 11, a first end of the driving module 13, and one end of the data processing module 14; the second end of the driving module 13 is connected with the other end of the data processing module 14, and the third end of the driving module 13 is connected with the liquid crystal display screen 15.
Specifically, the digital voltage module 11 is a voltage source that outputs a digital voltage signal (DVDD), and is connected to the switch module 12.
An example schematic of a possible switch module is shown in fig. 2. The switch module comprises a first switch tube Q1, a NOT gate and a second switch tube Q2, wherein: the collector of the first switch tube Q1 is connected to the digital voltage module 11, the base of the first switch tube Q1 is connected to the first end of the driving module, and the emitter of the first switch tube Q1 is connected to the collector of the second switch tube Q1; the emitter of the second switch tube Q2 is connected with one end of the data processing module, and the base of the second switch tube Q2 is connected with the output end of the NOT gate; and the input end of the NOT gate is connected with one end of the data processing module.
Optionally, in order to prevent the voltage output by the digital voltage module 11 from being directly transmitted to the collector of the first switching tube Q1 to burn out the components in the circuit, a current limiting resistor R is added between the digital voltage module 11 and the first switching tube to protect the devices in the switching module, as shown in fig. 3, which is an exemplary schematic diagram of a possible switching module.
The driving module 13 is connected to the switch module 12, the data processing module 14 and the liquid crystal display 15 respectively. Specifically, as shown in fig. 4, an exemplary schematic diagram of a possible driving module is shown. The driving module 13 includes an analog voltage Source 131 and a Source Driver (Source Driver)132, wherein: the analog voltage source 131 is respectively connected to a first terminal of the source driver 132 and a base D of the first switch Q1; a second end of the source driver 132 is connected to the other end of the data processing module; the third terminal of the source driver 132 is connected to the lcd 15.
It is easy to understand that the second terminal of the source driver 132 is the second terminal of the driving module 13, and the third terminal of the source driver 132 is the third terminal of the driving module 13.
The analog voltage source 131 is a voltage source that outputs an analog voltage signal (AVDD), and provides an operating voltage to the source driver 132, and outputs the operating voltage to the base of the first switch Q1, so as to turn on the first switch Q1.
An example of a possible source driver is shown in fig. 5. The source driver 132 includes a Shift Register (Shift Register)1321, a sampling Register (Sample Register)1322, a data latch unit 1323, a Hold Register (Hold Register)1324, a Level Shift unit (Level Shift)1325, a Digital-to-Analog Converter (DAC) 1326, an output buffer 1327, and a Gamma Voltage Generator (Gamma Voltage Generator) 1328. The shift register 1321 receives an externally input Start Pulse (Start Pulse) signal, latches the Start Pulse signal, and uses the Start Pulse signal as a control signal for sequentially distributing data. The sampling register 1322 is connected to the data latch unit 1323 and the holding register 1324, respectively, the holding register 1324 is connected to the level shift unit 1325, and the dac 1326 is connected to the level shift unit 1325, the output buffer 1327, and the gamma voltage generation device 1328, respectively.
Specifically, the BIST data is transmitted to the holding register 1324 via the data latch unit 1323 and the sampling register 1322. The hold register 1324 receives the horizontal latch signal and the BIST data, adjusts a voltage level of the BIST data at the level shift unit 1325 to obtain first BIST data, and transmits the first BIST data to the digital-to-analog converter 1326. The Gamma voltage generator 1328 receives an external Gamma voltage, transmits the Gamma voltage to the dac 1326, adjusts the first BIST data using the Gamma voltage as a reference for adjusting to an analog signal, and obtains target BIST data, which is output to the lcd 15 through the output buffer 1327.
The data processing module 14 includes a system on chip 141 and a timing controller 142, as shown in fig. 6, which is an exemplary schematic diagram of a data processing module, a first end of the system on chip 141 is connected to a first end of the timing controller 142, and a second end of the system on chip 141 is connected to an input end of the not gate; a second terminal of the timing controller 142 is connected to the emitter of the second switching transistor Q2, and a third terminal of the timing controller 142 is connected to a second terminal of the source driver 132.
Specifically, the System-on-a-chip (SOC) 141 refers to a chip integrated with a complete System, and the complete System may include a Central Processing Unit (CPU), a memory, a peripheral circuit, and the like.
The Timing Controller (TCON) 142 includes a BIST circuit 1421, and generates BIST data when a second terminal of the Timing Controller receives a digital voltage signal. The BIST circuit 1421 includes, but is not limited to, a test pattern generation circuit, a debug test circuit, and a pseudo random test pattern generator. It will be readily appreciated that the BIST data generated by the BIST circuit 1421 may be test video data or test graphics data. The test video data is a piece of video data generated by the BIST circuit 1421 for a preset time, where the preset time may be a time required for establishing the charge stabilization in the liquid crystal molecules in the liquid crystal display. The test pattern data is the pattern data that the BIST circuit 1421 continuously generates and outputs when receiving the signal of outputting the BIST data, and stops outputting the pattern data until the signal of outputting the BIST data stops being received.
Further, the low-level backlight signal output by the data processing module 14 is transmitted to the switch module, the analog voltage signal output by the driving module is transmitted to the switch module, the digital voltage signal output by the digital voltage module is transmitted to the data processing module through the switch module, and the BIST data generated by the data processing module when receiving the digital voltage signal is output to the liquid crystal display screen through the driving module.
The backlight signal is a signal representing the state of a backlight switch in the liquid crystal display screen, and when the backlight signal is at a high level, the backlight switch is in an on state; when the backlight signal is at low level, the backlight switch is in off state. It is easy to understand that when the liquid crystal display displays images, the backlight needs to be turned on to make the liquid crystal display images more informative.
As shown in fig. 7, a topological circuit diagram of a liquid crystal display circuit. The working principle of a liquid crystal display circuit provided by the embodiment of the present application is described in a complete way with reference to fig. 7:
before the liquid crystal display circuit starts to transmit the image display data, the backlight switch is in a closed state, and the liquid crystal display screen does not display the image. The soc outputs a backlight signal to an input terminal of the not gate, the backlight signal is at a low level and is converted into a high level through the not gate, and the high level backlight signal is transmitted to the base of the second switch transistor Q2, so that the second switch transistor Q2 is turned on. At this time, the liquid crystal display circuit is in an operating state, the source driver receives an operating voltage, i.e., an analog voltage signal, output by the analog voltage source, and the base of the first switch transistor Q1 receives the analog voltage signal, so that the first switch transistor Q1 is turned on. When the first switch tube Q1 and the second switch tube Q2 are both turned on, the digital voltage signal outputted by the digital voltage module is sequentially transmitted to the timing controller through the first switch tube Q1 and the second switch tube Q2, and the BIST signal in the timing controller is pulled up, and the timing controller outputs the BIST data when the BIST signal is pulled up, so that the BIST data is transmitted to the liquid crystal display screen through the source driver, thereby establishing the charge stabilization of the liquid crystal molecules in the liquid crystal display screen.
In the embodiment of the present application, the liquid crystal display circuit includes a digital voltage module, a switch module, a driving module, a data processing module and a liquid crystal display, wherein: the switch module is respectively connected with the digital voltage module, the first end of the driving module and one end of the data processing module, the second end of the driving module is connected with the other end of the data processing module, and the third end of the driving module is connected with the liquid crystal display screen to form a structure of the liquid crystal display circuit. The low-level backlight signal output by the data processing module is transmitted to the switch module, the analog voltage signal output by the driving module is transmitted to the switch module, the digital voltage signal output by the digital voltage module is transmitted to the data processing module through the switch module, and the BIST data generated by the data processing module is output to the liquid crystal display screen through the driving module when the data processing module receives the digital voltage signal. The electrodes of the liquid crystal molecules are electrified through the BIST data, and the charge stability of the liquid crystal molecules in the liquid crystal display screen is established, so that the charge stability of the liquid crystal molecules when the liquid crystal display screen displays the picture is ensured, and the display picture on the liquid crystal display screen is prevented from shaking when the liquid crystal display screen is started.
As shown in fig. 8, the liquid crystal display circuit 1 includes the digital voltage module 11, the switch module 12, the driving module 13, the data processing module 14, and the liquid crystal display 15 in the above embodiments. Wherein:
the digital voltage module 11, the switch module 12, the driving module 13, and the liquid crystal display 15 are respectively the same as the digital voltage module 11, the switch module 12, the driving module 13, and the liquid crystal display 15 in the above embodiments, and specific reference may be made to the above embodiments, which are not described herein again.
The data processing module 14 includes the system on chip 141 and the timing controller 142 in the above embodiments, and further includes an external processor 143.
It should be noted that the system on chip 141 is connected to the timing controller 142, wherein the system on chip establishes a data transmission channel with the timing controller through a VBO (V-By-One, image transmission digital interface standard) protocol. Among them, the VBO protocol is a digital interface standard developed specifically for image transmission.
Specifically, the high-level first thermal phase-locked detection Signal (HTPDN) and the high-level first Lock Signal (Lock Signal, LOCKN) transmitted by the timing controller 142 are transmitted to the system-on-chip 141. After the system on chip 141 completes the data clock recovery, the first thermal lock detection signal is converted into a second thermal lock detection signal with a low level, after the system on chip 141 completes the clock locking, the first lock signal is converted into a second lock signal with a low level, and the second thermal lock detection signal and the second lock signal are transmitted to the timing controller 142. The IP data sent by the system on chip 141 is transmitted to the timing controller 142, the IP data is converted into image display data by the external processor 143, and the image display data is transmitted to the timing controller 142.
It is well understood that Data Clock Recovery (CDR) refers to the reacquisition of a Clock component in a received signal. Wherein clock recovery can be performed by detecting the phase of the received signal. Clock locking is to reduce clock delays and skew during data transmission.
The Internet Protocol (IP) data refers to data that the liquid crystal display screen needs to display. The lcd cannot directly receive and display the IP data, and therefore, when the IP data is transmitted to the timing controller 142 through the soc 141, the timing controller 142 transmits the IP data to the external processor 143 for processing, so as to obtain the screen display data. The image display data can be directly received by the source driver 132, and modulated by the source driver 132 and applied to the lcd panel, so that the lcd panel displays the image corresponding to the image display data.
Optionally, the external processor 143 includes, but is not limited to, a solid state memory and a motion picture editor (Flash).
The working principle of a liquid crystal display circuit provided by the embodiment of the present application is described in detail below with reference to fig. 8:
the liquid crystal display device is started, the liquid crystal display circuit starts to be powered on, the system on chip and the time schedule controller establish a data transmission channel, and the system on chip sends the IP data to the time schedule controller. The timing controller processes the IP data through the external processor.
When the IP data is processed, the backlight switch is in a closed state, and the liquid crystal display screen does not display the picture. The soc outputs a backlight signal to an input terminal of the not gate, the backlight signal is at a low level and is converted into a high level through the not gate, and the high level backlight signal is transmitted to the base of the second switch transistor Q2, so that the second switch transistor Q2 is turned on. At this time, the liquid crystal display circuit is in an operating state, the source driver receives an operating voltage, i.e., an analog voltage signal, output by the analog voltage source, and the base of the first switch transistor Q1 receives the analog voltage signal, so that the first switch transistor Q1 is turned on. When the first switch tube Q1 and the second switch tube Q2 are both turned on, the digital voltage signal outputted by the digital voltage module is sequentially transmitted to the timing controller through the first switch tube Q1 and the second switch tube Q2, and the BIST signal in the timing controller is pulled up, and the timing controller outputs the BIST data when the BIST signal is pulled up, so that the BIST data is transmitted to the liquid crystal display screen through the source driver, thereby establishing the charge stabilization of the liquid crystal molecules in the liquid crystal display screen.
When the IP data is processed, the image display data is obtained, the image display data starts to be output, at this time, the backlight is turned on, the backlight switch is in the off state, the liquid crystal display performs image display, the backlight signal is at a high level and is converted into a low level through the not gate, and the low level backlight signal is transmitted to the base of the second switching tube Q2, so that the second switching tube Q2 is turned off. When the second switch Q2 is turned off, the digital voltage signal outputted from the digital voltage module cannot be transmitted to the timing controller through the first switch Q1 and the second switch Q2, and therefore, the pull-up of the BIST signal in the timing controller is stopped, and the timing controller stops outputting the BIST data when the BIST signal is not pulled up, so that the timing controller only outputs the frame display data to the source driver and transmits the frame display data to the liquid crystal display, thereby enabling the liquid crystal display to normally display the frame.
It should be noted that, when the liquid crystal display displays a screen, the process of processing the IP data to obtain the screen display data and outputting the screen display data is continuously performed. The state of completion of IP data processing means: in one data transmission cycle, the IP data processing is completed, and the screen display data starts to be output.
In the embodiment of the application, the electrodes of the liquid crystal molecules are electrified through the BIST data, and the charge stability of the liquid crystal molecules in the liquid crystal display screen is established, so that the charge stability of the liquid crystal molecules when the liquid crystal display screen displays the picture is ensured, and the display picture on the liquid crystal display screen is prevented from shaking when the liquid crystal display screen is started. In addition, when the processing of the IP data is completed and the picture display data is obtained, the time sequence controller stops outputting the BIST data, outputs the picture display data to the source driver, and transmits the picture display data to the liquid crystal display screen, so that the liquid crystal display screen can normally display the picture, and the charge stability of liquid crystal molecules in the liquid crystal display screen is established by fully utilizing the processing time of the IP data.
The embodiment of the application also provides a liquid crystal display device which comprises the liquid crystal display circuit. The liquid crystal display device may be a television, a tablet computer, a wearable device, and other processing devices connected to a liquid crystal display screen, etc. The liquid crystal display equipment with the liquid crystal display circuit can establish the charge stability of liquid crystal molecules in the liquid crystal display screen through the BIST data, so that the charge stability of the liquid crystal molecules of the liquid crystal display screen is ensured when the liquid crystal display screen displays a picture, further the jitter of the display picture on the liquid crystal display screen is avoided when the liquid crystal display screen is started, and when the processing of IP data is completed and the picture display data is obtained, the time schedule controller stops outputting the BIST data, outputs the picture display data to the source electrode driver, transmits the picture display data to the liquid crystal display screen, so that the liquid crystal display screen can normally display the picture, and the charge stability of the liquid crystal molecules in the liquid crystal display screen is established by fully utilizing the processing time of the IP data.
The above disclosure is only for the purpose of illustrating the preferred embodiments of the present application and is not to be construed as limiting the scope of the present application, so that the present application is not limited thereto, and all equivalent variations and modifications can be made to the present application.
Claims (10)
1. The utility model provides a liquid crystal display circuit which characterized in that, the circuit includes digital voltage module, switch module, drive module, data processing module and liquid crystal display, wherein:
the switch module is respectively connected with the digital voltage module, the first end of the driving module and one end of the data processing module;
the second end of the driving module is connected with the other end of the data processing module, and the third end of the driving module is connected with the liquid crystal display screen;
the low-level backlight signal output by the data processing module is transmitted to the switch module, the analog voltage signal output by the driving module is transmitted to the switch module, the digital voltage signal output by the digital voltage module is transmitted to the data processing module through the switch module, and the BIST data generated by the data processing module is output to the liquid crystal display screen through the driving module when the data processing module receives the digital voltage signal.
2. The liquid crystal display circuit of claim 1, wherein the switch module comprises a first switch tube, a not gate, and a second switch tube, wherein:
a collector of the first switching tube is connected with the digital voltage module, a base of the first switching tube is connected with a first end of the driving module, and an emitter of the first switching tube is connected with a collector of the second switching tube;
an emitting electrode of the second switching tube is connected with one end of the data processing module, and a base electrode of the second switching tube is connected with an output end of the NOT gate;
and the input end of the NOT gate is connected with one end of the data processing module.
3. The liquid crystal display circuit of claim 2, wherein the driving module comprises an analog voltage source and a source driver, wherein:
the analog voltage source is respectively connected with the first end of the source electrode driver and the base electrode of the first switch tube;
the second end of the source electrode driver is connected with the other end of the data processing module;
and the third end of the source electrode driver is connected with the liquid crystal display screen.
4. The liquid crystal display circuit of claim 3, wherein the data processing module comprises a system-on-a-chip and a timing controller, wherein:
the first end of the system-on-chip is connected with the first end of the time sequence controller, and the second end of the system-on-chip is connected with the input end of the NOT gate;
and the second end of the time sequence controller is connected with the emitter of the second switching tube, and the third end of the time sequence controller is connected with the second end of the source driver.
5. The liquid crystal display circuit of claim 4, wherein the data processing module further comprises an external processor, wherein:
the external processor is connected with the fourth end of the time schedule controller.
6. The liquid crystal display circuit according to claim 5, wherein the first high-level thermal phase-locked detection signal and the first high-level lock signal transmitted from the timing controller are transmitted to the system on chip;
after the system on chip finishes data clock recovery, the first thermal phase-locked detection signal is converted into a second thermal phase-locked detection signal with low level, after the system on chip finishes clock locking, the first lock signal is converted into a second lock signal with low level, and the second thermal phase-locked detection signal and the second lock signal are transmitted to the time schedule controller;
and the IP data sent by the system on chip is transmitted to the time schedule controller, the IP data is converted into picture display data through the external processor, and the picture display data is transmitted to the time schedule controller.
7. The LCD circuit of claim 6, wherein the backlight signal sent by the SOC is transmitted to the NOT gate, the analog voltage signal is transmitted to the first switch transistor, and the first switch transistor is turned on;
when the backlight signal is at a low level, the second switch tube is turned on, the digital voltage signal is transmitted to the time schedule controller through the first switch tube and the second switch tube, and the BIST signal in the time schedule controller is pulled up, and when the BIST signal is pulled up, the output BIST data is transmitted to the liquid crystal display screen through the source driver by the time schedule controller.
8. The liquid crystal display circuit of claim 7, wherein when the backlight signal is at a high level, the second switch tube is turned off, the digital voltage signal stops being transmitted to the timing controller, and the BIST signal stops being pulled up, and the frame display data is transmitted to the source driver.
9. The liquid crystal display circuit of claim 4, wherein the timing controller comprises a BIST circuit that generates the BIST data.
10. A liquid crystal display device comprising the liquid crystal display circuit according to any one of claims 1 to 9.
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| CN202120297487.XU CN214847676U (en) | 2021-02-02 | 2021-02-02 | Liquid crystal display circuit and liquid crystal display device |
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| CN202120297487.XU CN214847676U (en) | 2021-02-02 | 2021-02-02 | Liquid crystal display circuit and liquid crystal display device |
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