TWI286840B - Method and system for etching a gate stack - Google Patents

Method and system for etching a gate stack Download PDF

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Publication number
TWI286840B
TWI286840B TW094127126A TW94127126A TWI286840B TW I286840 B TWI286840 B TW I286840B TW 094127126 A TW094127126 A TW 094127126A TW 94127126 A TW94127126 A TW 94127126A TW I286840 B TWI286840 B TW I286840B
Authority
TW
Taiwan
Prior art keywords
substrate
tera
gas
etching
ter ter
Prior art date
Application number
TW094127126A
Other languages
English (en)
Chinese (zh)
Other versions
TW200612554A (en
Inventor
Annie Xia
Hiromasa Mochiki
Arpan P Mahorawala
Original Assignee
Tokyo Electron Ltd
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd, Ibm filed Critical Tokyo Electron Ltd
Publication of TW200612554A publication Critical patent/TW200612554A/zh
Application granted granted Critical
Publication of TWI286840B publication Critical patent/TWI286840B/zh

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
TW094127126A 2004-08-26 2005-08-10 Method and system for etching a gate stack TWI286840B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/926,404 US20060049139A1 (en) 2004-08-26 2004-08-26 Method and system for etching a gate stack

Publications (2)

Publication Number Publication Date
TW200612554A TW200612554A (en) 2006-04-16
TWI286840B true TWI286840B (en) 2007-09-11

Family

ID=35058277

Family Applications (1)

Application Number Title Priority Date Filing Date
TW094127126A TWI286840B (en) 2004-08-26 2005-08-10 Method and system for etching a gate stack

Country Status (5)

Country Link
US (1) US20060049139A1 (enExample)
JP (1) JP2008511167A (enExample)
KR (1) KR20070051846A (enExample)
TW (1) TWI286840B (enExample)
WO (1) WO2006025944A1 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080176149A1 (en) * 2006-10-30 2008-07-24 Applied Materials, Inc. Endpoint detection for photomask etching
US9028924B2 (en) * 2010-03-25 2015-05-12 Novellus Systems, Inc. In-situ deposition of film stacks
US8741394B2 (en) 2010-03-25 2014-06-03 Novellus Systems, Inc. In-situ deposition of film stacks
KR102025441B1 (ko) 2012-04-06 2019-09-25 노벨러스 시스템즈, 인코포레이티드 증착 후 소프트 어닐링
US9117668B2 (en) 2012-05-23 2015-08-25 Novellus Systems, Inc. PECVD deposition of smooth silicon films
US9388491B2 (en) 2012-07-23 2016-07-12 Novellus Systems, Inc. Method for deposition of conformal films with catalysis assisted low temperature CVD

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Publication number Priority date Publication date Assignee Title
US3729728A (en) * 1971-05-10 1973-04-24 Spearhead Inc Capacitive switching device
US3986372A (en) * 1976-01-16 1976-10-19 Whirlpool Corporation Appliance programmer including a safety circuit
US4748296A (en) * 1986-12-03 1988-05-31 General Electric Company Push-to-start control switch
US5161393A (en) * 1991-06-28 1992-11-10 General Electric Company Electronic washer control including automatic load size determination, fabric blend determination and adjustable washer means
IT226476Z2 (it) * 1992-04-14 1997-06-24 Whirlpool Italia Dispositivo atto a controllare e comandare il funzionamento di una lavabiancheria o similare o altro elettrodomestico quale piano di cottura forno o similare con manopola servoassistita
US5301523A (en) * 1992-08-27 1994-04-12 General Electric Company Electronic washer control including automatic balance, spin and brake operations
US5464955A (en) * 1993-04-15 1995-11-07 Emerson Electric Co. Backlit appliance control console
JP3193265B2 (ja) * 1995-05-20 2001-07-30 東京エレクトロン株式会社 プラズマエッチング装置
US5668359A (en) * 1996-03-01 1997-09-16 Eaton Corporation Multiple switch assembly including spring biased rotary cam with concentric cam tracks for selectively operating switches
US6316167B1 (en) * 2000-01-10 2001-11-13 International Business Machines Corporation Tunabale vapor deposited materials as antireflective coatings, hardmasks and as combined antireflective coating/hardmasks and methods of fabrication thereof and application thereof
DE19928229A1 (de) * 1999-06-19 2000-12-21 Mannesmann Vdo Ag Versenkbarer Drehknopf
WO2002069452A2 (de) * 2001-02-24 2002-09-06 Marquardt Gmbh Einrichtung zur drehwinkeleinstellung
US7196604B2 (en) * 2001-05-30 2007-03-27 Tt Electronics Technology Limited Sensing apparatus and method
US6862482B2 (en) * 2001-08-06 2005-03-01 Emerson Electric Co. Appliance control system with LED operation indicators
US6727443B2 (en) * 2001-08-06 2004-04-27 Emerson Electric Co. Appliance control system with knob control assembly
US6813524B2 (en) * 2001-08-06 2004-11-02 Emerson Electric Co. Appliance control system with auxiliary inputs
JP2003124189A (ja) * 2001-10-10 2003-04-25 Fujitsu Ltd 半導体装置の製造方法
DE10203509B4 (de) * 2002-01-30 2005-01-13 Whirlpool Corp., Benton Harbor Rastvorrichtung für einen mehrstufigen Drehschalter
US6933568B2 (en) * 2002-05-17 2005-08-23 Samsung Electronics Co., Ltd. Deposition method of insulating layers having low dielectric constant of semiconductor device, a thin film transistor substrate using the same and a method of manufacturing the same
US6630395B1 (en) * 2002-10-24 2003-10-07 International Business Machines Corporation Methods for fabricating electrical connections to semiconductor structures incorporating low-k dielectric materials
US6869542B2 (en) * 2003-03-12 2005-03-22 International Business Machines Corporation Hard mask integrated etch process for patterning of silicon oxide and other dielectric materials
US7199046B2 (en) * 2003-11-14 2007-04-03 Tokyo Electron Ltd. Structure comprising tunable anti-reflective coating and method of forming thereof

Also Published As

Publication number Publication date
US20060049139A1 (en) 2006-03-09
WO2006025944A1 (en) 2006-03-09
JP2008511167A (ja) 2008-04-10
KR20070051846A (ko) 2007-05-18
TW200612554A (en) 2006-04-16

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Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees