TWI281725B - Method for fabricating metal plug of semiconductor device - Google Patents
Method for fabricating metal plug of semiconductor device Download PDFInfo
- Publication number
- TWI281725B TWI281725B TW091114399A TW91114399A TWI281725B TW I281725 B TWI281725 B TW I281725B TW 091114399 A TW091114399 A TW 091114399A TW 91114399 A TW91114399 A TW 91114399A TW I281725 B TWI281725 B TW I281725B
- Authority
- TW
- Taiwan
- Prior art keywords
- alloy layer
- semiconductor device
- metal plug
- metal
- plug
- Prior art date
Links
- 229910052751 metal Inorganic materials 0.000 title claims abstract description 40
- 239000002184 metal Substances 0.000 title claims abstract description 40
- 239000004065 semiconductor Substances 0.000 title claims abstract description 29
- 238000000034 method Methods 0.000 title claims abstract description 20
- 239000010410 layer Substances 0.000 claims abstract description 38
- 229910045601 alloy Inorganic materials 0.000 claims abstract description 33
- 239000000956 alloy Substances 0.000 claims abstract description 33
- 239000011229 interlayer Substances 0.000 claims abstract description 13
- 239000000758 substrate Substances 0.000 claims abstract description 8
- 238000005240 physical vapour deposition Methods 0.000 claims abstract description 7
- 239000000463 material Substances 0.000 claims abstract description 4
- 238000004519 manufacturing process Methods 0.000 claims description 17
- 239000000126 substance Substances 0.000 claims description 6
- 229910052737 gold Inorganic materials 0.000 claims description 5
- 238000010438 heat treatment Methods 0.000 claims description 5
- 238000009736 wetting Methods 0.000 claims description 5
- 238000000151 deposition Methods 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 3
- 229910017944 Ag—Cu Inorganic materials 0.000 claims description 2
- 229910017982 Ag—Si Inorganic materials 0.000 claims description 2
- 229910019083 Mg-Ni Inorganic materials 0.000 claims description 2
- 229910019074 Mg-Sn Inorganic materials 0.000 claims description 2
- 229910019403 Mg—Ni Inorganic materials 0.000 claims description 2
- 229910019382 Mg—Sn Inorganic materials 0.000 claims description 2
- 229910052785 arsenic Inorganic materials 0.000 claims description 2
- 238000001816 cooling Methods 0.000 claims description 2
- 230000005496 eutectics Effects 0.000 claims description 2
- 238000005498 polishing Methods 0.000 claims description 2
- 229910052719 titanium Inorganic materials 0.000 claims description 2
- 229910015367 Au—Sb Inorganic materials 0.000 claims 1
- 229910015365 Au—Si Inorganic materials 0.000 claims 1
- 238000001704 evaporation Methods 0.000 claims 1
- 229910052709 silver Inorganic materials 0.000 claims 1
- 230000008018 melting Effects 0.000 abstract description 3
- 238000002844 melting Methods 0.000 abstract description 3
- 239000011521 glass Substances 0.000 abstract description 2
- 239000011800 void material Substances 0.000 abstract 1
- 239000010931 gold Substances 0.000 description 5
- 239000007769 metal material Substances 0.000 description 5
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 3
- 230000004888 barrier function Effects 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 3
- 229910052721 tungsten Inorganic materials 0.000 description 3
- 239000010937 tungsten Substances 0.000 description 3
- 238000005530 etching Methods 0.000 description 2
- 239000011148 porous material Substances 0.000 description 2
- 238000005201 scrubbing Methods 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 238000005275 alloying Methods 0.000 description 1
- 229910002056 binary alloy Inorganic materials 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000009933 burial Methods 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 229910001092 metal group alloy Inorganic materials 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 239000002243 precursor Substances 0.000 description 1
- 239000012808 vapor phase Substances 0.000 description 1
- 238000005406 washing Methods 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
- H01L21/76882—Reflowing or applying of pressure to better fill the contact hole
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
1281725
五、發明說明(1) 【發明所屬技術領域】 本發明係關於半導體元件之金屬插塞的製造方法 對二之’係關於因為在已形成有接觸窗的半導體基板上, * "用PVD方法所形成的合金層施行熱處理,並埋藏接觸 ::形成金屬插塞,所以便可形成即使在深接觸窗中亦盔 的插S ’並可調節插塞製造時所使用金屬材料的溶融 思二電阻率,故而可省卻阻障金屬步驟的半導體元 屬插塞的製造方法。 复 【習知技術】 -般在半導體s件的製造中,當具電導線作用的金 =形成多層的情況時’便^ ^ 的層間絕緣膜。在層間絕緣膜上層積上具接觸部位的感; :’並對此部位施行蝕刻處理而在層間絕緣膜上形成接 由。其次,在接觸窗内部利用埋藏金屬層,而形成金屬配 此類金屬配線係當作位元線(bit Hne)與字元線 (word line)等使用,將閘極與電容器等依上'、下及水 方向進行電連結而構成半導體元件。 t
第1圖所示係習知一般半導體元件之金屬插塞構 剖視圖。接觸窗深度在20000 A,寬深比在15以上。的 以,在接觸窗的埋藏上將較為困難,但是僅利用埋藏 較優越的化學氣相沉積法便可埋藏接觸窗。此外,為七 高溫中的安全性,便必須要高熔點的金屬材料。此時,^
述金屬材料便採用鎢與鋁。 但是’上述鎢係在化學氣相沉積時使用為先質 (precursor)的WFe氣體,而必須施行如TiN或以之類金屬 的阻障金屬步驟。所以,當然增加步驟數,亦將形成極惡 劣的寬深比,造成接觸窗的埋藏變成非常困難的問題發 生0 此外,利用如上述鋁或熱(ho t )鋁步驟之類的化學氣 相沉積法而進行蒸鍍,在埋藏接觸窗之際,隨採用約45'0 C程度的處理溫度,將造成iLD(Inter Layer Dielectric ·,内層介電材料)物質所主要使用的s〇g物質產 生脫氣(〇Utggaing)的問題發生。甚至於,在使用為有機 S0G(SPln on glass)的物質之情況時,於接觸窗的洗 驟中,將產生接觸窗扭曲(bowing)並在接觸窗埋藏之 潛在有將產生孔隙的問題點。 τ 【發明欲解決之課題】 本發明乃為解決如上述的問題點而所發明的,复 在於提供一種藉由在已形成有接觸 ^目的 今方形成的合金層施行熱處:^ 隙的插塞:塞’11此便可形成即使在深接觸窗中亦叙孔 :的插塞,並可調節插塞製造時所使用金屬材料:孔 1故而可省卻阻障金屬步驟的半導體元件之f 插塞的製造方法。 〈金屬
1281725 五、發明說明(3) 【發明欲解決之手段】 冰疋’為達此目的之本發明半導體元件之金屬插塞的 製造方法係包括··在已具有既定下層結構的半導體基板 上’依序蒸鍍上層間絕緣膜與非濕潤性膜,並在形^接觸 窗之後,再蒸鍍上合金層的步驟;以及對上述合金層施行 熱處理,而埋藏接觸窗之後,再去除上述合金層殘^
步驟。 W =f,最好上述層間絕緣膜係由有機S〇G或無機s〇G物 質所製得。 再者’最好上述合金層係由在4〇〇〜7〇〇 溫度下,、 ^共晶(eutectic)反應的二元系或三元系金屬1的"合金所進製 再者,上述二元系金屬最好至少為Ag_A1、Ag_As、 Ag-Cu、Ag-Si、Ag_Ti、M_Au、A1_Cu、Au_sb 、
Au-Ti、Mg-Ni 及Mg-Sn 中之任一種。 =者丄最好使上述二元系或三元系金屬的結構產 化’而調節插塞電阻與熱處理溫度。 ^ 的。再者’最好上述合金層係依物理氣相沉積法而蒸錢上 再者,最好上述合金層之去除步 係至少利用洗滌法(scrubbi )、 中的上述。金層, 磨法中之其中-種方法而去』)。口餘法、及化學機械研 最好上述合金層係“與〔11依7〇:3〇比產、隹—^入 金所構成。 比率進仃〜合的合 5142-4982-PF(N);Ahddub.ptd 1281725 1111 丨 .................... 五、發明說明(4) *在:Ϊ層=形成步驟以前, 物理氣相沉積法/便由可金層蒸鍵之時,採用 金層結構產生變化而降低更二確電 =的安全性’並使合 耳他播塞電阻俾可達最佳化。 【發明實施形態】 行詳=明參照所添附圖示,針對本發明最佳實施形態進 塞之=〜/二圖所示係本發明的半導體元件之金屬插 塞之襄Xe方法順序的剖視圖。 m圖所示’在已具有下層結構的半導體基板1〇〇 i二間絕緣膜110與界面能量較低的非濕潤 性膜115,然後塗布感光膜(未圖示)。其次,經 敍刻步驟形成接觸窗120之後,再利用物理氣相沉積法蒸 鑛上合金層(all〇ylayer)130。 、 此時,層間絕緣膜110係使用有機s〇G與無機3〇6物 質,而界面能量較低的非濕潤性膜丨丨5可使後續的 屬去除步驟變得較容易。 再者,合金層130係將步驟反應溫度400〜7〇(TC的複數 金屬進行合金化而製成合金,然後再經由物理氣相 進行蒸鍍。 = 上述插塞係通常具有低於鎢之電阻者較為有利,因此 最好採用電阻率較小的金屬材料進行製造。 5142-4982-PF(N);Ahddub.ptd 第8頁 1281725 五、發明說明(6) 然後,在常溫下施行冷卻並埋藏接觸窗之後,在將合金予 以凝固。 其次,如第3C圖所示,上述合金層的殘餘物13〇利用 洗滌法(scrubbing)、回蝕法(etch back)、及化學機械研 磨法(CMP)之類的方法而去除。 【發明之效果】 元件之金屬插塞的 導體基板上,對採 並埋藏接觸窗而 亦可形成無孔隙的 材料的溶融點與電
故’藉由4禾用如上述本發明半導體 製造方法’便可在已形成有接觸窗的半 用PVD方法所形成的合金層施行熱處理, 形成金屬插塞,藉此即便在深接觸窗中 插塞’並可調卽插塞製造時所使用金屬 阻率,因此可省卻阻障金屬步驟。
5142-4982-PF(N);Ahddub.ptd 第10頁 1281725
導體元件之金屬插塞結構剖視 圖式簡單說明 第1圖係習知一般半 圖0 第2圖係供說明本發明半導體元件之金屬插塞的製造 方法用的二元系金屬合金層狀態圖。 第3A圖至第3C圖係本發明半導體元件之金屬插塞的製 造方法順序剖視圖。 【符號說明】 100半導體基板 110層間絕緣膜
115 非濕潤性膜 120 接觸窗 ' 130合金層
5142-4982-PF(N);Ahddub.ptd 第11頁
Claims (1)
1281725 _案號 91114399 六、申請專利範圍 年1月孓曰 修正本 1. 一種半導體元件之金屬插塞的製造方法,包括: 在已具有既定下層結構的半導體基板上,蒸鍍上層間 絕緣膜、在該層間絕緣膜上面蒸鍍上非濕潤性膜,並在形 成接觸窗之後,再蒸鍍上合金層的步驟; 對該合金層施行熱處理,而熔融該合金層俾埋藏接觸 窗的步驟;以及 去除該合金層殘餘物的步驟。
2. 如申請專利範圍第1項之半導體元件之金屬插塞的 製造方法,其中該層間絕緣膜係由有機SOG或無機SOG物質 所製得。 3. 如申請專利範圍第1項之半導體元件之金屬插塞的 製造方法,其中該合金層係由在40 0〜70 0 °C溫度下,進行 共晶反應的二元系或三元系金屬之合金所製得。 4. 如申請專利範圍第3項之半導體元件之金屬插塞的 製造方法,其中該二元系金屬係至少為Ag-A 1、Ag-As、 Ag-Cu、Ag-Si、Ag-Ti、A 1 -Au、A 1-Cu、Au-Sb、Au-Si、 Au - Ti、Mg-Ni 及 Mg-Sn 中之任一種。
5. 如申請專利範圍第3項之半導體元件之金屬插塞的 製造方法,其中使該二元系或三元系金屬的結構產生變 化,而調節插塞電阻與熱處理溫度。 6. 如申請專利範圍第1項之半導體元件之金屬插塞的 製造方法,其中該合金層係依物理氣相沉積法而蒸鍍上 的0 7.如申請專利範圍第1項之半導體元件之金屬插塞的
5142-4982-PFl(N).ptc 第12頁 1281725 _案號 91114399_年月日__ 六、申請專利範圍 製造方法,其中該合金層之去除步驟中的該合金層,係至 少利用洗滌法、回蝕法、及化學機械研磨法中之其中一種 方法而去除。 8. 如申請專利範圍第1項之半導體元件之金屬插塞的 製造方法,其中該合金層係Ag與Cu依70 : 30比率進行混合 的合金所構成。 9. 如申請專利範圍第1項之半導體元件之金屬插塞的 製造方法,其中更包有在埋藏該接觸窗之後,使埋藏於接 觸窗中的合金進行冷卻並凝固的步驟。 #
5142-4982-PFl(N).ptc 第13頁
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020010038496A KR20030002787A (ko) | 2001-06-29 | 2001-06-29 | 반도체 소자의 금속 플러그 형성방법 |
Publications (1)
Publication Number | Publication Date |
---|---|
TWI281725B true TWI281725B (en) | 2007-05-21 |
Family
ID=19711582
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW091114399A TWI281725B (en) | 2001-06-29 | 2002-06-28 | Method for fabricating metal plug of semiconductor device |
Country Status (4)
Country | Link |
---|---|
US (1) | US20030013299A1 (zh) |
JP (1) | JP2003078007A (zh) |
KR (1) | KR20030002787A (zh) |
TW (1) | TWI281725B (zh) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100660794B1 (ko) * | 2005-12-05 | 2006-12-22 | 주식회사 탑 엔지니어링 | Vcm을 이용한 휠의 마모 측정장치 및 측정방법 |
KR100784106B1 (ko) | 2006-09-08 | 2007-12-10 | 주식회사 하이닉스반도체 | 반도체 소자의 금속 배선 형성 방법 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2718842B2 (ja) * | 1991-07-17 | 1998-02-25 | シャープ株式会社 | 半導体集積回路用配線金属膜の製造方法 |
KR970052355A (ko) * | 1995-12-26 | 1997-07-29 | 김광호 | 반도체 장치의 금속 접촉구 리플로우(reflow) 방법 |
KR970063490A (ko) * | 1996-02-16 | 1997-09-12 | 김광호 | 반도체 장치의 금속배선 형성방법 |
KR100213447B1 (ko) * | 1996-12-06 | 1999-08-02 | 윤종용 | 반도체 소자의 금속 배선 형성방법 |
-
2001
- 2001-06-29 KR KR1020010038496A patent/KR20030002787A/ko not_active Application Discontinuation
-
2002
- 2002-06-28 TW TW091114399A patent/TWI281725B/zh not_active IP Right Cessation
- 2002-06-28 US US10/185,413 patent/US20030013299A1/en not_active Abandoned
- 2002-07-01 JP JP2002192053A patent/JP2003078007A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
JP2003078007A (ja) | 2003-03-14 |
US20030013299A1 (en) | 2003-01-16 |
KR20030002787A (ko) | 2003-01-09 |
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