TWI248181B - Package with an enhancement heat spreader and its sturcture - Google Patents

Package with an enhancement heat spreader and its sturcture Download PDF

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Publication number
TWI248181B
TWI248181B TW093141653A TW93141653A TWI248181B TW I248181 B TWI248181 B TW I248181B TW 093141653 A TW093141653 A TW 093141653A TW 93141653 A TW93141653 A TW 93141653A TW I248181 B TWI248181 B TW I248181B
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TW
Taiwan
Prior art keywords
wafer
substrate
heat sink
package
type
Prior art date
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TW093141653A
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English (en)
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TW200623364A (en
Inventor
Yi-Shao Lai
Chin-Ju Ma
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Advanced Semiconductor Eng
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Priority to TW093141653A priority Critical patent/TWI248181B/zh
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Publication of TWI248181B publication Critical patent/TWI248181B/zh
Publication of TW200623364A publication Critical patent/TW200623364A/zh

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Description

1248181 九、發明說明: 【發明所屬之技術領域】 本發明是-種增強型散蝴之貼合方法及其結構,以提 供晶片之散熱,特別提出-種關於銲球陣列之散熱娜合 方法及其結構。 【先前技術】 在半導體元件的製造程序上可分為,晶陳造以及積體 電路封裝。以絲造元件的核心,晶片,再將晶片加以封裝。 其中,封裝的目的在於防叫受顺氣、熱量、雜訊等外 部的影響,並提供“與外部電路之間電性連接的媒介。 而隨著電子產品正朝著輕、薄、短、小的發展趨勢,故 在半導體元件雛技術上,對於增加元件的密度以及減少元 件的尺寸方面的要求亦不斷的提高。由於銲線接合技術具有 成本低與抛尺寸小伽,故將銲線接合赫翻於積體電 路封裝上。 、 日在習知的鮮線接合接製程中,將晶片上的接點以極細的 銲線連接職板上,藉崎積體電路晶片之電路訊號傳輪到 I而為達到散熱效果,會以導熱膠塗佈於晶片背面而將 政…、片貼於其上,但此種散熱片的貼合方式,使得散熱片 面積雙限於晶片面積,㈣在塗佈導熱膠於—散熱片以貼附 1248181 於 片背面時,會有溢谬的困擾。 上情賴#之封裝貼合方法及其結構而言,解決 上逑之問題,遂成為-重要的課題。 【發明内容】 蓉於以上的問題,本癸 本1月的主要目的在於提供一種增強 政…、片之封裴貼合方法 糸扶供一基板,將一晶片配置於 土板上,並將晶片透過銲 ^ I ί±連接於基板,來讓晶片固 疋於基板上。再蔣一 m s 、口疋衣’以環繞著晶片的方式配置於此 土板上此固疋%义為一具導熱體,且此固定環之高度高於整 轉接後的晶片讀,於固㈣注入一具導熱性的膠 體,此膠體包覆整個包含銲線之晶片,再將此膠體進行固 化。在賴固化完錢,將—散熱片貼合料膠體與固定環 所形成的上表面。 根據本發明之另-目的,係提供—型 裝岭結構^…谢絲上,其包含有 片、複數條銲線、-固定環、—膠體以及一散熱片。其中, 晶片係配置於基板上,喊數條銲_用以電性連接晶片與 基板,及固定環顧繞著晶片且配置於基板上,及膠體輪 入固定環内,且於其中,以及散熱片伽合於由膠體與 1248181 -具=軸的上表面。其中,由—具導熱性之固定環以及 分與固定tri片Γ構成的散熱面積包含散熱片上表面部 ’具㈣錄編f造的散熱 作用,其可增加散熱效果。 r接Π’本版伽之,猶_,環繞著整個 干/、,的4之频,填滿了固定環與“騎有的空隙, 因’加了整崎結構強度,崎抗外力影響,故可避免 晶片封裝結構的翹曲變形。 本發明之另-優點為’於晶片封裝構裝之散熱片的貼合 過程中,當在進行膠體形成時,由於有了固定環的配置,盆 尚度南於整個輝接後的晶片,故可將膠體限制在此固定環 中’因此’避免了傳_體形猶會有溢膠的問題。 :、、、使本各月之上述目的、構造、特徵及優點能更能明 顯易懂,«本發日㈣特_實作,賊合圖示作最佳實施 例詳細說明如下。 【實施方式】 一種增強型散熱片之缝貼合方法,適用於提供晶片之 散熱,特別提出—種塑膠球柵陣列之散熱片的貼合方法。 首先,如『第1圖 所示,提供一基板102,再將一晶 1248181 片取透過銲線106作銲線接合,而將晶片1〇4電性連接於 基板1Q2之上。 『第2圖』係將一固定環2〇2,以環繞晶片1〇4方式且 曰曰片丨04共同配置於基板102上。其中,固定環202的材 質為銘或銅等具導熱性材質。 接著,如『第3圖』所示,將一膠體3〇4注入於固定環 202内,以包覆銲線ι〇6,並且將膠體3〇4進行固化,而此 膠妝304為具有導熱性之材質。其中,形成該膠體304的方 式包合以點膠或轉注壓模方式”而由於膠體304係被限制 袞202内,故可避免溢膠的問題。另外,由於此膠體 係匕设著整個銲接後的晶片1Q4於固定環搬内,且填滿了 口疋% 202與晶片1G4間所有的空隙,因此使整個封装結構 強度增加,可對抗外力影響,故可避免晶片封裝結構喃曲 ,如『第4圖』所示,將—散熱片406貼合於由膠 與固定環202卿成的整個表面上。其中,散熱片406 曰貝為銘或銅等具導熱性材f。透過觀察『第3圖』可知, ^4可透過具有導熱性之固定環咖與散熱片侧來達 $大散熱面積,而使散熱效果增加。 1248181 最後第5圖』為本發明之較佳實施例之一種塑膠球 柵陣列之增賴散熱片之封裝貼合結構之侧視圖。亦即將本 發明之-種散熱片的貼合方法應用在—種銲球栅陣列結構 中。如『第4圖』所示,由一基板102上配置-晶片104, 其係透過縣106鱗線接合以達到電性連接。再加上一固 定環202 ’其係以環繞著整個銲接後的晶片,且—同配置於 基板102上。然後,將一膠體綱注入固定環2〇2内,其膠 體304係具有導熱性材質,且將膠體斯進行固化。其中, 形成該膠體3G4的方式,包含以點膠或轉注壓模方式。再將 —散熱片伽貼合於由膠體與固定環2G2所形成的整個 表面上。而後再於基板搬之已配置晶片結構之另—表面植 入-銲球陣列5Q5。其中,由於膠體3Q4係被限制在固定環 2〇2内,故可避免溢膠的問題。另外,由於此膠體係包覆著 整個銲接後的晶片於固定環2Q2内,且填滿了固定環挪與 晶片104間所有的空隙,因此使整個封裝結構強度增加,方 可對抗外力影響,故可避免“封裝結構馳曲變形。另一 方面,晶片104可透過具有導熱性之固定環观與散熱片伽 來達到擴大散熱面積,而使散熱效果增加。 雖然本發明以前述之較佳實施例揭露如上,然其並非用 I248l8i μ限定本發明,飾熟習相像技藝者,在不脫離本發明之精 珅和Ι&Ι1Ν ’當可作麵之更動麵飾,因此树明之專利 保遵乾_視本綱書職之申請專利範騎界定者為準。 【圖式簡單說明】 敢熱口;㈣之較佳實施例之增強型 型f 縣陣列之增強 【主要元件符號說明】 100 晶片封 102 基板 104 晶片 106 銲線 202 固定環 304 膠體 406 散熱片 505 銲球 10

Claims (1)

1248181 十、申請專利範圍: 〗·一種之輸她,其包含下列步驟: 與該基板偷連接; 上;將口极械該晶片,且同該晶片配置於該基板 片,勒’峨該銲線與該晶 上表ir散熱w合於由_體與_定環所形成的 3 型纖之輸合 •如申明專利鞄圍第1項所述之掸強刑埤刼μ 4 中該固定自Am型政熱片之封裝貼合 .方^=:二二所;之增,型散熱片之封装貼合 5. ^圍第心; 6. 如申請專係以轉注壓模方式^成: 7二4:該散;片:=型散熱片之封裝貼合 “申請專 更包括接置複數^球於i基 9·—鮮㈣裝_構,其至少包含: 二晶片,配置於該基板上; 複數條銲線,用以電性連接該晶片與該基板; Π 1248181 —繞著該晶片且配置於該基板上; 一丑,主入该固定環内,且固化於其中.及 表面。U,貼合於由該膠體與該固定環所形成的上 10- Π.如申請專利包含1呂。 12 、構:其之封裝貼合 結構,ί 增強型散熱片之封装貝占合 結構,9項所f之增強型散熱片之封裝貼合 ,具甲这政熱片的材質包含銘。 .項所ί之增強型散熱片讀裝貼合 之笔? 匕3複數個銲球形成於該基板配置該晶片 心为一表面。 12
TW093141653A 2004-12-31 2004-12-31 Package with an enhancement heat spreader and its sturcture TWI248181B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW093141653A TWI248181B (en) 2004-12-31 2004-12-31 Package with an enhancement heat spreader and its sturcture

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Application Number Priority Date Filing Date Title
TW093141653A TWI248181B (en) 2004-12-31 2004-12-31 Package with an enhancement heat spreader and its sturcture

Publications (2)

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TWI248181B true TWI248181B (en) 2006-01-21
TW200623364A TW200623364A (en) 2006-07-01

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