TWI233596B - Apparatus and method for compensating error of digital signal - Google Patents
Apparatus and method for compensating error of digital signal Download PDFInfo
- Publication number
- TWI233596B TWI233596B TW091114902A TW91114902A TWI233596B TW I233596 B TWI233596 B TW I233596B TW 091114902 A TW091114902 A TW 091114902A TW 91114902 A TW91114902 A TW 91114902A TW I233596 B TWI233596 B TW I233596B
- Authority
- TW
- Taiwan
- Prior art keywords
- error
- digital signal
- data
- logic
- signal
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims description 28
- 238000012937 correction Methods 0.000 claims abstract description 37
- 238000001514 detection method Methods 0.000 claims abstract description 21
- 230000005540 biological transmission Effects 0.000 claims abstract description 11
- 230000006870 function Effects 0.000 claims description 9
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims 1
- 239000000796 flavoring agent Substances 0.000 claims 1
- 235000019634 flavors Nutrition 0.000 claims 1
- 239000011257 shell material Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 9
- 238000006243 chemical reaction Methods 0.000 description 8
- 230000003287 optical effect Effects 0.000 description 8
- 238000005070 sampling Methods 0.000 description 7
- 239000000463 material Substances 0.000 description 6
- 230000000694 effects Effects 0.000 description 4
- 230000003321 amplification Effects 0.000 description 2
- 238000003199 nucleic acid amplification method Methods 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 238000007493 shaping process Methods 0.000 description 2
- 230000008054 signal transmission Effects 0.000 description 2
- 235000014676 Phragmites communis Nutrition 0.000 description 1
- 101100015484 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) GPA1 gene Proteins 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 239000008358 core component Substances 0.000 description 1
- 125000004122 cyclic group Chemical group 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052736 halogen Inorganic materials 0.000 description 1
- 150000002367 halogens Chemical class 0.000 description 1
- 238000003780 insertion Methods 0.000 description 1
- 230000037431 insertion Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 230000008929 regeneration Effects 0.000 description 1
- 238000011069 regeneration method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M7/00—Conversion of a code where information is represented by a given sequence or number of digits to a code where the same, similar or subset of information is represented by a different sequence or number of digits
- H03M7/30—Compression; Expansion; Suppression of unnecessary data, e.g. redundancy reduction
- H03M7/3002—Conversion to or from differential modulation
- H03M7/3004—Digital delta-sigma modulation
- H03M7/3006—Compensating for, or preventing of, undesired influence of physical parameters
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Compression, Expansion, Code Conversion, And Decoders (AREA)
- Error Detection And Correction (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001244735A JP2003060509A (ja) | 2001-08-10 | 2001-08-10 | ディジタル信号のエラー補償装置及び方法 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| TWI233596B true TWI233596B (en) | 2005-06-01 |
Family
ID=19074620
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW091114902A TWI233596B (en) | 2001-08-10 | 2002-07-04 | Apparatus and method for compensating error of digital signal |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US6646582B2 (enExample) |
| JP (1) | JP2003060509A (enExample) |
| CN (1) | CN1217337C (enExample) |
| TW (1) | TWI233596B (enExample) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6956919B2 (en) * | 2002-11-12 | 2005-10-18 | Cirrus Logic, Inc. | Single clock data communication in direct stream digital system |
| US6975258B2 (en) * | 2003-01-23 | 2005-12-13 | Corporation For National Research Initiatives | Circuit for direct digital delta-sigma conversion of variable electrical capacitance |
| CA2454983A1 (en) * | 2004-01-07 | 2005-07-07 | Jean Beaucage | System for high-speed applications over serial multi-drop communication networks |
| US20090287493A1 (en) * | 2005-05-30 | 2009-11-19 | Koninklijke Philips Electronics, N.V. | Direct stream digital audio with minimal storage requirement |
| US7900116B2 (en) * | 2006-08-07 | 2011-03-01 | Broadcom Corporation | Switch with error checking and correcting |
| EP2477418B1 (en) * | 2011-01-12 | 2014-06-04 | Nxp B.V. | Signal processing method |
| EP3075077A4 (en) * | 2013-11-28 | 2017-08-09 | Smart Energy Instruments Inc. | Methods and devices for error correction of a signal using delta sigma modulation |
| JP6807031B2 (ja) * | 2015-06-10 | 2021-01-06 | ソニー株式会社 | 信号処理装置、信号処理方法、およびプログラム |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0823971B2 (ja) * | 1988-04-08 | 1996-03-06 | 日本ビクター株式会社 | 符号訂正装置 |
| US5774481A (en) * | 1995-03-31 | 1998-06-30 | International Business Machines Corporation | Reduced gate error detection and correction circuit |
| KR0157123B1 (ko) * | 1995-12-23 | 1999-02-18 | 김광호 | 디지탈 보상형 멀티 비트 시그마 델타 아날로그 디지탈 변환기 |
| JP2000114971A (ja) | 1998-10-05 | 2000-04-21 | Nippon Columbia Co Ltd | ディジタル信号発生装置 |
-
2001
- 2001-08-10 JP JP2001244735A patent/JP2003060509A/ja active Pending
-
2002
- 2002-07-04 TW TW091114902A patent/TWI233596B/zh not_active IP Right Cessation
- 2002-07-10 CN CN021413649A patent/CN1217337C/zh not_active Expired - Fee Related
- 2002-08-09 US US10/215,624 patent/US6646582B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| US6646582B2 (en) | 2003-11-11 |
| JP2003060509A (ja) | 2003-02-28 |
| CN1402238A (zh) | 2003-03-12 |
| CN1217337C (zh) | 2005-08-31 |
| US20030030577A1 (en) | 2003-02-13 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |