TWI227569B - Surface-mountable semiconductor component and its production method - Google Patents

Surface-mountable semiconductor component and its production method Download PDF

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Publication number
TWI227569B
TWI227569B TW092120211A TW92120211A TWI227569B TW I227569 B TWI227569 B TW I227569B TW 092120211 A TW092120211 A TW 092120211A TW 92120211 A TW92120211 A TW 92120211A TW I227569 B TWI227569 B TW I227569B
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Taiwan
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foil
wafer
semiconductor
patent application
array
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TW092120211A
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English (en)
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TW200406071A (en
Inventor
Georg Bogner
Joerg Erich Sorg
Guenter Waitl
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Osram Opto Semiconductors Gmbh
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Priority claimed from DE10234978A external-priority patent/DE10234978A1/de
Application filed by Osram Opto Semiconductors Gmbh filed Critical Osram Opto Semiconductors Gmbh
Publication of TW200406071A publication Critical patent/TW200406071A/zh
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Publication of TWI227569B publication Critical patent/TWI227569B/zh

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    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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Description

1227569 玖、發明說明: 【發明所屬之技術領域】 本發明涉及一可表面安裝之半導體組件,其包含:半導 體晶片;至少二個外部電性終端,其導電性地與該半導體 晶片之至少二個電性接觸區相連;及晶片外罩。本發明另 又涉及此種半導體組件之製造方法。 爲了擴大應用領域且爲了使製造成本降低,則通常力求 以較小之構造來製成各半導體組件。很小之電致發光二極 體例如對行動電話之鍵之背景照明而言是需要的。 【先前技術】 此其間可使用一種電致發光二極體外殼,其具有0402尺 寸(相當於0.5 mmXl.O mm)之設定面和400 β m-600 β m 之構件高度。請參閱Daten-blatt von FAIRCHILD SEMICONDUCTOR® zur Bauf or m QTLP690C-X。丰目對應之構 件槪念描述在文件US 4 843280中。 構件高度之進一步降低隨著傳統可支配之外殻槪念而特 別困難。 【發明內容】 本發明之目的是使用一可表面安裝之半導體組件(特別是 可表面安裝之微型電致發光二極體及/或光二極體)用之槪 念,其允許構件大小廣泛地下降。 上述目的以具有申請專利範圍第1項特徵之可表面安裝 之半導體組件和一種具有申請專利範圍第1 8項特徵之方 法來達成。 1227569 該半導體組件和方法之其它有利之形式描述在申請專利 範圍各附屬項中。 在本發明之可表面安裝之半導體組件中,二個外部電性 接點形成在一種箔上,該箔之厚度小於或等於1 00 # m,
特別是小於或等於50 // m。該箔較佳是由塑料(特別是PI 或PEN)所構成。半導體晶片固定在該箔之第一主面上且該 晶片外罩只施加在第一主面上。 本發明之構想特別是:藉由半導體晶片安裝在很薄之箔 上’在該箔上形成外部電性終端,以達成一構造高度較小 之形式,其同時能以較高之封裝密度及較少之製造成本來 製成。 本發明之構造形式可有利地用在發出-及/或接收電磁輻 射之組件中,其具有一個或多個發出-及/或接收電磁輻射 之半導體晶片,特別是可用於電致發光二極體組件中,其 具有0402尺寸(相當於0.5 mmx 1.0 mm)或更小之外殼-設 定面和小於4 0 0 // m (特別是小於3 5 0 // m)之構件高度。 在電致發光二極體組件中,該晶片外罩由可透過電磁輻 射(特別是透明或半透明)之材料所製成,特別是由可透過 電磁輻射之較佳是未充塡之透明塑料所製成。 爲使用本發明之可發出混合彩色光之電致發光二極體組 件,則該晶片外罩可以一種發光材料來調整,其吸收由電 致發光—極體晶片所發出之電射之至少一部份且發出 一種波長和彩色不同於已吸收之輻射之另一電磁輻射。 該晶片外罩較佳是藉由濺鍍法來製成。 1227569 該箔和各外部電性終端較佳是利用一可促進該晶片外罩 之黏合作用所用之覆蓋層來施加在該配置有半導體晶片之 此側上,該覆蓋層在晶片安裝位置上及導線安裝位置上具 有一種安裝視窗,其中未存在覆蓋層。因此可有利地使各 晶片安裝設備及/或導線安裝設備之不允許之大的偏差可藉 由下述方式辨認出來:該半導體晶片或連接線在其安裝在 箔上之後未黏合。這在該構件形式越小時越重要,其中一 原因是該晶片外罩之體積越小時,則該組件之可靠性受到 該晶片安裝偏差之影響越大,另一原因是未立刻辨認該偏 差時由於各組件較高之封裝密度及安裝帶上每單位長度上 數量較大之組件數而使次級品之數量很大。 在該半導體組件之較佳之實施形式中,二個外部電性終 端分別由下述元件所構成:該箔之第一主面上之第一電性 終端區,該箔之第二主面上之第二電性終端區和至少一經 由該箔之導電件,其使第一終端區導電性地與所屬之第二 終端區相連。這樣可使第一電性終端在技術上較簡易地製 成而不會使該組件之設定面放大。 各電性終端區較佳是藉由已結構化之金屬層而製作在箔 上。可使用傳統之適當之方法使各金屬層被結構化。 在一種適當之構成中,各金屬層以多層方式構成且由該 箱觀看時具有:由銅或銅爲主之合金所構成之第一層,其 用作該金屬層之電性導線;由鎳或鎳爲主之合金所構成之 第二層,其是一種阻止層;由金或金爲主之合金所構成之 第三層,其用來改良該金屬層之可結合性和可焊接性。 1227569 在另一有利之構成中,晶片側上所存在之各金屬層由塑 料-箔觀看時具有一種銅層,其上是鎳層,然後再施加NiP 層(磷含量介於5%和15%之間,較佳是8%)。該NiP層之 反射性較鎳層者還高且其可結合性至少類似於鎳層。該NiP 層之氧化傾向較鎳層者小很多。特別是爲了使導線架之製 程簡化,則導線架之背面上所存在之各金屬層由塑料層觀 看時較佳是具有相同之層序列。爲了使支托穩定性提高, 則可在NiP層上施加一種金層。 第一層之厚度較佳是在5 //m(含)和25 //m(含)之間。 爲了確保該半導體晶片有足夠之散熱性,則須藉由導熱 性良好之連接劑使該半導體晶片固定在該二個第一電性終 端區之一之上且須形成相對應之外部電性終端,使其對該 半導體晶片形成一種足夠好之熱終端。這表示:特別是其 材料成份,層厚度和經由該箔之導電性都須以良好之導熱 性來設計。 該半導體晶片能以其基板側(即,upside up-Montage)或以 其嘉晶層(即,upside down或覆晶(Flip-Chip)安裝)而安裝 在所屬之電性終端區上。該連接劑例如是一導熱性足夠之 黏合劑或金屬焊劑。 該晶片外罩較佳是在半導體晶片上方之中央區中且情況 需要時在至該半導體晶片之一條或多條連結線上垂直於箔 之方向中所具有之厚度較圍繞該中央區之邊緣區之厚度還 大。於是使該晶片外罩之體積下降,這樣在製程中由於箔 和該晶片外罩之熱膨脹係數不同而對該箔之拱形結構具有 1227569 反作用。 在該半導體組件之較佳之實施形式中,其一方面能確保 該半導體晶片能可靠地連結且各連結線能可靠地結合在各 別所屬之外部電性終端上且另一方面不會使該外殼之設定 面變大或幾乎不會變大。該外部電性終端之互相面對之末 端互相偏移地分別具有凸出區,其中配置著多個經由該箔 之導電件。該外部電性終端之互相面對之末端較佳是以s 形延伸,使各凸出區相重疊。 在本發明之製造多個上述形式之可表面安裝之半導體組 件所用之方法中,首先製成箔條,其具有二側已結構化之 由箔條所穿過之導電層,以便在其上形成至少一由多個相 鄰配置之具有外部電性終端之組件區所構成之陣列。每一 組件區包含後來之半導體組件之全部之外部電性終端所需 之各導電層之全部結構。然後在每一組件區上施加至少一 種半導體晶片且使該半導體晶片在電性上與外部電性終端 相連。之後使該陣列置入一濺鍍模中,其中在整個陣列中 設置一種跨越該陣列之唯一之整個半導體晶片之空腔,其 只在該半導體晶片之此側上形成中空區。使該外罩材料濺 鍍至該空腔中較佳是由該側來進行且特別是經由澆注口來 達成。在該外罩材料至少一部份已硬化之後,將該陣列由 濺鍍模中取出且藉由晶片外罩材料-和在各組件區之間具有 已結構化之導電層之箔條(200)之切割而使該陣列(201)劃分 成各別之半導體組件。 爲了使該陣列不會由於外罩材料和該箔之熱膨脹係數不 1227569 同而形成太大之拱形,則該空腔須具有多個凹口,其分別 跨越一個或多個半導體晶片。以此種方式可使該外罩材料 之體積下降,此時該外罩材料之厚度在所允許之區域中相 對於半導體晶片之區域中之厚度而下降且情況需要時可相 對於一條或多條至半導體晶片之連結線之厚度而下降。 較佳是在該陣列之每一個半導體晶片上設有各別之凹 口,使該外罩材料在濺鍍過程之後具有許多相鄰之凸起, 特別是具有一種類似於巧克力糖之結構。 該陣列之劃分較佳是藉由外罩材料和具有已結構化之各 導電層之箔條切割成各凸起間之溝渠來達成。 在使該陣列置入濺鍍模之前適當之方式是在該箔上及/或 各導電層上施加一種黏合促進劑,其可改良該箔上及/或各 導電層上之外罩材料之黏合性。 該黏合促進劑較佳是施加在整個組件區上,但半導體晶 片固定用之晶片安裝區上不可施加,且情況需要時可施加 在各連接線固定用之導線安裝區上。在這些區域中該黏合 促進劑具有一接觸視窗。此種黏合促進劑層就辨認該生產 設備之偏差而言特別是可提供其它各種與上述半導體組件 之說明有關之優點。 在該半導體組件切割之後就技術上簡易之操控而言,該 具有已結構化之各導電層之箔條在導入至濺鍍模之前以其 背面在一輔助箔上壓成薄片。該輔助箔一方面保護該電性 終端使不受機械上之損害(例如,刮傷)且另一方面使該終 端不會不期望地由該外罩材料所覆蓋,即,使該箱條之背 -10- 1227569 面不會發生所謂”flash”現像。 該輔助箔之熱膨脹係數較佳是類似於或大於該外罩材料 者,以便在該陣列濺鍍之後在該外罩材料硬化及/或冷卻期 間由於該外罩材料之較箔條還大之收縮作用使該輔助箔能 儘可能廣泛地對該陣列之拱形達成一種反作用。 爲了達成相同之目的,則該箔條在該陣列外部可具有鑽 孔,缺口及/或狹縫以便由於不同之熱膨脹及/或材料收縮 性而使機械應力減小。 除了上述之使該陣列之拱形較小所用之手段以外,該箔 條亦可由一種熱膨脹係數類似於該外罩材料之材料所成。 另一種方式是可使用一種弧形之濺鍍模,其中在將該外 罩材料濺入該空腔中時由該側(其上稍後存在著熱膨脹係數 較大之材料)觀看時該陣列彎曲成凸形。 爲了可對該半導體組件進行電性及/或光學上之測試,則 該陣列在切割之前須以外罩側施加在一箔上且隨後在情況 需要時一輔助箔由該箔之背面抽出。若須對該半導體組件 進行光學上之測量,則該箔較佳是可透過該電磁輻射且經 由該箔來進行此種測量。 該陣列之切割較佳是藉由切鋸,雷射切割及/或水刀來進 行。 藉由使用已結構化之導電性可撓性箔,則本發明之方法 之全部之步驟都可由一捲軸至一捲軸(由一捲揚機至另一捲 揚機)地進行,這樣在製造時可使操控費用最少化。 又,在上述之槪念中亦可省略各構件之捲帶。若希望時, 1227569 則可在晶片測試之後使多個相關之構件與晶圓圖一起供應 至該可撓性框架。另一方式是可在晶片測試之後使各構件 像目前一樣被切割,用帶捆且發出。 【實施方式】 本發明之半導體組件及其製造方法之其它優點和形式以 下將依據第1至7圖中之實施例來詳述。這些圖中只有對 本發明之了解是重要之元件才顯示。 這些圖中相同功能之組件分別以相同之參考符號來表 示,其中只描述對本發明之了解是重要之元件。 本發明中第1圖所描述之半導體組件是可表面安裝之微 型發光二極體組件,其腳上印有TYPs 0402。其中在塑料 箔2(其例如由PI和PEN所構成)上形成二個外部電性終端 3,4。該塑料箱之厚度大約是5 0 // m或更小。發光二極 體晶片1固定在該塑料箔2之第一主面22上且在該處以一 晶片外罩5(其施加在第一主面上)來包封。 該晶片外罩5較佳是由透明之塑料(其較佳是一未塡料之 透明之環氧樹脂材料)所構成,其可藉由濺鍍澆注或濺鍍壓 製來加工。 該二個外部電性終端3,4分別由該箔2之第一主面2 2 上之第一金屬區31,32,該箔2之第二主面23上之第二 金屬區41,42及至少一經由該箔2之金屬導電件314,3 24 所構成,該金屬導電件314,3 24使第一金屬區31,32在 電性上與所屬之第二金屬區4 1,42相連。 各金屬區31,32,41,42分別具有多個層且由該箔2觀 1227569 看時依序含有:一電性導線層,其含有銅或以銅爲主之合 金;一阻止層’其含有鎳或以鎳爲主之合金。在阻止層上 #在一含有金(或以金爲主之合金)之終端層以使可連結性 $可焊接性改良。所謂以銅爲主之合金,以鎳爲主之合金 ^以金爲主之合金是指該合金之特性主要由銅,鎳或金所 決定。 另一方式是由該塑料箔2觀看時,該晶片側上所存在之 金屬區31,32具有銅層,其上是鎳層,然後又施加一種NlP 層(磷含量介於5%和15%之間,較佳是8%)。該ΝιΡ層之 反射性較鎳層者還高且其可結合性至少類似於鎳層。同時 該NiP層之氧化傾向較鎳層者小很多。特別是爲了使該製 程之步驟數儘可能少,則由塑料層2觀看時背面上所存在 之金屬區41,42較佳是具有相同之層序列。爲了使支托穩 定性提高,則可在NiP層上施加一種金層。 該電性導線層之厚度介於5 //m(含)和25 //m(含)之間。 發光二極體晶片1藉由導熱性良好之連接件而固定在電 性終端區3 1上且須形成所屬之外部電性終端3丨,3丨4,4 1, 使其成爲熱性終端而可用於發光二極體中。該發光二極體 可以其基板側(即,u p s i d e u ρ - Μ ο n t a g e)或以其嘉晶層側(即, u p s i d e d 〇 w η或覆晶(F1 i p - C h i p)安裝)而安裝在電性終端區3丄 上。該連接劑例如是一導熱性足夠之黏合劑或金屬焊劑。 晶片外罩5在至其側面邊緣之邊緣區中在至該箔之垂直 方向中觀看時所具有之厚度較其在中央區51中者還小, 該中央區5 1至少跨越該半導體晶片1且情況需要時跨越 一條或多條至該發光二極體晶片1之連結線6。這在第1 1227569 圖中以虛線53,54來表示且由第5,6,7圖中可淸楚看出。 該可表面安裝之發光二極體組件之橫向尺寸最大是〇.5 mm X 1 mm且構件高度小於或等於〇.4 mm,較佳是小於或 等於 0.35 /z m。 爲了實現一可發出混合彩色光之發光二極體組件或使發 光二極體晶片所發出之輻射之UV成份轉換成可見光,則 該外罩材料可以一種發光材料來設定,該發光材料吸收該 發光二極體晶片所發出之電磁輻射之至少一部份且發出波 長較長之電磁輻射。 另外如第7圖所示,該外部電性終端3,4之互相面對之 末端分別具有一種S形之外形,其中一末端之向前凸出之 部份伸入另一末端之向後凸出之部份中。電性導電件3 1 4, 3 24分別配置在S形延伸之末端之向前凸出之部份中。 依據本實施例在製造多個可表面安裝之半導體組件所用 之方法中,首先製成一種箔條2 0 0,其二側設有已結構化 之由經由箔條之金屬導電件所穿過之導電層203,204,使 該陣列201由多個相鄰配置之組件區202所形成。具有前 側金屬結構203之箔條200之前側顯示在第2圖中’具有 後側金屬結構204之箔條200之後側顯示在第3圖中。一 種組件區在第2,3圖之已放大之部份中由破折線2〇2來表 示。每一組件區202在該箔條200之前側和後側上分別具 有金屬結構203,204,其與電性導電件314’ 324(參閱第7 圖)一起形成第一(3)和第二外部電性接觸區(4)。 在每一組件區202中,在該箔條2之第一和第二主面22, 1227569 23 上形成二個外部電性終端 3 (= 3 1 /3 1 4/4 1)和 4( = 32/324/42)(請比較第1圖),其中每一終端面31,32在 第一主面2 2上藉由至少一經由箔條2之電性導電件3 1 4, 3 2 4而與第二主面2 3上之終端面4 1,4 2導電性地相連。 在每一組件區上施加一發光二極體晶片1且直接施加在 已結構化之金屬區31上。發光一極體晶片1和金屬層31 之間之連接是藉由導電性-和導熱性之黏合劑來達成’該黏 合劑使該發光二極體晶片之背面接觸區在電性上和熱性上 與該外部電性終端3之金屬層3 1相接觸。然後藉由一種 連結線6使每一發光二極體晶片1之前側接觸區可與所屬 之外部電性終端4之金屬層3 2相連接。 在該晶片安裝-和連接步驟之後之一種步驟中’設有該發 光二極體晶片1之陣列201及多個發光二極體晶片1導入 至濺鍍模500中(請比較第4圖)。在該濺鍍模500中形成 至少一空腔501,其跨越該陣列201之全部之半導體晶片1 且只在該箔條上之發光二極體晶片1之此側上允許一種外 罩材料用之中空區。在該空腔中然後濺鍍該外罩材料’較 佳是藉由該空腔之一側而來之澆注口來達成。 該空腔501具有多個凹口 502,其在濺鍍澆注中分別經 由半導體晶片1來定位。因此,該晶片外罩5之厚度在該 發光二極體晶片卜和連結線6之區域中分別較該陣列20 1 之其它區域中者還大。該外罩材料在該陣列20 1由濺鍍模 中取出之後具有許多相鄰配置之凸起5 1,使該陣列整體上 在包封之後具有一類似於巧克力糖之結構(請比較第6 ’ 7 1227569 圖)。 上述形式之優點已顯示在說明書之一般描述中。在該外 罩材料硬化期間可使該陣列之拱形變小。 在該外罩材料5 0至少一部份已硬化之後,已濺鍍之發光 二極體陣列201由濺鍍模501中取出且較佳是以箔條200 之背側施加在一種黏合箔400上(請比較第5圖)。此種施 加在黏合箔400上之作用是用來在稍後劃分成各別之發光 二極體組件期間或其後使該陣列20 1保持在複合狀態。 該陣列201之劃分是藉由晶片外罩材料和在各組件區202 之間具有已結構化之金屬層2 0 3,2 0 4之箔條2 0 0之切割來 達成,即,以外罩材料5 0之各凸起5 1之間之溝渠5 2來達 成。因此可用傳統之方法,例如,切鋸,雷射分割或水刀 來進行。 爲了使外罩材料5 0和箔條200之間之黏合性改良,則在 箔條200及/或導電層203,204上施加一種黏合促進劑(特 別是由聚醯亞胺所構成之覆蓋漆)。該黏合促進劑較佳是施 加在該陣列201之整個區域上,除了晶片安裝區(其中該發 光二極體晶片1安裝-且接觸在所屬之外部電性終端3上) 和導線安裝區(其上各連結線6是與所屬之外部電性終端4 相連)之外。 在本方法之有利之形式中,該具有已結構化之金屬層 2〇3 ’ 204之箔條200在導入至濺鍍模500中之前在輔助箔 ±壓成薄片,該輔助箔之熱膨脹係數類似於或大於該外罩 材料者。由於該外罩材料50之較箔條200還大之收縮性, 1227569 則該輔助范在其硬化及/或冷卻期間在該陣列20丨濺鍍之後 可對該陣列之拱形結構形成反作用。然後在切割時該輔助 箱可承擔上述黏合箔之功能。 另一措施(其由於外罩材料和箔條之不同之熱膨脹係數及 /或材料收縮性所造成之機械應力而可對該陣列之拱形結構 形成反作用)是在該陣列20 1之外部形成凹口,鑽孔及/或 狹縫2 1 0。 除了上述之措施之外,亦可使用一種箔條2 0 0,其材料 之熱膨脹係數類似於該外罩材料50者。 又’由於相同之原因亦可使用弧形之濺鍍模,其中在使 該外罩材料50噴濺至空腔501中由該發光二極體晶片1之 此側觀看時該陣列20 1以凸形之方而彎曲。 本發明以上依據該實施例所作之描述當然不是對本發明 之一種限制。反之,本發明先前揭示在一般之說明書,圖 式或申請專利範圍中之特徵可單獨地或作適當之組合以實 現本發明。 【圖式簡單說明】 第1圖 本實施例之半導體組件之切面圖。 第2圖 箔條之一區段之前側之俯視圖。 第3圖 係第2圖之區段之背面之俯視圖。 第4圖 具有一已置入之箔條之濺鍍模之切面圖之〜部 份。 第5圖 箔條及無外罩之半導體晶片之切面圖之一部份。 第6圖箔條及無外罩之半導體晶片之俯視圖之一部份。 1227569 第7圖 係第6圖所示之箔條之區段之放大圖 主要元件之符號說明 1 2 3,4 5 6 22 23 31, 32 , 41 , 42 200 201 2 02 203 , 204 314 , 315 , 324 50 5 1 400 500 501 502 發光二極體晶片 塑料箔 外部電性終端 晶片外罩 連結線 第一主面 第二主面 金屬區 箔條 陣歹ij 組件區 導電層 金屬導電件 外罩材料 中央區 黏合箔 濺度模 空腔 凹口
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Claims (1)

1227569 拾、申請專利祐圍· 第92 1 202 1 1號「可表面安裝之半導體組件及其製造方法」 專利案 (9 2年1 0月修正) i .一種可表面安裝之半導體組件,其包含:半導體晶片(1); 至少二個外部電性終端(3,4),其導電性地與該半導體 晶片(1)之至少二個電性接觸區相連;及晶片外罩(5),其 特徵爲:該二個外部電性終端(3,4)形成在一種箔(2)上’ 該箔之厚度小於或等於100 //m, 該半導體晶片(1)固定在該箔(2)之第一主面(22)上, 該晶片外罩(5)施加在第一主面(22)上。 2.如申請專利範圍第1項之半導體組件,其中該晶片外罩(5) 藉由濺鍍法而製成。 3 .如申請專利範圍第1項之半導體組件,其中該二個外部 電性終端(3,4)分別由該箔(2)之第一主面(22)上之第一 電性終端區(31,32),該箔(2)之第二主面(23)上之第二 電性終端區(4 1,4 2)以及至少一經由該箱(2)之電性導電 件(3 14,3 24 )所形成,該經由該箔(2)之電性導電件(314, 324)使第一電性終端區(31,32)在電性上與所屬之第二電 性終端區(41,42)相連。 4·如申請專利範圍第3項之半導體組件,其中各電性終端 區(3 1,32 ’ 41,42)是該箔(2)上已結構化之金屬層。 5 ·如申請專利範圍第4項之半導體組件,其中各金屬層以 多層方式構成且由該箔(2)觀看時依序含有:一含有銅或 含有以銅爲主之合金之導線層;及一含有鎳或含有以鎳 1227569 爲主之合金之阻止層。 6·如申請專利範圍第5項之半導體組件,其中在該阻止層 ±施加一種含有金或含有以金爲主之合金之終端層以使 可結合性和可焊接性獲得改良。 7 .如申請專利範圍第5項之半導體組件,其中該導線層之 厚度介於5 //m(含)和25 //m(含)之間。 8 ·如申請專利範圍第3至7項中任一項之半導體組件,其 中該半導體晶片(1)藉由導熱性良好之連接劑而固定在二 個第一電性終端區(31,32)之一之上且須形成相對應之 外部電性終瑞(3 1,3 1 4,4 1 ),使其可作爲該半導體晶片(1) 用之熱終端。 9.如申請專利範圍第!至7項中任一項之半導體組件,其中 該晶片外罩(5 )在區域(5 1)(其包含至少該半導體晶片(1)且 情況需要時包含一條或多條至該半導體晶片之連結線(6)) 中圍繞其中央所具有之厚度由垂直於該箔(2)之方向觀看 時大於第二區(5 2)中向著其側面邊緣所看到者還大。 1 0 .如申請專利範圍第1至7項中任一項之半導體組件,其中 橫向尺寸最大是0.5 m m X 1 m m且該構件高度小於或等於 0.4 mm 〇 1 1 .如申請專利範圍第1至7項中任一項之半導體組件,其中 該半導體晶片(1)是電致發光二極體晶片且該晶片外罩(5) 由一可透過電磁輻射之材料(特別是塑料)所構成。 1 2 .如申請專利範圍第1 1項之半導體組件,其中該可透過電 磁輻射之材料含有一種發光材料,其吸收該電致發光二 -20- 1227569 極體晶片所發出之電磁輻射之至少一部份且發出一種波 長不同於已吸收之輻射之另一電磁輻射。 1 3 .如申請專利範圍第1 1項之半導體組件,其中該可透過電 磁輻射之材料是一種未塡料之透明之塑料。 1 4 .如申請專利範圍第1至7項中任一項之半導體組件,其中 該箔(2)之厚度是50 //m或更小。 1 5 .如申請專利範圍第1至7項中任一項之半導體組件,其中 該箔(2)是一種塑料箔。 16.如申請專利範圍第15項之半導體組件,其中該箔(2)是聚 醯亞胺或聚對酞酸乙二酯。 1 7 ·如申請專利範圍第3至7項中任一項之半導體組件,其中 各外部電性終端(3,4)之互相面對之末端分別以S形延伸 且各電性導電件(3 1 4,3 2 4)分別配置在一向前凸出之部分 (S形延伸之末端)中。 18.—種同時製造多個可表面安裝之半導體組件所用之方 法,該半導體組件包含··至少一個半導體晶片(1);至少 二個外部電性終端(3,4),其導電性地與該半導體晶片(1) 之至少二個電性接觸區相連;及一個晶片外罩(5),其特 徵爲以下各步驟: a) 製備一種箔條(200),其在二側設有已結構化之由箔條 所穿過之導電層(203,204),形成一由多個相鄰配置之 組件區(202)所構成之陣列(201),各組件區分別包含至少 二個外部電性終端(3,4)用之導電層(2 03,204)之結構, b) 在每一組件區(202)上分別施加至少一種半導體晶片(1) 1227569 且使該半導體晶片(1)在電性上與所屬之外部電性終端 (3,4 )相連, c) 使該陣列(201)置入濺鍍模(500)中,其中對該陣列(2()1) 而言設有一種跨越該陣列(2〇1)之唯一之整個半導體晶片 (1)之空腔(501) ’其只在該半導體晶片(1)之此側上形成 中空區, d) 使該外罩材料(50)噴濺至該空腔(501)中, e) 使該外罩材料(50)之至少一部份硬化且將該陣列(201) 由濺鍍模(500)中取山, f) 藉由晶片外罩材料-和在各組件區(2〇2)之間具有已結 構化之導電層(203,204)之箔條(200)之切割而使該陣列 (201)劃分成各別之半導體組件。 19. 如申請專利範圍第18項之方法,其中該空腔(501)具有 多個凹口(502),其在濺鍍澆注時分別定位在半導體晶片 (1)上,使該外罩材料之厚度在半導體晶片(1)之區域中 且情況需要時在一條或多條至該半導體晶片(1)之連結線 (6)中大於在該空腔(5 01)之其餘區域中之厚度。 20. 如申請專利範圍第19項之方法,其中該陣列(201)之每 一個半導體晶片(1)上都設有一各別之凹口(5 02),使該外 罩材料在步驟e)之後具有多個相鄰配置之凸起(51),其 特別是一種巧克力糖結構。 2 1.如申請專利範圍第20項之方法,其中藉由晶片外罩材 料(50)-和在各凸起(51)之間之溝渠(5 2)中具有已結構化 之導電層(203, 204)之箔條(200)之切割來進行該陣列(201) - 22- 1227569 之劃分。 22·如申請專利範圍第18至21項中任一項之方法,其中在 該外罩材料(5〇)噴濺至該空腔(501)之前在該箔(2)及/或 導電層(2 0 3,2 0 4)上施加一種黏合促進劑。 2 3 ·如申請專利範圍第22項之方法,其中除了晶片安裝區(其 上固定著半導體晶片(1))和情況需要時一個或多個導線 安裝區(其上固定著連接線)以外,該黏合促進劑分別施 加在整個組件區(202)上。 2 4 .如申請專利範圍第1 8至2 1項中任一項之方法,其中該 外卓材料(50)藉由薄膜澆注而由該側噴入至該空腔(501) 中〇 2 5 ·如申請專利範圍第1 8至2 1項中任一項之方法,其中該 具有已結構化之導電層(2 〇 3,2 0 4)之各箔條(2 0 0)在置入 該濺鍍模(5 00)之前在一輔助箔上壓成薄片。 2 6.申請專利範圍第2 5項之方法,其中該輔助箔之熱膨脹 係數類似於或大於該外罩材料者,由於該外罩材料(5 Q) 之較箔條(200)還大之收縮性’則在其硬化及/或冷卻期 間在該陣列(2 0 1)濺鍍之後該輔助箔可對該陣列之拱形結 構廣泛地形成反作用。 2 7 ·如申g靑專利範圍第1 8至2 1項中任一項之方法,其中該 箔條在該陣列(2 0 1)外部具有鑽孔,缺口及/或狹縫(2 〇丄) 以便由於不同之熱膨脹及/或材料收縮性而使機械應力下 降。 2 8 ·如申g靑專利範圍桌1 8至2 1項中任一項之方法,其中構 -23- I227569 成該箔條(200)所用之材料之熱膨張係數類似於該外罩材 料(5 0)者。 29·如申請專利範圍第18至21項中任一項之方法,其中使 用一種弧形之濺鍍模,在將該外罩材料(5 0)噴入至空腔 (501)期間由該半導體晶片(1)之此側觀看時該陣列(2〇1) 以凸出之形式彎曲。 3 0 ·如申請專利範圍第1 8至2 1項中任一項之方法,宜中該 陣列在步驟f)之前施加在一種箔上。 3 1.如申請專利範圍第1 8至2 1項中任一項之方法,其中在 步驟f)時使用追些方法,即,切鋸,雷射切割和水刀切 割,中之至少一種。
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