TW584914B - Metal taper etching structure and the manufacturing method thereof, producing source/drain and gate in thin film transistor array using the same, and the structure thereof - Google Patents

Metal taper etching structure and the manufacturing method thereof, producing source/drain and gate in thin film transistor array using the same, and the structure thereof Download PDF

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TW584914B
TW584914B TW92104562A TW92104562A TW584914B TW 584914 B TW584914 B TW 584914B TW 92104562 A TW92104562 A TW 92104562A TW 92104562 A TW92104562 A TW 92104562A TW 584914 B TW584914 B TW 584914B
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metal layer
layer
gate
source
metal
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TW200418103A (en
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Chun-Hsiun Chen
Yi-Sheng Cheng
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Au Optronics Corp
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Abstract

The present invention discloses a metal taper etching structure and the manufacturing method thereof, and using the method for producing of source/drain and gate in thin film transistor array. The method for metal taper etching includes the following steps: providing a substrate; forming a first metal layer on the substrate composed of columnar crystal growing opposite to the normal direction of the substrate surface; forming a second metal layer on the first metal layer composed of fine grain crystal with arbitrary orientation; forming and defining a cover layer on the second metal layer; and, using an etching process to remove the first metal layer and the second metal layer in the portions not covered by the cover layer, so as to obtain a taper profile.

Description

584914 五、發明說明(1) " --—--—---- — 發明所屬之技術領域 本發明係有關於一種半導體元件製程技術 ^ 〇n(^UCtor —device-process-technology),且特別 你广於一種金屬斜角蝕刻的結構及其製法,和以該方法萝 f膜電晶體陣列中源極/汲極及閘極及其結構。 、 先前技術 、,為了能夠在有限的晶片表面上製作足夠的金屬内連線 及增加電路的積集度,目前大多採用多層内連線的立體架 構方式,以完成各個元件的連接。因此在導電層(金屬層) 之間’需以介電層來作為隔離各金屬内連線之介電材料' 以避免元件之間產生非預期性的導通;且為避免某些作為 導線或電極的金屬層(例如鋁)與介電層(例如含矽之膜層) 因製程過程溫度的關係,使得介電材質因擴散效應進入金 屬層產生尖峰〇1^1^)及電致遷移(61^1^011]1灯以丨011)的 現象’因此會在金屬層上形成一層阻障層(barrier layer) 〇 然而欲在已圖形化之金屬層上形成阻障層及介電層 時,請參考第la圖,若圖形化的金屬層12其蝕刻後之通道 20的側面為一直角或有底切(un(jercut)現象發生,則形成 於其上之阻障層14及介電層16常會在金屬層12側面邊緣形 成一突懸(overhang)26。若接續形成一膜層於介電層16上 及上述通道2 0的側壁與底部,然而,如第1 b圖所示,通道 20内的突懸(overhang) 26卻使得接續形成的次膜層Μ的濺 鍍非常困難,特別是在凹陷處的階梯覆蓋程度最差,這將584914 V. Description of the invention (1) " -----------Technical field to which the invention belongs The present invention relates to a semiconductor device process technology ^ 〇n (^ UCtor —device-process-technology), In particular, you are broader than a metal oblique etching structure and a manufacturing method thereof, and a source / drain and a gate and a structure thereof in a film transistor array by this method. In the prior art, in order to be able to produce sufficient metal interconnects on a limited surface of a wafer and increase the degree of circuit integration, a multi-layer interconnected three-dimensional architecture is currently used to complete the connection of various components. Therefore, a dielectric layer is needed between the conductive layers (metal layers) as a dielectric material to isolate the interconnections of various metals, so as to avoid unintended conduction between components; and to avoid some as wires or electrodes The metal layer (such as aluminum) and the dielectric layer (such as the silicon-containing film layer), due to the temperature of the process, cause the dielectric material to enter the metal layer due to the diffusion effect, resulting in spikes of 〇1 ^ 1 ^) and electromigration (61 ^ 1 ^ 011] 1 lamp with the phenomenon of 011) 'so a barrier layer will be formed on the metal layer 〇 However, when you want to form a barrier layer and a dielectric layer on a patterned metal layer, Please refer to FIG. 1a. If the patterned metal layer 12 has a right angle or an undercut (uner jercut) on the side of the etched channel 20, a barrier layer 14 and a dielectric layer formed thereon 16 often forms an overhang 26 on the side edge of the metal layer 12. If a film layer is successively formed on the dielectric layer 16 and the side walls and bottom of the channel 20, however, as shown in FIG. 1b, the channel The overhang in 20 makes the sputtered secondary film layer M not formed continuously. It is often difficult, especially the step coverage in the depression is the worst, which will

584914 五、發明說明(2) 會導致針孔(pin ho les)24及短路(shorts)的現象發生 造成元件的特性不穩定。584914 V. Description of the invention (2) Pinholes 24 and shorts will be caused, which will cause the characteristics of the components to be unstable.

為了解決上述所產生的問題,避免形成於金屬層側面 邊緣之膜層有一突懸發生’需使圖形化的金屬層1 2其姓刻 後之通道20為一傾斜側面(taper profile)22,請參考第 2 a圖,如此一來,接續形成於金屬層1 2上的阻障層1 4及介 電層1 6,順應性的形成於金屬層1 2上,避免突懸之現象發 生,請參考第2b圖。此種形成具有傾斜側面(taper profile)之金屬層蝕刻通道的方法,稱為金屬層的斜角蝕 M(taper etching) 〇In order to solve the above-mentioned problems, avoid that the film layer formed on the side edge of the metal layer has an overhang. 'The patterned metal layer 12 needs to have a channel 20 with a tapered profile 22 after the last name is engraved. Referring to FIG. 2a, in this way, the barrier layer 14 and the dielectric layer 16 successively formed on the metal layer 12 are conformably formed on the metal layer 12 to avoid overhanging, please Refer to Figure 2b. This method of forming a metal layer etching channel with a taper profile is called a metal layer's tapered etching M (taper etching).

一般金屬利用減:鑛的方式形成於基板上,例如鉬、鈦 或疋絡金屬’其金屬結晶構成會為一柱狀(columnar)結晶 結構’清參照第3 a圖’當形成一罩覆層3 〇於此柱狀 (columnar)結晶結構金屬層50上進行蝕刻時,此柱狀 (columnar)結晶結構因其晶形方向為垂直基板,在晶粒接 壤處5 1之蝕刻速率大於垂直晶柱方向之蝕刻速率(對金屬 層之垂直姓刻速率較側向姓刻速率大的多),其不容易進 行斜角蝕刻(taper etching),其蝕刻通道4〇側面通常為 一垂直側面42(或接近垂直),請參照第3b圖,不利接下來 形成之膜層之階梯覆蓋(step coverage)。 在習知技術中,一種金屬層斜角蝕刻的方法為,改變 上述濺鍍金屬成膜的條件,使形成於基板上之金屬層為一 任意定向之細微晶粒(f i ne gra i n)結晶構成,以取代柱狀 (columnar)結晶構成,請參照第3(:圖,當形成一罩覆層3〇Generally, the metal is formed on the substrate by using the method of ore reduction: for example, molybdenum, titanium, or metal complexes. The metal crystal structure will be a columnar crystal structure. Refer to Figure 3a when the cover layer is formed. 30. When the columnar crystal structure metal layer 50 is etched, the columnar crystal structure is a vertical substrate because of its crystal shape direction, and the etching rate of 51 at the grain boundary is greater than the vertical crystal column direction. The etching rate (the vertical engraving rate of the metal layer is much larger than the lateral engraving rate). It is not easy to perform tape etching. The side of the etching channel 40 is usually a vertical side 42 (or close to it). (Vertical), please refer to Figure 3b, which is detrimental to the step coverage of the film layer to be formed next. In the conventional technology, a method for obliquely etching a metal layer is to change the conditions for forming a metal by sputtering as described above, so that the metal layer formed on the substrate is a finely-grained (fi ne gra in) crystal structure with arbitrary orientation. , To replace the columnar (columnar) crystal structure, please refer to Figure 3 (: Figure, when a cover layer 3 is formed.

0632-8948TWF(nl) ; AU91225 ; Phoelip.ptd 第6頁 584914 五、發明說明(3) *~*---1 · 於此細微晶粒(fine grain)結構金屬層52上進行蝕刻時,·· 八側向餘刻速率不受晶形的限制,因此可對此細微晶粒結r 晶結構金屬層52進行蝕刻,其蝕刻通道45側面通常為一傾· =側面47(taper profile),請參照第3(1圖。用此方式所, 侍的金屬膜層,其通道雖然具有一傾斜側面,但是由細微 晶粒結晶構成的金屬層,其膜層的厚度有一定之限制,往 往無法達到製成所需之厚度;且完全由細微晶粒結晶構成 的金屬層,其内部容易具有高度的應力(stress)存在,此 金屬膜層容易發生應力空孔(voids)及剝離(peel ing)的現 象,易造成電阻過大及斷線等問題產生。為了使金屬斜角 蝕刻技術臻於完善,實有必要針對上述問題謀求改善之 彎 道。 發明内容0632-8948TWF (nl); AU91225; Phoelip.ptd Page 6 584914 V. Description of the invention (3) * ~ * --- 1 · When etching on this fine grain structure metal layer 52, · · The rate of octave lateral etch is not limited by the crystal form, so this fine grain junction r crystal structure metal layer 52 can be etched. The side of the etching channel 45 is usually tilted. = = Side 47 (taper profile), please refer to Figure 3 (1. In this way, although the channel of the metal film layer has an inclined side, but the metal layer is composed of fine crystal grains, the thickness of the film layer has a certain limit, and it is often impossible to reach the system. It has a desired thickness; and a metal layer composed entirely of fine grain crystals tends to have a high degree of stress inside, and this metal film layer is prone to the phenomenon of voids and peeling It is easy to cause problems such as excessive resistance and disconnection. In order to perfect the metal bevel etching technology, it is necessary to seek improvement in the above problems. Summary of the Invention

有鑑於此,為了解決上述問題,本發明主要目的在於 提供一種金屬斜角蝕刻結構,其在金屬層蝕刻通道具有一 較佳之傾斜側面(taper prof i le)結構,增加次層膜層的 階梯覆蓋(step coverage)能力,減少元件斷線或是阻抗 的增加’且其免除習知技術易發生突懸(〇 V e r h a n g )及高應 力(stress)等問題。 本發明之另一目的在於提供上述金屬斜角蝕刻結構其 製成之方法’以期得到如上所述具有一較佳之金屬層傾斜 側面(t a p e r p r 〇 f i 1 e )蝕刻結構。 本發明之另一目的在於將上述用於金屬斜角蝕刻的方In view of this, in order to solve the above problems, the main object of the present invention is to provide a metal beveled etching structure, which has a better taper profile structure in the metal layer etching channel, and increases the step coverage of the sub-layer film layer. (Step coverage) ability to reduce component disconnection or increase in impedance ', and it eliminates conventional techniques that are prone to problems such as overhang and high stress. Another object of the present invention is to provide a method for making the above-mentioned metal oblique etching structure ', in order to obtain the above-mentioned etching structure with a preferred metal layer inclined side (t a p r r p o f i 1 e) as described above. Another object of the present invention is to use the above method for bevel etching of metal.

0632-8948TWF(nl) ; AU91225 ; Phoelip.ptd 第 7 頁 5849140632-8948TWF (nl); AU91225; Phoelip.ptd page 7 584914

五、發明說明(4) 法施行於薄膜電晶體陣列匯流排中源極/汲極及閘極之製 造’以得到具有傾斜側面之薄膜電晶體源極/汲極及閘極 結構’簡化薄膜電晶體製成及避免不良結構發生。 為達本發明上述之目的,本發明所述之金屬斜角蝕刻 結構,其組成包括:V. Description of the invention (4) Method for manufacturing source / drain and gate in thin-film transistor array busbar 'to obtain thin-film transistor source / drain and gate structure with inclined sides' to simplify thin-film power Crystals are made and avoid bad structure. In order to achieve the above-mentioned object of the present invention, the metal oblique etching structure according to the present invention has a composition including:

一基底,一具有相對上述基底面法線方向成長之柱狀 (columnar)結晶構成之第一金屬層形成於上述基底之上; 具任意定向之細微晶粒(f i n e g r a i n)結晶構成之第二金 屬層形成於上述第一金屬層之上,且上述之第一金屬層及 弟一金屬層邊緣構成一傾斜側面(taper profile)。 為達本發明之另一目的,本發明係關於金屬斜角蝕刻 結構的製成方法,其製成至少包括以下步驟: 提供一基底;於上述基底上形成一具有相對上述基底 面法線方向成長之柱狀(c〇lumnar)結晶構成之第一金屬 層;於上述第一金屬層上形成一具任意定向之細微晶粒 (f ine grain)結晶構成之第二金屬層;形成並定義一罩覆 層於上述之第二金屬層上;以及以一钱刻程序去除未被該 罩覆層所覆蓋之部分的第一金屬層及第二金屬層,以得到 一傾斜側面(taper profile)。A substrate, a first metal layer having a columnar crystal structure that grows in a direction normal to the substrate surface is formed on the substrate; a second metal layer having an arbitrary orientation of fine grain crystals It is formed on the first metal layer, and the edges of the first metal layer and the first metal layer constitute a tapered profile. In order to achieve another object of the present invention, the present invention relates to a method for manufacturing a metal oblique etching structure. The manufacturing method includes at least the following steps: providing a substrate; and forming a substrate having a growth direction normal to the substrate surface on the substrate. A first metal layer composed of columnar crystals; forming a second metal layer composed of fine grain crystals with arbitrary orientation on the first metal layer; forming and defining a mask Cladding on the second metal layer; and removing a portion of the first metal layer and the second metal layer that are not covered by the cover layer by a coining process to obtain a tapered profile.

為達本發明之另一目的,本發明係關於形成薄膜電晶 體陣列中具有傾斜側面結構之閘極金屬電極的方法,其製 成至少包括以下步驟·· 提供一基板;形成一具有相對上述基板面法線方向成 長之柱狀結晶構成之第一閘極金屬層於上述基板之上;形In order to achieve another object of the present invention, the present invention relates to a method for forming a gate metal electrode having an inclined side structure in a thin-film transistor array. The method includes at least the following steps: providing a substrate; A first gate metal layer composed of columnar crystals grown in the direction of the surface normal on the substrate;

584914584914

成一具任意定向之細微晶粒結晶 上述第一金屬層上;形成並定義 極金屬層上;以及濕蝕刻未被該 閑極金屬層及第二閘極金屬層 本發明亦關於形成薄膜電晶 構之源極/汲極金屬電極的方法 構成之第二閘極金屬層於 一罩覆層於上述之第二閘 罩覆層所覆蓋之部分的第 ,以得到一傾斜側面。 體陣列中具有傾斜側面結 其製成至少包括以下步 扼供一基板 其上已完成閘極之製作 化之一閘極絕緣声、一欲厗穷族私厅形成圖 ί成:ΐ—if相對上述基板面法線方向成長之柱狀結 二Γ金屬層於上述之摻雜石夕層與開㈣ 二上,Λ 具任意定向之細微晶粒結晶構成之第 及極金屬層於上述之第一源極/汲極金屬層上;形 並疋義—罩覆層於上述之第二源極/汲極金屬層上;且c 上述摻雜矽層為蝕刻停止層,濕蝕刻未被該罩覆層所覆 =:曰卩乂的第一源極/汲極金屬層及第二源極/汲極金屬層 以侍到一傾斜側面。Forming a fine grain crystal with arbitrary orientation on the above first metal layer; forming and defining the electrode metal layer; and wet etching the free electrode metal layer and the second gate metal layer; the present invention also relates to forming a thin film electrical crystal structure The second gate metal layer formed by the method of the source / drain metal electrode is placed on a portion of a cover layer on the portion covered by the second gate cover layer to obtain an inclined side surface. The body array has inclined side knots, and its production includes at least the following steps for a substrate on which one of the gates has been fabricated: one of the gate insulation sounds, and the other is the formation of the poor private hall. The columnar junction Γ metal layer growing in the normal direction of the substrate surface is on the doped stone layer and the openings above, and the first and extreme metal layers of Λ with arbitrary orientation of fine grain crystals are on the first On the source / drain metal layer; shape and meaning-the cover layer is on the second source / drain metal layer; and c the doped silicon layer is an etch stop layer, and the wet etching is not covered by the cover Covered by the layer =: The first source / drain metal layer and the second source / drain metal layer of 卩 乂 are used to serve an inclined side.

本發明之形成薄膜電晶體陣列中具有傾斜側面結構之 源極/汲極金屬電極的方法,亦可以另一形式完成,其製 成至少包括以下步驟: 〃 提供一基板,其上已完成閘極之製作;一閘極絕緣層 順應性形成於上述之閘極上;形成並定義一矽層於上述之 部分閘極絕緣層上;形成並定義一摻雜矽層於上述之矽層 上;形成一具有相對上述基板面法線方向成長之柱狀結晶The method for forming a source / drain metal electrode with a slanted side structure in a thin film transistor array according to the present invention can also be completed in another form. The method includes at least the following steps: 〃 Provide a substrate on which a gate electrode has been completed Fabrication; a gate insulating layer conformably formed on the above gate; forming and defining a silicon layer on the above part of the gate insulating layer; forming and defining a doped silicon layer on the above silicon layer; forming a Columnar crystals growing in a direction normal to the substrate surface

584914584914

構成之第一源極/汲極金屬層於上述之第一阻障層之上;The first source / drain metal layer formed on the first barrier layer;

If展二任恩疋向之細微晶粒結晶構成之第二源極/汲極 至屬層於上述之第一源極/汲極金屬層上;形成一第二阻 ^ ί於上述之第二源極/汲極金屬層上;形成並定義一罩 止广ΐίΐ第二阻障層上;且以上述摻雜矽層為蝕刻停 ^層、,濕蝕刻未被該罩覆層所覆蓋之部分的第一阻障層、 第一源極/汲極金屬層、第二源極/汲極金屬層及第-二 層,以得到一傾斜側面。 弟一阻P早If the second source / drain formed by the fine grain crystal of Ren Enzheng is formed on the first source / drain metal layer described above; a second resistance is formed ^ On the source / drain metal layer; forming and defining a mask on the second barrier layer; and using the above-mentioned doped silicon layer as an etching stop layer, and wet-etching a portion not covered by the cap layer A first barrier layer, a first source / drain metal layer, a second source / drain metal layer, and a second layer to obtain an inclined side surface. Yi Yi P early

本發明所形成之具傾斜側面之薄膜電晶體 之結構,其組成至少包括: & @ 一基板,其上具有一閘極;一閘極絕緣層,順應性形 成於閘極上;一圖案化之矽層形成於部份上述閘極絕緣層 上;一圖案化之摻雜矽層形成於上述之矽層上;一具有相 對上述基板面法線方向成長之柱狀(columnar)結晶構成之 第一源極/汲極金屬層形成於上述矽層及閘極絕緣層上; 且一具任思定向之細微晶粒(^ i n e g r a丨n)結晶構成之第二 源極/ /及極金屬層形成於上述第一源極/沒極金屬層之上, 且上述之第一源極/汲極金屬層及第二源極/汲極金屬層邊 緣係為傾斜側面(t a p e r p r 〇 f i 1 e)。The structure of the thin film transistor with an inclined side formed by the present invention includes at least: & a substrate having a gate electrode thereon; a gate insulating layer conformably formed on the gate electrode; a patterned A silicon layer is formed on part of the gate insulating layer; a patterned doped silicon layer is formed on the silicon layer; and a first columnar crystal structure having a growth direction that is normal to the substrate surface. The source / drain metal layer is formed on the silicon layer and the gate insulating layer; and a second source / and electrode metal layer composed of fine grain (^ inegra) crystals with arbitrary orientation is formed on Above the first source / dead metal layer, and the edges of the first source / drain metal layer and the second source / drain metal layer are sloped sides (taperpr ofi 1 e).

本發明之特徵係在於利用本發明所述之金屬斜角姓刻 結構’係形成具有任意定向之細微晶粒(f i n e g r a丨n)結晶 構成之第二金屬層於具有相對基底面法線方向成長之柱狀 (columnar)結晶構成之第一金屬層上,在形成一罩覆層並 進行濕蝕刻時,由於第一金屬層及第二金屬層所構成之金The feature of the present invention is that the second metal layer composed of fine grain crystals with arbitrary orientation is formed by using the metal oblique-angled-engraved structure according to the present invention to grow in a direction opposite to the normal direction of the base surface. On the first metal layer composed of columnar crystals, when a cover layer is formed and wet etching is performed, the gold due to the first metal layer and the second metal layer is formed.

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五、發明說明(7) ::對:細微晶粒(fine grain)結晶所構成,濕蝕 'θ ·;二政晶粒金屬層進行一等向性# % g ,到傾斜之側面,而藉由濕蝕刻對此傾斜側面 漸刻,在此細微晶粒結晶結構金屬層下層之柱狀 :nar)結晶結構金屬層將會漸漸露出,而濕蝕刻會對 先路出之柱狀金屬層之晶粒接壤處進行蝕 =屬層進行等向性㈣的效果,㈣了 ; 1 傾斜側面的目的(無論是第一金屬層及第二金屬層皆具曰具、 傾斜側面)。此傾斜側面將增加次層金屬層的覆蓋 (coverage)能力,減少元件斷線或是阻抗的增加。 社日ΪΪ明Ϊ另—特徵係本發明所述之具柱狀(⑶1⑽組) ::Ϊ ίί :金屬層及具細微晶粒⑴⑽grain)結晶構 之金屬斜角蝕刻結構’在以-製程步驟形 士第-金屬層後,可接續上述形成第一金屬層的製程步 :耸)只需二整甘(外加)鍍膜之製程參數(例如晶粒之散熱速 丨專),不需其他額外的製程’便可得到一具細微晶粒 (me grain)結晶構成之第二金屬層,跟形成金屬斜角蝕 亥"。構的其他技術手段相比,大大的節省製程的時間及步 驟,對於成本的降低及良率的提昇將大有助益。 為使本發明之上述目的、特徵能更明顯易懂,下文 舉較佳實施例,並配合所附圖式,作詳細說明如下: 實施方式V. Description of the invention (7) :: Pair: Fine grain crystals, wet-etched 'θ ·; Erzheng grain metal layer is isotropic #% g to the inclined side, and borrow The oblique side is gradually etched by wet etching, in which the columnar layer of the fine-grained crystalline structure metal layer: nar) the crystalline structure metal layer will gradually be exposed, and the wet etching will gradually Erosion at the grain boundary = the effect of isotropic creeping on the metal layer, stunned; 1 The purpose of the inclined side (both the first metal layer and the second metal layer have the same, inclined side). This inclined side surface will increase the coverage of the secondary metal layer, and reduce component disconnection or increase in resistance. Another feature of the company is the columnar (CD1⑽ group) :: Ϊ ίί: metal layer and metal oblique etching structure with a fine grain crystalline structure described in the present invention. After the first metal layer, the above-mentioned process steps for forming the first metal layer can be continued: only two process parameters (such as the heat dissipation rate of the die) of the coating film are needed, and no additional process is required. 'A second metal layer with fine grain crystals can be obtained, followed by metal oblique etching.' Compared with other technical methods of the construction, it can greatly save the time and steps of the process, which will greatly help reduce the cost and improve the yield. In order to make the above-mentioned objects and features of the present invention more comprehensible, preferred embodiments are described below in conjunction with the accompanying drawings, and are described in detail as follows:

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說明本發明之較佳實施例。 以下將配合圖式詳細 實施例1 金屬斜角蝕刻結構之製程 所述二;m:其顯示本實施例之起始步驟。本發明 一石斜角姓刻之方法適用於-基底100,例如是 晶顯示器中具電晶體側之基底,其上方可 僅:半導體元#,不過此處為了簡化圖式, 係包括丰之。在本發明的敘述中,"基底"一詞 塗膜。丰導 圓上已形成的元件與覆蓋在晶圓上的各種 笛一 ΙΪ,在上述基底100上形成一層第一金屬層1〇2,此 捉西?、、\層10 2可由熱蒸鐘法、電子槍蒸鍵法、錢鍍法或 方法將其鍍於基底100上。一般利用熱蒸鍍法、 電子槍瘵鍍法及濺鍍法方式將金屬形成於基底時,此金屬 2 f構成為一相對基底面法線方向成長之柱狀(columnar) 、·,σ S曰結構。此第一金屬層之厚度可為50 0〜6 0 0 0埃,構成此 具有相對基底面法線方向成長之柱狀(columnar)結晶構成 之第一金屬層的材質可擇自於鉻(Cr)、鈦(Ti)、鋁(A1)、 鉬(Mo)、鈕(Ta)及鎢(W),或是可擇自由鉻(Cr)、鈦 (Ti)、鋁(A1)、鉬(Mo)、鈕(Ta)及鎢(W)所任意組合之合 金中。 口。 接下來,在上述具有相對基底面法線方向成長之柱狀 (columnar)結晶構成之第一金屬層1〇2上形成一具任意定A preferred embodiment of the present invention will be described. The process of metal bevel etching structure according to the first embodiment will be described in detail in the following. The second one; m: it shows the initial steps of this embodiment. The method of engraving a stone oblique angle in the present invention is applicable to a substrate 100, for example, a substrate with a transistor side in a crystal display, and above it may be only: a semiconductor element #, but to simplify the diagram here, it includes Feng Zhi. In the description of the present invention, the term " substrate " The components formed on the Fengyuan circle and the various flutes on the wafer are formed on the substrate 100 to form a first metal layer 102. What is the problem? The layer 100 can be plated on the substrate 100 by a thermal evaporation method, an electron gun evaporation method, a coin plating method, or a method. Generally, when a metal is formed on a substrate by using a thermal evaporation method, an electron gun plating method, and a sputtering method, the metal 2 f is formed into a columnar structure that grows relative to the normal direction of the substrate surface. . The thickness of the first metal layer may be 50 to 600 angstroms. The material of the first metal layer composed of columnar crystals that grow in a direction normal to the base surface may be selected from chromium (Cr ), Titanium (Ti), aluminum (A1), molybdenum (Mo), button (Ta), and tungsten (W), or free chromium (Cr), titanium (Ti), aluminum (A1), molybdenum (Mo ), Button (Ta) and tungsten (W) in any combination of alloys. mouth. Next, an arbitrary random layer is formed on the first metal layer 102 having the above-mentioned columnar crystals grown in a direction normal to the base surface.

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五、發明說明(9) 向之細微晶粒(f i n e g r a i η)結晶構成之第二金屬層丨〇 4,V. Description of the invention (9) A second metal layer composed of fine crystal grains (f i n e g r a i η),

並接著形成一圖案化之罩覆層130於部份第二金屬層1〇4 上,請參考第4b圖。此第一金屬層102及第二金屬層1〇4間 有一晶粒接壤處1〇3。此第二金屬層1〇4可由熱蒸鍍法、^ 子搶蒸鍍法、濺鍍法形成於第一金屬層丨〇 2上,且在剛形 成金屬膜層時,必需以一冷卻(散熱)步驟瞬間冷卻剛成膜 之金屬膜層表面,藉由控制成膜條件下之初期核形成時、 間,而可一邊控制結晶粒徑,一邊成膜,以使此第二金屬 層104由具任意定向之細微晶粒(fine grain)結晶構成。 上述之冷卻(散熱)步驟可為以一流動的鈍氣進行瞬間冷 卻’而用以冷卻金屬膜層表面的鈍氣可包括氦氣,且該冷 卻步驟係藉降低溫度的速率,從約2 °c /秒至約4 〇 °c /秒7 的範圍加以完成。構成此具任意定向之細微晶粒(f丨ne grain)結晶構成之第二金屬層的材質可擇自於鉻(ςΓ)、欽 (Ti)、|呂(A1)、鉑(Mo)、钽(Ta)及鶴(W),或是可擇自由 鉻(Cr)、鈦(Ti)、|呂(A1)、鉬(Mo)、鈕(Ta)及鎢(W)所任 思組合之合金中。本發明所述之柱狀結構第一金屬層1 〇 2 與細微晶粒結晶第二金屬層1 〇 4之厚度比可由大約3 〇 : 1至 1 : 3 0,且一較佳厚度比係可為大約2 〇 : 1至丨:5。Then, a patterned cover layer 130 is formed on a portion of the second metal layer 104. Please refer to FIG. 4b. A grain boundary 103 is formed between the first metal layer 102 and the second metal layer 104. The second metal layer 104 can be formed on the first metal layer 100 by a thermal evaporation method, a sputtering method, and a sputtering method. When the metal film layer is formed, a cooling (heat dissipation) Step) The surface of the newly formed metal film layer is cooled instantaneously. By controlling the initial nucleation time and time under the film formation conditions, the film size can be controlled while controlling the crystal grain size, so that the second metal layer 104 can be formed with Arbitrarily oriented fine grain crystals. The above cooling (heat dissipation) step may be instantaneous cooling with a flowing inert gas, and the inert gas used to cool the surface of the metal film layer may include helium, and the cooling step is performed by reducing the temperature from about 2 ° This is done in a range from c / s to about 40 ° c / s7. The material of the second metal layer composed of the f 定向 ne grain crystal with any orientation can be selected from chromium (Γ), chin (Ti), | lutetium (A1), platinum (Mo), tantalum (Ta) and crane (W), or an alloy of any combination of free chromium (Cr), titanium (Ti), | Lu (A1), molybdenum (Mo), button (Ta), and tungsten (W) in. The thickness ratio of the columnar structure of the first metal layer 1 02 and the fine-grained crystal second metal layer 1 104 according to the present invention may be about 30: 1 to 1:30, and a preferred thickness ratio may be It is about 2 0: 1 to 5: 5.

接著’以一濕蝕刻去除未被上述罩覆層丨3 〇所覆蓋之 部分的苐一金屬層104及第一金屬層102。首先,請參照第 4c圖,濕蝕刻會先對於由細微晶粒結晶所構成之第二金屬 層104進行一等向性蝕刻(is〇tropic etching),得到第二 金屬層傾斜側面1 22。而藉由濕蝕刻對此第二金屬層傾斜Next, a portion of the first metal layer 104 and the first metal layer 102 which are not covered by the capping layer 301 are removed by a wet etching. First, referring to FIG. 4c, wet etching first performs isotropic etching on the second metal layer 104 composed of fine grain crystals to obtain the inclined side surface 122 of the second metal layer. And this second metal layer is tilted by wet etching

584914 五、發明說明(ίο)584914 V. Description of the Invention (ίο)

22之漸進蝕玄I卜在此細微晶粒結晶構成之第二全 之二狀:晶構成之第一金屬層102將會漸漸露 !第::。曰而濕餘刻會對先露出之柱狀結晶構成 在進—飩引二 之明粒接壌處1 03進行蝕刻,而柱狀結晶 在進仃蝕刻k,蝕刻方向主要為柱狀晶形成之方向,因此 對於陸續露出的柱狀結晶構成之第一金屬層丨〇 2可得到一 等向性蝕刻的效果,達到了使金屬膜層丨〇 5 (第一金屬層 102及第二金屬層1〇4)具傾斜側面122的目的,參考第“ 圖。 實施例2 形成薄膜電晶體陣列中具有傾斜側面結構閘極之製程 請參考第5圖,以一玻璃或是類似之材質做為本實施 例之基板2 0 0。以實施例1所述之形成金屬斜角蝕刻結構之 製程方法’形成一由具相對上述基板面法線方向成長之柱 狀(columnar)結晶構成之第一閘極金屬層2 02及具任意定 向之細微晶粒(f i ne gra i η)結晶構成之第二閘極金屬層 204所組成之具傾斜側面(tape:r pr〇file) 220的閘極金 屬層203。其中上述第一閘極金屬層2〇2及第二閘極金屬層 204可由相同或不同之材質所構成,像是鉻(Cr )、鈦 (Ti)、铭(A1)、鉬(Mo)、鈕(Ta)及鎢(W),或是可為相同 或不同之鉻(Cr)、鈦(Ti)、鋁(A1)、鉬(Mo)、钽(Ta)及鎢 (W)所任意組合之合金。上述柱狀結晶結構之第一閘極金The gradual eclipse of 22 is the second perfect shape of the fine grain crystal structure: the first metal layer 102 of the crystal structure will gradually be exposed! Section ::. On the wet side, the first exposed columnar crystals are etched at the junction of the bright grains of the second and third crystals, and the columnar crystals are etched into the kinematics. The etching direction is mainly formed by columnar crystals. Direction, so for the first metal layer composed of columnar crystals exposed in succession, an isotropic etching effect can be obtained, and the metal film layer can be achieved (the first metal layer 102 and the second metal layer 1 〇4) With the purpose of inclined side 122, refer to the figure. Example 2 For the process of forming a gate with an inclined side structure in a thin film transistor array, please refer to FIG. 5. A glass or similar material is used as the implementation. Example substrate 200. Using the process method for forming a metal beveled etching structure described in Example 1 to form a first gate metal composed of columnar crystals that grow in a direction normal to the substrate surface A gate metal layer 203 with an inclined side surface (tape: r pr0file) 220 composed of a second gate metal layer 204 composed of a layer 202 and a second gate metal layer 204 composed of a fine grain (fi ne gra i η) crystal having an arbitrary orientation. Wherein the first gate metal layer 20 and The two gate metal layers 204 may be made of the same or different materials, such as chromium (Cr), titanium (Ti), Ming (A1), molybdenum (Mo), button (Ta), and tungsten (W), or may be The same or different alloys of any combination of chromium (Cr), titanium (Ti), aluminum (A1), molybdenum (Mo), tantalum (Ta), and tungsten (W). The first gate of the above-mentioned columnar crystal structure gold

584914584914

厚;比2τ、細:“曰粒結晶之第二閘極金屬層204之金屬膜層 =可由大約30:1至1:3〇,且一較佳厚度比係可為大約 勺二^ 一。上述之具傾斜側面220的閘極金屬層2〇3可更 障層⑽如iayer)於其上,其中上述阻 及:功,自於鼠化组、氮化銷、氮化欽、氮化鑛、石夕化组 化鈕所組成之族群中’或由兩種以上 之複合膜層。 實施例3 形成薄膜電晶體陣列中具有傾斜側面結構源極/汲極之製 程 在液晶顯示器之薄膜電晶體(thin film transistor) 的製成當中,蝕刻複數導電層使其形成具有傾斜側面 (taper prof i le)結構的薄膜電晶體源極/汲極是很重要 的。本發明提供一種方法形成薄膜電晶體陣列匯流排具有 一極佳傾斜側面結構之源極/汲極,可以簡化薄膜電晶體 源極/沒極的製程,提昇薄膜電晶體的產能及品質。 請參考第6a圖,以一玻璃或是類似之材質做為本實施 例之基板3 0 0。一導電層像是金屬或是合金沈積於上述基 板3 0 0上,進行一蝕刻製程將上述導電層蝕刻製作成圖形 化之閘極3 0 2。做為閘極3〇2之材料可以為鉻(Cr)、鈦 (Ti)、紹(A1)、鉬(Mo)、鈕(Ta)及鎢(W),也可以上述材 質製作成複合層之結構,像是雙層結構,或是可為鉻 (Cr)、鈦(Ti)、鋁(A1)、鉬(M〇)、钽(Ta)及鎢(W)所任意Thicker; ratio 2τ, finer: "The metal film layer of the second gate metal layer 204 of the grain crystal can be from about 30: 1 to 1:30, and a preferable thickness ratio can be about 2 ^ 1. The above-mentioned gate metal layer 203 with the inclined side 220 can be a barrier layer (such as iayer) on it, wherein the above hinders: work, from the ratification group, nitride pins, nitride nitride, nitride nitride In the group consisting of Shixihua chemical group buttons, or two or more composite film layers. Example 3 The process of forming a source / drain with an inclined side structure in a thin-film transistor array is in a thin-film transistor of a liquid crystal display In the fabrication of a thin film transistor, it is important to etch a plurality of conductive layers to form a thin film transistor source / drain with a taper profile structure. The present invention provides a method for forming a thin film transistor The array bus has a source / drain with an excellent inclined side structure, which can simplify the process of thin-film transistor source / depolarization, and improve the productivity and quality of thin-film transistors. Please refer to Figure 6a for a glass or A similar material is used as the substrate of this embodiment 3 0 0 A conductive layer such as a metal or an alloy is deposited on the substrate 300, and an etching process is performed to etch the conductive layer into a patterned gate electrode 302. The material used as the gate electrode 302 may be chromium (Cr), titanium (Ti), Shao (A1), molybdenum (Mo), button (Ta), and tungsten (W) can also be made into a composite layer structure, such as a double-layer structure, or can be Any of chromium (Cr), titanium (Ti), aluminum (A1), molybdenum (M〇), tantalum (Ta), and tungsten (W)

0632-8948TWF(nl) · AU91225 ; Phoelip.ptd 第 15 頁 584914 五、發明說明(12) 組合之合金。閘極3 〇 2之厚度約為5 0 0〜4 0 0 0埃之間,可利 用熱蒸鍍法、電子搶蒸鍍法、濺鍍法形成。接著一閘極絕 緣層3 0 4形成於閘極3 〇 2及基板3 0 0上,用以作為絕緣之結 構。閘極絕緣層3 〇 4 —般可以使用氧化物、氮化物或類似 之材料’舉例來說,像是可以利用電漿化學氣相沈積法來 形成氮化矽作為閘極絕緣層。 一半導體層3 0 6,例如非晶矽(a-S i)或是多晶矽 (p-Si)隨後沈積於閘極絕緣層304,在此實施例中,半導 體層3 06之厚度約為500至3000埃,在某些例子中,半導體 層3 0 6也可以使用複合膜層結構。 仍參考第6a圖,接著,形成一摻離矽層308於上述半 導體層3 0 6上,可以利用離子摻離製程植入離子進入非晶 矽之中或是直接沈積一摻離之矽層,例如可以利用電漿氣 相沈積法直接沈積。再利用微影製程將上述半導體層3 〇 6 及摻離矽層308形成圖案於閘極3〇2上。 請參考第6b圖,形成一源極/汲極複合金屬層3 11複合 金屬結構層3 11於摻離矽層3 〇 8及閘極絕緣層3 0 4上,並在 其上形成一罩覆層314。上述複合金屬結構層311至少包含 具相對基板面法線方向成長之柱狀(c 〇 1 u m n a r )結晶構成之 第一源極/汲極金屬層3 1 o及具任意定向之細微晶粒(f i ne grain)結晶構成之第二源極/汲極金屬層312,且第二源極 /沒極金屬層3 1 2形成於第一源極/汲極金屬層之上,其中 形成由柱狀結晶構成之第一源極/汲極金屬層3丨〇及形成由 細微晶粒結晶構成之第二源極/汲極金屬層3丨2的方法如實0632-8948TWF (nl) · AU91225; Phoelip.ptd page 15 584914 V. Description of the invention (12) Combination alloy. The thickness of the gate electrode 3 002 is about 5,000 to 4,000 angstroms, and it can be formed by a thermal evaporation method, an electronic snap evaporation method, or a sputtering method. Next, a gate insulating layer 304 is formed on the gate 302 and the substrate 300 to serve as an insulating structure. The gate insulating layer 304 can generally be made of an oxide, nitride, or similar material. For example, a plasma chemical vapor deposition method can be used to form silicon nitride as the gate insulating layer. A semiconductor layer 306, such as amorphous silicon (aS i) or polycrystalline silicon (p-Si), is then deposited on the gate insulating layer 304. In this embodiment, the thickness of the semiconductor layer 306 is about 500 to 3000 angstroms. In some examples, the semiconductor layer 3 06 can also use a composite film layer structure. Still referring to FIG. 6a, next, a doped silicon layer 308 is formed on the semiconductor layer 306. The ion doping process can be used to implant ions into the amorphous silicon or directly deposit a doped silicon layer. For example, it can be directly deposited using a plasma vapor deposition method. Then, the above-mentioned semiconductor layer 306 and the doped silicon layer 308 are patterned on the gate electrode 302 by a photolithography process. Please refer to FIG. 6b to form a source / drain composite metal layer 3 11 and a composite metal structure layer 3 11 on the doped silicon layer 3 08 and the gate insulating layer 3 04, and a cover is formed thereon. Layer 314. The composite metal structure layer 311 includes at least a first source / drain metal layer 3 1 o formed with a columnar (c umnar) crystal grown in a direction normal to the substrate surface and fine grains (fi ne grain), the second source / drain metal layer 312, and the second source / drain metal layer 3 1 2 is formed on the first source / drain metal layer, wherein a columnar crystal is formed. The method of forming the first source / drain metal layer 3 丨 0 and the method of forming the second source / drain metal layer 3 丨 2 composed of fine grain crystals are true.

0632-8948TWF(nl) ; AU91225 ; Phoelip.ptd 第16頁 584914 五、發明說明(13) 施例1所述。 上述第一源極/汲極金屬層3 1 0及第二源極/汲極金屬 層312可由相同或不同之材質所構成,像是鉻(Cr)、鈦 (Ti)、鋁(A1)、鉬(Mo)、鈕(Ta)及鎢(W),.或是可為相同 或不同之鉻(Cr)、鈦(Ti)、铭(A1)、錮(Mo)、组(Ta)及或| (W)所任意組合之合金。上述柱狀結晶結構之第一源極/及 極金屬層3 1 0與細微晶粒結晶之第二源極/汲極金屬層3 1 2 之金屬膜層厚度比可由大約3 0 : 1至1 : 3 0,且一較佳厚度比 係可為大約2 0 : 1至1 : 5。參考第6 c圖,以一濕蝕刻去除未 被上述罩覆層3 1 4所覆蓋之部分的第二源極/汲極金屬層 3 1 2及苐一源極/>及極金屬層3 1 〇,如實施例1所述,可使源 極/沒極複合金屬層3 11之通道3 2 0具有傾斜側面3 2 2,得到 具有傾斜側面結構之膜薄電晶體源極/汲極。 綜上所述,本發明提出一種金屬斜角蝕刻結構,此傾 斜側面將增加次層金屬層的覆蓋(coverage)能力,減少元 件斷線或是阻抗的增加。藉由本發明,可以增加次層膜層 白j覆蓋(coverage)能力,有效避免習知技術中因為階梯覆 盖不良所導致元件斷線或是阻抗的增加的問題,並確保元 件具有高可靠度的接觸。本發明所述之具柱狀(c〇lumnar) 結晶構成之第一金屬層及具細微晶粒(f ine grain)結晶構 成之第二金屬層之金屬斜角蝕刻結構,在以一製程步驟形 成第一金屬層後,可繼續上述形成第一金屬層的製程步 驟,只需調整(外加)鍍膜之製程參數(例如晶粒之散熱速0632-8948TWF (nl); AU91225; Phoelip.ptd page 16 584914 5. Description of the invention (13) As described in the first embodiment. The first source / drain metal layer 3 1 0 and the second source / drain metal layer 312 may be made of the same or different materials, such as chromium (Cr), titanium (Ti), aluminum (A1), Molybdenum (Mo), button (Ta), and tungsten (W), or may be the same or different chromium (Cr), titanium (Ti), Ming (A1), thorium (Mo), group (Ta), and or | (W) Any combination of alloys. The thickness ratio of the metal film layer of the first source / and electrode metal layer 3 1 0 of the above-mentioned columnar crystal structure and the second source / drain metal layer 3 1 2 of fine grain crystal may be about 30: 1 to 1 : 30, and a preferred thickness ratio may be about 20: 1 to 1: 5. Referring to FIG. 6c, the second source / drain metal layer 3 1 2 and the first source / > and the electrode metal layer 3 which are not covered by the cover layer 3 1 4 are removed by a wet etching. 10, as described in Embodiment 1, the channel 3 2 0 of the source / electrode composite metal layer 3 11 can have an inclined side surface 3 2 2 to obtain a thin film source / drain electrode with an inclined side structure. In summary, the present invention provides a metal oblique etching structure. The oblique side will increase the coverage of the secondary metal layer, and reduce the disconnection of the element or the increase of the impedance. With the present invention, the coverage capability of the secondary film layer can be increased, which effectively avoids the problems of disconnection or increase of impedance caused by poor step coverage in the conventional technology, and ensures that the component has high-reliability contact . The metal oblique etching structure of the first metal layer having a columnar crystal structure and the second metal layer having a fine grain crystal structure according to the present invention is formed in a process step. After the first metal layer, the above-mentioned process steps for forming the first metal layer can be continued, and only the process parameters of the coating film (such as the heat dissipation rate of the crystal grains) need to be adjusted (added).

0632-8948TWF(nl) ; AU91225 ; Phoelip.ptd 第17頁 5849140632-8948TWF (nl); AU91225; Phoelip.ptd p. 17 584914

率專),不茜其他額外的製程, grain)灶日Μ + 、卜〕衣私 Τ仵到一具細微晶粒(f i ne graln)結日日構成之第二金屬層。再經 接 達到對金屬斜角蝕刻的目的,sp 4、,蝕刻私序後,便叮 技術丰俨相… 先丽用於金屬斜角蝕刻之 μ # &又 不僅可簡化製成之步驟,對於全屬钭角蝕 刻結構的良率提昇也大有裨益。 對於金屬斜角蝕 —雖然本發明已以較佳實施例揭露如上,然其並非用以 限疋本發明’任何熟習此技藝者,在不脫離本發明之精神 和範圍内’當可作些許之更動與潤倚’因此本發明之保護 範圍當視後附之申請專利範圍所界定者為準。Special rate), other additional manufacturing processes, grain), M +, B], and a second metal layer composed of fine grains (f i ne graln). After that, we can achieve the purpose of metal bevel etching, sp 4, after the private sequence of etching, we will use the technology to enrich the phase ... First, the μ # used for metal bevel etching will not only simplify the manufacturing process, It is also beneficial to the improvement of the yield of all corner etched structures. For metal oblique etching-although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. "Any person skilled in the art can do so without departing from the spirit and scope of the present invention." Changes and Runyi 'Therefore, the scope of protection of the present invention shall be determined by the scope of the appended patent application.

0632-8948TWF(nl) ; AU91225 ; Phoelip.ptd 第18頁 584914 圖式簡單說明 第1 a及1 b圖為一系列剖面圖,用以說明在具垂直侧面 金屬層形成次層膜層時之現象。 第2a及2b圖為一系列剖面圖,用以說明在具傾斜側面 金屬層形成次層膜層時之現象。 第3a及3b圖為一系列剖面圖,用以說明對具柱狀結晶 結構之金屬層進行蝕刻得到垂直之側面。 第3c及3d圖為一系列剖面圖,用以說明用於金屬斜角 银刻之先前技術。 第4a〜4e圖係說明本發明之用於金屬斜角#刻的方法 之一較佳實施例其流程剖面圖。 第5圖係說明本發明之具有傾斜側面之薄膜電晶體閘 極結構之一較佳實施例的剖面圖。 第6a〜6c圖係說明本發明之形成薄膜電晶體具有傾斜 側面結構之源極/沒極的方法之一較佳實施例其流程剖面 圖0 符號說明: 10〜基底; 1 4〜阻障層; 1 8〜次膜層; 22〜突懸; 3 0〜罩覆層; 4 2〜垂直側面 4 7〜傾斜側面 1 2〜金屬層; 1 6〜介電層; 20〜通道; 2 4〜針孔; 4 0〜蝕刻通道; 4 5〜通道; 5 0〜柱狀結晶結構金屬層;0632-8948TWF (nl); AU91225; Phoelip.ptd, page 18, 584914, a brief description of the drawings Figures 1 a and 1 b are a series of cross-sectional views, which are used to explain the phenomenon when a secondary layer is formed on a metal layer with vertical sides. . Figures 2a and 2b are a series of cross-sectional views for explaining the phenomenon when a secondary layer is formed on a metal layer with an inclined side. Figures 3a and 3b are a series of cross-sectional views for illustrating the vertical side surface obtained by etching a metal layer having a columnar crystal structure. Figures 3c and 3d are a series of cross-sectional views illustrating the prior art for metal beveled silver engraving. Figures 4a to 4e are cross-sectional views illustrating the flow of a preferred embodiment of the method for engraving a metal bevel according to the present invention. Fig. 5 is a cross-sectional view illustrating a preferred embodiment of a thin film transistor gate structure having an inclined side surface according to the present invention. Figures 6a to 6c illustrate one preferred embodiment of the method for forming a source / non-polar electrode of a thin film transistor with a slanted side structure according to the present invention. A cross-sectional view of the flow chart 0 Symbol description: 10 to substrate; 1 to 4 barrier layer 18 ~ secondary film layer; 22 ~ overhang; 3 0 ~ cover layer; 4 2 ~ vertical side 4 7 ~ inclined side 1 2 ~ metal layer; 16 ~ dielectric layer; 20 ~ channel; 2 4 ~ Pinholes; 40 ~ etching channels; 4 ~ 5 channels; 50 ~~ columnar crystal structure metal layers;

0632-8948TWF(nl) ; AU91225 ; Phoelip.ptd 第19頁 584914 圖式簡單說明 5 1〜晶粒接壤處; 5 2〜細微晶粒結晶結構金屬層; 100〜基底; 102〜第一金屬層; 103〜晶粒接壤處; 104〜第二金屬層; 105〜金屬膜層; 罩覆層; 第一閘極金屬層 第二閘極金屬層 基板; 閘極絕緣層; 摻離矽層; 1 2 2〜傾斜側面; 130 2 0 0〜基板; 202 203〜閘極金屬層; 204 2 2 0〜傾斜側面; 300 3 0 2〜閘極; 304 3 0 6〜半導體層; 308 3 1 0〜第一源極/没極金屬層; 311〜源極/汲極複合金屬層; 以及 3 1 2〜第二源極/沒極金屬層; 314〜罩覆層; 320〜通道 3 2 2〜傾斜側面。0632-8948TWF (nl); AU91225; Phoelip.ptd, page 19, 584914, 5 1 ~ Grain boundary; 5 2 ~ Fine grain crystal structure metal layer; 100 ~ Substrate; 102 ~ First metal layer; 103 ~ grain boundary; 104 ~ second metal layer; 105 ~ metal film layer; cover layer; first gate metal layer; second gate metal layer substrate; gate insulation layer; doped silicon layer; 1 2 2 ~ inclined side; 130 2 0 0 ~ substrate; 202 203 ~ gate metal layer; 204 2 2 0 ~ inclined side; 300 3 0 2 ~ gate; 304 3 0 6 ~ semiconductor layer; 308 3 1 0 ~ first One source / non-electrode metal layer; 311 ~ source / drain composite metal layer; and 3 1 2 ~ second source / non-electrode metal layer; 314 ~ cover layer; 320 ~ channel 3 2 2 ~ inclined side .

0632-8948TWF(nl) ; AU91225 ; Phoelip.ptd 第20頁0632-8948TWF (nl); AU91225; Phoelip.ptd page 20

Claims (1)

584914584914 1 ·種金屬斜角蝕刻結構,其至少包括: 一基底; 具有相對上述基底面法線方向成長之柱狀 (columnar)么士曰接 ^ ^、、'口日日構成之第一金屬層形成於上述基底 以及 工, 具任思疋向之細微晶粒(f i n e g r a i η)結晶構成之第 二金f層形成於上述第一金屬層之上,且上述之第一金屬 層及第一 i屬層邊緣係為傾斜側面。 2·如申請專利範圍第1項所述之金屬斜角蝕刻結構, 其中上述第一金屬層及第二金屬層由相同或不同之材質 構成,係擇自於鉻(Cr)、欽⑴)、紹(A1)、麵(m〇)、纽 (Ta)f鎢(W)所組成之族群,或是上述金屬所任意組合之 3 ·如,明專利範圍第丨項所述之金屬斜角蝕刻結構, 二a^述第一金屬層與第二金屬層之金屬膜層厚度比係由 大約3 0 : 1至1 : 3 〇。 4 ·如t明專利範圍第1項所述之金屬斜角蝕刻結構, :第一金屬層與第二金屬層之金屬膜層厚度比係由 大約2 0 : 1至1 : 5。 • 5· —種用於金屬斜角蝕刻的方法,至少包含下列步 提供一基底; 於上述基底上形成一目有 長之柱狀(c ο 1 u m n a r)結晶構成^ 相對上述基底面法線方向成 之第一金屬層;1. A metal oblique etching structure, comprising at least: a substrate; a columnar structure having a columnar growth with respect to the normal direction of the substrate surface; On the above substrate and process, a second gold f layer composed of fine grain crystals of fine grain (finegrai η) is formed on the first metal layer, and the first metal layer and the first i-type layer are formed. The edges are inclined sides. 2. The metal oblique etching structure according to item 1 in the scope of the patent application, wherein the first metal layer and the second metal layer are made of the same or different materials, and are selected from chromium (Cr), cyanine, Shao (A1), surface (m0), ta (f) (t), tungsten (W), or any combination of the above metals In the structure, the thickness ratio of the metal film layer of the first metal layer to the second metal layer is from about 30: 1 to 1:30. 4. The metal oblique etching structure according to item 1 of the Ming patent scope: the thickness ratio of the metal film layer of the first metal layer to the second metal layer is from about 20: 1 to 1: 5. • 5 · — A method for bevel etching of metal, including at least the following steps to provide a substrate; forming a long columnar (c ο 1 umnar) crystal structure on the substrate ^ relative to the normal direction of the substrate surface The first metal layer; 584914 六、申請專利範圍 " " ' 於上述第一金屬層上形成一具任意定向之細微晶粒 (fine grain)結晶構成之第二金屬層; I成並疋義罩覆層於上述具任意定向之細微晶粒 (fine grain)結晶構成之第二金屬層上;以及 以一#刻程序去除未被該罩覆層所覆蓋之部分的第一 金屬層及第二金屬層,俾使得到一傾斜側面。 6 ·如申請專利範圍第5項所述之用於金屬斜角蝕刻的 方法’其中上述第一金屬層及第二金屬層由相同或不同之 材質所構成,係擇自於鉻(Cr)、鈦i )、鋁(A 1 )、鉬 (Mo)、组(Ta)及鎢(w)所組成之族群,或是上述金屬所任 意組合之合金中。 7 ·如申請專利範圍第5項所述之用於金屬斜角蝕刻的 方法’其中上述第一金屬層與第二金屬層之金屬膜層厚度 比係由大約3 0 : 1至1 : 3 〇。 8 _如申請專利範圍第5項所述之用於金屬斜角蝕刻的 方法’其中上述第一金屬層與第二金屬層之金屬膜層厚度 比係由大約2 0 : 1至1 : 5。 9·如申請專利範圍第5項所述之用於金屬斜角蝕刻的 方法,其中上述蝕刻程序係為一濕蝕刻。 1 0 · —種具有傾斜側面之薄膜電晶體閘極結構,其至 少包括: 一欲形成薄膜電晶體之基板, 一具有相對上述基板面法線方向成長之柱狀 (columnar)結晶構成之第一閘極金屬層形成於上述基板之584914 VI. Application scope of patent " " 'A second metal layer composed of fine grain crystals with arbitrary orientation is formed on the first metal layer; Arbitrarily oriented fine grain crystals on the second metal layer; and removing a portion of the first metal layer and the second metal layer that are not covered by the cover layer with a #cut procedure, so that One tilted side. 6 · The method for metal bevel etching as described in item 5 of the scope of the patent application, wherein the first metal layer and the second metal layer are composed of the same or different materials, and are selected from chromium (Cr), Titanium i), aluminum (A1), molybdenum (Mo), group (Ta), and tungsten (w), or an alloy of any combination of the above metals. 7 · The method for metal bevel etching as described in item 5 of the scope of the patent application, wherein the thickness ratio of the metal film layer of the first metal layer to the second metal layer is from about 30: 1 to 1: 3. . 8 _ The method for metal bevel etching as described in item 5 of the scope of patent application, wherein the thickness ratio of the metal film layer of the first metal layer to the second metal layer is from about 20: 1 to 1: 5. 9. The method for bevel etching of a metal as described in item 5 of the scope of patent application, wherein the above-mentioned etching procedure is a wet etching. 1 0 · A thin film transistor gate structure with inclined sides, which at least includes: a substrate to be formed with a thin film transistor, a first having a columnar crystal structure that grows in a direction normal to the substrate surface The gate metal layer is formed on the substrate 0632-8948TWF(nl) ; AU91225 ; Phoelip.ptd 第22頁 584914 六、申請專利範圍 上;以及 一具任意疋向之細微晶粒(f丨n e g r a i n)結晶構成之第 二閘極金屬層形成於上述第一閘極金屬層之上,且上述之 第一閘極金屬層及第二閘極金屬層邊緣係為傾斜側面 (taper profile) 〇 11 ·如申請專利範圍第1 0項所述之具有傾斜側面之薄 膜電晶體閘極結構,更包括一阻障層(barrier layer)順 應性形成於上述具傾斜側面的第一閘極金屬層及第二閘極 金屬層上’其中上述阻障層係擇自於氮化组、氮化鉬、氮 化鈦、氮化鎢、矽化鈕及氮矽化钽所組成之族群,或由兩 種以上之材質所組成之複合膜層中。 1 2 ·如申請專利範圍第丨〇項所述之具有傾斜側面之薄 膜電晶體閘極結構,其中上述第一閘極金屬層及第二閘極 金屬層由相同或不同之材質所構成,係擇自於鉻(Cr)、欽 (T i)、铭(A 1)、銦(Μ 〇)、组(T a)及鎢(W)所組成之族群, 或是上述金屬所任意組合之合金中。 1 3.如申請專利範圍第1 〇項所述之具有傾斜側面之薄 膜電晶體閘極結構,其中上述第一閘極金屬層與第二間極 金屬層之金屬膜層厚度比係由大約3〇:1至1:30。 1 4·如申請專利範圍第1 0項所述之具有傾斜側面之薄 膜電晶體閘極結構,其中上述第一閘極金屬層及第二間極 金屬層之金屬膜層厚度比係由大約20:1至1:5。 1 5 · —種形成薄膜電晶體陣列中具有傾斜側面結構之 閘極的方法,其中該薄膜電晶體陣列係形成於一基板上,0632-8948TWF (nl); AU91225; Phoelip.ptd Page 22 584914 6. In the scope of patent application; and a second gate metal layer composed of fine grains with arbitrary orientation (f 丨 negrain) crystal is formed on the above Above the first gate metal layer, and the edges of the first gate metal layer and the second gate metal layer described above are tapered sides (taper profile). The thin film transistor gate structure on the side further includes a barrier layer compliantly formed on the first gate metal layer and the second gate metal layer with the inclined side. From the group consisting of nitride group, molybdenum nitride, titanium nitride, tungsten nitride, silicide button and tantalum nitride silicide, or a composite film layer composed of two or more materials. 1 2 · The thin film transistor gate structure with an inclined side surface as described in item 1 of the scope of the patent application, wherein the first gate metal layer and the second gate metal layer are made of the same or different materials. It is selected from the group consisting of chromium (Cr), chitin (T i), Ming (A 1), indium (MO), group (T a), and tungsten (W), or an alloy of any combination of the above metals in. 1 3. The thin film transistor gate structure with inclined sides as described in item 10 of the scope of patent application, wherein the thickness ratio of the metal film layer of the first gate metal layer to the second intermetallic metal layer is about 3 〇: 1 to 1:30. 14. The thin film transistor gate structure with inclined sides as described in item 10 of the scope of patent application, wherein the thickness ratio of the metal film layer of the first gate metal layer and the second intermetallic metal layer is from about 20 : 1 to 1: 5. 1 5 · A method for forming a gate electrode having an inclined side structure in a thin film transistor array, wherein the thin film transistor array is formed on a substrate, 584914 六、申請專利範圍 ----— 該方法至少包含下列步驟: 形成一具有相對上述基板面法線方向成長之柱狀 (columnar)結晶構成之第一閘極金屬層於上述基板之上; 形成一具任意定向之細微晶粒(f ine grain)結晶 之第二閘極金屬層於上述之第一閘極金屬層上; 形成並定義一罩覆層於上述之第二閘極金屬層上;以 及 濕蝕刻未被該罩覆層所覆蓋之部分的第一閘極金屬層 及第二閘極金屬層,俾使得到一具有傾斜側面結構之閘曰 才虽0 1 6·如申請專利範圍第丨5項所述之形成薄膜電晶體陣 列中具有傾斜側面結構之閘極的方法,更包括順應性形成 一阻障層(barrier layer)於上述具傾斜側面的第一閘極 金屬層及第二閘極金屬層上,其中上述阻障層係擇自於氮 化叙、氮化鉬、氮化鈦、氮化鎢、矽化鈕及氮矽化鈕所組 成之族群,或由兩種以上之材質所組成之複合膜層中。 1 7 ·如申請專利範圍第丨5項所述之形成薄膜電晶體陣 列中具有傾斜側面結構之閘極的方法,其中上述第一閘極 金屬層及第二閘極金屬層由相同或不同之材質所構成,係 擇自於鉻(Cr)、鈦(Ti)、鋁(A1)、鉬(Mo)、组(Ta)及鎢 (W)所組成之族群,或是上述金屬所任意組合之合金中。 1 8 ·如申請專利範圍第1 5項所述之形成薄膜電晶體陣 列中具有傾斜側面結構之閘極的方法,其中上述第一閘極 金屬層與第二閘極金屬層之金屬膜層厚度比係由大約3 0 : 1584914 6. Scope of patent application — The method includes at least the following steps: forming a first gate metal layer having a columnar crystal structure that grows in a direction normal to the substrate surface on the substrate; Forming a second gate metal layer with fine grain crystals of arbitrary orientation on the first gate metal layer; forming and defining a cover layer on the second gate metal layer ; And wet etching the first gate metal layer and the second gate metal layer of the part not covered by the cover layer, so that a gate with a slanted side structure is only 0 1 6 · as in the scope of patent application The method for forming a gate electrode with a slanted side structure in a thin film transistor array as described in Item 5 further includes compliantly forming a barrier layer on the first gate metal layer and the first gated metal layer with the slanted side. On the two-gate metal layer, the above barrier layer is selected from the group consisting of nitride nitride, molybdenum nitride, titanium nitride, tungsten nitride, silicide button and nitrogen silicide button, or two or more materials Composition In the film layer. 1 7 · The method for forming a gate with an inclined side structure in a thin-film transistor array as described in item 5 of the scope of the patent application, wherein the first gate metal layer and the second gate metal layer are made of the same or different The material composition is selected from the group consisting of chromium (Cr), titanium (Ti), aluminum (A1), molybdenum (Mo), group (Ta), and tungsten (W), or any combination of the above metals Alloy. 1 8 · The method for forming a gate electrode with an inclined side structure in a thin film transistor array as described in item 15 of the scope of patent application, wherein the thicknesses of the metal film layers of the first gate metal layer and the second gate metal layer The ratio is about 3 0: 1 584914 六、申請專利範圍 ----- 至1 : 30。 1 9 ·如申明專利範圍第1 5項所述之形成薄膜電晶體陣 列中具有,斜側面結構之閘極的方法,其中上述第一閘極 金屬層及第二閘極金屬層之金屬膜層厚度比係由大約2 0 · 1 至 1 : 5。 2 0· 種具有傾斜側面之薄膜電晶體源極/汲極結構, 其至少包括: 一基板,其上具有一閘極; 一閘極絕緣層,順應性形成於閘極上; 一圖案化之矽層形成於部份上述閘極絕緣層上; 一圖案化之摻雜矽層形成於上述之矽層上; 具有相對上述基板面法線方向成長之柱狀 (c ο 1 u m n a r)結晶構成之第一源極/没極金屬層形成於上述 石夕層及閘極絕緣層上;以及 一具任意定向之細微晶粒(f i n e gr a i n)結晶構成之第 二源極/汲極金屬層形成於上述第一源極/汲極金屬層之 上’且上述之第一源極/汲極金屬層及第二源極/沒極金屬 層邊緣係為傾斜側面。 21.如申請專利範圍第2〇項所述之具有傾斜側面之薄 膜電晶體源極/汲極結構,其中上述第一源極/没極金屬層 及第二源極/汲極金屬層由相同或不同之材質所構成,係 擇自於鉻(Cr)、鈦(Ti)、鋁(A1)、鉬(Mo)、鈕(Ta)及鎢 (W)所組成之族群’或是上述金屬所任意組合之合金中。 2 2 ·如申請專利範圍第2 〇項所述之具有傾斜側面之薄584914 VI. Application scope of patent ----- to 1:30. 19 · The method for forming a gate electrode with an oblique side structure in a thin film transistor array as described in Item 15 of the declared patent scope, wherein the first gate metal layer and the second gate metal layer are metal film layers The thickness ratio is from about 20 · 1 to 1: 5. 2 · A thin film transistor source / drain structure with inclined sides, which at least includes: a substrate having a gate electrode thereon; a gate insulating layer conformably formed on the gate electrode; a patterned silicon A layer is formed on part of the above gate insulating layer; a patterned doped silicon layer is formed on the above silicon layer; and a columnar (c ο 1 umnar) crystal structure having a growth direction relative to the normal direction of the substrate surface is formed. A source / non-electrode metal layer is formed on the above-mentioned Shi Xi layer and gate insulating layer; and a second source / drain metal layer composed of fine grains of arbitrary orientation (fine gr ain) crystals is formed on the above Above the first source / drain metal layer 'and the edges of the first source / drain metal layer and the second source / non-metal layer are inclined sides. 21. The thin film transistor source / drain structure with an inclined side according to item 20 of the scope of patent application, wherein the first source / non-metal layer and the second source / drain metal layer are made of the same Or different materials, selected from the group consisting of chromium (Cr), titanium (Ti), aluminum (A1), molybdenum (Mo), button (Ta), and tungsten (W) In any combination of alloys. 2 2 · Thin with slanted sides as described in item 20 of the scope of patent application 0632-8948TWF(nl) ; AU91225 ; Phoelip.ptd 第25頁 584914 六、申請專利範圍 膜電晶體源極/沒極結構,其中上述第一源極/汲極金屬層 與第二源極/汲極金屬層之金屬膜層厚度比係由大約3 〇 :丄 至 1 : 3 0。 2 3 ·如申請專利範圍第2 〇項所述之具有傾斜側面之薄 膜電晶體源極/沒極結構,其中上述第一源極/没極金屬層 及第二源極/汲極金屬層之金屬膜層厚度比係由大約2 0 : 1 至1 : 5。 2 4 · —種形成薄膜電晶體陣列中具有傾斜側面結構之 源極/汲極的方法,其至少包含下列步驟: 提供一基板,其上形成有一閘極; 順應性形成一閘極絕緣層於上述之閘極上; 形成並定義一矽層於上述之部分閘極絕緣層上; 形成並定義一摻雜矽層於上述之矽層上; 形成一具有相對上述基板面法線方向成長之柱狀 (columnar)結晶構成之第一源極/汲極金屬層於上述之摻 雜矽層與閘極絕緣層之上; 形成一具任意定向之細微晶粒(f ine grain)結晶構成 之第二源極/汲極金屬層於上述之第一源極/汲極金屬層 上; 形成並定義一罩覆層於上述之第二源極/汲極金屬層 上;以及 以上述掺雜矽層為蝕刻停止層,濕蝕刻未被該罩覆層 所覆蓋之部分的第一源極/汲極金屬層及第二源極/汲極金 屬層’俾使得到一具有傾斜側面結構之源極/汲極。0632-8948TWF (nl); AU91225; Phoelip.ptd Page 25 584914 VI. Patent application film transistor source / non-polar structure, wherein the above first source / drain metal layer and second source / drain The thickness ratio of the metal film layer of the metal layer ranges from about 30: 1 to 1:30. 2 3 · The thin film transistor source / non-polar structure with inclined sides as described in item 20 of the scope of patent application, wherein the first source / non-metal layer and the second source / drain metal layer The metal film thickness ratio ranges from about 20: 1 to 1: 5. 2 4 · A method for forming a source / drain with a slanted side structure in a thin film transistor array, which includes at least the following steps: providing a substrate with a gate formed thereon; and compliantly forming a gate insulating layer on On the above gate; forming and defining a silicon layer on the above part of the gate insulating layer; forming and defining a doped silicon layer on the above silicon layer; forming a columnar shape with a direction normal to the substrate surface (columnar) a first source / drain metal layer composed of crystals on the above-mentioned doped silicon layer and gate insulating layer; forming a second source of fine grain crystals with arbitrary orientation A source / drain metal layer on the first source / drain metal layer; forming and defining a capping layer on the second source / drain metal layer; and using the doped silicon layer as an etch Stop layer, wet etching the first source / drain metal layer and the second source / drain metal layer of the portion not covered by the capping layer, so as to reach a source / drain electrode having an inclined side structure . 0632-8948TWF(nl) ; AU91225 ; Phoelip.ptd 第26頁 584914 六、申請專利範圍 25. —種形成薄膜電晶體陣列中具 源極/汲極的方法,其至少包含下列步騾··…、、貞’面結構之 提供一基板,其上形成有一閘極; 順應性形成一閘極絕緣層於上述之閘極上· 形成並定義一矽層於上述之部分間極絕緣層上· 形成並定義一摻雜矽層於上述之矽層上; , 上;形成一第一阻障層於上述之摻雜“與閘極絕緣層之 形成一具有相對上述基板面法線方向成長之柱狀 (columnar)結晶構成之第一源極/沒極金屬層於上 一阻障層之上; < $ 形成具任思定向之細微晶粒(f i ne gra i η )結晶構成 2第二源極/汲極金屬層於上述之第一源極/汲極金屬層 上形成一第二阻障層於上述之第二源極/汲極金屬層 形成並定義一罩覆層於上述之第二阻障層上;以及 j上述摻雜矽層為蝕刻停止層,濕蝕刻未被該罩覆層 所覆蓋之部分的第一阻障層、第一源極/汲極金屬層、第 一源極/汲極金屬層及第二阻障層,俾使得到一具有傾斜 側面結構之源極/汲極。 26·如申請專利範圍第24或25項所述之形成薄膜電晶 體,列中具有傾斜側面結構之源極/汲極的方法,其中上 述第一源極/汲極金屬層及第二源極/汲極金屬層由相同或 第27頁 0632-8948TWF(nl) ; AU91225 ; Phoelip.ptd 584914 申請專利範圍 不同之材質所構成,係擇自於鉻(Cr)、鈦(Ti)、鋁(A1)、 鋼(Mo)、钽(Ta)及鎢(w)所組成之族群,或是上述金屬所 任意組合之合金中。 2 7 ·如申請專利範圍第2 4或2 5項所述之形成薄膜電晶 體陣列中具有傾斜側面結構之源極/汲極的方法,其中上 述第一源極/汲極金屬層與第二源極/汲極金屬層之金屬膜 層厚度比係由大約3 0 : 1至1 : 3 〇。 28·如申請專利範圍第24或25項所述之形成薄膜電晶 體陣列中具有傾斜側面結構之源極/汲極的方法,其中上 述第一源極/汲極金屬層及第二源極/汲極金屬層之金屬膜 層厚度比係由大約2 0 : 1至1 : 5。 2 9 ·如申請專利範圍第2 5項所述之形成薄膜電晶體陣 列中具有傾斜側面結構之源極/汲極的方法,其中上述第 一阻障層及第二阻障層係由相同或不同之材質所構成,係 擇自於氮化鈕、氮化鉬、氮化鈦、氮化鎢、矽化鈕及氮矽 化纽所組成之族群,或由兩種以上之材質所組成之複合層 中。0632-8948TWF (nl); AU91225; Phoelip.ptd page 26 584914 6. Application for patent scope 25.-A method for forming a source / drain in a thin film transistor array, which includes at least the following steps ... The substrate structure of the Zhen 'plane provides a gate on which a gate is formed; a gate insulation layer is formed on the gate conformably; a silicon layer is formed on the above-mentioned inter-layer gate insulation layer; formed and defined A doped silicon layer is formed on the above-mentioned silicon layer; a first barrier layer is formed on the above-mentioned doped layer and the gate insulating layer to form a columnar shape having a growth direction relative to the normal direction of the substrate surface ) The first source / electrode metal layer composed of crystals is on top of the previous barrier layer; < $ Form fine crystal grains (fi ne gra i η) with arbitrary orientation crystals to form 2 second source / electrode The electrode metal layer forms a second barrier layer on the first source / drain metal layer, and forms a cover layer on the second barrier layer. On; and j the above-mentioned doped silicon layer is an etch stop layer, wet etching The first barrier layer, the first source / drain metal layer, the first source / drain metal layer, and the second barrier layer are partially covered by the cover layer, so as to have an inclined side structure. 26. The method for forming a thin film transistor as described in item 24 or 25 of the scope of application for a patent, the source / drain method of the inclined side structure in the column, wherein the above-mentioned first source / drain electrode The metal layer and the second source / drain metal layer are composed of the same material or page 27 of 0632-8948TWF (nl); AU91225; Phoelip.ptd 584914. The materials with different patent application scopes are selected from chromium (Cr), titanium (Ti), aluminum (A1), steel (Mo), tantalum (Ta), and tungsten (w), or an alloy of any combination of the above metals. 2 7 · As the scope of patent application No. 24 or The method for forming a source / drain with a slanted side structure in a thin-film transistor array according to item 25, wherein the metal film layer of the first source / drain metal layer and the second source / drain metal layer described above The thickness ratio is from about 30: 1 to 1: 3. 28. The shape as described in item 24 or 25 of the scope of patent application A method for a source / drain electrode with an inclined side structure in a thin film transistor array, wherein the thickness ratio of the metal film layer of the first source / drain metal layer and the second source / drain metal layer is about 20 : 1 to 1: 5. 2 9 · The method for forming a source / drain with a slanted side structure in a thin film transistor array as described in item 25 of the patent application scope, wherein the first barrier layer and the second The barrier layer is composed of the same or different materials. It is selected from the group consisting of nitride buttons, molybdenum nitride, titanium nitride, tungsten nitride, silicide buttons, and nitrogen silicide buttons, or two or more of them. In the composite layer composed of materials. 0632-8948TWF(nl) ; AU91225 ; Phoelip.ptd 第28頁0632-8948TWF (nl); AU91225; Phoelip.ptd p. 28
TW92104562A 2003-03-04 2003-03-04 Metal taper etching structure and the manufacturing method thereof, producing source/drain and gate in thin film transistor array using the same, and the structure thereof TW584914B (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7396708B2 (en) 2006-11-16 2008-07-08 Au Optronics Corporation Etching method for metal layer of display panel

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7396708B2 (en) 2006-11-16 2008-07-08 Au Optronics Corporation Etching method for metal layer of display panel

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