JPH10223561A - Manufacture of semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize a method for manufacturing a semiconductor device with which stabilized electrical characteristics can be obtained. SOLUTION: A semiconductor substrate 101 is covered with a given insulation film to form a polycrystalline silicon film 104 with a given impurities introduced therein. An amorphous titanium/silicide film 105a is then formed on the polycrystalline silicon film 104 by a sputtering method, using a titanium/silicide alloy target. Subsequently, the titanium/silicide film 105a is heat-treated and crystallized, followed by patterning to form an electrode 106.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly, to a semiconductor device using a titanium silicide film for realizing improvement of electrical characteristics of low resistance wiring and electrodes and a method of manufacturing the same. .

[0002]

2. Description of the Related Art Conventionally, an electrode or a wiring has been formed using a titanium silicide film in order to reduce the resistance of the wiring and improve the electrical characteristics of the electrode. A conventional example of a method for manufacturing a semiconductor device will be described with reference to an example in which a gate electrode of a MOS transistor is manufactured.

As shown in FIG. 5A, a silicon substrate 4
A device isolation oxide film 402 having a thickness of 300 nm is formed on the substrate 01 to divide it as an element formation region. A gate oxide film 403 having a thickness of 8 nm is formed. .

Next, as shown in FIG. 5B, a titanium silicide film 405 is formed on the polycrystalline silicon film 404 by a sputtering method using a titanium silicide alloy target.

Then, as shown in FIG. 5C, a gate electrode 406 composed of a titanium silicide film 405 and a polycrystalline silicon film 404 is formed at desired positions by using photolithography and dry etching. .

After the formation of the gate electrode 406, an insulating film is formed, heat treatment for activating the impurity-doped layer in the silicon substrate, and heat treatment for stabilizing the insulating film on the element are performed. All of these heat treatments are performed at a high temperature.

When a titanium polycide electrode is formed by disilicidation from an amorphous film, a silicon-rich silicide film is used to compensate for volume shrinkage, and it is necessary to confirm that the silicide film is agglomerated. Preventing. However, in such a silicon-rich silicide film, the layer resistance fluctuates due to the form of precipitation of excess silicon during crystallization.

When crystallization is performed after the gate electrode is formed as described above, precipitation tends to occur at the electrode end on the underlying polysilicon film, and the precipitate becomes coarse in a later heat treatment step. The silicide film is divided by the coarsened precipitate, and the resistance value increases.

[0009]

In the above-described conventional method for manufacturing a semiconductor device, an insulating film forming step performed after a gate electrode forming step, an activation heat treatment for an impurity-doped layer in a silicon substrate, and a method for forming an insulating film on an element. In a step performed at a high temperature such as a stabilization heat treatment, crystallization occurs in the titanium silicide film that was amorphous before the heat treatment.

When crystallization is performed after the formation of the gate electrode, there is a problem that the resistance of the gate electrode varies because the crystal grain size and the silicon deposition distribution depend on the electrode width. In particular, when the gate electrode is formed thin in order to achieve high integration, the resistance tends to fluctuate, so that stable operation and high yield of the element cannot be obtained. Become.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned problems of the prior art, and has as its object to realize a method of manufacturing a semiconductor device capable of obtaining stable electric characteristics. .

[0012]

A method of manufacturing a semiconductor device according to the present invention comprises a first step of forming a polycrystalline silicon film doped with a predetermined impurity by coating a predetermined insulating film on a semiconductor substrate. And a second step of forming an amorphous titanium silicide film on the polycrystalline silicon film by a sputtering method using a titanium silicide alloy target, and crystallizing the titanium silicide film by heat treatment and patterning the same. And a third step of forming an electrode.

According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, wherein a predetermined insulating film is coated on a semiconductor substrate to form a polycrystalline silicon film doped with a predetermined impurity.
And a second step of forming a crystallized titanium silicide film on the polycrystalline silicon film by sputtering at a substrate temperature of 400 ° C. or more using a titanium silicide alloy target; and A third step of forming an electrode by patterning the titanium silicide film thus formed.

A method of manufacturing a semiconductor device according to still another aspect of the present invention includes a first step of forming a polycrystalline silicon film doped with a predetermined impurity by coating a predetermined insulating film on a semiconductor substrate. A second step of forming a titanium silicide film on the polycrystalline silicon film by a sputtering method at a substrate temperature of 400 ° C. or higher using a titanium silicide alloy target, and patterning the crystallized titanium silicide film to form an electrode. And a third step of further crystallizing the titanium silicide film by another heat treatment.

In any of the above cases, the titanium silicide alloy target may have a composition ratio of silicon to titanium of 2.1 to 2.5.

Further, the composition ratio of silicon and titanium in the titanium silicide film may be 2.1 to 2.5.

[Operation] In the present invention configured as described above, the titanium silicide film is crystallized before the gate electrode is formed. The silicon deposited on the resulting polysilicon film is prevented from becoming coarse, and the resistance value of the titanium silicide film is prevented from increasing.

As a method for crystallizing the titanium silicide film performed before the gate electrode is formed, a rapid thermal process (RTP) is used.
Is mentioned. FIG. 4 is a diagram showing the dependence of the resistance value of TiSi _{2.4 having} an electrode width of 0.3 μm as a gate electrode layer on the thickness of the silicide layer, with and without rapid thermal treatment. In FIG. 4, ○ indicates RT.
When heat treatment was performed at 850 ° C. for 30 minutes without performing P, □ was performed when heat treatment was performed at 900 ° C. for 30 minutes without performing RTP.
When RTP is performed for 0 second and then heat treatment is performed at 850 ° C. for 30 minutes, R is 850 ° C. for 10 seconds.
It shows the layer resistance when TP is performed and then heat treatment is performed at 900 ° C. for 30 minutes.

As is apparent from FIG. 4, by performing crystallization by the rapid heat treatment method, the layer resistance is hardly affected by the subsequent heat treatment.

[0020]

Next, an embodiment of the present invention will be described with reference to the drawings.

Embodiment 1 FIG. 1 is a sectional view showing the structure of an embodiment of the present invention continuously.

As shown in FIG. 1A, a 300 nm-thick element isolation oxide film 10 is formed on a P-type silicon substrate 101.
2, a gate oxide film 103 having a thickness of 8 nm is formed, and a polycrystalline silicon film 1 having a thickness of 50 nm doped with phosphorus is entirely formed.
04 is formed.

Next, the composition ratio of silicon and titanium is 2.1
Sputtering power of 1 to 5 kW, pressure of 1 to 2.5
Under the condition of 20 mTorr, an amorphous titanium silicide film 105a having a thickness of 100 nm is formed on the polycrystalline silicon film 104 as shown in FIG.

Next, a heat treatment is performed for 10 seconds to 2 minutes in a vacuum in a temperature range of 700 ° C. to 900 ° C. or in an inert gas atmosphere using a rapid heat treatment method, as shown in FIG.
As shown in (C), the amorphous titanium silicide film 105a
Undergoes a phase transition to form a crystallized titanium silicide film 105b.

The phase of the crystallized titanium silicide film 105b may be either the C49 phase or the C54 phase. There is no problem even if furnace annealing is used as the heat treatment method. Further, after the heat treatment temperature is divided into two stages to form a C49 phase,
Four phases may be formed.

Subsequently, as shown in FIG. 1D, a gate electrode 106 composed of a titanium silicide film 105b and a polycrystalline silicon film 104 is formed at a desired position by using a photolithography technique and a dry etching technique. .

According to the method of manufacturing a semiconductor device as described above, the silicon deposited on the underlying polysilicon film during the heat treatment performed after the formation of the gate electrode is prevented from becoming coarse. It is possible to form a titanium silicide film having a crystal grain size and a silicon deposition distribution independent of the electrode pattern size. Therefore, since there is almost no structural change in the titanium silicide film in the high-temperature heat treatment step, stable electrical characteristics can be obtained.

Embodiment 2 Next, a second embodiment of the present invention will be described with reference to the drawings.

As shown in FIG. 2A, a 300 nm-thick device isolation oxide film 202 is formed on a P-type silicon substrate 201.
Is formed, a gate oxide film 203 having a thickness of 8 nm is further formed, and a 50 nm polycrystalline silicon film 204 doped with phosphorus is formed on the entire surface.

Next, the composition ratio of silicon and titanium is 2.1
Sputtering power of 1 to 5 kW, pressure of 1 to 2.5
Under a condition of 20 mTorr and a substrate temperature of 400 ° C. to 600 ° C., as shown in FIG.
4, a crystallized titanium silicide film 205 having a C49 phase with a thickness of 100 nm is formed.

Subsequently, as shown in FIG. 2C, a gate electrode 206 composed of a crystallized titanium silicide film 205 and a polycrystalline silicon film 203 is formed at a desired position by using a photolithography technique and a dry etching technique.
To form

According to the method of manufacturing a semiconductor device as described above, the silicon deposited on the underlying polysilicon film during the heat treatment process performed after the formation of the gate electrode is prevented from becoming coarse. It is possible to form a titanium silicide film having a crystal grain size and a silicon deposition distribution independent of the electrode pattern size. Accordingly, since there is almost no structural change of the titanium silicide film in the high temperature process, stable electric characteristics can be obtained.

In this embodiment, since the titanium silicide film is crystallized during the film formation, the process can be simplified as compared with the first embodiment.

Embodiment 3 Next, a third embodiment of the present invention will be described with reference to the drawings.

As shown in FIG. 3A, a 300 nm-thick device isolation oxide film 30 is formed on a P-type silicon substrate 301.
2 to form a gate oxide film 303 having a thickness of 8 nm, and a phosphorus-doped polycrystalline silicon film 304 having a thickness of 50 nm is formed on the entire surface.

Next, the composition ratio of silicon and titanium is 2.1.
Sputtering power of 1 to 5 kW, pressure of 1 to 2.5
Under conditions of 20 mT and a substrate temperature of 400 ° C. to 600 ° C.,
As shown in FIG. 3B, a C49-phase titanium silicide film 305b having a C49 phase with a thickness of 100 nm is formed on the polycrystalline silicon film 304.

Subsequently, as shown in FIG. 3 (C), using a rapid heat treatment method in a temperature range of 700.degree.
By performing a heat treatment for 0 second to 2 minutes, the C49 phase titanium silicide film 305b undergoes a phase transition to a C54 phase titanium silicide film 305c having a C54 phase. in this case,
There is no problem if furnace annealing is used as the heat treatment method.

Further, as shown in FIG. 3D, a C54 phase titanium silicide film 305c is formed at a desired position by using a photolithography technique and a dry etching technique.
And a gate electrode 306 made of a polycrystalline silicon film 304 is formed.

According to the method of manufacturing a semiconductor device as described above, the silicon deposited on the underlying polysilicon film during the heat treatment step performed after the formation of the gate electrode is prevented from becoming coarse. It is possible to form a titanium silicide film having a crystal grain size and a silicon deposition distribution independent of the electrode pattern size. Therefore, since the structural change of the titanium silicide film hardly occurs in the high temperature process, stable electric characteristics can be obtained.

In this embodiment, since the titanium silicide film is crystallized during the film formation, the process can be simplified as compared with the case where the heat treatment temperature is divided into two stages.

[0041]

According to the method of manufacturing a semiconductor device according to the present invention, a titanium silicide film having a film structure independent of the electrode width can be formed. Accordingly, since the structural change in the titanium silicide film high temperature step is sufficiently suppressed, there is an effect that stable electric characteristics can be obtained. Also,
Thus, there is an effect that a high-speed integrated circuit can be realized.

[Brief description of the drawings]

FIGS. 1A to 1D are process vertical sectional views of a first embodiment of the present invention.

FIGS. 2A to 2C are process vertical cross-sectional views of a second embodiment of the present invention.

FIGS. 3A to 3D are process vertical sectional views of a third embodiment of the present invention.

FIG. 4 is a diagram showing a state in which the dependence of the resistance value of a gate electrode layer on the thickness of a silicide film changes due to crystallization.

FIGS. 5A to 5C are vertical cross-sectional views of a process in a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

 101, 201, 301 Silicon substrate 102, 202, 302 Element isolation oxide film 103, 203, 303 Gate oxide film 104, 204, 304 Polycrystalline silicon film 105 Titanium silicide film 105a Amorphous titanium silicide film 105b Crystallized titanium silicide film 205, 305b C49 phase titanium silicide film 305c C54 phase titanium silicide film 106, 206, 306 Gate electrode

Claims (5)

[Claims] A first step of forming a polycrystalline silicon film into which a predetermined impurity is introduced by coating a predetermined insulating film on a semiconductor substrate; and forming a titanium silicide alloy target on the polycrystalline silicon film. A second step of forming an amorphous titanium silicide film by a sputtering method using GaN, and a third step of crystallizing the titanium silicide film by heat treatment and patterning the titanium silicide film to form an electrode. Manufacturing method of a semiconductor device. 2. A first step of forming a polycrystalline silicon film into which a predetermined impurity is introduced by coating a predetermined insulating film on a semiconductor substrate; and forming a titanium silicide alloy target on the polycrystalline silicon film. A second step of forming a crystallized titanium silicide film by sputtering at a substrate temperature of 400 ° C. or more by using GaN, and a third step of patterning the crystallized titanium silicide film to form an electrode A method for manufacturing a semiconductor device, comprising: 3. A first step of forming a polycrystalline silicon film in which a predetermined impurity is introduced by coating a predetermined insulating film on a semiconductor substrate; and forming a titanium silicide alloy target on the polycrystalline silicon film. A second step of forming a titanium silicide film by a sputtering method at a substrate temperature of 400 ° C. or higher, and patterning the crystallized titanium silicide film to form an electrode, and further performing the heat treatment to further form the titanium silicide film. A method for manufacturing a semiconductor device, comprising a third step of crystallizing. 4. The method for manufacturing a semiconductor device according to claim 1, wherein a composition ratio of silicon and titanium of the titanium silicide alloy target is 2.1 to 2.5. Of manufacturing a semiconductor device. 5. The method for manufacturing a semiconductor device according to claim 1, wherein a composition ratio of silicon and titanium in the titanium silicide film is 2.1 to 2.5. Of manufacturing a semiconductor device.