JPH0799169A - Manufacture of silicon carbide electronic device - Google Patents

Manufacture of silicon carbide electronic device

Info

Publication number
JPH0799169A
JPH0799169A JP24076993A JP24076993A JPH0799169A JP H0799169 A JPH0799169 A JP H0799169A JP 24076993 A JP24076993 A JP 24076993A JP 24076993 A JP24076993 A JP 24076993A JP H0799169 A JPH0799169 A JP H0799169A
Authority
JP
Japan
Prior art keywords
heat treatment
silicon carbide
electrode
electronic device
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP24076993A
Other languages
Japanese (ja)
Other versions
JP3079851B2 (en
Inventor
Shinji Ogino
慎次 荻野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP24076993A priority Critical patent/JP3079851B2/en
Publication of JPH0799169A publication Critical patent/JPH0799169A/en
Application granted granted Critical
Publication of JP3079851B2 publication Critical patent/JP3079851B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/0445Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/048Making electrodes
    • H01L21/0485Ohmic electrodes

Abstract

PURPOSE:To conduct a heat treatment at a low temperature and to prevent graphite from being precipitated on the surface of an ohmic electrode by a method wherein a nickel-silicon alloy layer whose nickel composition is at specific atomic % is formed on an n-type silicon carbide substrate, the heat treatment is conducted and the ohmic electrode is formed on the silicon carbide substrate. CONSTITUTION:Ni and Si are sputtered and vapor-deposited simultaneously, by an RF magnetron sputtering method, on the surface of an n-type SiC substrate 1, and an Ni-Si alloy layer 2 is formed in such a way that Ni and Si are set at an atomic ratio of 38:62. As a heat treatment after that, this assembly is annealed in a vacuum of 2X10 Torrs, at 600 deg.C and for 30min, and a current- voltage characteristic without a rectification property is displayed. In addition, when the composition ratio of Ni to Si is changed, a good ohmic property is displayed when the composition of Ni is at an atomic ratio of 33% or higher and 67% or lower. Thereby, an electrode which can be connected easily is obtained without a need for a heat treatment at a high temperature, by a heat treatment at a temperature of 700 deg.C or lower and without precipitating graphite on the face of the electrode.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、新しい半導体材料とし
て炭化けい素 (以下SiCと記す) を用いるSiC電子デバ
イスの製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a SiC electronic device using silicon carbide (hereinafter referred to as SiC) as a new semiconductor material.

【0002】[0002]

【従来の技術】現在Siを用いたパワー・デバイスは高周
波大電力の制御を目的として開発が行われ、各種の構造
的工夫により、高性能化が進められてきた。しかし、こ
れも理論的な限界に近づきつつある。また、パワー・デ
バイスは高温や放射線等の悪環境下における動作を要求
されることが多いが、Siにおいてはこのようなデバイス
は実現できない。このように、より高性能化を達成しよ
うとするためには新しい材料の適用が必要である。以上
の要求に対してSiCは6H型で2.93evの広い禁制帯幅を
持つため、高温での電気伝導制御や耐放射線性に優れ、
Siより約1桁高い絶縁破壊電界は高耐圧デバイスへの適
用を可能とし、さらにSiの約2倍の電子の飽和ドリフト
速度は高周波大電力制御を可能とするので、SiCは高周
波大電力制御に期待できる半導体材料である。
2. Description of the Related Art Currently, a power device using Si has been developed for the purpose of controlling high frequency and high power, and has been improved in performance by various structural measures. But this too is approaching the theoretical limit. In addition, power devices are often required to operate in adverse environments such as high temperatures and radiation, but such devices cannot be realized in Si. In this way, it is necessary to apply new materials in order to achieve higher performance. In response to the above requirements, since SiC is a 6H type and has a wide band gap of 2.93 ev, it has excellent electrical conduction control at high temperatures and radiation resistance,
The breakdown electric field, which is about one digit higher than Si, can be applied to high breakdown voltage devices, and the saturation drift velocity of electrons, which is about twice that of Si, enables high frequency and high power control, so SiC is suitable for high frequency and high power control. It is a promising semiconductor material.

【0003】[0003]

【発明が解決しようとする課題】以上のようなSiCの優
れた材料特性をパワー・デバイスに応用しようとする
際、n形SiC上へのオーム性電極材料としてNiが使われ
ている。しかしながら、真空蒸着法等でNiをn形SiC上
に堆積しただけでは金属と半導体の界面にショットキー
障壁が形成され整流性を示し、オーム性を示さない。熱
処理を施してNiのSiC中への拡散とSiC中のSiのNi中へ
の拡散を促すことによって、はじめてオーム性電極を得
ることができる。しかしながら、このためには1000℃以
上の高温で熱処理を行わなければならない欠点があっ
た。また、熱処理中に、NiとSiC中のSiは相互に拡散し
てけい化ニッケルを形成するが、SiC中のCはNi電極の
表面に拡散してグラファイトとして析出してしまう。こ
のグラファイトが電極への導体の接続に支障となる欠点
があった。
Ni is used as an ohmic electrode material on n-type SiC when applying the excellent material properties of SiC as described above to a power device. However, only by depositing Ni on n-type SiC by a vacuum vapor deposition method or the like, a Schottky barrier is formed at the interface between the metal and the semiconductor, and rectifying property is exhibited, and ohmic property is not exhibited. An ohmic electrode can be obtained for the first time by applying a heat treatment to promote the diffusion of Ni into SiC and the diffusion of Si in SiC into Ni. However, this has a drawback that the heat treatment must be performed at a high temperature of 1000 ° C. or higher. Further, during the heat treatment, Ni and Si in SiC diffuse into each other to form nickel silicide, but C in SiC diffuses on the surface of the Ni electrode and precipitates as graphite. This graphite has a drawback that it hinders the connection of the conductor to the electrode.

【0004】本発明の目的は、上述の欠点を除去するた
め、n形SiCの上にNiによりオーム性電極を形成するた
めの熱処理が低温で行うことができ、また電極表面にグ
ラファイトの析出のないSiC電子デバイスの製造方法を
提供することにある。
The object of the present invention is to eliminate the above-mentioned drawbacks, the heat treatment for forming an ohmic electrode with Ni on n-type SiC can be carried out at low temperature, and the precipitation of graphite on the electrode surface can be prevented. It is to provide a manufacturing method of a non-SiC electronic device.

【0005】[0005]

【課題を解決するための手段】上記の目的を達成するた
めに、本発明のSiC電子デバイスの製造方法は、n形Si
C基体上にNi組成が33〜67原子%のNi−Si合金層を形成
後、熱処理を施してSiC基体上にオーム性電極を形成す
るものとする。そのようなNi−Si合金層をNiとSiと同時
に蒸着することにより形成することが良い方法である。
別の本発明のSiC電子デバイスの製造方法は、n形SiC
基体上に順にSi層およびNi層を積層し、積層体中にNiが
33〜67原子%で存在するようにしたのち、熱処理を施し
てSiC基体上にオーム性電極を形成するものとする。そ
のような積層体のSi層およびNi層をそれぞれ蒸着により
形成することが良い方法である。いずれの方法において
も熱処理の温度が700 ℃以下であることが目的に叶って
いる。
In order to achieve the above object, a method for manufacturing a SiC electronic device according to the present invention is an n-type Si device.
After forming a Ni-Si alloy layer having a Ni composition of 33 to 67 atomic% on a C substrate, heat treatment is performed to form an ohmic electrode on the SiC substrate. It is a good method to form such a Ni-Si alloy layer by vapor deposition simultaneously with Ni and Si.
Another method of manufacturing a SiC electronic device of the present invention is an n-type SiC
A Si layer and a Ni layer are laminated in this order on the substrate, and Ni is
After being made to exist at 33 to 67 atomic%, heat treatment is performed to form an ohmic electrode on the SiC substrate. It is a good method to form each of the Si layer and the Ni layer of such a laminated body by vapor deposition. In either method, the purpose is that the heat treatment temperature is 700 ° C or lower.

【0006】[0006]

【作用】SiC基体の上にNi−Si合金層、あるいはSi、Ni
積層体を形成しておくと、SiC基体からのSiの供給なし
にNiSi2 ( Ni33原子%、Si67原子%) が形成でき、SiC
基体に対してオーム性接触をする電極が得られる。いず
れの場合も、Niが原子比で33%以下ではSiが余剰となり
伝導性を阻害し、67%以上あるとNiSi2 とSiCとの界面
に余剰のNiが存在し、不連続な界面となってしまう。Ni
およびSiからのNiSi2 の形成には、1000℃以上の高温を
必要とせず、700 ℃以下の低温で十分である。また、Si
をSiCから供給するのでないため、余剰になったCがNi
中に拡散して電極の表面にグラファイトとして析出する
現象も生じない。
[Function] Ni-Si alloy layer or Si, Ni on SiC substrate
If a laminated body is formed, NiSi 2 (Ni 33 at%, Si 67 at%) can be formed without supplying Si from the SiC substrate.
An electrode is obtained which makes ohmic contact with the substrate. In any case, if the atomic ratio of Ni is 33% or less, Si is excessive and inhibits conductivity, and if it is 67% or more, excessive Ni is present at the interface between NiSi 2 and SiC, resulting in a discontinuous interface. Will end up. Ni
The formation of NiSi 2 from Si does not require a high temperature of 1000 ° C. or higher, and a low temperature of 700 ° C. or lower is sufficient. Also, Si
Is not supplied from SiC, the surplus C is Ni
There is no phenomenon of diffusion into the electrode and precipitation of graphite on the surface of the electrode.

【0007】[0007]

【実施例】以下、図を引用して本発明の実施例について
説明する。図1に電極部を示した一実施例の電子デバイ
スでは、n形SiC基板1の表面にRFマグネトロン・ス
パッタ法により、NiとSiを同時にスパッタ蒸着をし、Ni
とSiは原子比で38:62になるようにNi−Si合金層2を形
成した。この後の熱処理として、2×10-6Torrの真空中
600 ℃で30分間アニールしたところ、図3の線11に示す
ように整流性のない電流−電圧特性を示した。比較のた
めに従来方法でNi電極をスパッタ蒸着で形成し、1200℃
で10分間アニールして電流−電圧特性を測定したところ
図3の線13に示すように整流性を示さなかったものの、
線11の本発明の実施例の方が抵抗が低く、電流が流れや
すいことが分かった。さらにNiとSiの組成比を変えて、
実験したところ、Niの組成が原子比で33%以上でかつ67
%以下のときに良好なオーム性を示した。
Embodiments of the present invention will be described below with reference to the drawings. In the electronic device of one embodiment whose electrode portion is shown in FIG. 1, Ni and Si are simultaneously sputter-deposited on the surface of the n-type SiC substrate 1 by the RF magnetron sputtering method.
And Si formed the Ni-Si alloy layer 2 so that the atomic ratio was 38:62. As a heat treatment after this, in a vacuum of 2 × 10 -6 Torr
When annealed at 600 ° C. for 30 minutes, a current-voltage characteristic having no rectifying property was exhibited as shown by the line 11 in FIG. For comparison, Ni electrode was formed by sputter deposition by the conventional method, and 1200 ℃
When the current-voltage characteristic was measured by annealing for 10 minutes at 10 ° C., it did not show rectifying property as shown by the line 13 in FIG.
It was found that the line 11 of the embodiment of the present invention had a lower resistance and a current flowed more easily. Furthermore, changing the composition ratio of Ni and Si,
Experiments showed that the composition of Ni was 33% or more in atomic ratio and 67
When it was less than%, good ohmic property was exhibited.

【0008】図2に電極部を示した別の実施例の電子デ
バイスでは、n形SiC基板1の表面にRFマグネトロン
・スパッタ法により、Si層3をスパッタ蒸着をし、次い
でNi層4をスパッタ蒸着をした。この時、NiとSiの組成
比が原子比で40:70になるようにSi層3とNi層4を形成
した。このあとの熱処理として、2×10-6Torrの真空中
600 ℃で30分間アニールしたところ、図3の線12に示す
ように整流性のない電流−電圧特性を示すとともに、従
来法の電極よりも抵抗が低く良好なオーム性電極を得る
ことができた。Ni層4とSi層3の厚さの比で2.2 :8よ
りもNiの比率が低くなると良好なオーム性を示さなかっ
た。この比率よりもNi層が薄くなると、熱処理でNiがSi
中でNiSi2 を形成しながら拡散していくので、NiがSiC
表面に到達することができないためと考えられる。
In an electronic device of another embodiment having an electrode portion shown in FIG. 2, the Si layer 3 is sputter-deposited on the surface of the n-type SiC substrate 1 by the RF magnetron sputtering method, and then the Ni layer 4 is sputtered. It was vapor-deposited. At this time, the Si layer 3 and the Ni layer 4 were formed so that the composition ratio of Ni and Si was 40:70 in atomic ratio. For subsequent heat treatment, in a vacuum of 2 × 10 -6 Torr
When annealed at 600 ° C. for 30 minutes, as shown by the line 12 in FIG. 3, a current-voltage characteristic having no rectifying property was shown, and a resistance lower than that of the conventional electrode and a good ohmic electrode could be obtained. . When the ratio of the thickness of the Ni layer 4 to the thickness of the Si layer 3 was lower than 2.2: 8, the good ohmic property was not exhibited. If the Ni layer becomes thinner than this ratio, Ni will become Si by heat treatment.
Ni diffuses while forming NiSi 2 ,
This is probably because the surface cannot be reached.

【0009】また、これらの実施例の表面をしらべたと
ころグラファイトの析出がなく、従来方法に比べ、導線
のボンディング加工が実施しやすくなった。
Further, when the surfaces of these examples were examined, there was no precipitation of graphite, and it was easier to carry out the bonding process of the conductor wire as compared with the conventional method.

【0010】[0010]

【発明の効果】本発明によれば、n形SiC基体上のオー
ム性電極を、Ni−Si合金からあるいはNi−Si積層体から
形成することにより、純Ni電極の場合のように1000℃以
上の高温の熱処理を必要とせず、700 ℃以下の低温の熱
処理ですむようになった。また、電極面へのグラファイ
トの析出もなくなり、接続の容易な電極が得られるの
で、SiC電子デバイスの製造に与える効果は極めて大き
い。
According to the present invention, by forming an ohmic electrode on an n-type SiC substrate from a Ni-Si alloy or a Ni-Si laminated body, the temperature is 1000 ° C or higher as in the case of a pure Ni electrode. No need for high temperature heat treatment, and only low temperature heat treatment of 700 ℃ or less is required. Further, since graphite is not deposited on the electrode surface and an electrode which can be easily connected is obtained, the effect on the manufacture of the SiC electronic device is extremely large.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例のSiC電子デバイスの電極部
を示す断面図
FIG. 1 is a cross-sectional view showing an electrode portion of a SiC electronic device according to an embodiment of the present invention.

【図2】本発明の別の実施例のSiC電子デバイスの電極
部を示す断面図
FIG. 2 is a cross-sectional view showing an electrode portion of a SiC electronic device according to another embodiment of the present invention.

【図3】本発明の実施例および従来例のn形SiC基板用
電極の電流−電圧特性線図
FIG. 3 is a current-voltage characteristic diagram of an n-type SiC substrate electrode according to an embodiment of the present invention and a conventional example.

【符号の説明】[Explanation of symbols]

1 n形SiC基板 2 Ni−Si合金層 3 Si層 4 Ni層 1 n-type SiC substrate 2 Ni-Si alloy layer 3 Si layer 4 Ni layer

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】n形炭化けい素基体上にニッケル組成が33
〜67原子%のニッケル・けい素合金層を形成後、熱処理
を施して炭化けい素基体上にオーム性電極を形成するこ
とを特徴とする炭化けい素電子デバイスの製造方法。
1. A nickel composition of 33 on an n-type silicon carbide substrate.
A method for manufacturing a silicon carbide electronic device, comprising forming a nickel-silicon alloy layer of about 67 atomic% and then performing heat treatment to form an ohmic electrode on a silicon carbide substrate.
【請求項2】ニッケル・けい素合金層をニッケルとけい
素とを同時に蒸着することにより形成する請求項1記載
の炭化けい素電子デバイスの製造方法。
2. The method for manufacturing a silicon carbide electronic device according to claim 1, wherein the nickel-silicon alloy layer is formed by simultaneously vapor-depositing nickel and silicon.
【請求項3】n形炭化けい素基体上に順にけい素層およ
びニッケル層を積層し、積層体中にNiが33〜67原子%で
存在するようにしたのち、熱処理を施して炭化けい素基
体上にオーム性電極を形成することを特徴とする炭化け
い素電子デバイスの製造方法。
3. A silicon layer and a nickel layer are laminated in this order on an n-type silicon carbide substrate so that Ni is present in the laminate at 33 to 67 atomic%, and then heat treated to give silicon carbide. A method of manufacturing a silicon carbide electronic device, comprising forming an ohmic electrode on a substrate.
【請求項4】積層体のけい素層およびニッケル層をそれ
ぞれ蒸着により形成する請求項3記載の炭化けい素電子
デバイスの製造方法。
4. The method for manufacturing a silicon carbide electronic device according to claim 3, wherein the silicon layer and the nickel layer of the laminate are each formed by vapor deposition.
【請求項5】熱処理の温度が700 ℃以下である請求項1
ないし4のいずれかに記載の炭化けい素電子デバイスの
製造方法。
5. The heat treatment temperature is 700 ° C. or lower.
5. A method for manufacturing a silicon carbide electronic device according to any one of 1 to 4.
JP24076993A 1993-09-28 1993-09-28 Method for manufacturing silicon carbide electronic device Expired - Lifetime JP3079851B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24076993A JP3079851B2 (en) 1993-09-28 1993-09-28 Method for manufacturing silicon carbide electronic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24076993A JP3079851B2 (en) 1993-09-28 1993-09-28 Method for manufacturing silicon carbide electronic device

Publications (2)

Publication Number Publication Date
JPH0799169A true JPH0799169A (en) 1995-04-11
JP3079851B2 JP3079851B2 (en) 2000-08-21

Family

ID=17064443

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24076993A Expired - Lifetime JP3079851B2 (en) 1993-09-28 1993-09-28 Method for manufacturing silicon carbide electronic device

Country Status (1)

Country Link
JP (1) JP3079851B2 (en)

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008506258A (en) * 2004-07-06 2008-02-28 クリー インコーポレイテッド Silicon-rich nickel-silicon compound ohmic contacts for SIC semiconductor devices
JP2009010098A (en) * 2007-06-27 2009-01-15 Nissan Motor Co Ltd Semiconductor device and manufacturing method therefor
JP2010016102A (en) * 2008-07-02 2010-01-21 Fuji Electric Device Technology Co Ltd Method for manufacturing silicon carbide semiconductor device
JP2010086999A (en) * 2008-09-29 2010-04-15 Sumitomo Electric Ind Ltd Back electrode for semiconductor device, semiconductor device, and manufacturing method of back electrode for semiconductor device
US8076736B2 (en) 2007-02-14 2011-12-13 Panasonic Corporation Semiconductor device and method for manufacturing the same
WO2012060222A1 (en) 2010-11-01 2012-05-10 住友電気工業株式会社 Semiconductor device and manufacturing method therefor
CN102884621A (en) * 2010-02-11 2013-01-16 克里公司 Methods of forming contact structures including alternating metal and silicon layers and related devices
CN103058193A (en) * 2013-01-25 2013-04-24 哈尔滨工业大学 Method for preparing silicon carbide nanowire by adopting metallic nickel or amorphous carbon lamination
US8674374B2 (en) 2010-04-14 2014-03-18 Sumitomo Electric Industries, Ltd. Silicon carbide semiconductor device and method for manufacturing same
US8866156B2 (en) 2012-06-21 2014-10-21 Sumitomo Electric Industries, Ltd. Silicon carbide semiconductor device and method for manufacturing same
JP2016046309A (en) * 2014-08-20 2016-04-04 住友電気工業株式会社 Silicon carbide semiconductor device manufacturing method
US9978598B2 (en) 2016-03-16 2018-05-22 Fuji Electric Co., Ltd. Silicon carbide semiconductor device and method of manufacturing silicon carbide semiconductor device
DE102022100072A1 (en) 2022-01-03 2023-07-06 Infineon Technologies Ag METHOD OF MAKING A METAL SILICIDE LAYER ABOVE A SILICON CARBIDE SUBSTRATE AND SEMICONDUCTOR DEVICE INCLUDING A METAL SILICIDE LAYER

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4291875B2 (en) 2007-07-20 2009-07-08 パナソニック株式会社 Silicon carbide semiconductor device and manufacturing method thereof

Cited By (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101144882B1 (en) * 2004-07-06 2012-05-14 크리 인코포레이티드 Silicon-rich nickel-silicide ohmic contacts for sic semiconductor devices
US7875545B2 (en) 2004-07-06 2011-01-25 Cree, Inc. Silicon-rich nickel-silicide ohmic contacts for SiC semiconductor devices
JP2008506258A (en) * 2004-07-06 2008-02-28 クリー インコーポレイテッド Silicon-rich nickel-silicon compound ohmic contacts for SIC semiconductor devices
US8076736B2 (en) 2007-02-14 2011-12-13 Panasonic Corporation Semiconductor device and method for manufacturing the same
JP2009010098A (en) * 2007-06-27 2009-01-15 Nissan Motor Co Ltd Semiconductor device and manufacturing method therefor
JP2010016102A (en) * 2008-07-02 2010-01-21 Fuji Electric Device Technology Co Ltd Method for manufacturing silicon carbide semiconductor device
JP2010086999A (en) * 2008-09-29 2010-04-15 Sumitomo Electric Ind Ltd Back electrode for semiconductor device, semiconductor device, and manufacturing method of back electrode for semiconductor device
CN102884621A (en) * 2010-02-11 2013-01-16 克里公司 Methods of forming contact structures including alternating metal and silicon layers and related devices
JP2013520014A (en) * 2010-02-11 2013-05-30 クリー インコーポレイテッド Contact structure comprising alternating layers of metal and silicon and method of forming related devices
US9129804B2 (en) 2010-04-14 2015-09-08 Sumitomo Electric Industries, Ltd. Silicon carbide semiconductor device and method for manufacturing same
US8674374B2 (en) 2010-04-14 2014-03-18 Sumitomo Electric Industries, Ltd. Silicon carbide semiconductor device and method for manufacturing same
CN102804342A (en) * 2010-11-01 2012-11-28 住友电气工业株式会社 Semiconductor device and manufacturing method therefor
WO2012060222A1 (en) 2010-11-01 2012-05-10 住友電気工業株式会社 Semiconductor device and manufacturing method therefor
US8823017B2 (en) 2010-11-01 2014-09-02 Sumitomo Electric Industries, Ltd. Semiconductor device and method of manufacturing the same
US8866156B2 (en) 2012-06-21 2014-10-21 Sumitomo Electric Industries, Ltd. Silicon carbide semiconductor device and method for manufacturing same
CN103058193A (en) * 2013-01-25 2013-04-24 哈尔滨工业大学 Method for preparing silicon carbide nanowire by adopting metallic nickel or amorphous carbon lamination
CN103058193B (en) * 2013-01-25 2015-03-04 哈尔滨工业大学 Method for preparing silicon carbide nanowire by adopting metallic nickel or amorphous carbon lamination
JP2016046309A (en) * 2014-08-20 2016-04-04 住友電気工業株式会社 Silicon carbide semiconductor device manufacturing method
US9978598B2 (en) 2016-03-16 2018-05-22 Fuji Electric Co., Ltd. Silicon carbide semiconductor device and method of manufacturing silicon carbide semiconductor device
DE102022100072A1 (en) 2022-01-03 2023-07-06 Infineon Technologies Ag METHOD OF MAKING A METAL SILICIDE LAYER ABOVE A SILICON CARBIDE SUBSTRATE AND SEMICONDUCTOR DEVICE INCLUDING A METAL SILICIDE LAYER

Also Published As

Publication number Publication date
JP3079851B2 (en) 2000-08-21

Similar Documents

Publication Publication Date Title
JP2509713B2 (en) Silicon carbide semiconductor device and manufacturing method thereof
JP3079851B2 (en) Method for manufacturing silicon carbide electronic device
CN102163627B (en) Sic semiconductor device having schottky barrier diode and method for manufacturing the same
US5877077A (en) Method of producing an ohmic contact and a semiconductor device provided with such ohmic contact
JPS58115855A (en) Semiconductor device and method of producing same
US4141020A (en) Intermetallic aluminum-transition metal compound Schottky contact
JPH0582991B2 (en)
TW201137989A (en) Semiconductor device and method for manufacturing the same
JP3085078B2 (en) Method for manufacturing silicon carbide electronic device
JP2018125520A (en) Forming metal contact layer on silicon carbide and semiconductor device with metal contact structure
EP0642169B1 (en) Ohmic electrode and method for forming it
CN115602721B (en) Method and assembly for reducing contact resistance
US4954852A (en) Sputtered metallic silicide gate for GaAs integrated circuits
CN209766431U (en) MPS diode device
JPH0864801A (en) Silicon carbide semiconductor element and its manufacture
JP6808952B2 (en) Manufacturing method of silicon carbide semiconductor device
JP3186053B2 (en) Method for forming metal wiring structure of semiconductor integrated circuit device
JPH0147012B2 (en)
JP2000106350A (en) Manufacture of ohmic electrode and semiconductor element
JPS6015970A (en) Semiconductor device
JPS61183961A (en) Manufacture of electrode
JPS6018138B2 (en) Method for forming metal electrodes on semiconductor substrates
JP3150469B2 (en) Semiconductor device
CN116092923A (en) Carbon film-based silicon carbide ohmic contact structure and preparation method thereof
JPH02114641A (en) Manufacture of semiconductor device

Legal Events

Date Code Title Description
R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

FPAY Renewal fee payment (prs date is renewal date of database)

Year of fee payment: 8

Free format text: PAYMENT UNTIL: 20080623

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313113

S533 Written request for registration of change of name

Free format text: JAPANESE INTERMEDIATE CODE: R313533

FPAY Renewal fee payment (prs date is renewal date of database)

Year of fee payment: 8

Free format text: PAYMENT UNTIL: 20080623

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (prs date is renewal date of database)

Year of fee payment: 8

Free format text: PAYMENT UNTIL: 20080623

FPAY Renewal fee payment (prs date is renewal date of database)

Year of fee payment: 9

Free format text: PAYMENT UNTIL: 20090623

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100623

Year of fee payment: 10

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100623

Year of fee payment: 10

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313111

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100623

Year of fee payment: 10

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (prs date is renewal date of database)

Year of fee payment: 10

Free format text: PAYMENT UNTIL: 20100623

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110623

Year of fee payment: 11

FPAY Renewal fee payment (prs date is renewal date of database)

Year of fee payment: 11

Free format text: PAYMENT UNTIL: 20110623

S111 Request for change of ownership or part of ownership

Free format text: JAPANESE INTERMEDIATE CODE: R313111

R350 Written notification of registration of transfer

Free format text: JAPANESE INTERMEDIATE CODE: R350

FPAY Renewal fee payment (prs date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120623

Year of fee payment: 12

FPAY Renewal fee payment (prs date is renewal date of database)

Year of fee payment: 13

Free format text: PAYMENT UNTIL: 20130623

R250 Receipt of annual fees

Free format text: JAPANESE INTERMEDIATE CODE: R250

EXPY Cancellation because of completion of term