JP3079851B2 - Method for manufacturing silicon carbide electronic device - Google Patents
Method for manufacturing silicon carbide electronic deviceInfo
- Publication number
- JP3079851B2 JP3079851B2 JP24076993A JP24076993A JP3079851B2 JP 3079851 B2 JP3079851 B2 JP 3079851B2 JP 24076993 A JP24076993 A JP 24076993A JP 24076993 A JP24076993 A JP 24076993A JP 3079851 B2 JP3079851 B2 JP 3079851B2
- Authority
- JP
- Japan
- Prior art keywords
- heat treatment
- silicon carbide
- electrode
- electronic device
- nickel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims abstract description 43
- 229910010271 silicon carbide Inorganic materials 0.000 title claims abstract description 43
- 238000000034 method Methods 0.000 title claims abstract description 15
- 238000004519 manufacturing process Methods 0.000 title claims description 11
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims abstract description 47
- 238000010438 heat treatment Methods 0.000 claims abstract description 19
- 239000000758 substrate Substances 0.000 claims abstract description 19
- 229910052759 nickel Inorganic materials 0.000 claims abstract description 14
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 12
- 229910021484 silicon-nickel alloy Inorganic materials 0.000 claims abstract description 10
- 239000000203 mixture Substances 0.000 claims abstract description 8
- 238000000151 deposition Methods 0.000 claims description 5
- 238000007740 vapor deposition Methods 0.000 claims description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 2
- 239000010703 silicon Substances 0.000 claims 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 abstract description 8
- 229910002804 graphite Inorganic materials 0.000 abstract description 8
- 239000010439 graphite Substances 0.000 abstract description 8
- 238000001755 magnetron sputter deposition Methods 0.000 abstract description 3
- 230000001376 precipitating effect Effects 0.000 abstract 1
- 229910005881 NiSi 2 Inorganic materials 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 238000000137 annealing Methods 0.000 description 3
- 239000004065 semiconductor Substances 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 238000009792 diffusion process Methods 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 229910018098 Ni-Si Inorganic materials 0.000 description 1
- 229910018529 Ni—Si Inorganic materials 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 239000007772 electrode material Substances 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 229910003465 moissanite Inorganic materials 0.000 description 1
- 229910021334 nickel silicide Inorganic materials 0.000 description 1
- RUFLMLWJRZAWLJ-UHFFFAOYSA-N nickel silicide Chemical compound [Ni]=[Si]=[Ni] RUFLMLWJRZAWLJ-UHFFFAOYSA-N 0.000 description 1
- 239000002244 precipitate Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 238000001771 vacuum deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
- H01L21/048—Making electrodes
- H01L21/0485—Ohmic electrodes
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、新しい半導体材料とし
て炭化けい素 (以下SiＣと記す) を用いるSiＣ電子デバ
イスの製造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a SiC electronic device using silicon carbide (hereinafter referred to as SiC) as a new semiconductor material.
【０００２】[0002]
【従来の技術】現在Siを用いたパワー・デバイスは高周
波大電力の制御を目的として開発が行われ、各種の構造
的工夫により、高性能化が進められてきた。しかし、こ
れも理論的な限界に近づきつつある。また、パワー・デ
バイスは高温や放射線等の悪環境下における動作を要求
されることが多いが、Siにおいてはこのようなデバイス
は実現できない。このように、より高性能化を達成しよ
うとするためには新しい材料の適用が必要である。以上
の要求に対してSiＣは６Ｈ型で2.93evの広い禁制帯幅を
持つため、高温での電気伝導制御や耐放射線性に優れ、
Siより約１桁高い絶縁破壊電界は高耐圧デバイスへの適
用を可能とし、さらにSiの約２倍の電子の飽和ドリフト
速度は高周波大電力制御を可能とするので、SiＣは高周
波大電力制御に期待できる半導体材料である。2. Description of the Related Art At present, power devices using Si are developed for the purpose of controlling high frequency and high power, and high performance has been promoted by various structural measures. But this is also approaching its theoretical limits. In addition, power devices are often required to operate under adverse environments such as high temperature and radiation, but such devices cannot be realized with Si. Thus, in order to achieve higher performance, it is necessary to apply a new material. In response to the above requirements, since SiC has a wide band gap of 2.93 ev in the 6H type, it has excellent electric conduction control and radiation resistance at high temperatures,
The dielectric breakdown electric field, which is about one digit higher than Si, can be applied to high voltage devices, and the saturation drift speed of electrons, which is about twice that of Si, enables high-frequency, high-power control. It is a promising semiconductor material.
【０００３】[0003]
【発明が解決しようとする課題】以上のようなSiＣの優
れた材料特性をパワー・デバイスに応用しようとする
際、ｎ形SiＣ上へのオーム性電極材料としてNiが使われ
ている。しかしながら、真空蒸着法等でNiをｎ形SiＣ上
に堆積しただけでは金属と半導体の界面にショットキー
障壁が形成され整流性を示し、オーム性を示さない。熱
処理を施してNiのSiＣ中への拡散とSiＣ中のSiのNi中へ
の拡散を促すことによって、はじめてオーム性電極を得
ることができる。しかしながら、このためには1000℃以
上の高温で熱処理を行わなければならない欠点があっ
た。また、熱処理中に、NiとSiＣ中のSiは相互に拡散し
てけい化ニッケルを形成するが、SiＣ中のＣはNi電極の
表面に拡散してグラファイトとして析出してしまう。こ
のグラファイトが電極への導体の接続に支障となる欠点
があった。In applying the above excellent material characteristics of SiC to a power device, Ni is used as an ohmic electrode material on n-type SiC. However, simply depositing Ni on n-type SiC by a vacuum deposition method or the like forms a Schottky barrier at the interface between the metal and the semiconductor, and exhibits rectifying properties and does not exhibit ohmic properties. An ohmic electrode can be obtained for the first time by performing heat treatment to promote the diffusion of Ni into SiC and the diffusion of Si in SiC into Ni. However, this has a disadvantage that heat treatment must be performed at a high temperature of 1000 ° C. or higher. Further, during the heat treatment, Ni and Si in SiC diffuse into each other to form nickel silicide, but C in SiC diffuses to the surface of the Ni electrode and precipitates as graphite. There was a disadvantage that the graphite hindered the connection of the conductor to the electrode.
【０００４】本発明の目的は、上述の欠点を除去するた
め、ｎ形SiＣの上にNiによりオーム性電極を形成するた
めの熱処理が低温で行うことができ、また電極表面にグ
ラファイトの析出のないSiＣ電子デバイスの製造方法を
提供することにある。An object of the present invention is to eliminate the above-mentioned drawbacks, so that a heat treatment for forming an ohmic electrode made of Ni on n-type SiC can be carried out at a low temperature, and the deposition of graphite on the electrode surface can be prevented. The object of the present invention is to provide a method for manufacturing a SiC electronic device.
【０００５】[0005]
【課題を解決するための手段】上記の目的を達成するた
めに、本発明のSiＣ電子デバイスの製造方法は、ｎ形Si
Ｃ基体上にNi組成が33〜67原子％のNi−Si合金層を形成
後、熱処理を施してSiＣ基体上にオーム性電極を形成す
るものとする。そのようなNi−Si合金層をNiとSiと同時
に蒸着することにより形成することが良い方法である。
別の本発明のSiＣ電子デバイスの製造方法は、ｎ形SiＣ
基体上に順にSi層およびNi層を積層し、積層体中にNiが
33〜67原子％で存在するようにしたのち、熱処理を施し
てSiＣ基体上にオーム性電極を形成するものとする。そ
のような積層体のSi層およびNi層をそれぞれ蒸着により
形成することが良い方法である。いずれの方法において
も熱処理の温度が700 ℃以下であることが目的に叶って
いる。In order to achieve the above object, a method for manufacturing a SiC electronic device according to the present invention comprises the steps of:
After forming a Ni-Si alloy layer having a Ni composition of 33 to 67 atomic% on a C substrate, heat treatment is performed to form an ohmic electrode on the SiC substrate. It is a good method to form such a Ni-Si alloy layer by vapor deposition simultaneously with Ni and Si.
Another method for manufacturing a SiC electronic device according to the present invention comprises an n-type SiC
A Si layer and a Ni layer are sequentially laminated on the substrate, and Ni is contained in the laminate.
After being present at 33 to 67 atomic%, heat treatment is performed to form an ohmic electrode on the SiC substrate. It is a good method to form each of the Si layer and the Ni layer of such a laminate by vapor deposition. In any case, the purpose is that the heat treatment temperature is 700 ° C. or lower.
【０００６】[0006]
【作用】SiＣ基体の上にNi−Si合金層、あるいはSi、Ni
積層体を形成しておくと、SiＣ基体からのSiの供給なし
にNiSi2 ( Ni33原子％、Si67原子％) が形成でき、SiＣ
基体に対してオーム性接触をする電極が得られる。いず
れの場合も、Niが原子比で33％以下ではSiが余剰となり
伝導性を阻害し、67％以上あるとNiSi2 とSiＣとの界面
に余剰のNiが存在し、不連続な界面となってしまう。Ni
およびSiからのNiSi2 の形成には、1000℃以上の高温を
必要とせず、700 ℃以下の低温で十分である。また、Si
をSiＣから供給するのでないため、余剰になったＣがNi
中に拡散して電極の表面にグラファイトとして析出する
現象も生じない。[Function] Ni-Si alloy layer on SiC substrate, or Si, Ni
By forming a laminate, NiSi 2 (33 atomic% of Ni, 67 atomic% of Si) can be formed without supplying Si from the SiC substrate.
An electrode is obtained that makes ohmic contact with the substrate. In either case, Ni is Si inhibits conductivity becomes surplus at 33% or less in atomic ratio, excess Ni is present at the interface between the NiSi 2 and SiC when more than 67%, a discontinuous interface Would. Ni
The formation of NiSi 2 from Si and Si does not require a high temperature of 1000 ° C. or higher, and a low temperature of 700 ° C. or lower is sufficient. Also, Si
Is not supplied from SiC, so surplus C becomes Ni
There is also no phenomenon of diffusing into and depositing as graphite on the surface of the electrode.
【０００７】[0007]
【実施例】以下、図を引用して本発明の実施例について
説明する。図１に電極部を示した一実施例の電子デバイ
スでは、ｎ形SiＣ基板１の表面にＲＦマグネトロン・ス
パッタ法により、NiとSiを同時にスパッタ蒸着をし、Ni
とSiは原子比で38：62になるようにNi−Si合金層２を形
成した。この後の熱処理として、２×10-6Torrの真空中
600 ℃で30分間アニールしたところ、図３の線11に示す
ように整流性のない電流−電圧特性を示した。比較のた
めに従来方法でNi電極をスパッタ蒸着で形成し、1200℃
で10分間アニールして電流−電圧特性を測定したところ
図３の線13に示すように整流性を示さなかったものの、
線11の本発明の実施例の方が抵抗が低く、電流が流れや
すいことが分かった。さらにNiとSiの組成比を変えて、
実験したところ、Niの組成が原子比で33％以上でかつ67
％以下のときに良好なオーム性を示した。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. In an electronic device according to an embodiment having an electrode portion shown in FIG. 1, Ni and Si are simultaneously sputter-deposited on the surface of an n-type SiC substrate 1 by RF magnetron sputtering.
And Si formed the Ni—Si alloy layer 2 in an atomic ratio of 38:62. As a heat treatment after this, in a vacuum of 2 × 10 −6 Torr
Annealing at 600 ° C. for 30 minutes showed current-voltage characteristics without rectification as shown by line 11 in FIG. For comparison, a Ni electrode was formed by sputtering using the conventional method and
When the current-voltage characteristics were measured by annealing for 10 minutes, the rectification did not show as shown by the line 13 in FIG.
It has been found that the embodiment of the present invention of line 11 has a lower resistance and allows a current to flow easily. Furthermore, by changing the composition ratio of Ni and Si,
According to experiments, the composition of Ni was 33% or more in atomic ratio and 67%.
%, Good ohmic properties were exhibited.
【０００８】図２に電極部を示した別の実施例の電子デ
バイスでは、ｎ形SiＣ基板１の表面にＲＦマグネトロン
・スパッタ法により、Si層３をスパッタ蒸着をし、次い
でNi層４をスパッタ蒸着をした。この時、NiとSiの組成
比が原子比で40：70になるようにSi層３とNi層４を形成
した。このあとの熱処理として、２×10-6Torrの真空中
600 ℃で30分間アニールしたところ、図３の線12に示す
ように整流性のない電流−電圧特性を示すとともに、従
来法の電極よりも抵抗が低く良好なオーム性電極を得る
ことができた。Ni層４とSi層３の厚さの比で2.2 ：８よ
りもNiの比率が低くなると良好なオーム性を示さなかっ
た。この比率よりもNi層が薄くなると、熱処理でNiがSi
中でNiSi2 を形成しながら拡散していくので、NiがSiＣ
表面に到達することができないためと考えられる。In an electronic device of another embodiment having an electrode portion shown in FIG. 2, an Si layer 3 is sputter-deposited on the surface of an n-type SiC substrate 1 by RF magnetron sputtering, and then a Ni layer 4 is sputtered. Evaporation was performed. At this time, the Si layer 3 and the Ni layer 4 were formed such that the atomic ratio of Ni and Si was 40:70. As a subsequent heat treatment, in a vacuum of 2 × 10 -6 Torr
After annealing at 600 ° C. for 30 minutes, a current-voltage characteristic without rectification as shown by line 12 in FIG. 3 was obtained, and a good ohmic electrode having lower resistance than the conventional electrode was obtained. . When the ratio of Ni was lower than 2.2: 8 in the thickness ratio of the Ni layer 4 and the Si layer 3, good ohmic properties were not exhibited. If the Ni layer becomes thinner than this ratio, Ni
Ni diffuses while forming NiSi 2 in the
This is probably because they could not reach the surface.
【０００９】また、これらの実施例の表面をしらべたと
ころグラファイトの析出がなく、従来方法に比べ、導線
のボンディング加工が実施しやすくなった。Further, when the surfaces of these examples were examined, no graphite was deposited, and the bonding process of the conductive wire became easier than in the conventional method.
【００１０】[0010]
【発明の効果】本発明によれば、ｎ形SiＣ基体上のオー
ム性電極を、Ni−Si合金からあるいはNi−Si積層体から
形成することにより、純Ni電極の場合のように1000℃以
上の高温の熱処理を必要とせず、700 ℃以下の低温の熱
処理ですむようになった。また、電極面へのグラファイ
トの析出もなくなり、接続の容易な電極が得られるの
で、SiＣ電子デバイスの製造に与える効果は極めて大き
い。According to the present invention, by forming an ohmic electrode on an n-type SiC substrate from a Ni-Si alloy or from a Ni-Si laminate, the ohmic electrode can be used at a temperature of 1000 ° C. or higher as in the case of a pure Ni electrode. No high-temperature heat treatment is required, and a low-temperature heat treatment of 700 ° C or less is required. In addition, the deposition of graphite on the electrode surface is also eliminated, and an electrode that can be easily connected is obtained, so that the effect on the manufacture of SiC electronic devices is extremely large.
【図１】本発明の一実施例のSiＣ電子デバイスの電極部
を示す断面図FIG. 1 is a sectional view showing an electrode portion of a SiC electronic device according to one embodiment of the present invention.
【図２】本発明の別の実施例のSiＣ電子デバイスの電極
部を示す断面図FIG. 2 is a cross-sectional view illustrating an electrode portion of a SiC electronic device according to another embodiment of the present invention.
【図３】本発明の実施例および従来例のｎ形SiＣ基板用
電極の電流−電圧特性線図FIG. 3 is a current-voltage characteristic diagram of an electrode for an n-type SiC substrate according to an example of the present invention and a conventional example.
１ ｎ形SiＣ基板 ２ Ni−Si合金層 ３ Si層 ４ Ni層 1 n-type SiC substrate 2 Ni-Si alloy layer 3 Si layer 4 Ni layer
───────────────────────────────────────────────────── フロントページの続き (58)調査した分野(Int.Cl.7，ＤＢ名) H01L 21/28 H01L 29/41 H01L 29/16 ──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. 7 , DB name) H01L 21/28 H01L 29/41 H01L 29/16
Claims (5)
〜67原子％のニッケル・けい素合金層を形成後、熱処理
を施して炭化けい素基体上にオーム性電極を形成するこ
とを特徴とする炭化けい素電子デバイスの製造方法。A nickel composition having a nickel composition of 33 on an n-type silicon carbide substrate.
A method for manufacturing a silicon carbide electronic device, comprising: forming a nickel-silicon alloy layer of up to 67 at%, followed by heat treatment to form an ohmic electrode on a silicon carbide substrate.
素とを同時に蒸着することにより形成する請求項１記載
の炭化けい素電子デバイスの製造方法。2. The method for manufacturing a silicon carbide electronic device according to claim 1, wherein the nickel-silicon alloy layer is formed by simultaneously depositing nickel and silicon.
びニッケル層を積層し、積層体中にNiが33〜67原子％で
存在するようにしたのち、熱処理を施して炭化けい素基
体上にオーム性電極を形成することを特徴とする炭化け
い素電子デバイスの製造方法。3. A silicon carbide layer and a nickel layer are sequentially laminated on an n-type silicon carbide substrate so that Ni is present at 33 to 67 atomic% in the laminate, and then heat treatment is performed. A method for manufacturing a silicon carbide electronic device, comprising forming an ohmic electrode on a substrate.
ぞれ蒸着により形成する請求項３記載の炭化けい素電子
デバイスの製造方法。4. The method for manufacturing a silicon carbide electronic device according to claim 3, wherein the silicon layer and the nickel layer of the laminate are formed by vapor deposition, respectively.
ないし４のいずれかに記載の炭化けい素電子デバイスの
製造方法。5. The heat treatment temperature is 700 ° C. or less.
5. The method for producing a silicon carbide electronic device according to any one of items 1 to 4.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24076993A JP3079851B2 (en) | 1993-09-28 | 1993-09-28 | Method for manufacturing silicon carbide electronic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24076993A JP3079851B2 (en) | 1993-09-28 | 1993-09-28 | Method for manufacturing silicon carbide electronic device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0799169A JPH0799169A (en) | 1995-04-11 |
| JP3079851B2 true JP3079851B2 (en) | 2000-08-21 |
Family
ID=17064443
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP24076993A Expired - Lifetime JP3079851B2 (en) | 1993-09-28 | 1993-09-28 | Method for manufacturing silicon carbide electronic device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3079851B2 (en) |
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|---|---|---|---|---|
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| JP4962168B2 (en) * | 2007-06-27 | 2012-06-27 | 日産自動車株式会社 | Semiconductor device and manufacturing method thereof |
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| JP2014003252A (en) | 2012-06-21 | 2014-01-09 | Sumitomo Electric Ind Ltd | Silicon carbide semiconductor device and method for manufacturing the same |
| CN103058193B (en) * | 2013-01-25 | 2015-03-04 | 哈尔滨工业大学 | Method for preparing silicon carbide nanowire by adopting metallic nickel or amorphous carbon lamination |
| JP2016046309A (en) * | 2014-08-20 | 2016-04-04 | 住友電気工業株式会社 | Silicon carbide semiconductor device manufacturing method |
| JP6686581B2 (en) | 2016-03-16 | 2020-04-22 | 富士電機株式会社 | Silicon carbide semiconductor device and method for manufacturing silicon carbide semiconductor device |
| DE102022100072A1 (en) | 2022-01-03 | 2023-07-06 | Infineon Technologies Ag | METHOD OF MAKING A METAL SILICIDE LAYER ABOVE A SILICON CARBIDE SUBSTRATE AND SEMICONDUCTOR DEVICE INCLUDING A METAL SILICIDE LAYER |
-
1993
- 1993-09-28 JP JP24076993A patent/JP3079851B2/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7829374B2 (en) | 2007-07-20 | 2010-11-09 | Panasonic Corporation | Silicon carbide semiconductor device and method for manufacturing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0799169A (en) | 1995-04-11 |
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