TW573454B - Manufacturing method of multi-layered printed circuit and the interlayer conduction structure formed by the same - Google Patents

Abstract

The present invention relates to a manufacturing method of multi-layered printed circuit, which comprises forming at least a conductive through hole for conducting each layer of circuit pattern in the substrate, then overlapping at least a build-up board onto the substrate, and forming at least a conductive blind via on the build-up board, wherein the interior of conductive through hole and conductive blind via are filled with insulation material respectively, the bottom of the conductive blind via on the build-up board is overlapped on the hole lid of the conductive through hole of the substrate, and the bottom of the conductive blind via of the n-th build-up board is overlapped on the hole lid of the conductive blind hole of the (n-1)th build-up board. A tested result shows that the interlayer conduction structure of the present invention has reliable conduction quality, and since no costly conductive paste and interlayer alignment equipment are required, it has the effect of greatly reducing the manufacturing cost.

Description

573454 V. Description of the invention (l) --- [Technical field to which the invention belongs] The present invention relates to the design of printed circuit boards, especially the manufacturing method of the layered printed circuit board and the formed interlayer conduction structure, which = The interlayer conductive structure is formed by superposing at least one conductive layer through a conductive via. Structured by blind holes [Previously described as a skill] The surface and inside of the edge substrate of a traditional multilayer printed circuit board, and the circuit pattern of each layer is conducted thickly. However, under some considerations, such as the advantages of the s s P process of the ALVH-based electro-ore filling technology using conductive paste, the key penetration hole, it is necessary to deal with the problem of alignment between layers. In addition, the use of expensive conductive paste in a large amount, outside the guide, the SSP process is the biggest problem of stability 'often occur in the thickness of the body layer can not be plated uneven clouds, the line can not bite the name, and then affect the entire [invention] It is a process of forming a plurality of layers of circuit patterns in an absolute plating through-hole (P TH), and there are cases where plating through-holes are not used, and the B2it process, and the use of blind holes. Of course, these processes have expensive inter-level alignment equipment without using electricity. In the ALVH process, the overall manufacturing cost must be high in grams. Another problem is that the quality of the plated hole filling is not a blind hole. When the conductivity level formed is 3/3, the fine line system process is caused. The yield. The first object of the invention is to provide a new interlayer conduction structure for grounding the layers of circuit patterns of a multilayer printed circuit board. Specifically, the layers are laminated to form the multilayer. The printed circuit board is composed of-substrate and at least-Zengrong substrate At least one conductive via, the conductive via

V. Description of the invention (2) It has a hole cover, and its inside is filled with insulation. There is a conductive blind hole. The conductive blind hole is also =. , The build-up board is at least: really full of insulating material. More specifically, the increase :: 二: 内 # is superimposed on the center of the conductive via of the substrate :: The bottom of the conductive blind hole on the bottom of the blind hole is superimposed on the nth driver: η Layer by layer of hole cover ±. This interlayer continuity test has "two conductive blind qualities, and because it does not require the use of expensive conductive continuity preparations," it has a significant reduction in manufacturing costs. Effectiveness: The second purpose of the present invention is to provide _ Manufacturing method, ... Specially = dagger ;: Interlayer conduction structure called the first purpose of the Γ-layer printed circuit board system: "The present invention is implemented in a circuit board. [Embodiment] will be implemented in the following description. Example, and clarify the invention with @ 进-步步。 However, 'any person skilled in the art knows that this is only for convenience of explanation, and it is not limited to this. Please refer to Figures 10 to 10, which disclose the manufacture of a multilayer printed circuit board using the present invention. The method includes the following steps a to f: a providing a substrate (1), as shown in the first figure, which has a top surface and a bottom surface for forming a first conductor layer (1 1 ), And the substrate (1) has at least one conductive through hole (12) for conducting the two first conductor layers (11) through the substrate (1). b) Implementing a first plugging procedure: Specifically, a first insulating material is firstly screen-printed.

Page 5 573454 V. Description of the invention (3) The material (2) is filled in the conductive via (12), as shown in the second figure A. Then, the air bubbles existing in the 'first insulating material (2) (that is, the vacuum defoaming program) are evacuated, and the insulating material (2) is cured by heating, and then the conductive through hole ( 1 2) The first insulating material (2) is brushed and flattened, as shown in the second figure B. Wherein, if the process of filling the conductive via (12) with the first insulating material (2) is performed in a vacuum environment, it is not necessary to perform a vacuum defoaming procedure. c) forming two second conductor layers (13) by plating to cover both ends of the two first conductor layers (1 1) and the conductive via (12), as shown in the third figure. d) implementing a first circuit formation procedure: specifically, first forming a first plating resist layer (14) with a first hollow pattern (141) on the second conductor layer (1 3), for example, Apply a dry film, as shown in the fourth picture A. Then, a first circuit layer (15) is plated in the first hollow pattern (141), as shown in FIG. 4B. Then, a first resist layer (16) is plated on the first circuit layer (15) (e.g., the electric mine is locked in the wrong layer), as shown in the fourth figure C. Then, sequentially remove the first section as in the fourth diagrams D to F.

I a plating resist layer (1 4), a first etching process is performed, and the first etching resist layer (1 6) is removed, a first circuit pattern is formed on the top surface and the bottom surface of the substrate (1), respectively (1 7). Wherein, the first circuit pattern (1 7) corresponds to the place of the conductive via (1 2) and is shaped

I form a first hole cover (171) for covering the conductive through hole (12). In short, the first hole cover (1 7 1) is like the conductive via (1 2

573454 V. Description of the invention (4)). 3 If C is a board, the layer is increased by 7 to 1 and the first case is combined with FIG. 3, and the stacked circuit C is reduced from the electric board C to the first layer of C in order to increase R, one of the C order. The copper-laminated sheet is applied on a base-by-base basis. Illustrated in Figure 1} The cover is for e overlays for the general / -N Figure 5 shows the edge of the picture. The first example is to use cocoa} and sometimes the foil copper resin tree is attached as a system. Kong Zeng wears one by one, and should be effective.) / F C windows, copper, copper, copper, copper, copper, copper, copper, copper, copper, copper, copper, copper, copper, copper, copper, copper, copper, copper, copper, copper, copper, copper, copper, and copper. It ’s the same as wearing a consistent edge 丨 Electro-holes should be worn one by one through the plate layer on the 00 Cube system C. The edge should be added to the second one. The three should be connected to the three {as a straight hole. Show the hole in the square, B is the best way to shoot through the six thunderbolts. First,), when 2} Piece 3 Case map Road C hole 3 Cover micro 3 hole This is a blind square electric } The plating guide 7 is the same as that in the plan. Road sign cover hole-No. 7 hole electric station blind one picture electricity seventh lead the 1st in. Formed into a square stack, the upper part is attached to the β-standing opening r-I 〇〇 bottom τ-Η 7 3 of 7 material edge must be the first square brush printing. The sequence sequence of the sequence is based on the hole first plugging the system, and the body of the body is shown in the words \) / h ο qi shows the place A) Figure 4 Eight C is the same as the material, and 3 2 3 The 3 C is in the hole In the blind storage of electricity, draw the formula and fill in the blanks. Really 4 pumps, C, and then feed) 4 4 (C materials, materials, and materials must be the second and second ones. The prologue should be true when the bubble is cleared, and then it will be true. 573454 Wu Ming explained that the material should be sent to the material, and the second empty space should be true. If it is in the process, pass it.) B 3 '' Figure 3 The eighth hole of the C is like a blind and an electric, and the leveling should be leveled. 5) Grinding / (V brush 3 with 4 covers to cover 4 3 (·, ..) The first division is as true as the empty one, and the formula is} Enter 3 and then the key 3 r--p ^ 6-/ \ Wu Yikong Poem N is dead, i is conducting M, 1 = 0, the first 1 For example, in the case of 5 and 3, the C film is dry and the layer body is empty. The second order is as shown in the example, the shape is a shape, the road is a 5 shape, the second is on the C layer, and the first layer is 4 Shi 3 resistance 丨 plating} layer of electric body The electroplating is in the case of} with 1 and 5 ο 3 as shown in Figure C. The figure B is empty and the second is as the first one. On the other 6 〇3 shows the layer A of the layer C. Figure 12 6 gas 3 The second layer is plated all the way, as shown in Figure C. The seventh is as 3, and the layer after C is completely cut off. The second figure is the eleventh plated, such as electricity. 5 7 3 3 Γν电 # Twenty-twoth first Haihai = ° = mouth to remove the order of division, in order to engraved F last name to two D first to Shi Jishi, after the 8 8 shape 3 3 face c C table cover Figure hole} Lu Er 3 electricity No. C No. 21 plate No. 1 layer, the shape is increased, which is the first place in the middle. \ Ly oo 8 3 3 (C hole case, the blind circuit is conductive, the second should cover the second hole. The hole of the cover ^ = D of the simple 〇3) 3 3 (3 holes C blind — 0-f *, ^ 孑, blind conductive This guide is the same as Λ: P and cover 1-I for 8) 3

In the middle of the road, check the electricity, see the map of the first guide F to construct ten faces and the bottom one} and 2 sides 1 top C 3 (8 holes 3 blind C electrical maps the road map should be the first to the second Figure the 3 holes of the structure} Take part in 1 electrical sub-C guide} The 7 bases are obtained by 1 The system is the case} Tuyi 7 Road Light 1—Electricity is the first hole in C.} C guide plate this layer, add one ^ Lu Di for this.

573454 V. Description of the invention (6) A multi-layer system / 1 2) and the conductive blind holes (3 P brush board circuit patterns are conducted through the board. 3) In the example of the figure, the second circuit pattern () A first -ί = plate (5) is formed on the second layered plate (5 requires 丄 = 路 圆 案 (5 η), and the structure shown can be different from Γ only in step j: structure. The number of times that the above e number is repeated repeatedly corresponds to the number of open !: Electricity: The number of times that the step nj is repeatedly performed is higher in the tenth figure ρίίΠ case. For example, the surface has a conductor layer. In the example shown, the substrate system uses two systems using the multilayer substrate (6) with the substrate helmet of the example shown in the twelfth figure (6). The structure of the multilayer build-up board is not limited to the substrate. The road pattern is conducted through the conductive vias; the bottom of each conductive blind hole of each layer of the substrate on the substrate t and the conductive blind hole The hole cover is formed on the η-1 layer build-up board and is formed on the substrate and each pass structure to confirm the main board of the present invention. The layer circuit pattern is the system disclosed in the previous technology. It has the following characteristics: The goods are specially made. The conductive via and the conductive blind hole are twisted by 9 ^. The guide is used in the hole. Insulating materials can be plugged resin or non-conductive, k-two insulating materials, and guide copper f, no matter which kind of insulation is used. Page 9 573454 ^ 15. Description of the invention (7) Edge material is more conductive than The paste is much cheaper .. Compared with the steel paste, the price is only about 1/6 to 1/8 of the copper paste, and #conductive copper is only about 1/3 to 1/4 of the steel reward. = 丄 This conductive via And the hole of the conductive blind hole is completely absent from the hole. Therefore, the part of the conductive via or the conductive blind hole and the other part are pulled to ensure the formation of the next layer of circuit pattern. quality.

2. In the process of performing steps a to j above, the threshold of the complex sound V is low without investing in expensive interlayer alignment equipment: Condition B: No conductive paste is used, so superimposed layers are added. Conductive to electrical vias and conductive blind holes% ^ Isoelectric blind holes M l- The structure of the family is filled with insulating material, and the thermal oil and thermal shock are used to reduce the poverty ^ It may be within 1 $ of the special layer of β T leaf It is the resistance of the bean reed 4 ^ Lai degree test, and its resistance changes as described above. When the 1 conduction quality is obviously quite reliable. In addition, t inventions have industrial applicability and novelty in similar products, so they have not been found to be identical or similar to those disclosed in. ° The application requirements for invention patents are based on the fact that the price of the material of the pore resin paste is filled with the circuit pattern flat, the hot pressing of the alignment technology, and the conduction and junction rate of the interconductivity are sufficiently advanced before the soil and the advancement. Application

573454 Schematic illustrations Figures 1 to 10 are diagrams showing the execution of steps a to j of the method of the present invention in a schematic sectional view. Fig. 11 is a schematic sectional view of still another preferred embodiment of the present invention. Figure 12 is a schematic sectional view of another preferred embodiment of the present invention. Mingji Tuqidi No.1, No.3, No.3, No.3, No.3, No.3, and No.6 Multi-Boards \) / X) / 4- Vi \) / -uu 00 12 τ—- 5 1 NJ 4 3 6 3 X), 1 (( 1 (3 ((3 (5 c material case c case) material case c case c layer material layer drawing board 2 material layer drawing board body edge empty road layer 3 edge empty road layer One by one, one by one, two two two two two, two through two holes. Holes (1 2), second conductor layer (1 3), first plating resist layer (1 4), first etching resist layer (1 6), first hole cover (1 7 1) copper window (3 1) conductive blind hole (3 3) third conductor layer (3 4) second plating resist layer (3 5) second etching resist layer (3 7) second hole cover (3 8 1) third circuit pattern (5 1) 6 κίν board layer

Page 11

Claims (1)

573454 VI. Scope of patent application 1. A method for manufacturing a multilayer printed circuit board, a) A substrate is provided. The substrate has a top surface and a bottom surface for forming a first conductor layer, and the substrate has at least one conductive path. Holes for conducting the two first conductor layers through the substrate; b) implementing a first plugging procedure to fill the conductive via with a first insulating material, c) forming two second through electroplating The conductor layer is used to cover the two first conductor layers and both ends of the conductive through hole; d) implementing a first circuit forming process to form a first circuit pattern on the top surface and the bottom surface of the substrate, respectively, and the first A circuit pattern corresponding to the conductive via, and each forming a first hole cover for covering the conductive via iL; e) implementing a stacking board procedure to overlap at least a first build-up board for covering the conductive via iL; The first circuit pattern of the substrate; f) performing a through-hole procedure so that a micro-hole is penetrated through the first build-up plate corresponding to the first hole cover; g) forming a micro-hole in the micro-hole by electroplating Conductive blind hole, the bottom of the conductive blind hole is A first hole cover pasted on the first circuit pattern; h) implementing a second plugging procedure to fill a first blind insulating material in the conductive blind hole, i) forming a third conductor layer for electroplating Covering the conductive blind iL; j) implementing a second circuit forming procedure to form a second circuit pattern on the first and second build-up boards, the second circuit pattern corresponding to the conductive blind Page 12 573454 VI. Scope of patent application The hole is formed with a second hole cover for covering the guide 2. For example, the iC hole in the scope of patent application. Method, in which the b-th hole-plugging procedure of step b [^: P brushes the circuit board manufacturer to evacuate the through-holes existing in the first insulation material; 5 1) screen printing the first -Filling the insulating material with the conductive material to solidify the insulating material; brushing the material of the first edge overflowing the conductive through hole b 2 bubbles; b 3 b 4 is flat. 3. If the first method of the scope of patent application, wherein the first step of step d—electrical follower = the manufacturer of the printed circuit board ... includes in the second conductor program: a layer, the first electroplating barrier layer has two = form one The first-electroplating cut-off hollow pattern covers the conductive via; a hollow pattern, and the first d 2) is plated in the first ballast Hi Ann + d 3) a first circuit layer is plated in the first strip case; d 4) removing a first etching stopper layer on the first semiconductor substrate; 4 removing the first plating layer p on the substrate; d 5) implementing a first bismuth layer; forming the first circuit pattern p ′ on each surface; D 6) on the top surface and bottom of the substrate to remove the first etch stop layer. The method of manufacturing a multilayer printed circuit board is to directly form a hole by laser perforation, and the perforation process of the f step is page 13 573454 6 5. Patent application scope 5. The method for manufacturing a multilayer printed circuit board according to item 1 of the patent application scope, wherein the first build-up board is a resin copper foil board (RCC), and the perforation process of the f step is performed by etching first. Form a copper window, and then laser-perforate the copper window 6. The method for manufacturing a multilayer printed circuit board according to item 1 of the scope of patent application, wherein the second plugging procedure of step h includes: h 1) filling the second insulating material by screen printing. The conductive blind hole; h 2) vacuuming the air bubbles existing in the second insulating material; h 3) curing the second insulating material; h 4) the second insulating material which will overflow the conductive blind hole 7. If the application is special, the method for manufacturing a multilayer printed circuit board according to item 1 of the scope of benefit, wherein the second circuit forming procedure of step j includes: j 1) forming a first layer on the third conductor layer Λ. Two electroplating barrier layers, the second electroplating barrier layer has a second hollow pattern, the second hollow pattern covers the conductive blind hole; 1 j 2) electroplating a second circuit layer in the second hollow pattern; j 3) electroplating a second etching stop layer on the second circuit layer; j 4) removing the second electroplating stop layer; j 5) performing a second etching procedure to form the surface of the first build-up plate Second circuit pattern j 6) removing the first #etched resistance Floor. Page 14 573454 ___ a —- a ^ -----—--------- >, scope of patent application ', interlayer conduction structure of 8 kinds of multilayer printed circuit boards, the multilayer printed circuit board system A substrate and at least one build-up board are superimposed, 'the top and bottom surfaces of the base board each have a first circuit pattern', and the surface of the build-up board: a second circuit pattern to the right; and The inter-layer conduction structure includes: the patterned hole 孑 I », the increased layer at least in the second layer, and at least two, at least one in the interior, one hole in the laminate η ~ 9, and conduction in 10 Conduct a conductive through hole, the conductive ~ hole cover in the through hole and the first conductive system fills the two hole cover and the guide cover on the ridge, 1 layer is added as the application structure, as the application structure, the shape is L cover blind 孑 L, insulating material, series of two-hole cover electric blind hole and the patent model of the η layer board. Among them, please apply for a patent, in which the penetrating portion is filled in the conductive material of the system; The bottom layer of the layer increases the conductive blind surrounding the 8th insulating material range The first substrate is grounded on the second circuit, and the second circuit is grounded on the second circuit, and the second circuit is grounded on the second hole of the conductive blind hole superimposed on the board. The material described in item 8 includes a plug of the material included in item 8 corresponding to a conductive via and a conductive via; and the conductive blind case corresponds to a conductive blind via; and the bottom of the conductive via hole of the substrate is Fold the lid on. Hole resin for multilayer printed circuit boards. Multilayer printed circuit board Non-conductive copper paste. $ 15 pages