TW569350B - Method for fabricating a polysilicon layer - Google Patents
Method for fabricating a polysilicon layer Download PDFInfo
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- TW569350B TW569350B TW091132242A TW91132242A TW569350B TW 569350 B TW569350 B TW 569350B TW 091132242 A TW091132242 A TW 091132242A TW 91132242 A TW91132242 A TW 91132242A TW 569350 B TW569350 B TW 569350B
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
- H01L21/02686—Pulsed laser beam
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02422—Non-crystalline insulating materials, e.g. glass, polymers
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02488—Insulating materials
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02502—Layer structure consisting of two layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02595—Microstructure polycrystalline
Description
569350 五、發明說明(1) 本發明是有關於一種多晶;ε夕層的製作方法,且特別是 有關於一種以溝渠(trench)中未熔融之非晶矽層作為成核 位置’並進行橫向結晶(lateral cryStallizati〇n)之多 晶矽層的製作方法。 低溫多晶矽薄膜電晶體液晶顯示器(L〇w Temperature P〇lySilic〇n Liquid Crystal Display ,LTPS LCD)有別 於一般傳統的非晶矽薄膜電晶體液晶顯示TFT — LCD) ’其電子遷移率可以達到2〇〇cm2/y — sec以上,故可使 薄膜電晶體元件所佔面積更小以符合高開口率的需求,進 而增進顯示器亮度並減少整體的功率消耗問題。另外,由 於電子遷移率之增加可以將部份驅動電路與薄膜電晶體製 程一併製造於玻璃基材上,大幅提升液晶顯示面板的可靠 度’且使得面板製造成本大幅降低。因此,低溫多晶石夕薄 膜電晶體液晶顯示器的製造成本較非晶石夕薄膜電晶體液晶 顯示器低出許多。此外,低溫多晶矽薄膜電晶體液晶顯示 器具有厚度薄、重量輕、解析度佳等特點,十分適合應用 於要求輕巧省電的行動終端產品上。 低溫多晶矽薄膜電晶體液晶顯示器(LTPS —LCD)中,薄 膜電晶體的通道層通常係以準分子雷射退火製程(Excimer Laser Anneal ing,ELA)形成,此通道層的品質通常取決 於多晶石夕晶體的大小(g r a i n s i z e)及其均勻性 (uniformity),而晶體的大小與晶體的均勻性都與準分子 雷射在能量上之控制有直接的關連。 第1 A圖至第1 C圖繪示為習知多晶矽層的製作流程示意
9787twf.ptd 第5頁 569350 五、發明說明(2) 圖。首先請參照第1 A圖,裎桠一 |Λ Λ t ^ AM 〇 棱供一基材100,此基材100通常 =/Λ Λ人材100上形成一緩衝層102,此緩衝 層102l*為一包έ有氮化矽層以及氧化矽層之積層結 接^請參照第1Β圖與第lc圖,在形成緩衝層1〇2之 後,接者形成一非晶矽層丨〇 4於緩衝層丨〇 2上。 :d分子雷射熱退火製程,控制準分子雷射照射於ϊ晶 能量’使得非晶矽層m近乎完全熔融,僅於 、友衝層102表面上保留些許的結晶核(seed 〇f 。之後’這些熔融的液態石夕會從上述之 始結晶成為一多晶矽層106,而此多晶矽層1〇6中 曰存在有分佈不甚均勻的晶體邊界丨〇8。 上述的準分子雷射熱退火製程中,若準分子雷射的能 = =LG(SUper Lateral Growth)點時,結晶核的分佈 =度會瞬間降的很低,造成多晶矽層的晶粒尺寸小且均勻 不佳。因此,準分子雷射的能量必須控制的十分精準, ^製作出晶體尺寸與均勻性皆合乎需求的多晶石夕層,故 ^製裎的製程裕度很小。 第2圖繪示為習知藉由緩衝層上之開口進行多晶矽層 ^作的示意圖。請參照第2圖,提供一基材2〇〇,此基材曰 Y通常為玻璃基板。接著於基材2〇〇上形成一緩衝層 ,此緩衝層202通常為一包含有氮化矽層以及氧^矽層 積層結構。為了改善所形成之多晶矽層中的晶體尺寸、 句勻性以及製程裕度的問題,習知於緩衝層2〇2中製作多
9787twf 第6頁 569350 五 發明說明(3) _ —___ 個以陣列方式排列的開口2〇4,這此 熱退火製程中將扮演相當重要的角一色汗在車f準分子雷射 火的過程中,開口 204以外的區域上的非晶二子雷射熱退 不)將會完全被熔融成液態的發, 二(未、、會 未、,日)未兀王熔融,因此液態的石夕可從Η 口 2〇4底部開始結晶(橫向成長)為一 义7攸開口 =’開始結晶的位置即為開口 2〇4的位置,‘可以f Ζ 控制結晶核的數量與其分佈的位置。 有效的 第3圖繪示為習知多晶矽層的晶體邊示咅 ^ 照第3圖,由於開口2〇4底部的非晶 〜各圖。喷參 液態的石夕會從開口 204底部開^主外^全^融,故 能☆ 9 ^ 1同始彺外成長。由於熔融的液 ::疋由開口 204往外橫向成長,故在相鄰的開口2 :存在有晶體邊界300,而這些晶粒邊界3〇〇將直接受限J 歼’口 204彼此之間的距離。由於開口2〇4係以陣列的方式排 歹||,其在X方向上與y方向上的晶粒成長皆受到相鄰開口 4的限制’因此’此方式雖可有效控制結晶核的分佈情 况’但對於晶粒尺寸仍有所限制。 、因此,本發明之目的在提出一種多晶矽層的製作方 法’所形成的多晶矽層具有較大的晶體尺寸以及較佳的 勻性。 本發明之另一目的在提出一種多晶矽層的製作方法, 叮以使得雷射熱退火製程的製程裕度(pr〇cess wind〇w)大 為提昇。 本發明之再一目的在提出一種多晶矽層的製作方法,
569350 五、發明說明(4) ----- 所形成的多晶矽層具有較少的晶體邊界η boundary ) 〇 為達本發明之上述目的,提出一種多晶矽層的製作方 >去丄,括下列步驟··(a)提供一基材;〇)於基材上形成一 ,、2夕個第一溝渠之緩衝層;(〇於緩衝層上形成一非晶 二以及U)進行一雷射退火製程,使得非晶矽層熔融 ^ 這些第一溝渠上方開始結晶,以形成一多晶矽層。 本發明中,具有第一溝渠的緩衝層之形成方法例如包 舌下列步驟:(a)於基材上形成一氮化矽層;(b)於氮化矽 層中I成多個第一溝渠;以及(c )於氮化石夕層上形成一共 形之氧化矽層,以於氧化矽層中自然形成多個與第二溝、 對應的第一溝渠。 〃 本發明中,具有第一溝渠的緩衝層之形成方法例如包 括下列步驟:(a )於基材上形成一氮化矽層;(b)於氮化矽 層上形成一氧化矽層;以及(c)於氧化矽層中形成多個 一溝渠。 ^ 本發明上述之第一溝渠及/或第二溝渠例如係藉由微 影/敍刻的方式形成,而上述之雷射退火製程例如為一準 分子雷射退火製程。 ^ 為讓本發明之上述目的、特徵、和優點能更明顯易 懂,下文特舉一較佳實施例,並配合所附圖式,作詳 明如下: 、过 圖式之標示說明: 100、200、400、600、700 :基材
^787twf.ptd 第8頁 569350
102、202、402、602、702 ··緩衝層 104、606、706 :非晶石夕層 106、608、708 :多晶石夕層 108、300、500、610、710 :晶體邊界 204 :開口 404、604、704b :第一溝渠 602a、702a :氮化矽層 602b、702b :氧化矽層 704a :第二溝渠 較佳實施例 第4圖繪示為依照本發明一較佳實施例藉由 之溝渠進行多晶石夕層製作的示意圖。請參照第4圖衡^ 一基材400,此基材400通常為玻璃基板。接著於基材 1⑽ 上形成一緩衝層402,此緩衝層402例如為一包含有 層以及氧化矽層之積層結構(將詳述於後)。為了改呈 形成之多晶矽層中的晶體尺寸、肖勻性以及製程裕度的問 題,本實施例於緩衝層402中製作多個彼此平行之 渠404,這些第一溝渠404在後續之準分子雷射熱退火製程 中將扮演提供結晶核的角色。在準分子雷射熱退火的過程 中,第一溝渠404以外的區域上的非晶矽層(未繪示)將 會完全被熔融成液態的矽,而第一溝渠4〇4底部的非晶矽 層(未緣示)並未元全被熔融,因此液態的石夕可從第一溝 渠404底部開始結晶(橫向成長)為一多晶矽層。由上述 可知,開始結晶的位置即為第一溝渠4〇4的位置,故可以
569350
有效的控制結晶核分佈的位置。 第5圖繪示為依照本發明一較佳實施例多晶矽層 體邊界示意圖。請參照第5圖,由於第一溝渠4〇4底部的曰曰非 晶矽層並未完全熔融,故液態的矽會從第一溝渠4〇4底邙 開始往外成長。由於熔融的液態矽是由第一溝渠4〇4往^卜 橫向成長,故在相鄰的第一溝渠4〇4之間會存在有晶體邊 界5 00,而這些晶粒邊界5〇〇將直接受限於第一溝渠4〇4彼 此之間的距離。由於第一溝渠4〇4係彼此平行排列,例如 沿著y方向排列,其晶粒成長僅在χ方向上受到相鄰第一 渠404之限制。換言之,藉由第一溝渠4〇4提供多條線性之 結晶核將可同時兼顧多晶矽層的晶粒尺寸以及均勻性。 以下針對整個多晶矽層的製作進行詳細的說明。第Μ 圖至第6 D圖繪示為依照本發明一較佳實施例多晶矽層的製 作流程示意圖。首先請參照第6Α圖,提供一基材6〇〇S,'此^ 基材600通常為玻璃基板。接著於基材6〇〇上形成一緩衝層 602,此緩衝層6〇2例如為一包含有氮化矽層6〇2a以及氧/匕 石夕層602b之積層結構。上述之氮化矽層6〇2a以及氧化碎層 602b例如係以電漿化學氣相沈積(Plasma Enhanced 曰
Chemical Vapor Deposition ,PECVD)的方式形成。 接著請參照第6B圖,於上述之緩衝層6〇2中形成多個 彼此平行排列的第一溝渠604,這些第一溝渠604例如係r 微影/蝕刻的方式形成,其形成的位置例如是在上層之 化矽層602b中。 氧 接著請同時參照第6C圖與第6D圖,在第一溝渠6〇4带
569350
成之後,接著形成一非晶矽層6 〇 6於緩衝層6 〇 2上,非晶石夕 層606例如係以低壓化學氣相沈積(L〇w pressure
Chemical Vapor Deposition,LPCVD)的方式形成。而在 形成非晶矽層60 6之後,接著進行一雷射熱退火製程,此 雷射熱退火製程例如是一準分子雷射熱退火製程。雷射熱 ,火製程中’控制準分子雷射照射於非晶矽層6 〇 6上的能 里,使付第一溝渠604以外的區域上的非晶石夕層606近乎完 全熔融,而第一溝渠604底部的非晶矽層606並未完全被= 融,因此液態的矽可從第一溝渠604底部開始結晶為一多 晶矽層608。此外,藉由雷射熱退火製程所形成的多晶矽 層608會存在有晶粒邊界610,此晶粒邊界61〇僅會出現在 相鄰的第一溝渠604之間。 第7 A圖至第7 D圖繪示為依照本發明另一較佳實施例多 晶矽層的製作流程示意圖。首先請參照第7A圖,提供一基 材700,此基材7〇〇通常為玻璃基板。接著於基材7〇〇上形& 成一氮化碎層702a,此氮化矽層70 2a例如係以電漿化學/氣 相沈積(PECVD)的方式形成。接著於上述之氮化矽層7〇2& 中形成多個彼此平行排列的第二溝渠7〇4a,這些第二溝渠 704a例如係以微影/蝕刻的方式形成。 ” 接著請參照第7B圖,在第二溝渠704a形成之後,接著 形成一共形之氧化矽層702b於氮化矽層7〇2&上,此氮化石夕 層702a與氧化矽層702b係構成一緩衝層7〇2。由於氧化石夕 層702b係覆蓋於氮化矽層7028上,故氧化矽層6〇2b第二溝 渠704a的位置上會自然形成多個第一溝渠7〇4b。此外丁這
569350 五、發明說明(8) 二第一溝渠7〇4b的寬度因階梯覆蓋(step coverage)的緣 =會比第二溝渠704a的寬度小,因此本實施例可以製作出 7見度小於臨界尺寸(Crhicai Dimension,CD)之第一溝渠 接著請同時參照:第7C圖與第7D圖,在第一溝渠7〇4形 成之後,接著形成一非晶矽層706於緩衝層702上,非晶石夕 =7〇6例如係以低壓化學氣相沈積(LpcVD)的方式形成阳而 形成非晶矽層706之後,接著進行一雷射熱退火製程, 雷射熱退火製程例如是一準分子雷射熱退火製程。雷射 二f火製程中,控制準分子雷射照射於非晶矽層7〇6上的 里使得第溝渠7 〇 4 b以外的區域上的非晶石夕層7 〇 6近 =完全熔融,而第一溝渠7041)底部的非晶矽層7〇6並未完 融’因此液態的石夕可從第一溝渠7〇4b底部開始結晶 ,一夕晶石夕層708。此外’藉由雷射熱退火製程所形成的 夕晶石夕層7G8會存在有晶粒邊界m,此晶粒邊界 出現在相鄰的第一溝渠7〇4b之間。 f 列優=所述,本發明之多晶石夕層的製作方法至少具有下 曰曰 J.由广1渠中未完全熔融之非晶矽層提供了良好的結 曰曰 j八五构勻性良好的優點。 術進=可輕易地以現有的微影/製程技術或是其他技 3 ·由於溝渠中未完* +、泣% + 4 疋王広4之非晶矽層提供了良好的成 9787twf.ptd 第12頁 569350 五、發明說明(9) 核位詈,M ve π 使仔雷射熱退火製程的製程裕度很大。 的多曰提供了連續的成核位£,使得所成長出來 夕日日石夕層具有較少的晶體邊界。 术 雖然本發明已以一較佳實施例揭露如上 以限定本發明,任何熟習此技藝者, ”、、/、並非用 神和範圍A,當可作各種之更動與潤飾,發明之精 護範圍當視後附之申請專利範圍所界 =J本發明之保
KH 9787twf.ptd 第13頁 569350 圖式簡單說明 第1 A圖至第1 C圖繪示為習知多晶矽層的製作流程示意 圖; 第2圖繪示為習知藉由緩衝層上之開口進行多晶矽層 製作的示意圖; 第3圖繪示為習知多晶矽層的晶體邊界示意圖; 第4圖繪示為依照本發明一較佳實施例藉由緩衝層上 之溝渠進行多晶矽層製作的示意圖; 第5圖繪示為依照本發明一較佳實施例多晶矽層的晶 體邊界示意圖; 第6A圖至第6D圖繪示為依照本發明一較佳實施例多晶 矽層的製作流程示意圖;以及 第7A圖至第7D圖繪示為依照本發明另一較佳實施例多 晶矽層的製作流程示意圖。
9787twf.ptd 第14頁
Claims (1)
- 569350 六、申請專利範圍 1. 一種多晶矽層的製作方法,包括·· 提供一基材; 於該基材上形成一^具有複數個第一溝渠之緩衝層; 於該緩衝層上形成一非晶矽層;以及 進行一雷射退冬製程,使得該非晶矽層炫融後由該此 第一溝渠上方開始結晶,以形成一多晶矽層。 2 ·如申請專利範圍第1項所述之多晶石夕層的製作方 法,其中具有該些溝渠的缓衝層之形成方法包括: 於該基材上形成一氮化矽層; 於該氮化矽層中形成複數個第二溝渠;以及 於該氮化矽層上形成一共形之氧化矽層,以於該氧化 矽層中自然形成該些第一溝渠。 3 ·如申請專利範圍第2項所述之多晶石夕層的製作方 法,其中該些第二溝渠係以微影/鍅刻的方式形成。 4 ·如申請專利範圍第1項所述之多晶矽層的製作方 法,其中具有該些溝渠的緩衝層之形成方法包括: 於該基材上形成一氮化矽層; 於該氮化矽層上形成一氧化矽層;以及 於該氧化矽層中形成該些第一溝渠。 5 ·如申請專利範圍第4項所述之多晶矽層的製作方 法,其中該些第一溝渠係以微影/蝕刻的方式形成。 6 ·如申請專利範圍第1項所述之多晶矽層的製作方 法,其中該雷射退火製程係為一準分子雷射退火製裎。
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