TW521361B - Bump process - Google Patents

Bump process Download PDF

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Publication number
TW521361B
TW521361B TW091103533A TW91103533A TW521361B TW 521361 B TW521361 B TW 521361B TW 091103533 A TW091103533 A TW 091103533A TW 91103533 A TW91103533 A TW 91103533A TW 521361 B TW521361 B TW 521361B
Authority
TW
Taiwan
Prior art keywords
solder
bump
wafer
bumps
openings
Prior art date
Application number
TW091103533A
Other languages
English (en)
Inventor
He-Ming Tang
Jiun-Je Li
Ren-Guang Fang
Min-Lung Huang
Jau-Shiung Chen
Original Assignee
Advanced Semiconductor Eng
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Semiconductor Eng filed Critical Advanced Semiconductor Eng
Priority to TW091103533A priority Critical patent/TW521361B/zh
Priority to US10/248,688 priority patent/US6967153B2/en
Application granted granted Critical
Publication of TW521361B publication Critical patent/TW521361B/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457—Solder materials or compositions; Methods of application thereof
    • H05K3/3485—Applying solder paste, slurry or powder
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    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
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    • H01L2224/05027—Disposition the internal layer being disposed in a recess of the surface the internal layer extending out of an opening
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    • H01L2224/1147—Manufacturing methods using a lift-off mask
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    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
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    • H05K2201/09863—Concave hole or via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
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    • H05K2203/043—Reflowing of solder coated conductors, not during connection of components, e.g. reflowing solder paste
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    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
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    • H05K2203/0568—Resist used for applying paste, ink or powder
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0562—Details of resist
    • H05K2203/0594—Insulating resist or coating with special shaped edges

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Description

521361 08379twfi.doc/006 95-8-4 第91103533號說明書修正本 7. 台南市新建路19巷19號之3 8. 高雄市左營區子華路126號6樓之1 9. 高雄市新興區達仁街39號 10. 高雄縣鳥松鄉鳥松村中正路46巷16之5號
11. 高雄市左營區崇實新村72之2號 國籍：（中文/英文）中華民國/TW
2 521361 Γ，修=s/f 正 08379twfi.doc/006 95-8-4 第91103533號說明書修正本 肆、聲明事項： □本案係符合專利法第二十條第一項□第一款但書或口第二款但書規定之 期間，其日期為：年月曰。 ◎本案申請前已向下列國家（地區）申請專利□主張國際優先 權·· 【格式請依：受理國家（地區）；申請日；申請案號數順序註記】 1. 2. 3. 4. 5. ]主張國内優先權(專利法第二十五條之一）： 【格式請依：申請日；申請案號數順序註記】 1. 2. □主張專利法第二十六條微生物： □國内微生物【格式請依：寄存機構；日期；號碼順序註記】 國外微生物【格式請依：寄存國名；機構；日期；號碼順序註記】 熟習該項技術者易於獲得，不須寄存。 日修重/更正/補光 521361 08379twfi.doc/006 玖、發明說明： 本發明是有關於一種凸塊製程，特別是一種可在晶圓 上形成較大尺寸及高度之凸塊的凸塊製程。 在積體電路（1C)封裝的技術領域中，第一層級封裝 (First Level Package)主要係將晶粒（cMp)連接到承載 器（earner)上，大致上有三種封裝型態，分別爲打線技術 (wnx bondmg)、貼帶自動接合技術（Tape Automated Bonding，TAB)及覆晶接合技術（Flip Chlp，F/⑺。其中， 無論是貼帶自動接合技術（TAB )或是覆晶接合技術 (F/C )，在晶粒與承載器在接合的過程中，均須在晶圓 (wafer )的婷墊（pad )上進彳了凸塊製作（t)Umping )，並 以凸塊（bump)作爲晶粒與承載器之間電性連接的媒介。 習知之凸塊的種類繁多，較爲常見的有銲料凸塊（Solder Bump)、金球凸塊（Gold Bump)、導電膠凸塊（Conductive Polymer Bump)及局分子凸塊（p〇iymer Bump)等四種， 其中又以銲料凸塊的應用最爲廣泛。 請參考第1A〜1D圖，其爲習知之一種銲料凸塊的製 程剖面流程圖。首先如第1A圖所示，晶圓110之主動表面 (Active Surface ) 112 上具有一保護層 114 ( Passivation ) 及多個銲墊11 6 (僅繪示其中之一），而保護層114係暴露 出銲墊116於主動表面12上方。接著如第1B圖所示，以 蒸鍍（Evaporation)、濺鍍（Sputter)或電鍍（Plating)等 方式，在晶圓之主動表面12上形成一球底金屬層（Under Ball Metallurgy，UBM) 120。接著如第1C圖所示，配置 08379twG.doc/006 521361 95-8-4 一圖案化之厚光阻130於晶圓110之主動表面112上，並 利用厚光阻130上的多個開口 132(僅繪示其中之一）分別 暴露出其下之部分球底金屬層120 ° 接著如第1D圖所示，利用蒸鍍、電鍍或印刷（Printmg) 等方法，將銲料（solder) 140塡入開口 132與球底金屬層 120所構成的空間中。接著如第1E圖所示，移除厚光阻 130，並以銲料140爲罩幕，僅保留銲料140之下方區域的 部分球底金屬層120，而移除其他部分的球底金屬層120 ° 接著如第1F圖所示，進行一迴銲（reflow)步驟，使得銲 料H0最後形成具有類似球狀外貌的銲料凸塊M2。 承上所述，爲了增加銲料凸塊142的高度，可增加厚 光阻130之開口 132的孔徑，或是增加厚光阻130的厚度， 用以塡入更多的銲料140，並經過迴銲處理之後，即可得到 較大高度的銲料凸塊142。然而，當體積過大的銲料140 在進行迴靜時，可能會發生如第1F圖之虛線區域所示之坊 塌（collapse)的現象，因而形成坍塌銲塊144，故無法將 銲料凸塊142形成預期之形狀。 本發明之第一目的係在於提供一種凸塊製程，可在晶 圓上形成較大尺寸及高度的凸塊。 本發明之第二目的係在於提供一種凸塊製程，可在晶 圓上利用預銲塊與銲料熔合後形成較大尺寸及高度的凸 塊，同時可藉由調整預銲塊及銲料之組成成分，使得預銲 塊與靜料相互合之後’可獲得所需之凸塊的組成成分。 本發明之第三目的係在於提供一種凸塊製程，可在已 6 气〉二\父' u521361 β㈣.更正/褚免 08379twf3.doc/006 95-8-4 形成凸塊之晶圓上，藉由堆積銲料於凸塊之上，經過迴銲 處理後，即獲得較大高度的凸塊，此外，更可藉由調整銲 料之組成成分，使得原先已形成之凸塊與銲料相互熔合之 後，可獲得所需之凸塊的組成成分，並可增加凸塊之尺寸 高度。 基於本發明之第一目的，本發明提供一種凸塊製程， 首先提供一晶圓，並在晶圓之主動表面上形成一圖案化之 銲罩層（Solder Mask)，且銲罩層之多個開口（opening) 係分別暴露出晶圓之主動表面上的銲墊’其中這些開口的 縱剖面輪廓線係呈曲線狀。接著，塡入銲料於這些開口之 中，並經迴銲處理後，使得位於該開口之中的銲料分別形 成球狀之凸塊，最後移除上述之銲罩層，而完成此凸塊製 程。 基於本發明之第二目的，本發明提供一種凸塊製程， 首先提供一晶圚，並在晶圓之主動表面上的銲墊之上’分 別形成一預銲塊（Pre-f〇rm s〇ider Bump)。接者，形成一圖 案化之銲罩層，且銲罩層之多個開口係分別暴露出晶圓之 主動表面上的銲墊，其中這些開口之兩端的橫截面積係小 於這些開口之中間的橫截面積，使得這些開口之縱剖面輪 廓線係呈曲線狀。之後，塡入銲料於這些開口之中，並堆 積於預銲塊之上，經迴銲處理後，使得位於些開口之中的 銲料與這些預銲塊分別形成球狀之凸塊，最後移除上述之 銲罩層，而完成此凸塊製程。 基於本發明之第三目的，本發明提供一種凸塊製程， 7 ,广牛贫f日史止./補充 521361 08379twf3.doc/006 95-8-4 首先提供一晶圓，其中在晶圓之主動表面的銲墊上，已分 別具有一第一凸塊。接著，形成一圖案化之銲罩層，且銲 罩層之多個開口係分別暴露出晶圓之主動表面上的銲墊， 其中這些開口之兩端的橫截面積係小於這些開口之中間的 橫截面積，使得這些開口之縱剖面輪廓線係呈曲線狀。之 後，塡入銲料於這些開口之中，並堆積於第一凸塊上，經 迴銲處理之後，使得位於些開口之中的銲料與這些第一凸 塊分別形成第二凸塊，最後移除上述之銲罩層，而完成此 凸塊製程。 爲讓本發明之上述目的、特徵和優點能明顯易懂，下 文特舉三較佳實施例，並配合所附圖示，作詳細說明如下： 圖式之簡單說明 第1A〜1F圖爲習知之一種銲料凸塊製程的剖面流程 圖； 第2A〜2F圖爲本發明之第一實施例之凸塊製程的剖 面流程圖； 第3A〜3F圖爲本發明之第二實施例之凸塊製程的剖 面流程圖； 第4A、4B圖分別爲以璺合法形成銲罩層之剖面示意 圖；以及 第5A、5B圖分別爲具有不同形狀開口之銲罩層的剖 面不意圖。 圖式之標示說明 110、210、310 ··晶圓（wafer) 8 521361 08379twf3.doc/006 95-8-4 112、212、312 :主動表面（active surface) 114、214、314:保護層（passivation) 116、216、316 :銲墊（pad) 120、220、320 :球底金屬層（UBM) 322 :預銲塊（Pre-form Solder Bump) 130、230、330 :銲罩層（Solder Mask) 230a、330a :第一光阻層 230b、330b :第二光阻層 132、232、332、432、532 :開口 ( opening) 232a、332a :第一'開口 232b、332b :第二開口 140、240、340 :舞料（solder) 142、242、342 :凸塊（bump) 144 :坍塌銲塊 250、3 50 :助銲劑（flux) 第一實施例 爲了說明本發明之第一實施例之凸塊製程，請依序參 考第2A〜2F圖，其爲本發明之第一實施例之凸塊製程的剖 面流程圖。 請參考第2A圖，晶圓210具有一主動表面212、一保 護層214及多個銲墊216 (僅繪示其中之一），其中保護層 214及銲墊216均配置於晶圓210之主動表面212上，而保 護層214係暴露出銲墊216於晶圓210之主動表面212上 方。 9 521361
08379twf3.doc/006 95-8-4 請參考第2B圖，接著可形成一球底金屬層（UBM )220 於銲墊216之上，而球底金屬層220之製作方法，可全面 性形成球底金屬層220於晶圓210之主動表面212上，並 圖案化此球底金屬層220,即可形成如第2圖所示之球底金 屬層220。其中球底金屬層220係由多層不同材質的金屬層 所構成，用以增加銲墊216與凸塊242之間的接合性。 請參考第2C圖，接著形成一圖案化之銲罩層230於晶 圓210之主動表面212上，其中銲罩層230具有多個開口 232 (僅繪示其中之一），用以暴露出球底金屬層220於晶 圓210之主動表面212上方，値得注意的是，開口 232之 底端的橫截面積係小於開口 232之中間的橫截面積，且開 口 232之頂端的橫截面積亦小於開口 232之中間的橫截面 積，使得開口 232之內側壁與晶圓210之主動表面212得 以構成一個可容納第2D圖之銲料240的空間。其中，開口 232之形狀並不侷限於圓形孔，亦可爲八角形或多角形的 孔。 爲了形成第2C圖之開口 232,除了利用已形成開口 232 之網板（Stencil)作爲銲罩層230之外’請參考第4A圖’ 其爲以疊合法形成銲罩層之剖面示意圖’可先形成圖案化 之一第一光阻層230a於晶圓210之主動表面212上’其中 第一光阻層230a之材質例如爲液態光阻或乾膜’而第一光 阻層2 3 0 a具有多個第一'開口 2 3 2 a ’其例如以感光成孔 (Photo-Via)的方式所形成，而第一開口 232a之底端的橫 截面積係小於其頂端的橫截面積。 10 95-8-4 521361 承上所述，接著再貼附一第二光阻層230b於第一光阻 層230a上，其中第二光阻層230b之材質例如爲乾膜’而 第二開口 232b之底端的橫截面積則是大於其頂端的橫截面 積，最後使得第一光阻層230a及第二光阻層230b所組成 之銲罩層230，其開口 232之兩端將具有較小橫截面積，而 開口 232之中間將具有較大的橫截面積，使得開口 232之 縱向剖輪廓線類似對稱凹角狀。此外，銲罩層23〇之開口 232的縱剖面輪廓線並不限於第2C圖所示之對稱凹角狀’ 亦可如第5A圖之所示之對稱圓弧狀，或是如第5B圖所示 之對稱斜線狀等。 請參考第2D圖，在形成圖案化之銲罩層230之後’可 利用印刷或其他方式，將銲料240塡入開口 232之中’並 堆積於銲墊216之上方。其中，銲料240可以銲料粉末 (powder)或銲料膠（paste)的方式塡入開口 232之中。 請參考第2D、2E圖，可噴灑（spray)助銲劑（flux) 250於銲料240之上，當進行迴銲處理時，如此將有助於銲 料104之間的溶合而形成凸塊242。値得注意的是，爲了形 成完美球狀外形的凸塊242,亦可先將助銲劑250預先混入 於銲料240之中，再一倂塡入開口 232之內，並進行第一 次迴銲處理，使得銲料240之間作初步熔合，以形成凸塊 242，但凸塊2M此時可能尙未形成完美的球狀外觀，故可 再次噴灑助銲劑250於凸塊242之上，進行第二次迴銲處 理，最後使凸塊22得具有完美的球狀外觀。最後請參考第 2F圖，在進行迴銲處理形成凸塊242之後，移除第2E圖 95-8-4 ff ：y：-^ Λ c 521361 083 79twB. doc/00 6 之銲罩層230，以暴露出凸塊242，而完成此本發明之第一 實施例的凸塊製程。 本發明之第一實施例係藉由形成一圖案化之銲罩層於 晶圓上，其中銲罩層上兩端與中間之橫截面積不同的開 口，使得兩纟而頸縮之開口與晶圓之主動表面所構成的空 間，將大於直筒狀開口與晶圓之主動表面所構成的空間， 故可以大幅增加塡入銲料之體積，用以增加凸塊的高度及 尺寸，並可有效降低銲料於迴銲處理之後發生凸塊坍塌的 機率。 第二實施例 第二實施例與第一實施例之不同處在於第二實施例係 預先形成一預銲塊，並與後來塡入之銲料相溶合形成凸 塊。爲了說明本發明之第二實施例之凸塊製程，請依序參 考第3A〜3F圖，其爲本發明之第二實施例之凸塊製程的剖 面流程圖。 請參考第3Λ圖，晶圓310具有一主動表面312、一保 護層314及多個銲墊316 (僅繪示其中之一），其中保護層 314及銲墊316均配置於晶圓310之主動表面312上，而保 護層314係暴露出銲墊316於晶圓310之主動表面312上 方。 請參考第3β圖，接著形成一球底金屬層於銲墊 316之上，而球底金屬層320之製作方法，可全面性形成球 底金屬層320於晶圓310之主動表面312上’並圖案化此 球底金屬層320，即可形成如第3圖所示之球底金屬層 521361 08379twfi.doc/006 95-8-4 320。接著分別在銲墊316 (球底金屬層320 )之上，預先 形成一預銲塊322，其作用將於下文說明。 請參考第3C圖，接著形成一圖案化之銲罩層330於晶 圓310之主動表面3 12上，其中銲罩層330具有多個開口 332(僅繪不其中之一0’用以暴露出預銲塊322於晶圓310 之主動表面312上方。與第一實施例相同的是，第3C圖之 銲罩層330亦可由如第4B圖所示之一第一光阻層330a及 一第二光阻層330b所組成，並利用第一開口 332a及第二 開口 332b構成開口 332，使得開口 332之縱剖面輪廓線亦 呈對稱凹角狀或其他類似形狀，讓開口 332之側壁與晶圓 310之主動表面312得以構成一容納第3D圖之銲料340的 空間。 請參考第3D圖，在形成圖案化之銲罩層330之後，可 利用印刷或其他方式，將銲料340塡入開口 332之中，並 堆積於預銲塊322之上方。其中，銲料340可以銲料粉末 或銲料膠的方式塡入開口 332之中。接著請同時參考第 3D、3E圖，將第3E圖所示之銲料340塡入開口 332之後， 接著進行一迴銲步驟，使得第3D圖之預銲塊322及銲料 340之間相熔合後’而形成第3E圖之凸塊342。並同時參 考第3F圖，在進行迴銲處理之後，最後移除第3E圖的銲 罩層330，而完成此本發明之第二實施例的凸塊製程◦ 本發明之第二實施例係同樣藉由形成一圖案化之銲罩 層於晶圓上，其中銲罩層上具有曲線狀之縱剖面輪廓線的 開口，使得兩端頸縮的開口與晶圓之主動表面所構成的空 13

Claims (1)

  1. 521361 08379twf3.doc/006 95-8-4 圓之主動表面之間所構成用來塡料的空間，故可大幅增加 塡入銲料之體積，並於迴銲處理之後，可增加凸塊的高度 及尺寸，同時可降低銲料經迴銲處理之後發生凸塊坍塌的 機率，進而大幅提高凸塊之製作良率，且特別是較大尺寸 及高度的凸塊之製作良率。 此外，本發明之上述三實施例所提的凸塊製程均可應 用於製作銲料凸塊，包括含鉛銲料凸塊C With Lead Solder Bump)及無給舞料凸塊（Lead Free Solder Bump) ’或是應 用於製作其他材質的凸塊。並且在第二實施例所提到的預 銲塊及銲料之組成成分可以不相同，在迴銲熔合後所形成 之凸塊，其組成成分將可符合設計上的需求。同樣地，在 第三實施例所提到的第一凸塊與銲料之組成成分亦不相 同，在迴銲溶合後形成新的凸塊，其組成成分亦可符合設 計上的需求。 雖然本發明已以三較佳實施例揭露如上，然其並非用 以限定本發明，任何熟習此技藝者，在不脫離本發明之精 神和範圍內，當可作些許之更動與潤飾，因此本發明之保 護範圍當視後附之申請專利範圍所界定者爲準。 521361 08379twf3.doc/006 第91103533號說明書修正本 95-8-4 伍、 中文發明摘要： 一種凸塊製程，適於在晶圓上製作凸塊。此凸塊製程 係在晶圓上形成一圖案化之銲罩層，且銲罩層之多個開口 係分別暴露出晶圓上的銲墊，其中這些開口之兩端的橫截 面積係小於其中間的橫截面積。接著，塡入銲料於這些開 口之中，並經迴銲處理後，使得位於該開口之中的銲料， 分別形成球狀之凸塊，最後移除上述之銲罩層。此外，此 凸塊製程亦可先形成預銲塊於晶圓之銲墊上，再形成圖案 化之銲罩層於晶圓上，並塡入銲料於銲罩層之暴露銲墊的 開口內’並經迴銲處理之後，使預銲塊與銲料相熔合而形 成凸塊’其中預銲塊與銲料之組成成分可不相同。 陸、 英文發明摘要： 柒、指定代表圖： ㈠本案指定代表圖為：第（）圖。 (-)本代表圖之疋件代表符號簡單說明·· 掏^案右有化學式時，請揭示最能顯示發明特徵的化學 4 10^1 08379twfi.doc/006 95-8-4 丄j ()丄第91103533號說明書修正本 伍、 中文發明摘要： 一種凸塊製程，適於在晶圓上製作凸塊◦此凸塊製程 係在晶圓上形成一圖案化之銲罩層，且銲罩層之多個開口 係分別暴露出晶圓上的銲墊，其中這些開口之兩端的橫截 面積係小於其中間的橫截面積。接著，塡入銲料於這些開 口之中，並經迴銲處理後，使得位於該開口之中的銲料’ 分別形成球狀之凸塊，最後移除上述之銲罩層。此外，此 凸塊製程亦可先形成預銲塊於晶圓之銲墊上，再形成圖案 化之銲罩層於晶圓上，並塡入銲料於銲罩層之暴露銲墊的 開口內，並經迴銲處理之後，使預銲塊與銲料相熔合而形 成凸塊，其中預銲塊與銲料之組成成分可不相同。 陸、 英文發明摘要： 柒、 指定代表圖： (一) 本案指定代表圖為：第（ ）圖。 (二) 本代表圖之元件代表符號簡單說明： 拓J、本案若有化學式時，請揭示最能顯示發明特徵的化學 式：
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