TW516196B - Semiconductor chip with a protection cover and the manufacture method of the same - Google Patents
Semiconductor chip with a protection cover and the manufacture method of the same Download PDFInfo
- Publication number
- TW516196B TW516196B TW090121963A TW90121963A TW516196B TW 516196 B TW516196 B TW 516196B TW 090121963 A TW090121963 A TW 090121963A TW 90121963 A TW90121963 A TW 90121963A TW 516196 B TW516196 B TW 516196B
- Authority
- TW
- Taiwan
- Prior art keywords
- wafer
- semiconductor
- resistant
- protective layer
- semiconductor wafer
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3171—Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8538—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/85399—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
- H01L2224/8592—Applying permanent coating, e.g. protective coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE10043955A DE10043955A1 (de) | 2000-09-06 | 2000-09-06 | Halbleiterchip mit einer Schutzabdeckung und zugehöriges Herstellungsverfahren |
Publications (1)
Publication Number | Publication Date |
---|---|
TW516196B true TW516196B (en) | 2003-01-01 |
Family
ID=7655207
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW090121963A TW516196B (en) | 2000-09-06 | 2001-09-05 | Semiconductor chip with a protection cover and the manufacture method of the same |
Country Status (3)
Country | Link |
---|---|
DE (1) | DE10043955A1 (de) |
TW (1) | TW516196B (de) |
WO (1) | WO2002021596A2 (de) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10337256A1 (de) * | 2002-11-21 | 2004-06-09 | Giesecke & Devrient Gmbh | Integrierte Schaltkreisanordnung und Verfahren zur Herstellung derselben |
DE10324751B4 (de) * | 2003-05-30 | 2009-01-22 | Infineon Technologies Ag | Verfahren zur Herstellung einer Halbleiter-Struktur mit einem Halbleitersubstrat und mit diesem Verfahren hergestellte Halbleiter-Struktur |
DE102004007690B3 (de) | 2004-02-16 | 2005-10-13 | Infineon Technologies Ag | Integrierte Schaltungsanordnung |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4247031A (en) * | 1979-04-10 | 1981-01-27 | Rca Corporation | Method for cracking and separating pellets formed on a wafer |
US5258334A (en) * | 1993-01-15 | 1993-11-02 | The U.S. Government As Represented By The Director, National Security Agency | Process of preventing visual access to a semiconductor device by applying an opaque ceramic coating to integrated circuit devices |
US5387480A (en) * | 1993-03-08 | 1995-02-07 | Dow Corning Corporation | High dielectric constant coatings |
US5807611A (en) * | 1996-10-04 | 1998-09-15 | Dow Corning Corporation | Electronic coatings |
ATE254803T1 (de) * | 1997-09-19 | 2003-12-15 | Fraunhofer Ges Forschung | Verdrahtungsverfahren für halbleiter-bauelemente zur verhinderung von produktpiraterie und produktmanipulation, durch das verfahren hergestelltes halbleiter-bauelement und verwendung des halbleiter-bauelements in einer chipkarte |
DE19853703A1 (de) * | 1998-11-20 | 2000-05-25 | Giesecke & Devrient Gmbh | Verfahren zur Herstellung eines beidseitig prozessierten integrierten Schaltkreises |
-
2000
- 2000-09-06 DE DE10043955A patent/DE10043955A1/de not_active Ceased
-
2001
- 2001-08-30 WO PCT/DE2001/003308 patent/WO2002021596A2/de active Application Filing
- 2001-09-05 TW TW090121963A patent/TW516196B/zh active
Also Published As
Publication number | Publication date |
---|---|
DE10043955A1 (de) | 2002-04-04 |
WO2002021596A2 (de) | 2002-03-14 |
WO2002021596A3 (de) | 2003-03-06 |
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