TW503497B - Resin-molding method, molding dies and circuit base member - Google Patents

Resin-molding method, molding dies and circuit base member Download PDF

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Publication number
TW503497B
TW503497B TW090103079A TW90103079A TW503497B TW 503497 B TW503497 B TW 503497B TW 090103079 A TW090103079 A TW 090103079A TW 90103079 A TW90103079 A TW 90103079A TW 503497 B TW503497 B TW 503497B
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TW
Taiwan
Prior art keywords
circuit board
mold
resin molding
item
resin
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Application number
TW090103079A
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Chinese (zh)
Inventor
Kazuo Shimizu
Hisayuki Tsuruta
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Nippon Electric Co
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Publication of TW503497B publication Critical patent/TW503497B/en

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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B29—WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29C—SHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C45/00—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor
    • B29C45/14—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles
    • B29C45/14639—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components
    • B29C45/14655—Injection moulding, i.e. forcing the required volume of moulding material through a nozzle into a closed mould; Apparatus therefor incorporating preformed parts or layers, e.g. injection moulding around inserts or for coating articles for obtaining an insulating effect, e.g. for electrical components connected to or mounted on a carrier, e.g. lead frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565—Moulds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Mechanical Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Moulds For Moulding Plastics Or The Like (AREA)
  • Injection Moulding Of Plastics Or The Like (AREA)

Abstract

The present invention provides a resin-molding method comprising the steps of: placing a circuit base member onto a mounting face of first one of paired dies, wherein a back face of the circuit base member is in contact with the mounting face; placing the paired dies in a closing state for clamping a peripheral region of the circuit base member with the paired dies; and injecting a molten resin into a cavity of the paired dies for filling the cavity with the injected resin, wherein, in the closing state, a first pressure effected to a front face of the circuit base member is set higher in pressure level than a second pressure effected to the back face of the circuit base member, so as to secure the circuit base member to the mounting face.

Description

503497503497

【發明領域】 4本發明係關於一種樹脂塑造方法、塑造成形用模具及 電路基板構件，特別是一種下注塑形技術，其中複數^固半 導體裝置係焊在K電路板之—自，以供後續的批次 作業以樹脂封裝該複數個半導體裝置，係在塑造成形用 具所形成的單一模穴中進行之。 、 【發明背景】 1知技術之描诫 下注塑形（transfer molding)已被廣泛地應用於半導 體衷置（semiconductor device)的樹脂封裝（resin enCapsulation)技術，其中複數個半導體裝置係焊在一電 路基板構件（Clrcuit base member)，該電路基板構件包 括一電路板（circuit board)、一電路薄膜（circuit f=m)^T罢電路膠帶（circuit tape)，以依序地將該半導 體裝置e又置於一模具的一模穴（cavity)之中，因此， 一塑造成形機之一柱塞“丨丨……㈠從 _ ^ m ® 穴，以#f兮主道μf ) 熔化樹脂注入該模 八以對為+ V體裝置進行樹脂封裝。 拓随複數t半導體裝置彳m —之基板構件上排列成-=二供，=個半導體裝置之後續的樹脂封裝。可能 地對單獨的該半導體裝置以樹脂進行封 是一次對複數個半導體裝置以樹脂進 =有^’後一方法的批次樹脂封裝較為優秀， 因為具有同生產率與低成本。 503497 五、發明說明（2) 在該半導體裝置單獨的樹脂封裝方法之中，供單一封 裝之一半導體裝置，是在異於其它模穴的單一模穴之中， ^其它模穴之中的其它半導體裝置是供其它封裝之用，且 單獨地以樹脂進行封裝。而以一塑造成形用模具（m〇ldi叫 d 1 e)的内部形狀來形成該封裝樹脂的侧面。藉由在該塑造 成形用模具之中的樹脂成形程序，以形成單獨的複數個封 裝树脂而供單獨的封裝，而不必進行切塊程序（d丨c丨ng process)，以切割或分開該封裝樹脂。如果任何連接層或 任何阻烊層（solder-resist layer)存在於該電路基板構 件或其切割線之上，例如一劃分線（scribe Une)，則必 須切割該連接層或該阻焊層。 數個半 裝。根 板外觀 裝置進 panel) 個半導 序之中 法，可 薄膜。 下模具 使用習 方法的 該批次樹脂封裝方法之中 導體裝置 據該批次樹 之一單元， 行封裝，該 。因此，必 體封裝，每 以切割而形 使用一脫模 圖1A至1D是 與焊在一電 是一次在一單 脂封裝方法， 對供複數個封 單元即稱為一 須以切塊程序 一單獨的半導 成。使用下注 薄膜（release 部份剖面前視 路基板構件上 知的下注塑形且使用一脫 一順序步驟。塑造成形用 ’供複數個封裝之用的複 一模穴之中以樹脂進行封 封裝樹脂係形成單一平面 裝之用的該複數個半導體 封裝面板（package 將該封裝面板分開成複數 體封裝之侧面是在切塊程 塑形的該批次樹脂封裝方 i i 1 m)或不使用任何脫模 圖’以顯示一上模具、一 的複數個半導體裝置，在 模薄膜之該批次樹脂封裝 模具120包括一上模具κι 503497 五、發明說明（3) 與一下模具122，上模具121更包括一上中心塊24，下模具 122更包括一下中心塊25與一電路基板構件安裝塊142。下 中心塊2 5設置一凹部（p〇t) 2 7，以供填滿一樹脂2 6。在凹 4 Y之中填滿樹脂2 6，然後伸入一柱塞2 8以對樹脂2 6施加 一壓力。上中心塊24設置一開孔（caiiber)29，其位置係 相對於凹部27。一橫澆道（runner) 30設置於開孔29的兩 側’作為樹脂2 6到達一頂模穴2 3之通道。上模具1 2 1具有 頂模穴23a，以收納焊在 電路基板構件111之上的複數 個半導體裝置1 2 ’其中樹脂2 6被注入頂模穴2 3 a，以利用 樹脂26來封裝半導體裝置。設置於開孔29兩側的橫澆道3〇 連接頂模穴2 3 a之一第一侧，係相鄰著上中心塊2 4。一通 氣孔（air vent)丨46形成於頂模穴2 3a且相向著該第一側之 一第二侧，通氣孔1 46係在將樹脂注入頂模穴23a之時，釋 出頂模穴23a之中的空氣。通氣孔146包括一溝槽道 (channel groove)，係形成於上模具121之一夾持面 (cramp jace)。下模具122具有一底模穴23b，其位置係相 對於上模具1 21之頂模穴23a，底模穴23b收納電路基板構 ^ 111、。―頂模穴23a與底模穴23b形成一密閉或密封的模 穴，以密封住電路基板構件丨丨i與半導體裝置丨2，而電路 基板構件111是固定於電路基板構件安裝塊142。 構件安裝塊142是從-區域塊降低，而形成底模穴23b二收 納電路基板構件11丨。電路基板構件安裝塊丨42 4而可移動自如㈤，係藉由一利用-彈性構件 子動機構（fl〇atlng mechanism)。電路基板構件安裝[Field of the Invention] 4 The present invention relates to a resin molding method, a mold for molding and a circuit substrate member, particularly a lower injection molding technology, in which a plurality of solid-state semiconductor devices are soldered to a K circuit board—for subsequent use. The plurality of semiconductor devices are encapsulated by resin in a batch operation in a single mold cavity formed by molding. [Background of the Invention] Injection molding (transfer molding) has been widely used in semiconductor encapsulation (resin enCapsulation) technology, in which a plurality of semiconductor devices are soldered to a circuit. A substrate member (Clrcuit base member). The circuit substrate member includes a circuit board, a circuit film (circuit f = m), and a circuit tape. It is placed in a cavity of a mold. Therefore, a plunger “丨 丨 …… ㈠ from a cavity of a molding machine is injected into the mold with #f 西 主 道 μf) molten resin. Eight pairs of + V-body devices are resin-encapsulated. Top-up semiconductor devices —m — are arranged on a substrate member of-= two supplies, followed by resin encapsulation of semiconductor devices. It is possible to separate the semiconductor device. Resin encapsulation is the batch resin encapsulation of a plurality of semiconductor devices at a time by using resin. The latter method is superior because it has the same productivity and low cost. 503497 V. Invention (2) In this method of resin packaging of a single semiconductor device, one semiconductor device for a single package is in a single cavity different from the other cavity, and ^ other semiconductor devices in the other cavity are provided for other It is used for encapsulation and is individually encapsulated with resin. The side surface of the encapsulating resin is formed by an internal shape of a mold for molding (molddi called d 1 e). Resin forming process to form a single plurality of encapsulating resins for individual encapsulation without having to perform a d 丨 c 丨 ng process to cut or separate the encapsulating resin. If any connecting layer or any barrier layer (Solder-resist layer) exists on the circuit board component or its cutting line, such as a scribe Une, the connection layer or the solder mask must be cut. Several half packs. The appearance of the root board panel) semi-conductor method, can be thin film. In the batch of resin packaging method of the mold using the conventional method, the conductor device is packaged according to one unit of the batch tree. Must be packaged, each mold is used for cutting. Figures 1A to 1D are used for soldering at the same time and once in a single grease packaging method. For multiple sealing units, it is called a dicing process. Semi-conducting. Using a betting film (release part of the cross-section of the front view circuit board member known under the injection molding and using a separate sequence of steps. Molding molding 'for multiple packaging in a plurality of cavities for The resin is used to form a single flat surface package of the plurality of semiconductor packaging panels (the package divides the packaging panel into a plurality of packages and the side of the package is the batch of resin packaging squares shaped during the dicing process) 1 m Or without using any demolding pattern 'to show an upper mold, a plurality of semiconductor devices, and the batch of resin packaging mold 120 in the mold film includes an upper mold 503497 5. Description of the invention (3) and the lower mold 122, The upper mold 121 further includes an upper center block 24, and the lower mold 122 further includes a lower center block 25 and a circuit substrate component mounting block 142. The lower center block 25 is provided with a recessed portion (pot) 2 7 for filling with a resin 26. The resin 2 6 is filled in the recess 4 Y, and then a plunger 28 is extended to apply a pressure to the resin 2 6. The upper central block 24 is provided with an opening 29 (caiiber), and its position is relative to the recess 27. A runner 30 is provided on both sides of the opening 29 'as a passage for the resin 2 6 to reach the top cavity 23. The upper mold 1 2 1 has a top mold cavity 23 a to accommodate a plurality of semiconductor devices 1 2 ′ soldered on the circuit substrate member 111, wherein the resin 2 6 is injected into the top mold cavity 2 3 a to encapsulate the semiconductor device with the resin 26. . The horizontal runners 30 provided on both sides of the opening 29 are connected to one of the top sides of the top cavity 2 3 a and are adjacent to the upper central block 24. An air vent 46 is formed in the top mold cavity 23a and faces one of the first side and the second side. The air vent 1 46 is released when the resin is injected into the top mold cavity 23a, and the top mold cavity 23a is released. In the air. The vent hole 146 includes a channel groove formed in a cramp jace of the upper mold 121. The lower mold 122 has a bottom mold cavity 23b, and its position is relative to the top mold cavity 23a of the upper mold 121, and the bottom mold cavity 23b accommodates the circuit board structure 111. ―The top mold cavity 23a and the bottom mold cavity 23b form a closed or sealed cavity to seal the circuit board member 丨 i and the semiconductor device 2 and the circuit board member 111 is fixed to the circuit board member mounting block 142. The component mounting block 142 is lowered from the -area block to form the bottom mold cavity 23b to receive the circuit board component 11 丨. The circuit board component mounting block 424 can be moved freely through a utilization-elastic member mechanism. Circuit board component mounting

第8頁 503497 五、發明說明（4) 塊142在上下方向的移動，以產生 需要該浮動機構以配合一廣範;^路 糂深度變化。 “個不同。若不使用該浮=電因其厚 的固定深度。作县，婪；t危η 則J保持底核穴23b 電路基板構件ίί塊142上度;^ 面高低會產生變化。若固定在底模穴饥之ί 的：於底模穴饥之固定深度是太厚 此會破力會施加於該電路基板構件，因 此接从 電路基板構件。若固定在底模穴231)之電路美 咭，列：f度，相對於底模穴23b之固定深度是太薄的 隙，因構件的失㈣力不U形成一間 來解灰K 攸该間隙洩漏熔化樹脂。該浮動機構即是設置 #用^ m的問題，係因為電路基板的厚度變化之故。若 為腐:ϋ型電路基板構件1丨丨，則不需要該浮動機構，因 ς ^里電路基板構件ln為薄層，且膠帶型電路基板構 的厚度變化很小，所以沒有問題。 上模具121具有一吸附孔（ads〇rpti〇n h〇le)44，以真 一脫模薄膜。吸附孔44具有一開口 44a，係緊鄰著 ^ 八2 3a。吸附孔44提供頂模穴2 3a與一未標示的外部真 王源之間的連接。若模具上不需要脫模薄膜，則不必設置 吸附孔44。 未標示的樹脂塑造成形機設置一模具丨2 〇，還具有 一未標示的上底座以支持上模具丨21，與一未標示的下底 、支持下模具1 2 2 ’且具有一未標示的加熱器以加熱模Page 8 503497 V. Description of the invention (4) The movement of the block 142 in the up-down direction to produce the need for the floating mechanism to match a wide range;; Road depth changes. "It's different. If you don't use the floating = electricity because of its thick fixed depth. For counties, greed; t η η, then J keeps the bottom core cavity 23b circuit board component 142 degrees; ^ The height of the surface will change. Fixed in the bottom mold cavity: The fixing depth in the bottom mold cavity is too thick. This will cause a breaking force to be applied to the circuit substrate component, so it is connected to the circuit substrate component. If it is fixed in the bottom mold cavity 231), the circuit Beautiful, column: f degree, the fixed depth relative to the bottom mold cavity 23b is too thin gap, due to the failure force of the component, a gap is not formed to dissolve ash, and the gap leaks molten resin. The floating mechanism is The problem of setting # 用 ^ m is due to the change in the thickness of the circuit board. If it is a rot: ϋ-type circuit board member 1 丨 丨, the floating mechanism is not needed, because the circuit board member ln is a thin layer, And the thickness of the tape-type circuit substrate structure is small, so there is no problem. The upper mold 121 has an adsorption hole 44 (adsorption), which is a true release film. The adsorption hole 44 has an opening 44a, which is next to ^ 八 2 3a. The suction hole 44 provides a top mold cavity 2 3a and an unlabeled The connection between the external true king source. If no mold release film is needed on the mold, there is no need to set the suction hole 44. An unlabeled resin molding machine is provided with a mold 丨 2 〇, and also has an unlabeled upper base to support the upper mold 丨21, with an unmarked lower bottom, supporting the lower mold 1 2 2 ′ and having an unmarked heater to heat the mold

第9頁 五、發明說明（5) ^ = 0，一未標示的真空泵以作為一真空源，一未標示的 =古機構，及一未標示的退出機構。該樹脂塑造成形機更 ^有一柱塞28。上模具121與下模具122是利用板件或螺 各別地固疋在該上底座與該下底座。該上底座或該下 履座被昇起以關閉模具1 2 〇。 用來封裝一半導體裝置的該習知批次樹脂封裝方法， /、形成違半導體裝置的方法即如下述。 [焊接程序] 須在樹脂成形程序之前進行一焊接程序（b〇ndi^ ^c^cess)。在焊接程序之中，供複數個封裝之半導體裝置 =以矩陣形式，而配置於一單一之電路基板構件丨j i 主要平面上，再焊到單—之電路基板構件⑴，半導 體虞置1 2是以連線焊接法（wire-b〇nded)焊到單一之 基板構件111。在圖1 a、1 β盥1 r夕击 > 加丄… .M β 16與1〇之中，母個半導體裝置12 疋错由接a線1 6，以連線焊接法焊到單一之電路基 ⑴H半導體裝置12亦可用無連線焊接法 (WlreleSS-b〇nded)焊到單一之電路基板構件lu，例如 用凸塊。無論如何，半導體裝置 構件111之上。 干心电路基板 [夾持前程序] 參考圖1A以說明一类牲治名口广, 火符則私序（pre-cramping process)。緊接著上述之焊接程序即進行一 構件Λ1被固定於下模具122之電路基板構=裝 塊1 4 2之上’设置^一脫描》墙贈/11 ^ 表 貺衩溥膜41以覆蓋一頂模穴23a、一開 503497 五、發明說明（6) 孔29與一橫澆道30，其中脫模薄膜41是以真空吸附於頂模 穴23a的表面，所以脫模薄膜41係沿著内表面延伸。其結、 果是，吸附孔44的開口 44a被脫模薄膜41所密封。然^ 脫模薄膜41是可透氣的’所以空氣以很小的流量通過脫模 薄膜41，而被吸入吸附孔44之中。意即，流入吸附孔44的 空氣並未完全停止。脫模薄膜41使之易於從模具的内表面 釋放已成形的樹脂。若不使用脫模薄膜41，則必須在該固 持物件上设置一頂針（p i n )，因此注入機構可利用該頂針 來推動已成形的樹脂，使之從模具的内表面釋放出來，其 中可以定期地將一脫模劑（releasing agent)塗佈於注入〃 成形的樹脂2 6的上模具1 2 1之内表面，以促進脫模。 、電路基板構件111與脫模薄膜41係藉由接觸模具120而 被加熱，模具1 20則已被一未標示的加熱器所加熱。因為 電，基板構件1 1 1是從其背面加熱，即在電路基板構件1工工 於電路基板構件安裝塊142之時，所以會在電路基板 二：111的背面產生一相當大的熱膨脹，電路基板構件⑴ 二η㈣變成弓形。然而，如此電路基板構件ιη的 肖失之後，才可以進行樹脂注入。隨後，一 「、树脂2 6被置於下模具1 2 2的凹部2 7之中。 [夾持程序] 夾掊，ί持!1程序之後即進行夾持程序。參考® 1 β以說明 具122^1人。操作該樹脂塑造成形機以將上模具121與下模 ^ 5在一起，藉模具120以夾持電路基板構件lu， 503497 五、發明說明（7) 其中，電路基板構件1U之一周圍部份是被上模且121盥下 =122所夾持。電路基板構件⑴之半導體裝置固定區域 並未被夾持，而被包含在頂模穴23a之中。 [樹脂注入程序] :樹脂26被熔化’然後藉由柱塞以注入熔化樹脂26， =熔化樹脂26是經由一開孔29與橫洗道3〇被供應到頂模 二2】a，如此，模具⑽之頂模穴…即被注入的樹脂Μ所 ^出^，頂模穴23a之内的空氣是經由一㉟氣孔146而 [樹脂熱固程序] 3=120填滿樹脂26之後’樹脂26即處於熱固程 Ϊ面：：f26包括一熱固型的成份，如此即可完成-封 5 ί從：具120以釋放該封裝面板與脫模薄膜 且從邊封裝面板移除用過的脫模薄膜41。 [外終端成型] 、 SI*id若需要的^，可形成一外終端。在一球柵陣列（ball = 作為外終端的坪球被設置於電路 [封裝切塊程序] 接著即進行一封裝切塊程序’係利用一具有一 刀片之切塊機’以切割刀片之磨料來切割該封震面板， =以將该封裝面板分成複數個半導 導體封裝的侧面是該切割刀片所形成=割面+母料 上述之習知技術具有下列問題。如圖1B所示，使用模 第12頁 503497Page 9 V. Description of the invention (5) ^ = 0, an unlabeled vacuum pump is used as a vacuum source, an unlabeled = ancient mechanism, and an unlabeled exit mechanism. The resin molding machine further includes a plunger 28. The upper mold 121 and the lower mold 122 are respectively fixed to the upper base and the lower base by a plate member or a screw. The upper base or the lower track is raised to close the mold 120. The conventional batch resin packaging method for packaging a semiconductor device, and / or the method for forming a semiconductor device is as follows. [Welding procedure] A welding procedure (bondi ^^ c ^ cess) must be performed before the resin forming procedure. In the soldering process, a plurality of packaged semiconductor devices are arranged in a matrix form and arranged on a single circuit board member, the main plane, and then soldered to a single circuit board member. A single substrate member 111 is soldered by wire-bonding. In Fig. 1 a, 1 β, 1 r, and 丄 ... .M β 16 and 10, the mother semiconductor device 12 is connected to the single wire 16 by a wire welding method, and is welded to a single The circuit-based semiconductor device 12 can also be soldered to a single circuit board member lu using a wireless soldering method (WlreleSS-bonded), for example, using a bump. In any case, the semiconductor device member 111 is on. Dry-heart circuit board [Pre-clamping procedure] Referring to FIG. 1A to explain a class of treatments with a wide range of reputations, fire symbols are in a pre-cramping process. Immediately following the welding procedure described above, a component Λ1 is fixed to the circuit substrate structure of the lower mold 122 = mounting block 1 4 2 'setting ^ a detached' wall gift / 11 ^ Table 贶 衩 溥 film 41 to cover a Top mold cavity 23a, one open 503497 V. Description of the invention (6) Hole 29 and a runner 30, wherein the release film 41 is vacuum-adsorbed on the surface of the top mold cavity 23a, so the release film 41 is along the inside Surface extension. As a result, the opening 44a of the suction hole 44 is sealed by the release film 41. However, the release film 41 is breathable 'so that air passes through the release film 41 at a small flow rate and is sucked into the adsorption hole 44. That is, the air flowing into the adsorption hole 44 is not completely stopped. The release film 41 makes it easy to release the formed resin from the inner surface of the mold. If the release film 41 is not used, a pin must be provided on the holding object, so the injection mechanism can use the pin to push the formed resin and release it from the inner surface of the mold, which can be periodically A release agent is applied to the inner surface of the upper mold 1 2 1 of the resin 2 6 injected into the mold to promote mold release. The circuit board member 111 and the release film 41 are heated by contacting the mold 120, and the molds 120 are heated by an unmarked heater. Because of the electricity, the substrate member 1 1 1 is heated from its back, that is, when the circuit substrate member 1 is working on the circuit substrate member mounting block 142, a considerable thermal expansion will occur on the back of the circuit substrate 2: 111, and the circuit The substrate member ⑴2η㈣ becomes bow-shaped. However, resin injection can be performed only after such a loss of the circuit board member. Subsequently, a resin 2 6 was placed in the recess 2 7 of the lower mold 1 2 2. [Clamping procedure] After clamping, the clamping procedure was performed after the 1 procedure. Refer to ® 1 β for explanations. 122 ^ 1 person. Operate the resin molding machine to hold the upper mold 121 and the lower mold ^ 5 together, and use the mold 120 to hold the circuit board member lu, 503497 V. Description of the invention (7) Among which, the circuit board member 1U A peripheral part is clamped by the upper mold and 121 lower = 122. The semiconductor device fixing area of the circuit board member ⑴ is not clamped, but is contained in the top mold cavity 23a. [Resin injection procedure]: The resin 26 is melted ', and then the molten resin 26 is injected through the plunger, = the molten resin 26 is supplied to the top mold 2 through an opening 29 and the horizontal washing channel 30] a. Thus, the top cavity of the mold… ... That is, the resin M is injected ^, and the air in the top cavity 23a passes through an air hole 146 and [resin thermosetting program] 3 = 120 after filling the resin 26, the resin 26 is on the surface of the thermoset. :: f26 includes a thermosetting component, so it can be completed-Seal 5 ί From: With 120 to release the package panel and Mold film and remove the used release film 41 from the side package panel. [Outer terminal molding], SI * id can form an outer terminal if required. A ball grid array (ball = ping as outer terminal) The ball is set in the circuit [package cutting and dicing program] Then a packaging and dicing program is performed, which uses a cutting machine with a blade to cut the sealing panel with the abrasive of the cutting blade, to divide the packaging panel into The side surface of the plurality of semiconducting conductor packages is formed by the cutting blade = cutting surface + masterbatch. The above-mentioned conventional technique has the following problems. As shown in FIG. 1B, the mold is used. Page 12 503497

具120進行夾持程序，藉以將電路基板構件丨n收納於模具 120之中。此時，吸附孔44的低壓是經由脫模薄膜41而作 用到電路基板構件111，所以電路基板構件丨丨丨被吸附於上 模具1 2 1之上’因此電路基板構件1 1 1之中心部位是浮動 的，且其最高部位的接合線1 6會接觸到脫模薄膜41。此情 形稱為第一型態。如圖1C所示，熔化樹脂26在高壓下被^ 入頂模穴23a，在頂模穴23a最深處之該電路基板構件的一 面，則會因而皺起且向著上模具121浮動。其結果是，最 高部位的接合線1 6會接觸到脫模薄膜41。此情形稱為第二 型態。 一 根據本發明人之研究，可確認的是，採用板型電路基 板構件11 1之時’容易出現上述之第一型態，當採用膠帶 型電路基板構件1 1 1之時，容易出現上述之第二型態。 接合線16之接觸到脫模薄膜41，會在接合線16產生一 機械應力，且接合線丨6會產生不可接受的變形。若一接 模薄膜41之上且進行樹脂封裝，則該接觸痕跡 ί 1封裝面板的表面’造成該半導體封裝的表面缺 r且‘體封裝疋有缺陷的產°°°，且須自生產線移 跡的該半導體封裝會被不正碟地辨識，而 生i線務二二1或凸出，且樹脂的成形並不適當，然後自 是正常益$，甚至就异料導體封裝的功能 二“、、决貝際上也很難將該半導體封裝交认客戶。 電路t 開專利公報第8-i42iG6號，揭“了避免該 "構件之于動，乃對該電路基板構件施以一真空吸The tool 120 performs a clamping process, so that the circuit board member ˜n is stored in the mold 120. At this time, the low pressure of the suction hole 44 is applied to the circuit board member 111 through the release film 41, so the circuit board member 丨 丨 丨 is attracted to the upper mold 1 2 1 '. Therefore, the center portion of the circuit board member 1 1 1 It is floating, and the bonding wire 16 at its highest part will contact the release film 41. This situation is called the first form. As shown in FIG. 1C, the molten resin 26 is pressed into the top mold cavity 23a under high pressure, and the side of the circuit substrate member at the deepest part of the top mold cavity 23a will be wrinkled and float toward the upper mold 121. As a result, the bonding wire 16 at the highest position comes into contact with the release film 41. This situation is called the second type. According to the research by the present inventors, it can be confirmed that when the plate-type circuit substrate member 11 1 1 is used, the above-mentioned first type is prone to occur, and when the tape-type circuit substrate member 1 1 1 is used, the above-mentioned one is likely to occur. The second type. The contact of the bonding wire 16 with the release film 41 will cause a mechanical stress on the bonding wire 16 and the bonding wire 6 will cause unacceptable deformation. If a mold film 41 is formed on top of the resin film, the contact traces 1 The surface of the package panel 'causes the surface of the semiconductor package to be deficient and the body package is defective. The semiconductor package that was traced will be identified incorrectly, and the product line 2 or 1 may protrude, and the resin is not formed properly, and then it is normal to benefit, and even the function of the outer conductor package 2 ", It ’s also difficult to confess the semiconductor package to the customer on the occasion. Circuitry Patent Publication No. 8-i42iG6 reveals that "to avoid the" movement of this component "is to apply a vacuum suction to the circuit substrate component.

第13頁 503497Page 13 503497

附:本發明人已確認，若作用於該電路基板構件正面 放薄膜吸附裝置之低壓，低於作用於該電路基板構件背面 的電路基板構件吸附裝置之低壓，則該電路基板構 第一型態的方式浮動。 疋1 若電路基板構件1 1 1是板型或基板型，電路基板構件 安裝塊1 4 2顯示一浮動的動作，因此必須在電路基板構件 安裝塊1 42和與之鄰接的其它塊體之間，設置一間隙。然 而该間隙會導致真空洩漏，因此會減少作用於電路板戈美 板111背面的吸附力。其結果是，電路基板構件lu以第二 型態的方式浮動著。 上述日本公 塑造成形機，可 進行樹脂成形， 緣區域，是被固 存在於該基板的 大，相較於該接 此不會產生上述 電路板施加真空 持程序之前將該 案對夾持程序之 提，該日本公開 術，以對該半導 電路基板構件之 案亦未提供任何 開專利公 以對焊在 其中圍繞 定且夾持 正面與背 合線或該 的問題。 吸附，藉 基板或電 後該基板 案亦未揭 體裝置進 複數個半 方法，以 報第8-1 42 1 06號，亦 複數個 複數個基板之 著該半導體裝 住，所以，若 面，則該基板 半導體裝置接 該日本公開案 以吸住該基板 路板置於該上 或電路板被固 露且未教示該 行樹脂封裝， 導體封裝。同 解決關於該批 揭露一樹脂 半導體裝置 置的該基板之一邊 一實質 的上下 觸該釋 宣稱， 或電路 模具。 持的情 批次樹 以供焊 樣地， 次樹脂 上的壓力差 移動並不 放薄膜，因 對該基板或 板，且在夾 該曰本公開 形則隻字不 脂封裝技 在該單一之 該日本公開 封裝技術之Attachment: The inventor has confirmed that if the low voltage of the film adsorption device acting on the front surface of the circuit board member is lower than the low voltage of the circuit substrate member adsorption device acting on the back of the circuit board member, the circuit board structure is the first type Way floating.疋 1 If the circuit board member 1 1 1 is a plate type or a board type, the circuit board member mounting block 1 4 2 shows a floating movement, so it must be between the circuit board member mounting block 1 42 and other blocks adjacent thereto. , Set a gap. However, this gap causes a vacuum leak, and therefore reduces the attraction force acting on the back of the Gome 111 board. As a result, the circuit board member lu floats in the second type. The aforementioned Japanese molding machine can be used for resin molding. The edge area is larger than that held on the substrate. Compared with this, the above-mentioned circuit board does not generate a vacuum holding procedure before applying the vacuum to the clamping procedure. It is mentioned that this Japanese publication does not provide any patent for the case of the semi-conductive circuit board member to butt-weld in it to fix and clamp the front and back lines or the problem. Adsorption, the use of the substrate or the substrate after the case has not been uncovered into the device several and a half methods, to report No. 8-1 42 1 06, but also a plurality of substrates written on the semiconductor, so if, Then the substrate semiconductor device is connected to the Japanese publication to attract the substrate, the circuit board is placed on the circuit board, or the circuit board is exposed and the resin package and the conductor package are not taught. With regard to the batch, one side of the substrate for exposing a resin semiconductor device is substantially touched by the release claim, or the circuit mold. Supporting the batch tree for welding samples, the pressure difference on the secondary resin does not put a thin film, because the substrate or board, and the shape of the disclosure in this folder is not a word. The Japanese Open Packaging Technology

第14頁 503497Page 14 503497

上述問題。 穿晋本專利公報所揭露的習知技術施加於半導體 =樹月曰成开)，以供複數個半導體封裝，在進行單獨的 分：脂成形程序前’該單一之電路基板構件先被 同樣地，習知技術與上述關於該批次 術之嚴重問題是無關的。 ^日对忒技 樹πίΐΓί形下，需要發展"'種新穎的樹脂封裝方法盥 、月曰封表杈具，以使電路基板構件免於上述問題。 【發明概 本發 避免上述 本發 脂封裝方 造成形用 構件之複 從该樹脂 無缺陷半 本發 以供下注 實施批次 述】 明之一目的 問題。 明之另一目 法，以對半 模具之單一 數個半導體 塑造成形用 導體封裝。 明之另^一目 塑形技術之 樹脂封裝， 成焊在一單一之電路 中’該電路基板構件 是提供一種新穎的樹脂封裝方法，以 的是提供下注塑形技術一種新穎的 導體裝置實施批次樹脂封裝 u. ^ , 而在塑 =中甘形成焊在一單一之電路基板 封裝，其中，該電路基板構件可免於 模具内表面的浮動，以實現高產量的 的是提供一種新穎的樹脂封裝模具 樹脂封裝方法使用，以對半導體^置 而在塑造成形用模具之單一模穴;形 基板構件之複數個半導體封裝，其^ 可免於從該樹脂塑造成形用楹二 ^供具内表The above problem. (The conventional technology disclosed in this patent publication is applied to semiconductors = trees and trees), for a plurality of semiconductor packages, and the single circuit board component is the same before being separately divided into: The conventional technique is irrelevant to the above-mentioned serious problems regarding the batch operation. ^ In the shape of the Japanese tree, it is necessary to develop "a novel resin packaging method, and to seal the watch to prevent the circuit board components from the above problems." [Invention of the invention This invention avoids the above-mentioned fat-fat encapsulating side caused by the restoration of structural components. The resin is non-defective. Another method is to use a single semiconductor mold for semi-mold to form a conductive package for semiconductors. The other thing is that the resin packaging of the shaping technology is welded in a single circuit. The circuit board component is to provide a novel resin packaging method to provide a new type of conductor device under the injection molding technology to implement batch resin. Package u. ^, And plastic = Zhonggan to form a single circuit substrate package, where the circuit substrate components can be free from floating on the inner surface of the mold, in order to achieve high yield is to provide a novel resin packaging mold Resin encapsulation method is used to place a single cavity of a mold for forming a semiconductor; forming a plurality of semiconductor packages of a substrate member, which is exempt from the internal surface of the mold for forming a mold.

503497 五、發明說明（11) 面的浮動，以貫現咼產量的無缺陷半導體封裝。 本發明之另一目的是提供一種新穎的電路基板構件， f供下注塑形技術之樹脂封裝方法使用，以對半導體裝置 實施批次樹脂封裝，而在塑造成形用模具之單一模穴^形 成烊在一單一之電路基板構件之複數個半導體封裝，其 中，，電路基板構件可免於自該樹月旨塑造成形用才莫具^内 表面浮動，以實現高產量的無缺陷半導體封裝。 本發明提供-種樹脂封裝方法，包含如下步驟：設置 一電路基板構件於一對模具中之第一個的一安裝面 其中該電路基板構件之一背面接觸 夾持該電路基板構么-邊= =及注入一熔化樹脂於該對模具之一模穴之中且填， 八中银在該閉合狀態中，一作用於該電路基板構件2 —正 :ΐ件：Ξ:::ί值’係設定為大於-作用於該電路基 面 第二壓力，藉以將該電路基板構件固定 之詳它目的、特徵與優點，當可由隨後 【貫施例之詳細說明】 本發明提供一種樹脂封裝方法， :電路基板構件於-對模具中之第一個；一：m置 ί中該電：基板構件之-背面接觸該安Li模 -於閉口狀態’以夾持該電路基板構件的一邊緣區域； 第16頁 503497503497 V. Description of the invention (11) Floating to realize defect-free semiconductor packaging with high yield. Another object of the present invention is to provide a novel circuit substrate component, which is used for the resin packaging method of the following injection molding technology to perform batch resin packaging for semiconductor devices, and to form a single cavity in a molding mold ^ A plurality of semiconductor packages in a single circuit substrate component, among which, the circuit substrate component can be prevented from being floated from the inner surface of the mold for molding purposes, so as to achieve a high-yield defect-free semiconductor package. The present invention provides a resin packaging method, which includes the following steps: setting a circuit board member on a mounting surface of the first of a pair of molds, wherein one of the circuit board members is in contact with the circuit board structure by the back side-side = = And injecting a molten resin into one cavity of the pair of molds and filling them, in the closed state, the eight Chinese silver acts on the circuit substrate member 2 —Positive: Ξ 件: Ξ ::: ί value 'is set In order to be greater than the second pressure acting on the base surface of the circuit, the purpose, characteristics and advantages of fixing the circuit board member can be described later. [Detailed description of the embodiments] The present invention provides a resin packaging method: The substrate member is the first of the pair of molds; one: the middle of the substrate: the back of the substrate member is in contact with the safety Li mold-in a closed state to hold an edge region of the circuit substrate member; Page 503497

以及注入一熔化樹脂於該對模具之一模穴之中且填滿之， 其中，在该閉合狀態_，一作用於該電路基板構件之一正 面的第一壓力之壓力值，係設定為大於一作用於該電路基 板構件之該背面的第二壓力，藉以將該電路基板構 = 於該安裝面。 & 較好的情況是，至少一第 成於該對模具中之第一個之上 於該安裝面之上，且至少一第 中之第二個之上，以將一脫模 該對模具之該第二個之上。 一型吸附孔（&(13(^?1：丨〇11)形 ’以將該電路基板構件吸附 二型吸附孔形成於該對模具 薄膜（release film)吸附於 較好的情況是，該第一型吸附孔的一壓力值，係作用 於該電路基板構件而將之吸附於該安裝面，係低於該第二 梨吸附孔的一壓力值，係作用於該脫模薄膜而將之吸附於 該對模具之該第二個之上。 較好的情況是，複數個第一塑吸附孔形成於該安裝面 至少一邊緣區域之上，以將該電路基板構件之該邊緣區域 吸附於該安裝面之一邊緣區域之上。 較好的情況是，複數個第一塑吸附孔形成於該安裝面 之中央G域°亥中央區域被該安裝面之該邊緣區域所圍 繞’以將該電路基板構件之該邊緣區域連同一中央區域吸 附於該安裝面之上。 、 較好的情況是’該安裝面具有一長方形外觀，且複數 個該第一型吸附孔是均句而對稱地分布，係根 縱中心And injecting a molten resin into one cavity of the pair of molds and filling them, wherein, in the closed state, a pressure value of a first pressure acting on a front surface of the circuit substrate member is set to be greater than A second pressure acting on the back surface of the circuit substrate member is used to construct the circuit substrate on the mounting surface. & Preferably, at least one first is formed on the first surface of the pair of molds on the mounting surface, and at least one second is formed on the second surface to demould one of the pair of molds. On top of that second. The first type adsorption hole (& (13 (^? 1: 丨 〇11) shape) is used to adsorb the circuit substrate member. The second type adsorption hole is formed on the pair of release films. A pressure value of the first type adsorption hole acts on the circuit substrate member and adsorbs it on the mounting surface, and a pressure value lower than the second pear adsorption hole acts on the release film and applies it. It is adsorbed on the second one of the pair of molds. Preferably, a plurality of first plastic adsorption holes are formed on at least one edge region of the mounting surface to adsorb the edge region of the circuit substrate member on Above one edge area of the mounting surface. Preferably, a plurality of first plastic adsorption holes are formed in the central G region of the mounting surface. The central region is surrounded by the edge region of the mounting surface to The edge region and the same central region of the circuit board member are adsorbed on the mounting surface. It is better that the mounting mask has a rectangular appearance, and a plurality of the first type adsorption holes are evenly and symmetrically distributed. , Root longitudinal center

第17頁 503497 五、發明說明（13) 亦可採的情況是，該安 該安I塊在上下方向係為可 車父好的情況是，該電路 (circuit board)。 較好的情況是，該電路 (circuit tape)。 較好的情況是，複數個 構件之上，且該樹脂塑造方 板’以包括複數個樹脂成型 較好的情況是，一高壓 該電路基板構件確實地固定 較好的情況是，該電路 吸附槽。 較好的情況是，該吸附 電路基板構件單元的區域之 較好的情況是，該吸附 域，以包圍陣列型態之該複 較好的情況是，該第一 附槽的位置。 本發明亦提供一種樹脂 一第一模具，具有一安裝面 上’其中該電路基板構件的 第二模具，其第一侧具有一 二側具有一假模穴。 i 2係形成於一安裝塊之上， 移動自如。 基板構件包括一電路板 基板構件包括一電路膠帶 半T體袭置係焊在該電路基板 法是形成一樹脂成型封裝面 封裝之半導體裝置。 氣體被注入該模穴之中，以 於該安裝面之上。 基板構件之該背面具有至少一 2係延伸於陣列型態之複數個 間。 槽更連續地延伸於_邊緣區 數個電路基板構件單元。 型吸附孔是形成於相對於該吸 塑is·成形用模具組合，包含： ，一電路基板構件固定於其 一背面接觸該安裝面；以及一 洗口，且相對於該第一侧之第 503497 五、發明說明（14) 較好的情 吸附孔，以將 該第二模具之 膜吸附於該對 較好的情 之該第 附於該 較好的情 裝面之至少一 緣區域吸附於 較好的情 裝面之 邊緣區 一型吸 第二模 一中央 域所圍 中央區域吸 較 個該第 縱中心 亦 裝塊在 較 較 較 構件之板，以 好的情 一型吸 軸與垂 可取的 上下方 好的情 好的情 好的情 上，且 包括複 況是， 該電路 上形成 模具之 況是， 附孑L的 具上之 況是， 邊緣區 該安裝 況是， 區域之繞，以 附於該 況是， 附孔是 在該第一模具之上形成至少一 基板構件吸附於該安裝面之上 至少一第二型吸附孔，以將一 該第二模具之上。 將該電路基板構件吸 一壓力 該第二 複數個 域之上 面之該 複數個 上，而 將該電 安裝面 該安裝 均勻而 值，係低於係 型吸附孔的一 該第一型吸附 ，以將該電路 邊緣區域。 該第一型吸附 該中央區域係 路基板構件之 之上。 面具有一長方 對稱地分布， 心 是，該安裝面 向係為可移動 況是，該電路 況是，該電路 況是，複數個 該樹脂塑造方 數個樹脂成型 的一水平中 係形成於— 自如。 基板構件包括 基板構件包括 半導體裝置係 法是形成一樹 封裝之半導體 安 附於該安 將該脫模 壓力值。 孔更設置 基板構件 孔更設置 被該安裝 該邊緣區 形外觀， 該分布係 軸兩者。 裝塊之上 一電路板 一電路膠 焊在該電 脂成型封 裝置。 第一型 ’且在 脫模薄 裝面上 薄膜吸 於該安 之一邊 於該安 面之該 域連同 且複數 根據一 ’该安 帶。 路基板 裝面Page 17 503497 V. Description of the invention (13) It is also possible to use the case that the safety I block is up and down in the up and down direction. It is the circuit board. Preferably, the circuit tape is used. A better case is that a plurality of components are formed on the resin, and the resin molding square plate is formed to include a plurality of resins. A better case is that a high-voltage circuit substrate component is fixed securely, and the circuit suction groove is better. . Preferably, the area where the circuit board component unit is attracted is preferably the area where the adsorption area surrounds the array type is the position where the first groove is attached. The present invention also provides a resin-first mold having a mounting surface 'wherein the circuit substrate member is a second mold having a first side thereof and a dummy mold cavity on both sides thereof. The i 2 series is formed on a mounting block and moves freely. The substrate member includes a circuit board. The substrate member includes a circuit tape. A semi-T body is soldered to the circuit substrate by forming a semiconductor device with a resin-molded package surface. Gas is injected into the cavity above the mounting surface. The back surface of the substrate member has at least one or two series extending in an array type. The grooves extend more continuously in the edge region of several circuit substrate building blocks. The type suction hole is formed with respect to the blister is · forming mold combination, and includes: a circuit board member fixed on a back surface thereof to contact the mounting surface; and a mouthpiece 503497 opposite to the first side. V. Description of the invention (14) A better condition adsorption hole for adsorbing the film of the second mold to at least one edge region of the first condition attached to the better condition surface In the edge area of a good feeling surface, a type suction sucks a central area surrounded by a second mold and a central area. The second longitudinal center is also installed on a more structural plate. A good feeling type suction shaft and vertical are preferable. The upper and lower enthusiasts of the enthusiastic and enthusiastic enthusiasts, including the repetition, are that the mold is formed on the circuit is that the attached case of the 孑 L is that the installation condition of the edge area is the area around, In this case, the attachment hole is formed on the first mold by attaching at least one substrate member to the mounting surface and attaching at least one second type adsorption hole to attach the second mold. The circuit board member is attracted by a pressure on the plurality of the second plurality of domains, and the electric mounting surface is uniformly installed, which is lower than the first type adsorption of the system type adsorption hole, so that Place the circuit edge area. The first type is adsorbed on the central substrate system member. The mask has a rectangular symmetrical distribution. The heart is that the mounting surface is movable, the circuit condition is that the circuit condition is that a plurality of resin moldings and a plurality of resin moldings are formed in a horizontal system— freely. The substrate component includes the substrate component including the semiconductor device system. A semiconductor package is formed by attaching the semiconductor to the device and releasing the pressure value. The holes are further provided. The base plate member is further provided. The edge zone appearance is installed, and the distribution system is both axis. On the block, a circuit board and a circuit glue are soldered to the grease forming sealing device. In the first type, the film is attracted to one side of the safety surface on the release surface, and the film is attached to a plurality of the safety belts. Road substrate

第19頁 503497 五、發明說明（15) 兮電ί Ϊ:ϊ ΐ是’一高壓氣體被注入該模穴之中，以將 a亥電=基板，件確實地固定於該安裝面之上。 吸附=。子的^况是，該電路基板構件之該背面具有至少一 車=好的情況是，該吸附槽係延伸於 電路基板構件單元的區域之間。 之複 城，ΠΓ兄是’該吸附槽更連續地延伸於-邊緣區 s L圍車列型態之該複數個電路基板構件單元。 财掸二ί情況是’該第一型吸附孔是形成於相對於該吸 附槽的位置。 鲛佳實施例 ΐ明以詳細地解說本發明之第-實施例。在 =一= 脂封裝方法’一種新穎的塑造成形用 路基板構件。該電路板的說明順序， 機與該製造程序“用模具、該樹脂塑造成形 i t路基板構件11包括-玻璃環氧樹脂 顯示本發明第一實施例之一；新份正視圖’以 u 喱新穎的電路板。圖2B是一部 份剖面視圖，係沿著圖2A之A-A立丨I而綠 田 ^ ^ yτ ▲ Λ Α 4面線，以顯示本發明第 一貫施例之一種新穎電路板的部份放大視圖。 f正視圖’以顯示本發明第-實施續Α之一種新颖電路 板。 電路基板構件11包括-破璃環氧樹脂絕緣基抓、一Page 19 503497 V. Description of the invention (15) Xidian Ϊ ϊ: ϊ ΐ is a high-pressure gas is injected into the cavity, so that the electric power = substrate, the component is fixed on the mounting surface. Adsorption =. In this case, the back surface of the circuit board member has at least one car. It is good that the suction groove extends between the regions of the circuit board member unit. In the complex city, ΠΓ is the plurality of circuit board component units in which the adsorption groove extends more continuously in the marginal region s L surrounding the train line. In the second case, the first type adsorption hole is formed at a position relative to the adsorption groove. Preferred Embodiment The first embodiment of the present invention will be explained in detail. In = 一 = Grease encapsulation method 'A novel molding and forming circuit board member. The circuit board is explained in the order of the machine and the manufacturing process. "The mold is used to mold the resin to form the circuit board member 11 including-glass epoxy resin showing one of the first embodiment of the present invention; 2B is a partial cross-sectional view taken along the line AA of FIG. 2A and the green field ^ ^ yτ ▲ Λ Α 4 to show a novel circuit board according to the first embodiment of the present invention. A partially enlarged view of f. Front view 'to show a novel circuit board according to the first-continued embodiment of the present invention. The circuit board member 11 includes-a broken glass epoxy-based insulating substrate, a

503497 五、發明說明（16) 銅配線5 3與一阻焊劑（s 0 1 d e r r e s i s t) 5 4。絕緣基板5 1具 有穿孔52，係穿過絕緣基板51，所以經由穿孔52以連接其 正面與背面。銅配線53具有一預定圖案，而設置在絕緣基 板51的正面與背面，且設置在穿孔52之中。銅配線53的接 合線部6 1是設置於絕緣基板5 1的正面，外端點焊盤部6 2是 叹置於絕緣基板51的背面，穿孔5 2允許接合線部6 1與外端 點焊接部6 2之間的電連接。 電路基板構件11的正面包覆著阻焊劑54，除了銅配線 5 3的接合線部6 1之外。一半導體裝置丨2是焊在電路基板構 件11的正面’半導體裝置12是藉由一黏合劑（bonding agent) 56而焊到電路基板構件u正面的一晶片黏合區（die bond region)，所以，半導體裝置12未標示的電極是經由 銅配線5 3的接合線部6 1，而電連接到銅配線5 3。 電路基板構件11的背面包覆著阻焊劑54，除了銅配線 5 3的外端點焊接部6 2與一吸附槽6 3之外。外端點焊接部6 2 包括銅配線53之一未包覆部位，其中銅配線53之該未包覆 部位是設置在阻焊劑54的一開口之下。吸附槽63包括絕緣 基板5 1之一暴露部位，其中絕緣基板5丨之該暴露部位是設 置在阻焊劑54的一開口之下。吸附槽63的底面包括絕緣板 5 1之背面，吸附槽6 3的深度是由阻焊劑5 4的一厚度決定 之。思即，絕緣基板5 1與鋼配線5 3是選擇性地包覆著阻 劑5 4。 電路基板構件11具有一電路板單元6〇所構成的矩陣陣 列，其中的每個皆被一周圍區域（circumferential503497 V. Description of the invention (16) Copper wiring 5 3 and a solder resist (s 0 1 d e r r e s i s t) 5 4. The insulating substrate 51 has a through hole 52 and passes through the insulating substrate 51. Therefore, the front surface and the back surface are connected through the through hole 52. The copper wiring 53 has a predetermined pattern, is provided on the front and back surfaces of the insulating substrate 51, and is provided in the through hole 52. The bonding wire portion 61 of the copper wiring 53 is provided on the front surface of the insulating substrate 51, the outer terminal pad portion 62 is placed on the back of the insulating substrate 51, and the perforation 5 2 allows the bonding wire portion 61 and the outer terminal Electrical connection between the soldering portions 62. The front surface of the circuit board member 11 is covered with a solder resist 54 except for the bonding wire portion 61 of the copper wiring 53. A semiconductor device 2 is soldered on the front surface of the circuit substrate member 11 'The semiconductor device 12 is a die bond region soldered to the front surface of the circuit substrate member u by a bonding agent 56, so, The electrodes not labeled in the semiconductor device 12 are electrically connected to the copper wiring 53 via the bonding wire portion 61 of the copper wiring 53. The back surface of the circuit board member 11 is covered with a solder resist 54 except for the outer terminal soldering portion 62 of the copper wiring 53 and an adsorption groove 63. The outer terminal soldering portion 6 2 includes an uncoated portion of the copper wiring 53, wherein the uncoated portion of the copper wiring 53 is disposed under an opening of the solder resist 54. The suction groove 63 includes an exposed portion of the insulating substrate 51, wherein the exposed portion of the insulating substrate 51 is disposed under an opening of the solder resist 54. The bottom surface of the suction groove 63 includes the back surface of the insulating plate 51, and the depth of the suction groove 63 is determined by a thickness of the solder resist 54. In other words, the insulating substrate 5 1 and the steel wiring 5 3 are selectively coated with the resistor 54. The circuit substrate member 11 has a matrix array composed of a circuit board unit 60, each of which is surrounded by a circumferential area.

第21頁 503497 五、發明說明（17) - -------- r^gion)、50所環繞，其中每個電路板單元6〇是相對應於一 單抑的半導體封裝（semic〇nductor Package)。每個電路 板單兀60具有相同的銅配線53。在 一 線（hken llne)64代表—電路板單㈣陣列之間的一 ^折 界線，與該電路基板構件之一邊緣區域，其中電路板單元 60的陣列區域是由破折線64所包圍者，而該電路基板構件 之遠邊緣區域則延伸於破折線64之外。如圖2A與2C所示， 破折線65代表一夾持區域^^叩以regi〇n)的一邊界 、，一未夾持的成形區域（moId region)，其中該夾持 區域，，夾持於模具2〇的上、下模具21與22之間。該成形 區域是定義在一模穴區域之中，該模穴區域包括一澆口 31 頂模穴23a與一假模穴（dummy cavi ty )，而成形區 域得以成形之。 、:設置於電路板單元60背面之阻焊劑54的一邊緣區 域，是設置於該半導體封裝之一周圍（circumference)5() 之内。在電路板單元60之陣列區域之内，沒有阻焊劑施加 f a亥阻：!:干劑之該邊緣區域與該半導體封裝之周圍5 〇之間的 區，，亦未施加在該半導體封裝之周圍5〇之外的區域，而 使得絕緣基板51暴露之。其結果是，電路板單元6〇之背面 具有絕緣基板51之暴露的邊緣區域，其中該暴露的邊緣區 域並未包覆阻鲜劑，以防止一切塊片（dicing bia(je)接觸 到電路基板構件11背面的阻焊劑54。因為切塊片並未接觸 到電路基板構件11背面的阻焊劑54，所以在阻焊劑54上不 會出現裂痕。Page 21 503497 V. Description of the invention (17)--------- r ^ gion), surrounded by 50, where each circuit board unit 60 is a semi-inhibit semiconductor package (semic). nductor Package). Each circuit board unit 60 has the same copper wiring 53. In a line (hken llne) 64 represents a ^ break line between a single array of circuit boards and an edge area of the circuit board member, wherein the array area of the circuit board unit 60 is surrounded by the broken line 64, and The far edge region of the circuit board member extends beyond the broken line 64. As shown in FIGS. 2A and 2C, the dashed line 65 represents a boundary of a clamping region (^^), and an un-clamped forming region (moId region). The clamping region, Between the upper and lower molds 21 and 22 of the mold 20. The forming area is defined in a cavity area. The cavity area includes a gate 31, a top cavity 23a, and a dummy cavity. The forming area is formed. : An edge region of the solder resist 54 disposed on the back of the circuit board unit 60 is disposed within a circle 5 () of one of the semiconductor packages. Within the array area of the circuit board unit 60, there is no solder resist applied to the fah:!: The area between the edge area of the desiccant and the periphery of the semiconductor package, and it is not applied around the semiconductor package. Areas other than 50%, so that the insulating substrate 51 is exposed. As a result, the back surface of the circuit board unit 60 has an exposed edge region of the insulating substrate 51, wherein the exposed edge region is not covered with a freshness preventer to prevent all pieces (dicing bia (je) from contacting the circuit substrate). The solder resist 54 on the back of the member 11. Since the dicing sheet does not contact the solder resist 54 on the back of the circuit board member 11, no cracks will appear in the solder resist 54.

第22頁Page 22

在此實施例> 士 邊緣區域所形成播吸附槽63包括以絕緣基板51之暴露 之阻焊劑的該開口 係設置於環繞每個電路板單元60 的邊緣區域，在陳 ^吸附槽63連續地延伸到該電路板 板單元60的外部大Y :域之電路板單元60的配置係依電路 域之吸附槽63的位f ^ 而疋，但形成於電路板邊緣區 大小或尺寸無持不變，與電路板單元60的外部 3 這疋為了標準化之目的。 穎的模具？圖：J圖邻二顯示本發明第-實施例之-種新 面線，以顯= Χ面=，係、沿著圖3A之卜1剖 放大視圖。圖3C a ^ Ϊ闽貝例 種新穎的模具之部份 之一電路機你Μ ^ 圖，以顯示本發明第一實施例圖3Α 圖3Β所示；模具2〇是供下注塑形之用。如 21 ι莫具2〇包括一上模具21與一下模具22。上模且 具中心塊24，下模具22具有-下模具中心塊 電路機板構件安裝塊42 ’下模具中心塊25與上模f 署^具有與f知技術相同的結構。下模具中心塊25設 凹部27，一熔化樹脂26係注入於其中。一柱塞28則伸 =凹部27，以對凹部27之中的熔化樹脂26施加一壓力。上 杈具中心塊24則設置一開孔29，係在相對應於該凹部的位 置。在相對於開孔29的一側，設置一橫澆道3〇作為流動通 道’以供熔化樹脂26流入頂模穴23a。 在上模具21之上模具中心塊24的每一侧，依序形成一 洗口 31、一頂模穴2 3a與一假模穴32。頂模穴2 3a收納一焊 在電路基板構件11之上的半導體裝置12，模穴23接納溶化In this embodiment > the suction groove 63 formed in the edge area of the driver includes the exposed solder resist with the insulating substrate 51. The opening is provided in the edge area surrounding each circuit board unit 60. Extending to the outside of the circuit board unit 60, the configuration of the circuit board unit 60 in the domain is based on the position f ^ of the adsorption groove 63 of the circuit domain, but the size or size of the edge area formed on the circuit board does not change. The external 3 of the circuit board unit 60 is used for standardization purposes. Ying mold? Figure: The second adjacent figure J shows a new kind of face line according to the first embodiment of the present invention, which is shown as an enlarged view of the X plane =, taken along the line 1 in FIG. 3A. Fig. 3C is a part of a novel mold. Fig. 3A is a circuit diagram showing a first embodiment of the present invention, as shown in Figs. 3A and 3B; the mold 20 is used for injection molding. For example, 21 mol 2 includes an upper mold 21 and a lower mold 22. The upper mold has a center block 24, the lower mold 22 has a lower mold center block, a circuit board member mounting block 42 ', and the lower mold center block 25 has the same structure as the upper mold f. The lower mold center block 25 is provided with a recessed portion 27 into which a molten resin 26 is injected. A plunger 28 extends into the recessed portion 27 to apply a pressure to the molten resin 26 in the recessed portion 27. The upper center block 24 is provided with an opening 29, which is tied to a position corresponding to the recess. On the side opposite to the opening 29, a horizontal runner 30 is provided as a flow path 'for the molten resin 26 to flow into the top cavity 23a. On each side of the mold center block 24 above the upper mold 21, a washing port 31, a top mold cavity 23a and a dummy mold cavity 32 are sequentially formed. The top cavity 2 3a accommodates a semiconductor device 12 soldered on the circuit substrate member 11, and the cavity 23 receives melting

第23頁 503497Page 23 503497

樹脂26的注入，利用樹脂26對半導體裝置12進行封裝。澆 口 3 1供作為頂模穴2 3 a之一開口，且連接到橫淹道3 f 頂模穴23a的入口區域（enter region)，設置具有一間隙 31a之澆口 31，間隙31a係沿著頂模穴23a的一縱邊延伸， 且平行該縱邊，其中間隙31 a延伸的長度約等於該模穴的 長度。當澆口 3 1填滿熔化樹脂2 6，係經由開孔2 9與橫澆道 3 0自凹部2 7供應之，所以注入壓力是作用在熔化樹脂2 6， 且炼化樹脂26是均勻地注入頂模穴23a的入口區域，而不 受到半導體裝置21在頂模穴23a之中的任何影響。 如果電路基板構件11的尺寸是齊一的，可以使用相同 的模具20來製造不同數目與尺寸的半導體封裝。 如圖3 A所示，複數個橫澆道3 〇是沿著澆口 3丨的縱邊而 排列’且連接到澆口 3 1的縱邊。凹部2 7與開孔2 9則是以一 固定的間隔，平行於澆口 31的縱邊而排列著。每個凹部2 7 與開孔2 9是經由兩個橫洗道3 〇連接到丨堯口 3 1的縱邊，所以 複數個洗道3 0是以一固定的間隔沿著洗口 31的縱邊而排 列，因此可藉由沿著澆口 3丨的縱邊而均勻分布的橫澆道 30，將熔化樹脂26均勻地注入，且從模穴23的縱邊注入模 穴23之中。 ' 進步地’设置假模穴3 2以將模穴2 3延伸於一相對於 洗口 31的縱邊。以一間隙32a而將假模穴32與模穴23之該 相對縱邊分開，其中間隙32a沿著模穴23之該相對縱邊延 伸’且係在假模穴32與模穴23之間，間隙32a延伸的長度 / 五、發明說明（20) =模穴23之該縱邊的長度。假模咖是設置以延伸於模 二之相對於澆口 31的該縱邊’所以熔化樹脂26可經由澆 t入模穴23 ’且終於到達假模穴32，因此熔化樹㈣ ::順地流過’而不從該相對的縱邊回流。假模穴以亦確 =化樹脂26平順注人模穴23，而不因為焊在電路基 Z ;半Ϊ體裝置21與接合線16的存在，而干擾炼化樹脂 樹r 2fi 敫其結果是，％不會在模穴23之中發生熔化 j =:不元正填充…亦不會因為注入的熔化樹脂26而造 卜線16的移動。若相對於本發明，並未在模穴23相對 叙：口31的-縱邊設置-假模穴’則熔化樹脂26的平順流 動=被阻於模穴23相對於洗Π31的該縱邊，然後自模穴^ :對於洗口31的該縱邊往回流，所以回流的熔化樹脂⑶會 f穴23之-未注入部位流向相反方向，丨中該未注入部 位疋熔化樹脂26尚未注入的部位。然後，向相反方向回流 的熔化樹脂26 —頭撞上流向正確方向的熔化樹脂26，即在 此處發生接合線16的位移且/或形成空洞（v〇id)。根據本 發明，在模穴23相對於澆口 3 1的縱邊設置假模穴32， 使模具2 0免於上述的問題。 曰 在假模穴32的侧面設置一通氣孔46，當注入熔化樹脂 26之時，以允許排出頂模穴23a之中的空氣。通氣孔包 括形成於上权具21之夾持面的一溝槽道。 下模具22設置一下模具底模穴23b，係延伸於相對應 上模具21之頂模穴23a與假模穴32的區域，下模具底模穴 2 3b收納電路基板構件11。意即，模具2〇具有一模穴μ，The resin 26 is injected to encapsulate the semiconductor device 12 with the resin 26. The gate 31 is opened as one of the top mold cavities 2 3 a and is connected to the entry region of the top flood cavity 3 a of the flooding channel 3 f. A gate 31 having a gap 31 a is provided along the gap 31 a. A longitudinal side of the top cavity 23a extends parallel to the longitudinal side, and the length of the gap 31a is approximately equal to the length of the cavity. When the gate 31 is filled with the molten resin 26, it is supplied from the recess 2 7 through the opening 29 and the runner 30, so the injection pressure is applied to the molten resin 26, and the refining resin 26 is uniform. The entrance area of the top mold cavity 23a is injected without any influence from the semiconductor device 21 in the top mold cavity 23a. If the dimensions of the circuit substrate member 11 are uniform, the same mold 20 can be used to manufacture semiconductor packages of different numbers and sizes. As shown in FIG. 3A, a plurality of runners 30 are arranged along the longitudinal side of the gate 3 'and connected to the longitudinal side of the gate 31. The recesses 27 and the openings 29 are arranged at a fixed interval and parallel to the longitudinal side of the gate 31. Each recess 2 7 and the opening 29 are connected to the longitudinal side of Yaokou 31 via two horizontal washing channels 30, so the plurality of washing channels 30 are arranged along the longitudinal direction of the washing port 31 at a fixed interval. The molten resin 26 can be evenly injected through the runner 30 uniformly distributed along the longitudinal side of the gate 3, and injected into the cavity 23 from the longitudinal side of the cavity 23. 'Progressively' a dummy cavity 32 is provided to extend the cavity 23 to a longitudinal side with respect to the mouth 31. The dummy cavity 32 is separated from the opposite longitudinal edge of the cavity 23 by a gap 32a, where the gap 32a extends along the opposite longitudinal edge of the cavity 23 'and is tied between the dummy cavity 32 and the cavity 23, Length of the gap 32 a / V. Description of the invention (20) = length of the longitudinal side of the cavity 23. The fake coffee is set to extend from the longitudinal side of the second mold relative to the gate 31 'so the molten resin 26 can enter the mold cavity 23' through the pouring t and finally reach the fake mold cavity 32, so the molten tree ㈣ :: Shun Flow through 'without flowing back from the opposite longitudinal edge. The fake mold cavity is also injected into the mold cavity 23 smoothly without chemical resin 26, and is not disturbed by the presence of the resin resin r 2fi because of the presence of the soldering on the circuit base Z; the half-body device 21 and the bonding wire 16; % Does not melt in the cavity 23 j =: the element is not being filled ... nor does the movement of the fortune line 16 due to the injected molten resin 26. If it is not described in the cavity 23 relative to the present invention: "the longitudinal edge of the mouth 31-the false cavity is set", the smooth flow of the molten resin 26 is blocked by the longitudinal edge of the cavity 23 relative to the washing 31, Then from the mold cavity ^: For the longitudinal side of the mouth 31, the reflowed molten resin ⑶ will flow from the cavity 23 to the uninjected portion, and the uninjected portion 疋 the portion where the molten resin 26 has not been injected . Then, the molten resin 26 flowing back in the opposite direction—the head hits the molten resin 26 flowing in the correct direction, that is, the displacement of the bonding wire 16 occurs here and / or a void is formed. According to the present invention, the dummy cavity 32 is provided on the longitudinal side of the cavity 23 with respect to the gate 31, so that the mold 20 is prevented from the above-mentioned problems. A vent hole 46 is provided on the side of the dummy cavity 32 to allow the air in the top cavity 23a to be discharged when the molten resin 26 is injected. The vent hole includes a groove formed on the clamping surface of the upper weight 21. The lower mold 22 is provided with a lower mold cavity 23b, which extends in a region corresponding to the upper mold cavity 23a and the dummy cavity 32 of the upper mold 21, and the lower mold cavity 23b stores the circuit board member 11. In other words, the mold 20 has a cavity μ,

第25頁 503497 五、發明說明（21) ί括上模具頂模穴23a與下模具底模穴23b 電路基板構件11與焊在其上的半 从密封地收納 件11是固定於下模具22的一電路 ^ 12。電路基板構 電路機板構件安裝塊42是從一區域安裳塊42之上。 穴23b以收納電路基板構件u。 -，而形成一底模 經支持，而在上下方向為可移動 的反件安裝塊42是 彈菁物之浮動機構。電路機安=由-使用-向的移動，導致了底模穴23b的凌鬼42在上下方 板狀電路基板構件而言，該浮動機又^化’/子厚度變化的 該浮動機構，則可保持底模穴23b的“ ^的°匕不使用 厚度變化的電路基板構件被固定於電 X。但疋，若 j化如此一來厚度變化的電路基板構件之】：：： 邊化。若固定在底模穴23b之電路板的厚/面二低曰產生 穴23b之固定深度是太厚的$，則 二相對於底杈 加於該電路基板，因此會破壞的夾持壓力會施 严之電路板的厚度，㈣;於 溥的話，則施加於該電路基板的夾持壓力不 ^二 :解：：：從該間隙线漏熔化樹脂。該浮動機構即是設‘ 使用膠士31的問題’係因為電路基板的厚度變化之故。若 膠^： ί f路基板構件11，則不需要該浮動機構，因為 。声：ϊί板構件11為薄層，且膠帶型電路基板構件11 的厚度變化很小，所以沒有問題。 吸附一吸附孔44 ’以真空吸附-脫模薄膜。 44具有一開口44a，係緊臨著頂模穴23a。吸附孔44 li 第26頁 503497Page 25 503497 V. Description of the invention (21) The upper mold cavity 23a and the lower mold cavity 23b of the upper mold are fixed to the lower mold 22 with the circuit board member 11 and the semi-hermetically sealed storage member 11 soldered thereon. A circuit ^ 12. Circuit board structure The circuit board component mounting block 42 is mounted on an area of the mounting block 42. The cavity 23b receives the circuit board member u. -While forming a bottom mold which is supported and movable in the up and down direction, the counter piece mounting block 42 is a floating mechanism of elastic material. Circuit machine safety = moving from -use-direction, causing the linger 42 of the bottom mold cavity 23b to be above and below the plate-shaped circuit board member, and the floating machine has a floating mechanism with a change in thickness. The circuit board member that can maintain the bottom mold cavity 23b is not fixed to the electric X without using a thickness-changing circuit board. However, if the thickness of the circuit board member that changes in thickness is such that it is: edge. If The thickness of the circuit board fixed to the bottom cavity 23b is low. The fixed depth of the cavity 23b is too thick. Then, the second is added to the circuit board relative to the bottom, so the clamping pressure that will be damaged will be severe. The thickness of the circuit board, ㈣; in the case of 夹持, the clamping pressure applied to the circuit board is not ^ 2: Solution ::: Leaks the molten resin from the gap line. The floating mechanism is provided by 'Using Jiaoshi 31' The problem is because the thickness of the circuit board is changed. If the glue ^: f circuit board member 11, the floating mechanism is not needed because: 声: the board member 11 is a thin layer, and the tape-type circuit board member 11 The thickness change is small, so there is no problem. 4 ′ Vacuum suction-release film. 44 has an opening 44a, which is next to the top cavity 23a. Suction hole 44 li Page 26 503497

，供頂模穴23a與-未標示的外部A空源之間的連 * 杈具上T需要脫模薄膜，則不必設置吸附孔44。 右 了模具22具有—吸附孔45，以真空吸 11。每個吸附孔45具有_、查彼糾一 土挪— 土扳構件 篦一破，你一势— 連接到一未4示不的外部真空源之 鈿，入一第二端以形成一開口 45a，係在 ' 件安裝塊42的一電路;機板構 45是設置於一邊=女裝：之上。如圖3C所示，吸附孔 緣區域’係為一破折線W與6 ^For the connection between the top mold cavity 23a and the unlabeled external A air source * T on the fork requires a mold release film, so it is not necessary to provide an adsorption hole 44. The right mold 22 has a suction hole 45 to suck the vacuum 11. Each adsorption hole 45 has a _, a piezo, a soil, a soil pull member, a break, you have a potential-connected to an external vacuum source not shown, into a second end to form an opening 45a A circuit attached to the mounting block 42; the board structure 45 is set on one side = women's clothing: above. As shown in FIG. 3C, the edge region of the adsorption hole is a broken line W and 6 ^

2域’且設置於-相對應於吸附槽63的位置，；以： :基板構件丨人固定於電路機板構件安細 a連接到形成於該邊緣區域的吸 小於吸附槽63的宫洚.. 「用口 的直控 損宝。 、又，稭以避免對被吸附中的阻焊劑造成 未標不之一樹脂塑造成形機設置有模具2〇，還且有一 3座以支持上模具I1 ’與一未標示的下；座以 、^ 且具有一未標示的加熱器以加熱模呈2 〇， :未標示的真空泵以作為一真空源，一未標示的夾持機 霉，及一未標示的退出機構。該樹脂塑造成形機更具有一 柱，28:❿上模具21與下模具22是以板件或螺&，^別地 固定在该上底座與該下底座。該上底座或該下底座被起 以關閉模具1 2 0。 在此說明一種新穎的批次樹脂封裝方法，係用來封裝 :半導體裝置，與一形成該半導體裝置的方法。圖4Α至⑪ 疋部份剖面視圖，以顯示一上、下模具與焊在一電路基板 構件之上的複數個半導體裝置，而在本發明第一實施例的2 domains' and set at-corresponding to the position of the adsorption tank 63; to :: the substrate member 丨 fixed to the circuit board member Anxi a connected to the suction formed in the edge region is smaller than the adsorption chamber 63 of the palace. . "Directly control the damage with the mouth. Also, the straw is used to prevent the solder resist being adsorbed. The resin molding machine is equipped with a mold 20, and there are 3 to support the upper mold I1 ' And an unlabeled bottom; seated with ^, and having an unlabeled heater to heat the mold to form 20: an unlabeled vacuum pump as a vacuum source, an unlabeled gripper mold, and an unlabeled The ejection mechanism of the resin molding machine has a pillar, 28: the upper mold 21 and the lower mold 22 are plate or screw & fixed separately on the upper base and the lower base. The upper base or The lower base is lifted to close the mold 120. Here, a novel batch resin packaging method is described, which is used for packaging: a semiconductor device, and a method for forming the semiconductor device. Figure 4A to ⑪ ⑪ Partial cross-sectional views To show an upper and lower mold and solder on a circuit substrate A plurality of semiconductor devices on the component, while the semiconductor device in the first embodiment of the present invention

第27頁 ^UJ497 五、發明說明（23) = = ; =新賴，且利用-脫模薄膜的批次樹脂封裝 [焊接程序] 序之ΐ樹:iiL程序之前須進行一焊接程序。在該焊接程 tLC之半導體裝置12是以-矩陣形式， 到單一之電 板：件11的-主要平面上，再焊 ^ 電路基板構件11。半導體裝置1 2是以接合線焊副 早一之電路基板構件11。在圖2Α盥1(：之中，备個主道触 置12是藉由接合線16以連線焊接;去 = 半導體裝置12亦可用無丄:焊：：：= 板構件u’例如使用凸塊。無論如何，“ 體裝置12被焊到單一之電路基板構件1 1之上。 [夾持前程序] 參考圖1A以說明一夾持前程序。緊接著上述之焊接程 序，即進行一夾持前程序。電路基板構件丨丨被固定於 具22之電路機板構件安裝塊42之上，因此吸附孔45之開口 4^a連接到吸附槽63，係形成於電路基板構件丨丨的背面。 意即，吸附槽63與吸附孔45是彼此連接的。真空操作是經 ，吸附孔45而進行之，所以連接到吸附孔45之吸附槽的 疋力會降低’藉以使電路基板構件11被吸附且固定在一電 路板安裝面之上。如圖2C所示，在成形區域的吸附槽63是 以固定間隔沿著縱軸與水平的方向分布，所以藉由^吸附 槽63降低壓力’即對電路基板構件丨丨的入口區域產生一均 勻的作用力。Page 27 ^ UJ497 V. Description of the invention (23) = =; = Xinlai, and batch resin packaging using-release film [Welding procedure] Preliminary tree: a welding procedure must be performed before the iiL procedure. In this soldering process tLC, the semiconductor device 12 is in the form of a matrix to a single board: the main plane of the component 11, and then the circuit board member 11 is soldered. The semiconductor device 12 is a circuit board member 11 which is bonded to a bonding wire. In FIG. 2A, the main contact 12 is welded by a bonding wire 16; the semiconductor device 12 can also be used without welding: welding :: = board member u ', for example, using convex In any case, the "body device 12 is soldered to a single circuit board member 1 1. [Pre-clamping procedure] Referring to Fig. 1A, a pre-clamping procedure will be described. Following the above-mentioned soldering procedure, a clamp is performed. The pre-procedure. The circuit board component is fixed on the circuit board component mounting block 42 of 22, so the opening 4 ^ a of the suction hole 45 is connected to the suction groove 63, which is formed on the back of the circuit board component In other words, the suction groove 63 and the suction hole 45 are connected to each other. The vacuum operation is performed through the suction hole 45, so the pressure of the suction groove connected to the suction hole 45 will be reduced, so that the circuit substrate member 11 is Adsorption and fixing on a circuit board mounting surface. As shown in FIG. 2C, the adsorption grooves 63 in the forming area are distributed at a fixed interval along the vertical axis and horizontally, so the pressure is reduced by the adsorption grooves 63. Generates an entry area for the circuit board component Uniform force.

五、發明說明（24) 再者，設置一脫模薄膜41以覆蓋—假模穴32、— 穴23a、一開孔29與一橫洗道30，其中脫模薄膜41是细、挺 吸附孔44以冑空吸附於頂模穴23a的表面，戶斤以脫模= 4 1是沿著上模具21的内表面形狀而延伸。其於果是，。、 孔44的開口4“被脫模薄膜4丨所密封。然而、，、’、°脫模文’，附 是可透氣的’所以空氣以很小的流量通過脫模薄膜41、 被吸入吸附孔44之中。意即，流入吸附孔44的空氣並， 全停止。脫模薄膜41使之易於從模具的内表面 凡 的樹脂2 6。若不使用脫模薄膜41，則y 成形 入機構可利用該頂針來推動已成形i 樹月日，使之從杈具的内表面釋放，其中 ％V. Description of the invention (24) Furthermore, a release film 41 is provided to cover-the dummy cavity 32, the cavity 23a, an opening 29 and a horizontal washing channel 30, wherein the release film 41 is a thin, quite adsorption hole 44 is sucked on the surface of the top mold cavity 23a by hollowing, and the household weight is released along the inner surface shape of the upper mold 21 with demolding = 4 1. As a result,. The opening 4 of the hole 44 is sealed by the release film 4. However, the ', ° release pattern' is attached with breathable 'so the air passes through the release film 41 with a small flow, and is sucked and adsorbed. Into the hole 44. That is, the air flowing into the suction hole 44 is completely stopped. The release film 41 makes it easy to remove the resin 26 from the inner surface of the mold. If the release film 41 is not used, y is formed into the mechanism The thimble can be used to push the formed i-tree moon and sun, so that it is released from the inner surface of the branch, of which%

佈於注入成形的樹脂26的上模具21之内表面：以促J 構件’ ：作用於電路基板 疋认疋為同於一作用於電路基板構 件11月面的壓力值。而壓力控制是降低方式。 〇 二一作用於電路基板構件11背面之降壓值， 二作::作於電路基板構件11正®之降壓值。在 的真空度，：直控制-謹^ 制間以控制-輪出i:;::，44，且亦操作另一控 μ ξιΙ.. W4,,出/、另一真工泵的真空度，該真空泵係連 路美祐燼杜11接所以當模具20處於閉合狀態時，作用於電 面之該降壓值，是高於作用於電路基板構 之^降壓值。若作用於電路基板構件11正面與背 503497 五、發明說明（25) 面之壓力 的一真空 空源之第 值。此外 的通道上 模薄膜41 第'一負堡 此即避免 接合線或 結果是’ 害，且可 值是難 源之第 二負壓 ，亦可 ，設置 且最靠 值，所 電路基 其它電 不會對 獲得半 以？^，可藉由―吸附電路基板構件n 一負壓值 值，所以 在一吸附 一閥以偵 近模具20 以該第一 板構件11 路板的部 例如半導 導體封裝 與 该第一 電路基 測一第 的通道 負壓值 從模具 位則不 體裝置 良好的 吸附脫模 負壓值是 板構件11 一負壓值 上，設置 是低於該 的内側面 會接觸到 的該接合 外觀。 薄膜41 低於該 且最靠 的另一真 第二負壓 近模具20 ’而在一吸附脫 另一閥以偵測一 第二負壓值。如 浮動， 脫模薄 線之部 如此一來 膜41。其 位造成損 電路基板構件11與脫模薄膜41係藉由接觸模具2〇而被 模具2 0則已被-未標示的加熱器所加熱。因為電路 ς反構件1 1是從其背面加熱，即在電路基板構件丨丨固定於 接路機板構件安裝塊4 2之時，所以會在電路基板構件！ i的 面產生二相當大的熱膨脹，電路基板構件丨丨會因而彎曲 或隻j弓开y。然而，如此電路基板構件丨1的彎曲會隨後續 =熱平衡現象而減少。必須等到電路基板構件丨丨的彎曲消^後，才可進行樹脂注入。隨後，一錠狀樹脂Μ被置於 下模具22的凹部27之中。 [夾持程序] 在夾持前程序之後即進 夾持程序。操作該樹脂塑造 22閉合在一起，藉模具2〇來 行夾持程序。參考圖4B以說明 成形機以將上模具2 1與下模具 夾持電路基板構件11，其中， 503497It is provided on the inner surface of the upper mold 21 of the injection-molded resin 26: to promote the J member ': to act on the circuit board 疋 It is recognized as the same pressure value acting on the November surface of the circuit board member. And pressure control is the way to reduce. 〇 Twenty-one acts on the voltage drop of the circuit board member 11 on the back. The degree of vacuum: Straight control-control system to control-turn out i:; ::, 44, and also operate another control μ ξιΙ .. W4 ,, /, the vacuum degree of another real pump Since the vacuum pump is connected to Meiyou Ember Du 11, so when the mold 20 is in the closed state, the voltage drop value acting on the electrical surface is higher than the voltage drop value acting on the circuit substrate structure. If it acts on the front and back of the circuit board member 11, 503497 V. The value of a vacuum air source of the (25) surface pressure of the invention description. In addition, the upper film 41 of the channel is the first negative pressure. This avoids the bonding wire or the result is harmful, and it can be the second negative pressure that is difficult to source. It can also be set and the most reliable value. Will it get half as much? ^, Can be-suction circuit board component n a negative pressure value, so a suction a valve to approach the mold 20 to the first board member 11 circuit board parts such as semiconducting conductor package and the first circuit base The negative pressure value of the first channel measured from the mold position is not good. The negative pressure value of the mold release is a negative pressure value of the plate member 11 and is set lower than the joint appearance that the inner side will contact. The film 41 is lower than the most true second negative pressure, which is close to the mold 20 ', and detects a second negative pressure value at an adsorption release valve. If it floats, the part of the release thin line is the same as the film 41. Its position causes damage. The circuit substrate member 11 and the release film 41 are heated by the mold 20 by being in contact with the mold 20, and the mold 20 is heated by an unlabeled heater. Because the circuit anti-component 1 1 is heated from its back, that is, when the circuit substrate component is fixed to the circuit board component mounting block 4 2, it will be on the circuit substrate component! The surface of i generates two considerable thermal expansions, which may cause the circuit board member to bend or j to open y. However, the bending of the circuit board component 1 will decrease with the subsequent thermal equilibrium phenomenon. The resin injection can only be performed after the bending of the circuit board member is removed. Subsequently, an ingot-like resin M is placed in the recessed portion 27 of the lower mold 22. [Clamping program] The clamping program is executed after the program before clamping. The resin molding 22 is operated to close together, and the mold 20 is used to perform the clamping procedure. Referring to FIG. 4B to explain the forming machine for holding the circuit board member 11 between the upper mold 21 and the lower mold, wherein 503497

電路基板構件1 1之一周圍部份是被上模具2丨與下模具2 2所 夾持。電路基板構件11之半導體裝置固定區域並未被夾 持’而被包含在頂模穴23a之中。 朴在習知的樹脂成形方法之中，當電路基板構件111被 模具120所夾持時，吸附孔44的負壓力是經由脫模薄膜41 而作用在電路基板構件丨丨丨之上，因此電路基板構件丨丨丨被 f向上模具1 2 1，且電路基板構件丨丨丨的中央區域是從電路 =板構件女裝塊1 4 2的表面而浮動。根據該新穎的樹脂成 ==法，當模具20處於閉合狀態時，作用在電路基板構件 Π月面的負壓值，是小於作用在電路基板構件"正面的負 壓值，所以不會產生浮動。 、 [樹脂注入程序] 一樹脂2 6被熔化， 所以熔化樹脂2 6是經由 應到頂模穴23a，如此， 脂2 6所填滿。同時，頂 孔4 6而被推出去。 然後藉由柱塞28注入熔化樹脂26， 一開孔29、橫澆道30與澆口31被供 模具2 0之頂模穴2 3 a即被注入的樹 模穴23a之内的空氣是經由一通氣 被注==脂成±形方法之中，當熔化樹脂26在高壓下 構件的、八&之盼，在頂模穴2 3a最深處之該電路基板 的：面，則會因而皺起且向著上模㈣ =第接合線16會接觸到脫模薄膜41。此情形 件11是藉由：附?新穎的樹脂成形方A，電路基板構 右 曰 人吸附槽6 3而固定於電路板安裝面， 沒有任何造成浮動的外在因素。 表面 ’樹脂2 6即處於熱固 份，如此即可完成一 裝面板與脫模薄膜41 膜4〗。其結果是完成 不一半導體封裝，係3 脂成形方法所獲得者， ^ 具有以虛線表示白 ，且係利用本發明第一 獲得者。 。在一球栅陣列封裝^ 置於電路基板構件1 1 ^ 五、發明說明（27) [樹脂熱固程序] 在模具2 0填滿樹脂2 6之後 其中樹脂2 6包括一熱固型的成 板。再打開模具2〇以釋放該封 該封裝面板移除用過的脫模薄 面板18。圖5A是一平面圖以顯 發明第一實施例之該新穎的樹 疋一平面圖以顯示一半導體封 切割線（blade-cutting line) 例之該新穎的樹脂成形方法所 [外終端成型] 然後，即可形成一外終端 中’作為外終端的焊球55被設 面。 [封裝切塊程序] 接著進行一封裝切塊程序，係利用一具有一旋轉 刀1 2 =塊機’以切割刀片之磨料來切割該封裝面板 面成複數個半導體封裝，，中，每個 面㈣是藉由一切割刀片沿著一切割線71而切= V體封襞面板1 8被分成複數個半導體封裝丨〇。圖6是一 口j運作的邻伤透視示意圖，其中一切割刀片沿著一切 而切巧4半導體封裝面板，以將該半導體封裝面板分 個半導體封裝。切割刀片19沿著切割線71而切割半導 [序， _裝面 且從 封裝 用本 圖5B 刀片 實施 例子 背 切割 ，藉 半導 封裝 以半 -切 割線 成各 體封 503497A peripheral portion of one of the circuit board members 11 is held by the upper mold 2 丨 and the lower mold 2 2. The semiconductor device fixing region of the circuit board member 11 is not held 'and is contained in the top mold cavity 23a. In the conventional resin molding method, when the circuit board member 111 is clamped by the mold 120, the negative pressure of the suction hole 44 acts on the circuit board member 丨 丨 丨 through the release film 41, so the circuit The substrate member 丨 丨 丨 is lifted upward by the mold 1 2 1, and the central area of the circuit substrate member 丨 丨 丨 is floated from the surface of the circuit = board member women's block 1 4 2. According to the novel resin formation method, when the mold 20 is in a closed state, the negative pressure value acting on the circuit board member Π is smaller than the negative pressure value acting on the circuit board member " front side, so it will not occur. float. [Resin injection procedure] A resin 26 is melted, so the molten resin 26 is passed to the top cavity 23a, so that the grease 26 is filled. At the same time, the top holes 46 are pushed out. The molten resin 26 is then injected through the plunger 28. An opening 29, a runner 30, and a gate 31 are supplied to the top cavity 2 3a of the mold 20, that is, the air in the injected tree cavity 23a passes through. In the method of ventilated injection == fat formation, when the melted resin 26 is under high pressure, the eighth & hope, at the deepest part of the top cavity 2 3a, the surface of the circuit substrate will be wrinkled. Raise toward the upper mold ㈣ = the bonding wire 16 will contact the release film 41. In this case, the component 11 is fixed on the circuit board mounting surface by attaching a novel resin molding method A and a circuit board structure, which is referred to as a human suction groove 63, without any external factors causing floating. The surface ′ resin 2 6 is in a thermosetting state, so that a panel and a release film 41 film 4 can be completed. As a result, various semiconductor packages have been completed, and they are obtained by a method of forming a grease, which has a white line indicated by a dashed line, and is the first obtainer using the present invention. . Packaged in a ball grid array ^ Placed on the circuit board component 1 1 ^ V. Description of the invention (27) [Resin thermosetting procedure] After the mold 20 is filled with the resin 2 6 where the resin 2 6 includes a thermosetting plate . The mold 20 is opened again to release the seal. The packaged panel removes the used release sheet 18. FIG. 5A is a plan view showing the novel tree shrew of the first embodiment of the present invention to show a semiconductor-cutting line example of the novel resin molding method [outer terminal molding]. Then, A solder ball 55 as an outer terminal can be formed in an outer terminal. [Packaging and dicing program] Next, a packaging and dicing program is performed, which uses an abrasive with a rotary blade 1 2 = block machine to cut the surface of the package panel into a plurality of semiconductor packages by using an abrasive of a cutting blade. ㈣ is cut by a dicing blade along a cutting line 71. The V-body sealing panel 18 is divided into a plurality of semiconductor packages. Fig. 6 is a schematic perspective view of the adjacent wound operation of a mouthpiece, in which a cutting blade cuts along a semiconductor package panel along all four to separate the semiconductor package panel into semiconductor packages. The cutting blade 19 cuts the semiconductor along the cutting line 71. [Sequence, _ mounting surface, and cutting from the package. Example of the implementation of the cutting blade in FIG. 5B.

裝面板18，以將半導體封裝面板18分成單獨的半導體封 咸切参丨刀片1 9沿著切割線71進行切割，而切割線7丨是在 圖2B所示之破折線5〇與5〇之間延伸。因為電路板單元⑽是 以4x^6矩陣配置，所以可獲得64個球柵陣列半導體封裝。 圖7A是:部份剖面正視圖，以顯示從一半導體封裝面板分 開/半導體封裝，係在本發明第一實施例之該新穎的樹脂 成形方法之中。圖7B是一平面圖，以顯示圖7A之球柵陣列 半導體封裝。半導體封裝1〇具有一電路板單元6〇，包括一 絕緣基板51、係具有一穿孔52，一銅配線53、係延伸於絕 緣基板51之正面與背面和穿孔52之中，與一阻焊劑54、係 包覆在銅配線53與絕緣基板51之正面與背面，其中阻焊劑 54具有一開口。半導體封裝1〇亦具有一晶片黏合劑"Η bond agent)56，係塗佈於電路板單元6〇的表面。半導體 =裝ίο亦具有一半導體裝置12，係藉由晶片黏合劑56而黏 在電路板單元60的表面。半導體封裝1〇亦具有一接合線 16，以電連接半導體裝置12的電極板（electr〇de pm)” 與銅配線53的接合線部（wire b〇nding p〇rU〇n)61。半導 體封裝10亦具有一密封樹脂13，以密封電路板單元6〇之一 表，其中半導體裝置1 2與接合線1 6是被密封樹脂1 3所密 =著。半導體封裝10亦具有一焊球55，係設置於外端點的 接觸焊盤部（contact land p〇rti〇n)62之上。阻焊劑“使 配線、外端點與半導體晶片保持絕緣。至於晶片黏合劑 j二可選用合金、焊球與樹脂，一環氧樹脂則可供作為密 封祕脂13。如圖7B所示，半導體封裝1〇的背面具有一邊緣 503497 五、發明說明（29) 區域5 0，以包圍一阻焊劑5 4的區域7 3。意即，阻焊劑5 4並 未延伸於邊緣區域50。在邊緣區域50之上，絕緣基板5丨是 暴露的。 本發明人已調查，作用於電路基板構件11的吸附壓力 值是保持在一定值52kPa，且作用於脫模薄膜41的其它吸 附壓力值是在20kPa、30kPa、40kPa、50kPa 與70kPa 之間 變化著，以實施該樹脂成形程序。檢查所獲得的封裝面板 之樹脂表面，以確認一配線轉移缺陷 (wire-transfer-defect)，這是因為電路基板構件11的浮 動使得接合線16接觸到脫模薄膜41，而在脫模薄膜41留下 一接觸痕跡，且脫模薄膜41之該接觸痕跡被轉移到樹脂的 表面13。當作用於脫模薄膜41的其它吸附壓力值是在 2 0kPa、3 0kPa、40kPa與5 0kPa之間變化時，不會產生該配 線轉移缺陷。若作用於脫模薄膜41的其它吸附壓力值達到 7 0 kPa時，則會產生該配線轉移缺陷。亦確認，若要避免 該配線轉移缺陷，作用於電路基板構件丨丨的吸附壓力必須 保持高於作用於脫模薄膜41的吸附壓力。若作用於電路基 板構件11的吸附壓力無法保持高於作用於脫模薄膜4丨的$ 附壓力’則可能會產生任何該配線轉移缺陷。該配線轉移 缺陷意味著電路基板構件丨1是浮動的。為了避免電路基板 構件11的浮動，將作用於電路基板構件丨丨的吸附壓力保持 咼於作用於脫模薄膜41的吸附壓力是有效的。 、 [例子] 電路基板構件11可依其外部尺寸來定義，例如一寬声The panel 18 is mounted to separate the semiconductor package panel 18 into individual semiconductor packages. The blade 19 is cut along the cutting line 71, and the cutting line 7 is the broken line 50 and 50 shown in FIG. 2B. Between extensions. Because the circuit board units ⑽ are arranged in a 4x ^ 6 matrix, 64 ball grid array semiconductor packages can be obtained. FIG. 7A is a partial cross-sectional front view to show separation / semiconductor packaging from a semiconductor packaging panel, which is included in the novel resin molding method according to the first embodiment of the present invention. FIG. 7B is a plan view showing the ball grid array semiconductor package of FIG. 7A. The semiconductor package 10 has a circuit board unit 60 including an insulating substrate 51 having a through-hole 52, a copper wiring 53 extending between the front and back surfaces of the insulating substrate 51 and the through-hole 52, and a solder resist 54. The front and back surfaces of the copper wiring 53 and the insulating substrate 51 are covered, wherein the solder resist 54 has an opening. The semiconductor package 10 also has a wafer bonding agent 56 which is coated on the surface of the circuit board unit 60. The semiconductor device also has a semiconductor device 12 which is adhered to the surface of the circuit board unit 60 by a wafer adhesive 56. The semiconductor package 10 also has a bonding wire 16 for electrically connecting an electrode plate (electr ode pm) of the semiconductor device 12 and a bonding wire portion (wire bonding power οr οn) 61 of the copper wiring 53. The semiconductor package 10 also has a sealing resin 13 to seal the circuit board unit 60, in which the semiconductor device 12 and the bonding wire 16 are densely sealed by the sealing resin 13. The semiconductor package 10 also has a solder ball 55, It is provided on the contact land portion 62 of the outer end point. The solder resist "insulates the wiring, the outer end point and the semiconductor wafer. As for the wafer adhesive j, two alloys, solder balls and resins can be used, and an epoxy resin can be used as the sealing grease13. As shown in FIG. 7B, the back surface of the semiconductor package 10 has an edge 503497. V. Description of the Invention (29) Region 50, to surround a region 73 of a solder resist 54. That is, the solder resist 54 does not extend to the edge region 50. Above the edge region 50, the insulating substrate 5 is exposed. The present inventors have investigated that the value of the adsorption pressure acting on the circuit substrate member 11 is maintained at a certain value of 52 kPa, and other values of the adsorption pressure acting on the release film 41 are changed between 20 kPa, 30 kPa, 40 kPa, 50 kPa, and 70 kPa. To implement the resin molding process. The resin surface of the obtained packaging panel was inspected to confirm a wire-transfer-defect because the floating of the circuit substrate member 11 caused the bonding wire 16 to contact the release film 41, and the release film 41 A contact mark is left, and the contact mark of the release film 41 is transferred to the surface 13 of the resin. When other adsorption pressure values used for the release film 41 are changed between 20 kPa, 30 kPa, 40 kPa, and 50 kPa, the wiring transfer defect does not occur. If the other adsorption pressure value acting on the release film 41 reaches 70 kPa, this wiring transfer defect will occur. It was also confirmed that, in order to avoid this wiring transfer defect, the suction pressure applied to the circuit substrate member 丨 丨 must be kept higher than the suction pressure applied to the release film 41. If the adsorption pressure applied to the circuit substrate member 11 cannot be maintained higher than the $ adhered pressure 'applied to the release film 4, any such wiring transfer defect may occur. This wiring transfer defect means that the circuit board member 1 is floating. In order to prevent the circuit board member 11 from floating, it is effective to keep the suction pressure acting on the circuit board member 咼 and the suction pressure acting on the release film 41. [Example] The circuit board member 11 can be defined according to its external dimensions, such as a wide sound

503497 五、發明說明（30) 為65 mm與一長度190 mm。半導體封裝1〇可具有一 1〇随正 方形的尺寸。因為圓形切割刀片的厚度是約為35〇 ，一 切割範圍是定義在圖2 B所示之破折線5 0與5 〇之間，而可設 定為約0· 35 mm。在電路板單元60之間的吸附槽63可具有 一寬度0. 5 mm與一深度約〇. 03 rnm，在電路板邊緣區域的 吸附槽63可具有一寬度1.2 _與一深度約〇 〇3 mn^吸附 =45之-開D45a可具有—直徑1G _，而—開口恤可且 有一直徑0· 3 mm。 八 如上述 内侧安裝面 此，接合線 膜。其結果 亦不會對接 此，即可獲 良好的樹脂 在此說 例，其中塑 路基板構件 途。第二種 在結構上的 位置不同。 第一種修改 修改的電路 為破折線6 4 ，該電路基 ，以避免該 或其它半導 是，不會在 合線或其它 得一沒有配 封裝外觀。 明一上述實 造成形模具 自該模具的 新穎的模具 不同，係為 圖8 A是一平 的模具電路 機板構件安 與6 5之間。 板構件之電路板是固定於該模具的 電路基板構件之電路板的浮動，因 體封裝的部位不會接觸到該脫模薄 该脫模薄膜之上產生一接觸痕跡， 半導體封裝的部位造成損害。如 線轉移缺陷之半導體封裝，且具有 施例的第一種修改，即為第二實施 係被最佳化，以避免一大尺寸的電 内f面發生浮動，且可實現一般用 與第一實施例之第一種新穎的模具 w亥電路機板構件安裝塊之吸附孔的 面圖，以顯示本發明第二實施例之 機板構件安裝塊。模具20之第一種 裝塊42a具有一邊緣區域，係定義 吸附孔45之開口 45a係形成在該邊 503497 五、發明說明（31) 緣區域之中’ s亥邊緣區域係定義在破折線6 4與6 &之間。再 ^ ’、吸附孔45之複數個開口 45b係形成在一區域之中，哕 區域是被破折線64所環繞著，其中該區域是相對應於二電 路板胃單元60的陣列區域。在第一種修改之中，兩個開口 4 5 b疋形成於一長方形區域之一縱中心軸之上，該長方开^ 區域是以破折線64所定義之，其中兩個開口45b是設置^ 將該縱中心軸該分割成三個等長的線段。意即，兩個開口 4、5b疋以一一間隔設置於該縱中心軸之上，該間隔是該縱中 〜軸之二分之一長度。開口 45b增加作用於一電路板的吸 附力，甚至當该電路板的尺寸是相當大之時。如此地決定 開口 45b的位置，以避開電路板單元6〇。如此使得該模具 可供不同的半導體封裝使用。該模具的其它結構與樹脂成 开7的方法’、係同於上述第一實施例所敘述者。 在此5兒明一上述實施例的第二種修改，即為第三實施 例其中塑造成形模具係被最佳化，以避免一大尺寸的電 ，基板構件自該模具的内表面發生浮動，且可實現：：= =1 ΐ二種新穎的模具與第一實施例之第一種新穎的模具 上的不同’係為該電路機板構件安裝塊之吸附孔的 =一。圖8Β是一平面圖’以顯示本發明第三實施例之 二 > 改的模具電路機板構件安裝塊。模具20之第二種 〜b5之間。吸附孔45之開口45a係形成在該邊 " ’该邊緣區域係定義在破折線64與65之間。再 ，吸附孔45之複數個開口45b係形成在一區域之中，該 第36頁 503497 五、發明說明（32) 區域；^被破折線64所環繞著，其中該區域是相對應於一電 路板單兀60的陣列區域。在第二種修改之中，四個開口 4 5b是形成於一長方形區域之一縱中心軸之上，該長方形 區域是以破折線64所定義之，其中四個開口45b是設置以 將該縱中心軸該分割成五個等長的線段。意即，四個開口 45b是以-間隔設置於該縱中心軸之上，胃間隔是該縱中 〜=之，刀之一長度。開口 45b增加作用於一電路板的吸 附’甚至當該電路板的尺寸是相當大之時。如此地決定 可么、不同的半導體封裝楼用。兮總 ^ ^ 浐便用忒杈具的其它結構與樹脂成 形的方法，係同於上述第一實施例所敘述者。 制ίΐΓ 月一上述實施例的第三種修改，即為第四實施 2基板莫具係被最佳化，以避免-大尺寸的電 土冓牛自》亥杈具的内表面發生浮動，且可現一 ΐ4:=Τ?ί與第一實施例之第-種新穎的模具 …同=是巧:圖電路附孔的 種修改的模具電路機板構件安裝塊。模具20之第三種 為破折線64與65之間Γ ί =5具之區域，係定義 鏠f a *山 寸4b之開口45a係形成在讀邊 者时二 ，该邊緣區域係定義在破折線64盥65之門。再 者，吸附孔45之複數個開口 45b係巴、65之間再 區域是被破折細所環繞著，其中該成/£域之中，該 路板單元60的陣列區域。在第三種修相-電 ^又 < 甲，四個開口 503497 五、發明說明（33) 4 5b是形成於一水平中心軸之上，該水平中心軸是垂直於 一長方形區域之一縱中心軸，該長方形區域是以破折線64 所定義之，其中三個開口45b是設置以將該水平中心軸該 分割成四個等長的線段。意即，三個開口 45b是以一間隔 設置於該水平中心軸之上，該間隔是該水平中心軸之四分 之一長度。開口45b增加作用於一電路板的吸附力，甚至 當該電路板的尺寸是相當大之時。如此地決定開口 45b的 位置，以避開電路板單元6〇。如此使得該模具可供不同的 半導體封裝使用。該模具的其它結構與樹脂成形的方法， 係同於上述第一實施例所敘述者。 ^ ΐΐ說明一上述實施例的第四種修改，即為第五實施 歹1八塑造成形模具係被最佳化，以避免一大尺寸的電 = =的模具與第一實施例之第一種。的 係為該電路機板構件安裝塊之吸附孔的 圖8D疋一平面圖，以顯示 第四種修改的模具電路機板構件安裝塊。模：m ππ路機板構件安裝塊m具有-邊緣區域，係定義 緣區域：中iL45之開口45“系形成在該邊 者，吸附孔π /、t 1區域係疋義在破折線64與65之間。再 ΐ域=?複數個開口45“系形成在-區域之中，， 區域疋被破折線64所璟婊基* a # ^ Q之中，该 路板單元60的陣列£ ^曾八中该區域是相對應於一電 503497 五、發明說明（34) " 於電路板單元60的該陣列區域，其中四個開口 45b是對稱 地设置’係對稱於一水平中心軸與一縱中心軸兩者。開口 45b增加作用於一電路板的吸附力，甚至當該電路板的尺 寸疋相當大之時。如此地決定開口 4 5 b的位置，以避開電 路板單元60。如此使得該模具可供不同的半導體封裝使 用。該模具的其它結構與樹脂成形的方法，係同於上述第 一實施例所敘述者。 在此說明第六實施例。在此實施例之中，電路基板構 件11是藉由該模具之該模穴内之空氣的高壓，而固定於電 路機板構件安裝塊4 2之一安裝面上，其中，該模穴内的高 壓空氣將電路基板構件丨丨壓在電路機板構件安裝塊4 2的該 安裝面之上。既沒有吸附力、亦沒有吸力（sucti〇n)作用乂 在電路基板構件1 1之上。意即，不需要吸附孔45與吸附槽 63。可選擇性地使用脫模薄膜41。在夾持程序之後，一高 壓空氣經由通氣孔4 6而被注入該模穴之中，該模穴内的^ $空氣將電路基板構件11壓在電路機板構件安裝塊4 2的該 女農面之上，因此，電路基板構件11是被固定在電路機板 構件女裝塊4 2之该女裝面上’而不會從該安裝面發生浮 動。该半導體封裝的接合線或其它部位則不會接觸到脫模 薄膜41。其結果是，不會對該半導體裝置的部位、如該接 合線、造成損害，且可獲得該半導體封裝的良好外觀。再 者，因為注入該模穴的一塑造程序用樹脂亦承受著該模穴 内的高壓空氣，因此可使得該塑造程序用樹脂為均句的注 入0503497 V. Description of the invention (30) is 65 mm and a length of 190 mm. The semiconductor package 10 may have a size of 10 squares. Because the thickness of the circular cutting blade is about 35 °, a cutting range is defined between the dashed lines 50 and 50 shown in FIG. 2B, and can be set to about 0.35 mm. The suction grooves 63 between the circuit board units 60 may have a width of 0.5 mm and a depth of about 0.03 rnm, and the suction grooves 63 in the edge area of the circuit board may have a width of 1.2 mm and a depth of about 0.003 MN ^ adsorption = 45 of the open-D45a may have a diameter of 1G _, and the open shirt may have a diameter of 0.3 mm. Eight As mentioned above, the inside mounting surface. As a result, it will not be docked with this, and a good resin can be obtained. Here is an example of a plastic substrate. The second one has a different structural position. The first modification is to modify the circuit as a broken line 6 4, which is based on the circuit to avoid this or other semiconductors. It will not be connected to the wire or other without a package appearance. The above-mentioned actual forming mold is different from the novel mold of the mold, which is shown in Fig. 8A, which is a flat mold circuit between 6 and 5. The circuit board of the plate member is a floating of the circuit board of the circuit substrate member fixed to the mold. Since the part of the body package does not contact the release film, a contact mark is generated on the release film, and the part of the semiconductor package causes damage. . For example, the semiconductor package with line transfer defects has the first modification of the embodiment, that is, the second implementation system is optimized to avoid large-scale electrical internal f-planes from floating, and can be used for general purpose applications. A top view of the suction hole of the first novel mold whai circuit board component mounting block of the embodiment to show the machine panel component mounting block of the second embodiment of the present invention. The first block 42a of the mold 20 has an edge region, and the opening 45a defining the adsorption hole 45 is formed on the edge 503497. V. Description of the invention (31) Among the edge regions, the edge region is defined on the broken line 6. Between 4 and 6 &. Furthermore, the plurality of openings 45b of the adsorption hole 45 are formed in an area, and the 哕 area is surrounded by the broken line 64, wherein this area is an array area corresponding to the stomach unit 60 of the two circuit boards. In the first modification, two openings 4 5 b 疋 are formed on a longitudinal center axis of a rectangular area. The rectangular opening area is defined by a dashed line 64, of which two openings 45b are provided. ^ The vertical central axis should be divided into three equal-length line segments. That is, the two openings 4, 5b 疋 are arranged above the longitudinal central axis at a one-to-one interval, and the interval is one-half the length of the longitudinal center to the axis. The opening 45b increases the suction force acting on a circuit board, even when the size of the circuit board is relatively large. The position of the opening 45b is determined in this manner so as to avoid the circuit board unit 60. This makes the mold available for different semiconductor packages. The other structure of the mold and the method of forming resin 7 are the same as those described in the first embodiment. Here, the second modification of the above embodiment will be described here, which is the third embodiment in which the shaping mold system is optimized to avoid large-scale electricity, and the substrate member floats from the inner surface of the mold. And it can be realized that: = = = 1. The difference between the two novel molds and the first novel mold of the first embodiment is that the adsorption hole of the circuit board component mounting block is equal to one. Fig. 8B is a plan view 'to show the third embodiment of the present invention > Modified circuit board component mounting block. The second type of mold 20 is between b5. The opening 45a of the suction hole 45 is formed on the side " 'The edge region is defined between the broken lines 64 and 65. Further, the plurality of openings 45b of the adsorption hole 45 are formed in a region, page 36, 503497 V. Description of the invention (32) region; ^ is surrounded by a dashed line 64, where the region corresponds to a circuit Array area of plate unit 60. In the second modification, the four openings 45b are formed on a longitudinal center axis of a rectangular region defined by a dashed line 64, and the four openings 45b are provided to make the vertical The central axis should be divided into five equal-length line segments. That is to say, the four openings 45b are arranged on the longitudinal center axis at intervals, and the gastric interval is one of the length of the longitudinal axis. The opening 45b increases the adsorption 'on a circuit board' even when the size of the circuit board is quite large. It is determined in this way, different semiconductor packages are used. Xi Zong ^ ^ uses other structures and resin forming methods of the handle, which are the same as those described in the first embodiment. The third modification of the above-mentioned embodiment of the first embodiment is that the second embodiment is optimized for the second substrate, so as to avoid the large surface of the electric earth yak from floating on the inner surface of the frame, and It can be seen that 4: = T? Is the same as the first novel mold of the first embodiment ... The same is the same: a modified mold circuit board component mounting block with holes in the circuit. The third type of the mold 20 is the area between the dashed lines 64 and 65. Γ = 5 areas, which are defined by 鏠 fa * mount 4b. The opening 45a is formed in the side of the reader. The edge area is defined by the dashed line 64. Wash 65 doors. In addition, the plurality of openings 45b between the suction holes 45 and the area between the bars 65 and 65 are surrounded by broken lines, among which the array area of the circuit board unit 60 is in the formation area. In the third phase modification-electricity, and A, four openings 503497 V. Description of the invention (33) 4 5b is formed on a horizontal central axis, which is perpendicular to a longitudinal direction of a rectangular area The central axis, the rectangular region is defined by the dashed line 64, and three openings 45b are provided to divide the horizontal central axis into four equal-length line segments. That is, the three openings 45b are provided above the horizontal central axis at an interval, the interval being a quarter of the length of the horizontal central axis. The opening 45b increases the suction force acting on a circuit board, even when the size of the circuit board is relatively large. The position of the opening 45b is determined in such a manner as to avoid the circuit board unit 60. This makes the mold available for different semiconductor packages. The other structures of the mold and the resin molding method are the same as those described in the first embodiment. ^ ΐΐ Describe a fourth modification of the above embodiment, which is the fifth implementation. 八 18 The forming mold system is optimized to avoid a large-sized electrical mold = = the first type of the first embodiment. . Fig. 8D is a plan view of the suction hole of the circuit board component mounting block, showing a fourth modified mold circuit board component mounting block. Modulus: m ππ road machine plate component mounting block m has-edge area, which defines the edge area: the opening 45 of iL45 is formed on the edge, and the area of the suction holes π /, t 1 is defined on the broken line 64 and 65. Then the area =? A plurality of openings 45 "are formed in the-area, and the area is formed by the dashed line 64 * a # ^ Q, the array of the road board unit 60 ^ This area of Zeng Bazhong corresponds to an electric 503497 V. Description of the invention (34) " The array area of the circuit board unit 60, in which the four openings 45b are symmetrically arranged 'are symmetrical to a horizontal central axis and a Both longitudinal center axis. The opening 45b increases the suction force acting on a circuit board, even when the size of the circuit board is relatively large. The positions of the openings 4 5 b are determined in such a manner as to avoid the circuit board unit 60. This makes the mold available for different semiconductor packages. The other structures of the mold and the resin molding method are the same as those described in the first embodiment. Here, a sixth embodiment will be described. In this embodiment, the circuit board component 11 is fixed to one of the mounting surfaces of the circuit board component mounting block 42 by the high pressure of the air in the mold cavity of the mold, wherein the high pressure air in the mold cavity is The circuit board component 丨 丨 is pressed on the mounting surface of the circuit board component mounting block 42. Neither the suction force nor the suction force acts on the circuit board member 1 1. That is, the adsorption holes 45 and the adsorption grooves 63 are not required. The release film 41 may be selectively used. After the clamping procedure, a high-pressure air is injected into the cavity through the air holes 46, and the air in the cavity presses the circuit board component 11 against the female farmer's surface of the circuit board component mounting block 4 2 Therefore, the circuit board member 11 is fixed on the women's surface of the women's block 42 of the circuit board member, and does not float from the mounting surface. The bonding wires or other parts of the semiconductor package do not contact the release film 41. As a result, a part of the semiconductor device such as the bonding wire is not damaged, and a good appearance of the semiconductor package can be obtained. Furthermore, because a molding process resin injected into the cavity also withstands the high-pressure air in the cavity, the resin for the molding process can be injected evenly.

503497 五、發明說明（35) 雖然對具有一般技藝者而言，本發明的種種修改是明 顯的，然而上述之實施例應當作是說明而非限制本發明 者，且本發明不應限制於上述之實施例，凡在本發明的申 請專利範圍與其精神之内而採用異於上述之特定實施例來 更改實施者，亦包含在本發明的範圍内。503497 V. Description of the invention (35) Although various modifications of the present invention are obvious to those skilled in the art, the above-mentioned embodiments should be described instead of limiting the inventor, and the present invention should not be limited to the above The embodiments are also included in the scope of the present invention, as long as they are within the scope of the patent application of the present invention and the spirit thereof, and the specific embodiments different from the above are used to modify the implementation.

第40頁 圖式簡單說明 本發明的種種其他目的 下列仔細的說明，且—寻挫、以及伴隨的優點可由 為清楚的了解。 4考隨附的圖式說明，而獲致更 圖1“1D是部份剖面前視阌 模具與焊在一電路基板圖二以顯示一上模具、一下 用習知的下注塑形且使用一、的複數個半導體裝置，在使 法的一順序步驟。 一脫模薄膜之該批次樹脂封裝方 圖2A是一部份正視圖以 新穎的電路板。 本發明第一實施例之一種 圖2B是-部份剖面視圖一 以顯示本發明第—實—二面線， 圖。 種新穎電路板的部份放大視 圖2C是-部份正視圖，以 *Page 40 Brief Description of the Drawings Various Other Objects of the Invention The following detailed descriptions, and-setbacks, and accompanying advantages can be clearly understood. Figure 4 is attached to the description of the drawing, and the result is shown in Figure 1. "1D is a partial sectional front view of the mold and soldered on a circuit substrate. Figure 2 shows an upper mold, a conventional lower injection molding, and the use of one, A plurality of semiconductor devices are used in a sequential step of the method. A batch of resin packaging of a release film. FIG. 2A is a partial front view of a novel circuit board. FIG. 2B is a first embodiment of the present invention. -Partial cross-sectional view to show the first-real-dihedral line of the present invention, Fig. Partial enlarged view of a novel circuit board 2C is-Partial front view, with *

之一種新穎電路板。 "不本舍明第一實施例圖2A 圖3A是一平面圖顯 的模具。 圖（、、貝不本發明第-實施例之一種新穎 圖3B是一部份剖面視圖 以顯示本發明第一實施例之—種ς者圖3A之卜丨剖面線， 圖。 新穎的模具之部份放大視 圖3C是一視圖以顯示本發明 奋 機板構件安裝&，模具2〇是供下注塑==圖3A之一電路 圖4A至4D是部份剖面視圖，以顯‘一“ 在-電路基板構件之上的複數個導體、下模具與焊 第一實施例的下注塑形之 V體哀置，而在本發明 種新穎，且利用—脫模薄膜的 第41頁 503497 圖式簡單說明 批次樹脂封裝方法之順序步驟。 * 一 f 5A是—平面圖以顯示一半導體封裝，係利用本發明 第一實施例之該新穎的樹脂成形方法所獲得者。 干的ί —平面圖以顯示一半導體封裝’具有以虛線表 成形方=獲；：利用本發明第-實施例之該新賴的樹脂 片沿運作的部份透視示意圖，其中-切割刀 封裝面”成單獨的半導體封J封虞面板’以將該半導體 半導體封I面：：面：：：：以顯示-半導體封裝從-樹脂成形方法之中。’、 务明第一實施例之該新穎的 以顯示圖7Α之球栅陣列半導體封 圖^是―平面圖 裝。 圖8Α是一平面 修改的模具電路機板構發明第二實施例之第-種 圖8Β是—平面：構件女裝塊。 修改::2 :機板構ί ί =發明第三實施例之第二種 修改= =構發明第四實施例之第三種 修改的模具電略機板槿2示本發明第五實施例之第四種 双偁件安裝塊。 【圖式編號】A novel circuit board. " The first embodiment of the present invention is shown in Figs. 2A to 3A. Fig. 3 is a novel cross-sectional view of the first embodiment of the present invention. Fig. 3B is a partial cross-sectional view showing the first embodiment of the present invention-a cross-sectional view of Fig. 3A. The novel mold Partial enlarged view 3C is a view showing the mounting of the struggling board member of the present invention, and the mold 20 is for injection molding. == One of the circuits in Fig. 3A. Figs. 4A to 4D are partial cross-sectional views, showing The plurality of conductors on the circuit board member, the lower mold, and the V-shaped body of the lower injection molding of the first embodiment are laid aside, but in the present invention is novel, and the use-release film of page 41, 503497 is simply illustrated Sequential steps of the batch resin packaging method. * A f 5A is a plan view to show a semiconductor package, which is obtained by using the novel resin molding method of the first embodiment of the present invention. Dry —— a plan view to show a semiconductor The package 'has been formed with a dashed line table = obtained ;: a perspective view of a part of the operation of the new resin sheet of the first embodiment of the present invention, in which-the cutting blade package surface "is formed into a separate semiconductor package J sealing panel 'To Semiconductor semiconductor package I :: surface :::: display-semiconductor package slave-resin molding method. ', The new embodiment of the first embodiment is shown to show the ball grid array semiconductor package of FIG. 7A ^ Yes ―Plan view installation. FIG. 8A is a second modification of the second embodiment of the invention of the mold circuit board structure of a plane. FIG. 8B is—Plane: a component of women's clothing. Modification: 2: 2: Machine board structure ί = Invention third The second modification of the embodiment == The third modification of the fourth embodiment of the invention is a mold electric machine hibiscus 2 which shows the fourth double-piece mounting block of the fifth embodiment of the present invention. [Drawing number]

503497 圖式簡單說明 10 半導體封裝 11、111 電路基板構件 12 半導體裝置 13 密封樹脂 16 接合線 18 封裝面板 19 切割刀片 20、 120 模具 21、 1 21 上模具503497 Brief description of drawings 10 Semiconductor package 11, 111 Circuit board member 12 Semiconductor device 13 Sealing resin 16 Bonding wire 18 Packaging panel 19 Cutting blade 20, 120 Mould 21, 1 21 Upper mould

22、 122 下模具 23 模穴 23a 頂模穴 23b 底模穴 24 上中心塊 25 下中心塊 26 熔化樹脂/樹脂 27 凹部 28 柱塞 29 開孔22, 122 lower mold 23 cavity 23a top cavity 23b bottom cavity 24 upper center block 25 lower center block 26 molten resin / resin 27 recess 28 plunger 29 opening

30 橫澆道 31 澆口 31a 、 32a 間隙 32 假模穴 41 脫模薄膜30 Cross-runner 31 Gate 31a, 32a Clearance 32 Dummy cavity 41 Release film

第43頁 503497 圖式簡單說明 42、142 電路基板構件安裝塊 43 彈性構件 44、45 吸附孔 44a 、 45a 開口 46、146 通氣孔 50 周圍區域 51 絕緣基板 52 穿孔 53 銅配線Page 43 503497 Brief description of drawings 42, 142 Circuit board component mounting block 43 Elastic member 44, 45 Suction holes 44a, 45a Opening 46, 146 Ventilation hole 50 Surrounding area 51 Insulating substrate 52 Perforation 53 Copper wiring

54 阻焊劑 5 5 焊球 5 6 黏合劑 60 電路板單元 61 接合線部 62 外端點焊接部 63 吸附槽 6 4、6 5 破折線 71 切割線 72 電極板54 Solder resist 5 5 Solder ball 5 6 Adhesive 60 Circuit board unit 61 Bonding wire portion 62 Outer end soldering portion 63 Suction slot 6 4, 6 5 Broken line 71 Cutting line 72 Electrode plate

73 區域73 areas

第44頁Page 44

Claims (1)

503497 六、申請專利範圍 1 · 一種樹脂塑造方法，句人丄 設置一電路基板構件於步驟：々 面上，其中該電路基板構件、::具中：：：：的-安裝 基板構件的—邊緣區域^及1^用賴模具夾住該電路 之炫脂注人於該對模具之—模穴之中俾以該注入 之以化樹脂填滿模穴； 入 -正ί:曾在該閉合狀態中，-作用於該電路基板構件之 路基板構件之嗜背面的筮 仔叹疋為问於作用於该電 固定於該安裝面 力，藉以將該電路基板構件 2装如申請專利範圍第！項之樹脂塑造方法，其 至少-第-型吸附孔，以將ίΐ 牛及附於S女凌面之上，且在該對模具中之第一 哕：ί:成至少一第二型吸附孔’以將一脫模薄膜吸附； 忒對核具之該第二個之上。 了於 3路其如乂:f專利範圍第2項之樹脂塑造方法，其中，將該電 丞扳構件吸附於該安裝面上之該第一型吸附孔的—壓 係低於將一脫模薄膜吸附於該對模具之該第二個卜 该第二型吸附孔的一壓力值。 上之 4·如申請專利範圍第2項之樹脂塑造方法，其中，該安事 之至少—邊緣區域更設置複數個該第一型吸附孔，: 呑亥雷敗A JL4 - Λ m 域 板構件之一邊緣區域吸附於該安裝面之該邊緣區503497 VI. Application Patent Scope 1 · A resin molding method, a person sets a circuit board member on the step: the surface, where the circuit board member, ::: in ::::-of the mounting board member-edge Area ^ and 1 ^ Use the mold to clamp the circuit of the grease to inject the person into the mold cavity of the pair of molds, and fill the mold cavity with the injected resin; Insert-positive: once in the closed state Among them, the sigh on the back side of the circuit board member that acts on the circuit board member is sighed by the force acting on the electrical fixing to the mounting surface, so that the circuit board member 2 is installed as the first patent application! The resin molding method according to item, which comprises at least -type-type adsorption holes to attach ΐΐ 牛 and S female Ling noodles, and the first 哕 in the pair of molds: :: to form at least a second type of adsorption holes 'To adsorb a release film; 忒 on the second of the core. The method of resin molding in the 3rd item of the R & F: f patent scope is described in which the pressure of the first type suction hole of the first type suction hole on the mounting surface is lower than that of a mold release. The film adsorbs a pressure value on the second and second type adsorption holes of the pair of molds. The above 4 · If the resin molding method of item 2 of the scope of patent application, wherein at least-the edge area is further provided with a plurality of the first type adsorption holes: 呑 雷雷雷 A JL4-Λ m domain plate member An edge region is attracted to the edge region of the mounting surface 六、申請專利範圍 六、申請專利範圍 在由該 域更設 該邊緣 該安裝 對於一 均勻而 該安裝 可移動 5安專嘉利範圍第4項之樹脂塑造方法，其中， 右二n以邊緣區域所圍繞的該安裝面之一中央E m個該第一型吸附 = «λ?中央區域吸附於該安裝面之上。 而〇明專利乾圍第5項之樹脂塑造方法，其中， :、、'長方形外觀，且複數個該第-型吸附孔係 :心軸與垂直該縱中心軸的-水平中心軸兩者虑 對稱之分布，。 m考成 7 ·/如申請專利範圍第1項之樹脂塑造方法，其中， 面係形成於一安裝塊上，該安裝塊在上下方 自如。 诉馮 8·如申請專利範圍第1項之樹脂塑造方法，其中，^ 基板構件包括一電路板。 〜電路 9·如申請專利範圍第1項之樹脂塑造方法，其中 基板構件包括一電路膠帶。 、，該電路 10 ·如申請專利範圍第1項之樹脂塑造方法，其中，： 電路基板構件之上焊接有複數個半導體裝置，且該植在匕該、 造方法形成包括複數個樹脂成型之半導體封裝」=知塑 型封裝面板。 树脂成 11. …·如甲請專利範圍第1項之樹脂塑造方法，其中，—j 壓氣體被注入該模穴之中，以將該電路基板構 " 定於該安裝面之上。 #件確貫地 1 2 ·如申請專利範圍第2項之樹脂塑造方法，其中，上 路基板構件之該背面具有至少一吸附槽。 違電 503497 六、申請專利範圍 ~"" ------ 13·如申請專利範圍第1 2項之樹脂塑造方法，其 ▲ 附槽係延伸於陣列型態之複數個電路基板構罩 σ亥吸 間區域。 平疋間的中 14·如申請專利範圍第1 3項之樹脂塑造方法，其中， 附槽更連續地延伸於一邊緣區域，以包圍陣列能三二吸 數個電路基板構件單元。 心之该複 15·如申請專利範圍第1 4項之樹脂塑造方法，其中，> 一型吸附孔是形成於對應於該吸附槽的位置。一 ，第 16· 一種樹脂塑造成形用模具之組合，包含： 一第一模具，具有一安裝面，供一電路基板構件 =其上，其中該電路基板構件的一背面接觸該安裝面，^ 一第二模具，其第一侧具有一澆口，且相對於該一 侧之第一側具有一假模穴（dummy cavi以）。 17·如申請專利範圍第16項之樹脂塑造成形用模具之組 合，其中在該第一模具之上形成至少一第一型吸附孔，以 將該電路基板構件吸附於該安裝面之上，且在該第二模具 之上形成至少一第二型吸附孔，以將一脫模薄膜吸附於該 對模具之該第二模具之上。 18·如申請專利範圍第1 7項之樹脂塑造成形用模具之組 合，其中，將該電路基板構件吸附於該安裝面上之該第一 型吸附孔的一壓力值，係低於將該脫模薄膜吸附於該第二 模具上之該第二型吸附孔的一壓力值。 19·如申請專利範圍第18項之樹脂塑造成形用模具之組6. The scope of applying for patents 6. The scope of applying for patents is to set the edge from the domain. The installation is for a uniform and the installation can be moved by 5A. The resin molding method of item 4 of the Jiali range, where the second right n is the edge area. The center of one of the mounting surfaces that surrounds the E-type adsorption = «λ? The central region is adsorbed on the mounting surface. The resin molding method of item 5 of the Oming patent, wherein: ,,, and 'a rectangular appearance, and a plurality of the -type adsorption pore system: a mandrel and a horizontal central axis perpendicular to the longitudinal central axis are considered. Symmetrical distribution. m test into 7 · / The resin molding method according to item 1 of the scope of patent application, wherein the surface is formed on a mounting block, and the mounting block is free to be positioned above and below. V. Feng 8. The resin molding method according to item 1 of the patent application, wherein the substrate component includes a circuit board. ~ Circuit 9. The resin molding method according to item 1 of the patent application scope, wherein the substrate member includes a circuit tape. The circuit 10 The resin molding method according to item 1 of the scope of the patent application, wherein: a plurality of semiconductor devices are soldered on the circuit substrate member, and the method is used to form a semiconductor including a plurality of resin molding semiconductors "Packaging" = know plastic packaging panel. Resin composition 11. The resin molding method as described in item 1 of the patent, wherein -j pressure gas is injected into the cavity to fix the circuit board structure on the mounting surface. # 件 definitely 1 2 The resin molding method according to item 2 of the patent application scope, wherein the back surface of the road substrate member has at least one suction groove. Illegal electricity 503497 VI. Patent application scope ~ " " ------ 13 · If the resin molding method of the patent application item No. 12 is adopted, it has a plurality of circuit substrate structures with attached grooves extending in an array type. Cover the sigma suction area. In the flat area 14. The resin molding method according to item 13 of the patent application range, wherein the attachment groove extends more continuously on an edge region to surround the array and can absorb several circuit board component units. Mindfulness 15. The resin molding method according to item 14 of the scope of application for patent, wherein > a type of adsorption hole is formed at a position corresponding to the adsorption groove. 1. A combination of a mold for resin molding and forming, comprising: a first mold having a mounting surface for a circuit board member = on which a back surface of the circuit board member contacts the mounting surface, ^ a The second mold has a gate on the first side and a dummy cavi on the first side opposite to the one side. 17. The combination of a mold for resin molding according to item 16 of the application for a patent, wherein at least one first type adsorption hole is formed on the first mold to adsorb the circuit board member on the mounting surface, and At least one second-type adsorption hole is formed on the second mold to adsorb a release film on the second mold of the pair of molds. 18. The combination of molds for resin molding according to item 17 of the scope of patent application, wherein a pressure value of the first type adsorption hole that adsorbs the circuit board member on the mounting surface is lower than that of the release hole. A pressure value of the second type adsorption hole adsorbed by the mold film on the second mold. 19. · For the group of molds for resin molding, such as the scope of application for patent No. 18 503497 六、 申請專利範圍 合’其中’忒女裝面之至少一邊緣 置複數個該第 一裂吸附U將該電路基板構件之一邊緣區域吸附於該 安裝面之^邊緣區域。 20.如1請2!!圍第19項之樹脂塑造成形用模具之組 合，其中’被该安裝面之該邊絡 rh. ^ P ^ ^ ^ J 緣區域所圍繞的該安裝面之 一塞此°° 4 -蠢：「\ 11 δ亥第—型吸附孔，以將該電路基 ^構件之《1㈣域連同其巾4域吸附於該安裝面之 21·如申請專利範圍第2 0項之抖、 合，其中，該安裝面且有一县:曰塑造成形用模具之組 型吸附孔，係相對於二縱中Γ方形外觀，且複數個該第一 平中心軸兩者成均勻而對稱Z，與垂直該縱中心軸的一水 2 2·如申請專利範圍第1 6項之抖^ 合，其中，該安裝面係形成於^知塑造成形用模具之組 上下方向係為可移動自如。、〜安裝塊之上，該安裝塊在 23·如申請專利範圍第16項之执、 合，其中，該電路基板構对脂塑造成形用模具之組 24·如申請專利範圍第u項上^一電路板。 合，其中，該電路基板構件勺^脂塑造成形用模具之組 25·如申請專利範圍第16匕括一電路膠帶。 ^ :其中，在該電路基板構=樹脂塑造成形用模具之組 ，且該樹脂塑造方法形 之上焊接有複數個半導體# 2，：-_成型封裝=包括複數個樹脂成型之半導ΐ •如申請專利範圍第1 6 、之樹脂塑造成形用模具之組 503497 六、申請專利範圍 合，其中一尚壓氣體被注入該模穴之中，以將該電路基板 構件確實地固定於該安裝面之上 27·如申請專利範圍第丨7項之樹脂塑造成形用模具之組 合，其中該電路基板構件之該背面具有至少一吸附槽。 28·如申請專利範圍第27項之樹脂塑造成形用模具之組 合’其中該吸附槽係延伸於陣列型態之複數個電路基板構 件單元間的中間區域。 2·如申請專利範圍第28項之樹脂塑造成形用模具之組 合’其中該吸附槽更連續地延伸於包園陣列型態之該複數 個電路基板構件單元的一邊緣區域。 2·如申請專利範圍第2 9項之樹脂塑造成形用模具之組 a /、中5亥第一型吸附孔是形成於對應於該吸附槽的位 置0 第49頁503497 6. Scope of the application for patents At least one of the edges of the women's wear surface is provided with a plurality of the first crack adsorption U, and an edge region of one of the circuit substrate members is adsorbed on an edge region of the mounting surface. 20. If 1 please 2 !! The combination of molds for resin molding of item 19, wherein 'is one of the mounting surface surrounded by the edge rh. ^ P ^ ^ ^ of the mounting surface This °° 4-stupid: "\ 11 δ HAI first-type adsorption holes to adsorb the" 1㈣ domain of the circuit base member together with its towel 4 domain to the mounting surface 21 · If the scope of the application for patent No. 20 The mounting surface has one county: a group of suction holes for forming a mold, which have a square appearance relative to the two longitudinal centers, and a plurality of the first flat central axes are uniform and symmetrical. Z, combined with the water perpendicular to the longitudinal center axis 2 2 · As in item 16 of the scope of the patent application, wherein the mounting surface is formed in a group of molds for forming and forming, and the upper and lower directions are freely movable . ~ On the mounting block, the mounting block is in accordance with item 23 of the scope of application for patent application, where the circuit board structure is opposed to the group of molds for grease molding 24. ^ A circuit board, wherein the circuit board component spoon ^ Grease forming mold group 25 · Rushen Patent No. 16 includes a circuit tape. ^: Among them, the circuit board structure = a group of molds for resin molding, and a plurality of semiconductors # 2 are welded on top of the resin molding method. = Including several semi-conducting resins for resin molding. • If the scope of the patent application is No. 16 and the group of molds for resin molding is 503497. 6. The scope of the patent application is inclusive. The circuit board member is fixedly fixed on the mounting surface. 27. The combination of a mold for resin molding according to item 7 of the application for a patent, wherein the back surface of the circuit board member has at least one suction groove. The combination of molds for resin molding according to item 27 of the patent, 'wherein the adsorption groove extends in the middle area between a plurality of circuit board component units of an array type. 2. For the resin molding for item 28 of the application for a patent The combination of the molds, wherein the adsorption grooves extend more continuously in an edge region of the plurality of circuit substrate component units in the form of a package array. 2. If applied Group 2 of the scope of the patent No. 29 of the molds for resin molding a / 、 The first type of adsorption hole in the middle 5th is formed at the position corresponding to the adsorption groove. 0 page 49
TW090103079A 2000-02-10 2001-02-12 Resin-molding method, molding dies and circuit base member TW503497B (en)

Applications Claiming Priority (1)

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JP2000033380A JP3510554B2 (en) 2000-02-10 2000-02-10 Resin molding method, mold for molding and wiring substrate

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Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6747345B1 (en) * 2000-03-01 2004-06-08 Todd O. Bolken Exposed die molding apparatus
JP4658353B2 (en) * 2001-03-01 2011-03-23 ルネサスエレクトロニクス株式会社 Resin mold and resin mold package manufacturing method
TW486793B (en) * 2001-05-29 2002-05-11 Siliconware Precision Industries Co Ltd Packaging method for preventing a low viscosity encapsulant from flashing
JP2004134591A (en) * 2002-10-10 2004-04-30 Renesas Technology Corp Method for manufacturing semiconductor integrated circuit device
JP2004179345A (en) * 2002-11-26 2004-06-24 Fujitsu Ltd Substrate sheet material for semiconductor and manufacturing method therefor, and molding method using the substrate sheet material and method for manufacturing semiconductor device
JP4094515B2 (en) 2003-09-26 2008-06-04 株式会社ルネサステクノロジ Manufacturing method of semiconductor device
JP2005150350A (en) * 2003-11-14 2005-06-09 Renesas Technology Corp Method for manufacturing semiconductor device
JP4583020B2 (en) * 2003-11-17 2010-11-17 Ｔｏｗａ株式会社 Semiconductor chip resin sealing molding method and resin sealing molding die
US20050104251A1 (en) * 2003-11-18 2005-05-19 Lingsen Precision Industries, Ltd. Integrated circuit chip packaging process
JP2006073586A (en) 2004-08-31 2006-03-16 Renesas Technology Corp Semiconductor device manufacturing method
US7147447B1 (en) * 2005-07-27 2006-12-12 Texas Instruments Incorporated Plastic semiconductor package having improved control of dimensions
US7618249B2 (en) * 2006-09-22 2009-11-17 Asm Technology Singapore Pte Ltd. Memory card molding apparatus and process
CN103737849A (en) * 2013-11-30 2014-04-23 苏州市旭正模具厂 Plastic rubber mold for molding rotation lock catch
KR102376487B1 (en) 2015-02-12 2022-03-21 삼성전자주식회사 Manufacturing device of semiconductor package and method for manufacturing the same
US9947561B2 (en) * 2016-03-07 2018-04-17 Asm Technology Singapore Pte Ltd Semiconductor encapsulation system comprising a vacuum pump and a reservoir pump
JP6499105B2 (en) 2016-03-11 2019-04-10 東芝メモリ株式会社 Mold
JP6721525B2 (en) 2017-03-03 2020-07-15 キオクシア株式会社 Mold
US11114313B2 (en) * 2019-05-16 2021-09-07 Taiwan Semiconductor Manufacturing Co., Ltd. Wafer level mold chase
DE102023100284A1 (en) 2023-01-09 2024-07-11 Infineon Technologies Ag Package with vacuum suction reinforcing recess on the back of a carrier

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS618932A (en) 1984-06-25 1986-01-16 Fujitsu Ltd Method and apparatus for manufacturing semiconductor device
US4944908A (en) * 1988-10-28 1990-07-31 Eaton Corporation Method for forming a molded plastic article
JPH02297945A (en) 1989-05-12 1990-12-10 Denki Kagaku Kogyo Kk Manufacture of semiconductor element package
US5147821A (en) * 1990-09-28 1992-09-15 Motorola, Inc. Method for making a thermally enhanced semiconductor device by holding a leadframe against a heatsink through vacuum suction in a molding operation
JPH06232193A (en) 1993-02-02 1994-08-19 Hitachi Ltd Molding equipment and molding method using same
JP2524955B2 (en) * 1993-04-22 1996-08-14 トーワ株式会社 Method and apparatus for resin sealing molding of electronic parts
DE69501632T2 (en) * 1994-11-21 1998-07-23 Apic Yamada Corp Resin molding machine with release film
JP3214788B2 (en) 1994-11-21 2001-10-02 アピックヤマダ株式会社 Resin molding device and resin molding method
MY114536A (en) * 1994-11-24 2002-11-30 Apic Yamada Corp A resin molding machine and a method of resin molding
US5846477A (en) * 1994-12-08 1998-12-08 Nitto Denko Corporation Production method for encapsulating a semiconductor device
JP3631308B2 (en) 1995-10-25 2005-03-23 Ｔｏｗａ株式会社 Resin sealing molding method for electronic parts
US6048483A (en) * 1996-07-23 2000-04-11 Apic Yamada Corporation Resin sealing method for chip-size packages
KR19980058464A (en) * 1996-12-30 1998-10-07 김영환 Molding method of semiconductor package
JP2971834B2 (en) * 1997-06-27 1999-11-08 松下電子工業株式会社 Method for manufacturing resin-encapsulated semiconductor device
JP3017470B2 (en) * 1997-07-11 2000-03-06 アピックヤマダ株式会社 Resin molding method and resin molding device
JPH1140593A (en) 1997-07-16 1999-02-12 Towa Kk Resin seal molding method of electronic component and metal die
EP0971401B1 (en) * 1998-07-10 2010-06-09 Apic Yamada Corporation Method of manufacturing semiconductor devices and a resin molding machine therefor
US6439869B1 (en) * 2000-08-16 2002-08-27 Micron Technology, Inc. Apparatus for molding semiconductor components

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US20010013674A1 (en) 2001-08-16
KR20010082113A (en) 2001-08-29
JP2001223229A (en) 2001-08-17

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