TW495438B - Material for mounting, circuit for mounting using that material, printed circuit board using that circuit - Google Patents

Material for mounting, circuit for mounting using that material, printed circuit board using that circuit Download PDF

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Publication number
TW495438B
TW495438B TW89111622A TW89111622A TW495438B TW 495438 B TW495438 B TW 495438B TW 89111622 A TW89111622 A TW 89111622A TW 89111622 A TW89111622 A TW 89111622A TW 495438 B TW495438 B TW 495438B
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TW
Taiwan
Prior art keywords
layer
copper
nickel
circuit
welding
Prior art date
Application number
TW89111622A
Other languages
Chinese (zh)
Inventor
Kinji Saijo
Kazuo Yoshida
Hiroaki Okamoto
Shinji Osawa
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Toyo Kohan Co Ltd
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Publication of TW495438B publication Critical patent/TW495438B/en

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/202Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using self-supporting metal foil pattern
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof
    • H05K3/3473Plating of solder
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0355Metal foils
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0361Etched tri-metal structure, i.e. metal layers or metal patterns on both sides of a different central metal layer which is later at least partly etched
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03Metal processing
    • H05K2203/0361Stripping a part of an upper metal layer to expose a lower metal layer, e.g. by etching or using a laser
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03Metal processing
    • H05K2203/0384Etch stop layer, i.e. a buried barrier layer for preventing etching of layers under the etch stop layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/02Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • H05K3/281Applying non-metallic protective coatings by means of a preformed insulating foil

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

A mounting circuit and a printed wiring board, in each of which a composition/size on a circuit is uniform, a position accuracy is good and a solder bump is formed, and a mounting material for forming them, are provided. The mounting material is characterized in that a solder layer (10), a nickel layer (11) and a copper layer (12) are laminated in this order. Further, the mounting material is characterized in that, in its one face, the copper layer (12) having the nickel layer (11) and the solder layer (10) are laminated in order, with the nickel layer (11) being an intermediate layer. Further, in the mounting material, a resin film (20) is laminated on a copper layer (12) side of the mounting material (14).

Description

五、發明說明(1) I發明係有關丰I 士 度的酉己置有焊接隆起可供製造高密度且高精確 採用讀材斜夕# 之物之裝配用電路而用的裝配用材料, , 、配用電路及形成有該電路之印刷電路板。 f 土·.後遗 接層,:用:::::,“ί部分的配線層上形成著焊 此,隨著近年的電·;機 度化。 接層之狹線距(pitch)化,高位置精確 接印層之形成方法,雖有⑴焊接被覆法、⑺焊 ;=:(3)焊接鍍著法等代表性方法,然而⑴、⑴ 多的時間之課題;::政性較大’而(3)方面則有需要較 之手r in Γ66545號公報内揭示有解決上述方法 之手&,/、!龟步驟示於第8圖、第9圖。如第8圖 , 準備貼^焊接羯之層合板,㈣烊接fl並形成圖案。因 此,如苐9圖所不熔融轉印於印刷電路板上。 發明欲解決的誤顳 然而’在上述的焊接層之形成方法,且有以下應予解 決的課題。亦即’利用圖案敍刻方式形成焊接圖案後,轉 印已-次形成的焊接圖案之步驟即為必需的,而有製造步 五、發明說明(2) 騾變多的課題存在。又於 確度的決定位置之必要,路板上轉印之際,有高精 確度上有生成問題之可能:者電路之微細&,於其位置精 本發明係欲解決上述課 成•尺度均勻,位置精瑞#碭而元成者,以提供電路上組 之震配用電路,印刷开良=予形成谭接隆起物 為課題。 及元成该專而用的裝配用材料 的手咢 申請專利範圍第1項之奘航田^丨丨 焊接層、鎳層及銅層為特徵裝配用材料,係以依序層合有 申請專利範圍第2項之穿西?田从w ^ 以鎳層為中間層依序層合有、且 枓’係以於單面上使 為特徵。 〃備鎳層之銅層及焊接層而成 申請專利範圍第3項之穿s?爾从业丨乂 之銅層側上已層合樹脂薄,係以裝配用材料 選擇崎配用材料之焊接褒二用开電路^ 存的餘刻而形隆起物,對已殘 料施加選擇^圍:5樹項之:刷電路板’係以對裝配用材 路為特徵。 、③9,寻膜上形成附有焊接隆起物之電 申睛專利範圍第6項之奘 事先對焊接箱、鍍鋅之鈉心吐用入材枓,係、以在真空槽内 又辣之銅泊或貼合鍍鎳之銅的樹脂薄膜之 495438 五、發明說明(3) ^ 接合面進行活性化處理後,將前述焊接羯及前述鍍鎳之銅 箔或貼合鍍鎳的銅之樹脂薄膜層合並以〇·卜Μ之輥軋率 行冷壓焊予以形成,該時活性化處理係(丨)於丨x i 〜工X 10-4 T〇rr之極低壓惰性氣圍中,(2)以具有接合面之前 銅d與刖述鑛鎳作為各自接地的一侧之電極A,於經予絕 緣支持的其他電極B之間施加卜50MHz之交流電並使進行% 光放電,(3)且使曝露於由輝光放電生成的電漿中之電 極,其面積在電極B之面積之丨/3以下,(4)藉由濺鍍蝕 處理予以進行為特徵。 發明之實施形熊 以下,依附圖說明本發明之裝配用電路之製造方法。 首先,依後述的蝕刻等形成裝配用電路之際,於;开^成電路 之銅落(銅層)12 (厚度10〜100 “瓜較合適)之單面上施加V. Description of the invention (1) The invention of I is an assembly material used for the assembly of soldering ridges for the production of high-density and high-accuracy assembly circuits that use reading materials Xie Xi #, 3. Equipped with a circuit and a printed circuit board on which the circuit is formed. f Soil .. The left-over connection layer is used :::::, "The welding layer is formed on the part of the wiring layer, and with the recent years of electricity and opportunity, the pitch of the connection layer (pitch) becomes The formation methods of high-position and precise printed layer, although there are representative methods such as ⑴ welding coating method and ⑺ welding; =: (3) welding plating method, but the problem of ⑴ and ⑴ more time; (3), compared with the hand r in Γ66545, there is a need to solve the above-mentioned hand &,! The turtle steps are shown in Figures 8 and 9. As shown in Figure 8, prepare Paste ^ soldering the laminated board, and then connect fl and form a pattern. Therefore, as shown in Fig. 9 is not melt-transferred on the printed circuit board. However, the error that the invention wants to solve is, however, in the above-mentioned method of forming the solder layer And there are the following problems that should be solved. That is, 'After forming the welding pattern by pattern engraving, the step of transferring the weld pattern that has been formed once is necessary, and there are manufacturing steps. 5. Description of the invention (2) 骡Many problems exist. In addition, it is necessary to determine the position accurately. When transferring on the road, there is high accuracy. There is a possibility of generating problems: the circuit's fineness & the location of the invention is to solve the above-mentioned lessons • uniform size, location is precise # 砀 and yuancheng, to provide the circuit on the circuit with the matching circuit , Printing Kailiang = pre-formation of Tan Jie humps as the subject. And Yuan Cheng's manual assembly materials used in this application 咢 Hangtian ^ 丨 丨 welding layer, nickel layer and copper layer are The material for feature assembly is based on the orderly lamination of the west side of the patent application scope No. 2? Tian Cong w ^ The nickel layer is used as the intermediate layer and the lamination is laminated on one side. The copper layer and the welding layer of the nickel layer are prepared to form a thin layer of resin on the copper layer side of the patent application No. 3 application. The welding is based on the selection of the assembly material and the material used for the welding.褒 Second, use the open circuit to save the remaining shaped bumps, and apply selection to the remaining material. 围: 5 tree items: brush circuit board 'is characterized by the way of assembly materials. The 6th item of the patent application scope of the welding application with welding bumps is to vomit the sodium in the welding box and the zinc plating in advance The material 枓 is made of hot copper in a vacuum tank or a resin film bonded with nickel-plated copper 495438. V. Description of the invention (3) ^ After the bonding surface is activated, the welding 羯 and the aforementioned The nickel-plated copper foil or the nickel-coated copper resin thin film layer is formed by cold-press welding at a rolling rate of 0 · BM. At this time, the activation treatment is performed at 丨 xi ~ 工 X 10- In the extremely low-pressure inert gas enclosure of 4 Torr, (2) using copper d and ore nickel as the grounded electrode A before the joint surface, and applying insulation between other electrodes B supported by insulation 50MHz AC power and% light discharge, (3) the electrode exposed to the plasma generated by glow discharge, the area of which is less than / 3 of the area of electrode B, (4) by sputtering It is characterized by proceeding. DETAILED DESCRIPTION OF THE INVENTION A method for manufacturing an assembling circuit according to the present invention will be described below with reference to the drawings. First, when forming an assembly circuit by etching or the like described later, apply it on one side of a copper drop (copper layer) 12 (thickness of 10 to 100 "melon suitable") for circuit formation.

鎳(鎳層)11(厚度0·5〜3 較合適),製造鍍鎳之銅箔X 13(參閱第1圖)。 、其次,將鍍鎳之銅箔1 3捲繞於第7圖所示的包層板制 造裝置之回繞捲軸23上。又將形成焊接隆起物之焊接 捲繞於回繞捲軸25上。 υ 由回繞捲軸2 3、2 5同時回繞鍍鎳之銅箔丨3及焊接 1〇,將其一部分捲繞於已突出於蝕刻室26内之滾動電極 27、28上,並在蝕刻室26内,使進行濺鍍蝕刻處理 性化。 j你 此時,活性化處理係如本申請人先前於日本特開平 495438 玉、發明說明(4) 卜2 241 84號公報揭示,以(1)於1)<1〇-1〜1\ 中⑺以具有接合面之錢轉之與焊 之hV妾地的一側之電極A,於經予絕緣支持的 ⑴且二ΪΓ:加卜5°·之交流電並使進行輝光放電, ,雷放電生成的電漿中之電極,其面積 y極B之面積之1/3以下,⑷藉由_兹刻處理予以進 焊,已設於真空槽29内之輥軋單位30進行冷壓 知捲取於捲取輥輪32上,如第!圖所示, 隆起物之裝配用形成電路用包層材14。 (銅乂者雖已說明將已事先鍍鎳(鎳層)於銅箔 烊接之例子,然而亦可採用上述包層板 鍍鎳。 干接鎳,自(鎳層)至銅箱(銅層)上者以取代 m參又閱第::)述取’:已採 路板用包層材。 x鎳的銅《’亦可製造形成印刷電 再者’於設有上述回繞捲二 置鋼箔、貼合銅箔之樹脂薄:二以上的此等捲軸上設 捲軸藉由可同時承受箔材之佴=…泊材等,由三台以上的 造多層構造之包層板。 ’、、,、°,以—次的加壓焊接可製 將上述裝配用材料裁切士、〜 第2圖〜第9圖並予說明的下斤期待的大小後,經過參照 先如第2圖所示,於焊接箔(夕驟,製造裝配用電路。首 、妾層)1〇之表面上形成光阻 495438 五、發明說明(5) 膜1 5後,曝光、顯影,製作焊接隆起物用圖案。 •如第3圖所示,進行焊接箔1〇及鍍鎳丨丨之選擇蝕刻, 殘存著焊接隆起物1 6並去除銅结1 2。至於此選擇钱刻所用 的餘刻液’以市售的銅以上之焊接蝕刻液(例如Mertex公 司製造、Enstrip TL- 142 CONC)等較合適使用。 其次,如第4圖所示,於形成電路用之銅箔上形成光 阻膜1 7後,曝光、顯影,製作形成電路用之圖案。 如第5圖所示,採用氯化鐵或硫酸+過氧化氫等並蝕刻Nickel (nickel layer) 11 (thickness of 0.5 ~ 3 is more suitable), and nickel-plated copper foil X 13 is manufactured (see Figure 1). Next, the nickel-plated copper foil 13 is wound on a winding reel 23 of the clad plate manufacturing apparatus shown in FIG. Then, the welding forming the welding bump is wound on the rewinding reel 25. υ Rewind the reel 2 and 2 5 at the same time to rewind the nickel-plated copper foil 3 and weld 10, and wind a part of it on the rolling electrodes 27 and 28 that have protruded in the etching chamber 26, and in the etching chamber In 26, sputter etching is performed. j At this time, the activation process is as disclosed by the applicant in Japanese Patent Application Laid-Open No. 495438 Jade, Invention Description (4) BU 2 241 84, and (1) in 1) < 1〇-1 ~ 1 \ In the middle, the electrode A on the side with the welding hV and the ground with the welding surface is connected to the insulated and supported Ϊ and Ϊ Γ: Gain 5 ° · alternating current and make a glow discharge, lightning discharge The electrode in the generated plasma has an area of less than 1/3 of the area of the y-pole B. It is welded by the __cut process, and the rolling unit 30 in the vacuum tank 29 is cold-pressed and coiled. On the take-up roller 32, as above! As shown in the figure, the cladding material 14 is formed for assembling the bumps. (Although copper has been described as an example in which nickel (nickel layer) has been plated on copper foil beforehand, the above-mentioned clad plate can also be used for nickel plating. Dry nickel, from (nickel layer) to copper box (copper layer) ) The former replaces m and reads the paragraph: :) to get the ': the cladding material for road boards has been taken. x nickel copper "'Can also be made to form printed electrical equipment' on the resin thin film provided with the above-mentioned two winding steel foils and laminated copper foils: two or more of these reels are provided with a reel to support the foil at the same time.佴 之 佴 = ... 泊, etc., three or more clad boards with a multilayer structure. ',,,, °, the pressure welding can be produced by the above-mentioned pressure welding, ~ 2 Figures ~ 9 Figures and the expected size of the catty, after reference, as in Figure 2 As shown in the figure, a photoresist 495438 is formed on the surface of the soldering foil (even, manufacturing circuits for assembly. First and second layers) 5. Description of the invention (5) After the film 15 is exposed and developed, a solder bump is produced. With pattern. • As shown in FIG. 3, selective etching of the solder foil 10 and nickel plating is performed, and the solder bumps 16 remain, and the copper junction 12 is removed. As for this choice, the after-etching solution used for the money engraving is a commercially available soldering etchant of copper or more (for example, manufactured by Mertex, Enstrip TL-142 CONC) and the like. Next, as shown in Fig. 4, a photoresist film 17 is formed on a copper foil for circuit formation, and then exposed and developed to produce a pattern for circuit formation. As shown in Figure 5, etching is performed using ferric chloride or sulfuric acid + hydrogen peroxide, etc.

處理銅箔12。由而,形成電路18。藉由以上的步驟,可 作裝配用電路1 9。 又,至於第1圖所示的裝配用材料,若採用於銅羯上 =先經予層合有樹脂板片之材料並進行上述的製造步驟 如第6圖所示,於樹脂薄膜20上可製作具有已予形成 焊接隆起物1 6之印刷電路板2 〇 〇。 且,印刷電路板200係於已製作帛 路19後’亦層合樹脂薄膜2〇並可予形成。Θ哀配用電 發明之功效 如上述’於申請專利筋图楚 配用材料,因焊接層、鎳層 工、至3項及第6項之裝 的,故焊接隆起物之厚度:度;以層:厚度係固定 封裝亦無傾斜及出現連接不良的現^卩使載置半導体 又,為以0 · 1〜3 %之低輕顧圭 銅層’藉由可抑低接合界面雍:堅焊接焊接層、鎳層、 之應力,可保持接合界面之不Processed copper foil 12. Thereby, the circuit 18 is formed. By the above steps, an assembling circuit 19 can be obtained. In addition, as for the assembling material shown in FIG. 1, if it is used on copper cymbals = the material with the resin sheet laminated beforehand and the above-mentioned manufacturing steps are performed as shown in FIG. 6, the resin film 20 may be used. A printed circuit board 2000 having a solder bump 16 formed thereon is produced. In addition, the printed circuit board 200 is formed by laminating a resin film 20 after the circuit 19 has been produced. The effect of Θ Ai's electrical invention is as described above. The materials used in the patent application are as follows. Due to the welding layer, nickel layer, and items 3 to 6, the thickness of the welding bumps: degrees; Layer: The thickness of the fixed package is not tilted and the connection is poor. It makes the semiconductor mounted on the copper layer at a low level of 0. 1 ~ 3%. The welding layer, nickel layer, and stress can keep the joint interface

五、發明說明(6) 坦度, 不生成V. Description of the Invention (6)

優越的裝配用電路。 、 於申請專利範圍第5項之印刷電路板,因係選擇性的 #刻上述的裝配用材料並作成能將附有隆起物之電路形成 於樹脂薄膜上,故可保持原狀的用作印刷電路板。 圖式之^^說明 第1圖為與本發明之一實施形態有關的裝配用材料之 概略說明圖。 第2圖為與本發明之一實施形態有關的裝配用電路之 製造方法的步驟說明圖。 第3圖為與本發明之一實施形態有關的裝配用電路之 製造方法的步驟說明圖。 第4圖為與本發明之一實施形態有關的裝配用電路之 製造方法的步驟說明圖。 第5圖為與本發明之一實施形態有關的裝配用電路之 製造方法的步驟說明圖。 第6圖為與本發明之一實施形態有關的印刷電路板之 概略說明圖。 第7圖為與本發明之一實施形態有關的裝配用材料之 製造方法的步驟說明圖。 第8圖為習用的印刷電路板之製造方法之說明圖。 第9圖為習用的印刷電路板之製造方法之說明圖。Excellent assembly circuit. The printed circuit board in item 5 of the scope of patent application is selectively engraved with the above-mentioned assembly materials and made into a circuit with a bump on the resin film, so it can be used as a printed circuit in its original state. board. ^^ Description of the drawings Fig. 1 is a schematic explanatory diagram of an assembling material according to an embodiment of the present invention. Fig. 2 is a diagram illustrating the steps of a method for manufacturing an assembly circuit according to an embodiment of the present invention. Fig. 3 is a diagram illustrating the steps of a method of manufacturing an assembly circuit according to an embodiment of the present invention. Fig. 4 is a diagram illustrating the steps of a method of manufacturing an assembly circuit according to an embodiment of the present invention. Fig. 5 is a diagram illustrating the steps of a method of manufacturing an assembly circuit according to an embodiment of the present invention. Fig. 6 is a schematic explanatory diagram of a printed circuit board according to an embodiment of the present invention. Fig. 7 is an explanatory diagram showing the steps of a method for manufacturing an assembly material according to an embodiment of the present invention. Fig. 8 is an explanatory diagram of a conventional method for manufacturing a printed circuit board. FIG. 9 is an explanatory diagram of a conventional printed circuit board manufacturing method.

495438 五、發明說明(7) 圖號之說明 10 焊接層(焊接箔) 11 鎳層(鍍鎳) 12 銅層(銅箔) 13 鍍鎳之銅箔 14 裝配用材料 16 焊接隆起物 15,17 光阻膜 18 電路 19 裝配用電路 20 樹脂薄膜 200 印刷電路板495438 V. Description of the invention (7) Description of drawing number 10 Welding layer (welding foil) 11 Nickel layer (nickel plating) 12 Copper layer (copper foil) 13 Nickel-plated copper foil 14 Assembly materials 16 Welding bumps 15, 17 Photoresist film 18 Circuit 19 Assembly circuit 20 Resin film 200 Printed circuit board

Claims (1)

六、歹薄¥W1圍 種4配用材料,倍0 1而μ 合有具備録層之銅層及焊接層而成二鎳層為中間層依序層 配用f f配用材料’係將申請專利範圍第1項或第2 i 配用材料之銅層側上已層合樹脂薄膜而成。第2項之褒 4二:種褒配用電路’係將申請專利範圍第 =配用材料之焊接層以殘存銅擇 J之任 焊接層以形成焊接隆起物,對已殘存m用 案蝕刻而形成電路而成。 的钔層轭加圖 5料=印刷電路板’係對申請專利範 =選擇㈣,於樹脂薄膜上形成附有焊接心 6.如申請專利範圍第丨項至第3項 禮其中前述裝配用材料,係在真空槽内= = 料 =箱祕鑛錄的銅彻薄膜之接合面進行活性: 將别述焊接兔及可述鍍鎳之銅箱或貼合鍍鎳的銅 :树=膜層合並以0.卜3%之輥軋率進行冷壓焊予=奶 成,遠盼活性化處理係(1)於lx iO-kh 1〇_4 T〇rr之極低Sixth, thin ¥ W1 and 4 kinds of matching materials, times 0 1 and μ combined with a copper layer with a recording layer and a welding layer to form a nickel layer as an intermediate layer and sequentially use ff matching materials' will apply The scope of the patent item 1 or 2 i is made by laminating a resin film on the copper layer side. Item No. 42 of Item 2: "Equipped with a circuit" is to apply the soldering layer of the patent application scope = matching material to the remaining copper and select any soldering layer of J to form a welding bump. The remaining m is etched and used. Formed by the circuit.钔 layer yoke plus Figure 5 = printed circuit board's patent application = selection ㈣, forming a solder core on the resin film 6. If the scope of the application for patents No. 丨 to No. 3, the aforementioned assembly materials In the vacuum tank = = material = box of the copper ore film on the joint surface of the copper film to carry out activity: the other mentioned welding rabbits and nickel-plated copper box or nickel-plated copper: tree = film layer combined Cold press welding at a rolling rate of 0. 3% I = milk, I hope the activation treatment system (1) is extremely low at lx iO-kh 1〇_4 T〇rr 第12頁 495438 六、申請專利範圍 壓惰性氣圍中,(2)以具有接合面之前述銅箔與前述鍍鎳 作為各自接地的一側之電極A,於經予絕緣支持的其他電 極B之間施加卜5 0MHz之交流電並使進行輝光放電,(3)且 使曝露於由輝光放電生成的電漿中之電極,其面積在電極 B之面積之1 / 3以下,(4)藉由濺鍍蝕刻處理予以進行。Page 12 495438 6. In the scope of the patent application, in the inert gas enclosure, (2) the aforementioned copper foil with the joint surface and the aforementioned nickel plating are used as electrodes A on the grounded side, and other electrodes B supported by insulation An alternating current of 50 MHz is applied at intervals and glow discharge is performed. (3) The area of the electrode exposed to the plasma generated by the glow discharge is less than 1/3 of the area of the electrode B. (4) By sputtering The plating etching process is performed. 第13頁Page 13
TW89111622A 1999-06-16 2000-06-14 Material for mounting, circuit for mounting using that material, printed circuit board using that circuit TW495438B (en)

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JP2001196381A (en) * 2000-01-12 2001-07-19 Toyo Kohan Co Ltd Semiconductor device, metallic laminated board used for formation of circuit on semiconductor, and method for forming circuit
CN113324202B (en) * 2021-06-07 2022-05-17 厦门天马微电子有限公司 Lamp strip, backlight unit and display device including lamp strip

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