TW479413B - D/A converter, its method, and the data interpolation device - Google Patents

D/A converter, its method, and the data interpolation device Download PDF

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Publication number
TW479413B
TW479413B TW090105607A TW90105607A TW479413B TW 479413 B TW479413 B TW 479413B TW 090105607 A TW090105607 A TW 090105607A TW 90105607 A TW90105607 A TW 90105607A TW 479413 B TW479413 B TW 479413B
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Taiwan
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data
digital
scattered
mentioned
moving average
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TW090105607A
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Chinese (zh)
Inventor
Yukio Koyanagi
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Sakai Yasue
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66Digital/analogue converters
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F17/00Digital computing or data processing equipment or methods, specially adapted for specific functions
    • G06F17/10Complex mathematical operations
    • G06F17/17Function evaluation by approximation methods, e.g. inter- or extrapolation, smoothing, least mean square method
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06TIMAGE DATA PROCESSING OR GENERATION, IN GENERAL
    • G06T3/00Geometric image transformation in the plane of the image
    • G06T3/40Scaling the whole image or part thereof
    • G06T3/4007Interpolation-based scaling, e.g. bilinear interpolation

Abstract

The present invention discloses a D/A converter, its method, and the data interpolation device, which is configured with: a digital waveform generation portion 10, for synthesizing the digital data of the basic waveform generated from the discrete data corresponding to the input by the iterative operation; a revolution operation portion 20, for over-sampling on the output from the digital waveform generation portion 10 and conducting iterative operation; and, a D/A conversion portion 30, for D/A conversion on the output from the revolution operation portion 20 and conducting amplitude modulation on the discrete data with the basic digital waveform and synthesizing by the iterative operation. Then, the method can obtain the sequential interpolation value with only the over-sampling and the iterative operation so that it can eliminate the need for configuring with a low-pass filter and the deterioration of the phase characteristic caused by the filter.

Description

479413479413

經濟部智慧財產局員工消費合作社印製 五、發明說明(1 ) 本發明係關於,可將分散性之數位資料變換成連續性 之類比信號之數位-類比變換器(D / A變換器)及方法,以 及資料內插裝置,特別是關於,使用在語音資料之D / A變 換等很合適者。 在最近之數位音頻裝置,例如C D播放機或D V D播送 機等,爲了要從分散性之數位語音資料獲得連續性之類比 語音信號,係使用應用超取樣技術之D / A變換器。 這種D / A變換器爲了要在分散式輸入之數位資料間內 插資料,以虛擬方式提高取樣頻率,一般都是使用數位濾 波器,以樣品保持電路保持各內插値生成階梯狀之信號波 形後,令其通過低通濾波器,輸出平滑之類比語音信號。 通常由D / A變換器所含之數位濾波器進行之資料內插 ,係使用稱作s i n c函數之標本化函數。第1圖係s i n c 函數之說明圖。s i n c函數係將Dirac之5函數反傅立葉 (Founer)變換時出現,以標本化頻率爲f時,由s 1 η ( π f t )/ ( π f t )定義之。此s i n c函數僅在t = 0之標本點其値 成爲1,在其他之所有標本點之値爲〇。 第2圖係表示分散資料與其間之內插値之關係之圖。 例如以平滑變化之類比之語音信號以一定之時間間隔標本 化,在將其量子化而獲得作爲標本資料之分散性語音資料 。D / A變換器則輸入這種分散之數位之語音資料’輸出其 間用上述s i n c函數之內插處理連接之連續性之類比語音 信號。 在第2圖,假設相等間隔之標本點t 1、t 2、t 3、t ζ 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) -4 - ϋ an n ϋ ί βϋ ϋ n ί I · tm i n n MM§ ϋ ϋ ϊ ,a an «ϋ ϋ «ϋ n n an 1 一 (請先閱讀背面之注意事項再填寫本頁) 479413 A7 B7 五、發明說明(2 ) 之各點之分散資料之値爲Y(tl)、Y(t2)、Y(t3)、Y(t4)’ 如果是要求出,例如對標本點t 2與t 3間之一定位置t 0 ( (請先閱讀背面之注意事項再填寫本頁) 離t 2距離a處)之內插値Υ ° 一般來講,要使用標本化函數求出內插値y時’可先 求出所給之各分散資料之內插位置t 0之標本化函數之値’ 再使用此値進行折疊運算即可。具体上是,按t1〜t 4之 各標本點,使標本化函數之中心位置之蜂値高度一致’求 出這時之各內插位置t 0之標本化函數之値(以X記號表示) ,將其全部相加。 再者,隨著時間之經過,內插位置t 〇會移動’但因對 應各標本位置之各位準也會隨著時間之經過而變化’因此 內插値y (t 0)也連續變化’可獲得平滑連接各分散資料間 之連續之類比信號。 然而,使用上述超取樣技術之傳統之D / A變換器’因 爲是將經內插而獲得之階梯狀之信號波形通過低通濾波器 以生成平滑之類比信號,因此存在有,所輸出之類比信號 會因低通濾波器使其相位特性劣化之問題。 經濟部智慧財產局員工消費合作社印製 同時,上述sine函數係在±〇〇會聚成〇之函數’因 此,要求出正確之內插値時必須求出所有之分散資料之 s i n c函數之値,再相加。但實際上是,因處理能力或電 路規模等之關係,而限定要考慮之分散資料之範圍進行數 位濾波器之處理。因此,所獲得之內插値含有去除尾數之 誤差,有無法獲得正確之內插値之問題。 如此,在應用超取樣技術之傳統之D / Α變換器’由於 -5- 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 479413 Α7 Β7 五、發明說明(3 ) (請先閱讀背面之注意事項再填寫本頁) 通過低通濾波器而造成相位特性之劣化,同時,因爲是使 用應用sine函數之數位濾波器,而產生去除尾數之誤差 。因此,對應此等之輸出波形產生失真,輸出之語音品質 有劣化之問題。 本發明係爲了解決這種問題而完成者,其目的在獲得 失真很少之輸出波形,使其可以提高輸出語音之品質。 本發明之數位-類比變換器,係藉.由超取樣及一次以 上之移動平均運算或折疊運算,將對應輸入之η個分散資 料之値之基本波形之數位資料相互加以合成,藉此求出對 上述分散資料之數位之內插値後,將包含該內插値之各數 位資料値變換成類比量。 本發明之其他形態,係藉由超取樣及移動平均運算或 折疊運算,將對應輸入之η個分散資料之値之基本波形之 數位資料相互加以合成,對該合成之數位資料値,再進行 移動平均運算或折疊運算,求出對上述分散資料之數位之 內插値後,將包含該內插値之各數位資料値變換成類比量 〇 經濟部智慧財產局員工消費合作社印製 本發明之其他形態具備有:藉由移動平均運算或折疊 運算,將對應輸入之η個分散資料之値之基本波形之數位 資料相互加以合成之合成構件;在多段範圍內進行,對藉 由上述合成構件生成之數位資料,以前段之兩倍之頻率對 輸入之各資料値取樣,將獲得之各資料値,及將此等各錯 開一定相位之各資料値分別相加,而輸出到下一段之處理 之超取樣構件;對藉由上述超取樣構件取得之各資料値進 -6 - 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 479413 A7 B7 五、發明說明(4 ) 行移動平均運算或折疊運算之運算構件;以及,將上述運 算構件求得之各資料値變換成類比量之D / A變換構件。 (請先閱讀背面之注意事項再填寫本頁) 本發明之其他形態具備有:將對應依照基準頻率時鐘 脈衝輸入之η個分散資料之値之基本波形之數位資料,分 別相互錯開上述基準頻率時鐘脈衝分而相加,以進行資料 合成之合成構件;在多段範圍內進行,對藉由上述合成構 件生成之數位資料,以前段之兩倍之頻率對輸入之各資料 値取樣,將獲得之各資料値,及將此等分別錯開半時鐘脈 衝分之各資料値分別相加,而輸出到下一段之處理之超取 樣構件;對藉由上述超取樣構件取得之各資料値,在上述 超取樣構件之最後一段之頻率時鐘脈衝下,將各資料分別 錯開一時鐘脈衝而相加,藉此進行移動平均運算或折疊運 算之運算構件;以及,將上述運算構件求得之各資料値變 換成類比量之D / Α變換構件。 經濟部智慧財產局員工消費合作社印製 在此,上述合成構件具備有:例如,可令依據上述基 準頻率時鐘脈衝順序輸入之分散資料,順序延遲上述基準 頻率時鐘脈衝分之η個延遲構件;以及,對從上述n個延遲 構件輸出之各個資料値,分別乘上對應基本數位波形之各 增益値,同時,將各個乘算結果相加而輸出到上述超取樣 構件之乘加法構件。 同時,上述超取樣構成構件具備有:例如,對上述合 成構件生成之數位資料之各資料値,以上述基準頻率之兩 倍頻率之時鐘脈衝取樣,分別將所獲得之各資料値及將此 錯開半個時鐘脈衝分之各資料値相加之第1運算構件;對 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 經濟部智慧財產局員工消費合作社印製 479413 A7 B7____ 五、發明說明(5 ) 由上述第1運算構件獲得之各資料値,以上述基準頻率之4 倍頻率之時鐘脈衝取樣,分別將所獲得之各資料値及將此 錯開半個時鐘脈衝分之各資料値相加之第2運算構件;以 及,對由上述第2.運算搆件獲得之各資料値,以上述基準 頻率之8倍頻率之時鐘脈衝取樣,分別將所獲得之各資料 値及將此錯開半個時鐘脈衝分之各資料値相加之第3運算 構件。 同時,上述運算構件具備有:例如,將藉由上述超取 樣構件獲得之數位資料,分別順序延遲上述超取樣構件之 最後段之頻率時鐘脈衝分之多數延遲構件;以及,分別將 上述多數延遲構件之輸出相加而輸出之加法構件。 同時,本發明之數位-類比變換方法含有:藉由超取 樣及一次以上之移動平均運算或折疊運算,將對應輸入之η 個分散資料之値之基本波形之數位資料相互加以合成,藉 此求出對上述分散資料之數位內插値之運算步驟;以及, 將包含藉由上述運算求得之內插値之各數位資料値變換成 類比量之D / Α變換步驟。 本發明之其他形態含有:藉由移動平均運算或折疊運 算,將對應輸入之η個分散資料之値之基本波形之數位資 料相互加以合成之合成步驟;對該合成之數位資料値再進 行伴隨移動平均運算或折疊運算之超取樣之超取樣步驟; 對藉由上述超取樣獲得之資料値再進行移動平均運算或折 疊運算,而求出對上述分散資料之數位內插値之運算步驟 ;以及,將包含藉由上述運算求得之內插値之各數位資料 本i張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁)Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the Invention (1) The present invention relates to a digital-to-analog converter (D / A converter) that can convert decentralized digital data into continuous analog signals and Methods and data interpolation devices are particularly suitable for use in D / A conversion of speech data. In recent digital audio devices, such as a CD player or a DVD player, in order to obtain a continuous analog voice signal from decentralized digital voice data, a D / A converter using oversampling technology is used. In order to interpolate data between distributed input digital data, this D / A converter uses a digital filter to increase the sampling frequency in a virtual way. Generally, a digital filter is used to maintain the interpolation in the sample holding circuit to generate a stepped signal. After the waveform, it is passed through a low-pass filter to output a smooth analog voice signal. The data interpolation usually performed by the digital filter included in the D / A converter uses a specimenization function called the s i n c function. Figure 1 is an explanatory diagram of the s i n c function. The s i n c function appears when inverse Fourier transform of the 5 function of Dirac. When the specimen frequency is f, it is defined by s 1 η (π f t) / (π f t). This s i n c function is only 1 at the specimen point at t = 0, and 値 at all other specimen points. Fig. 2 is a diagram showing the relationship between the scattered data and the interpolated frame therebetween. For example, the speech signal with a smooth analogy is sampled at a certain time interval, and it is quantized to obtain the dispersed speech data as the sample data. The D / A converter inputs this dispersed digital voice data 'and outputs an analog voice signal during which the continuity of the connection is processed by the above-mentioned interpolation of the s i n c function. In Figure 2, it is assumed that the specimen points t 1, t 2, t 3, and t ζ are equally spaced. The paper size applies the Chinese National Standard (CNS) A4 (210 X 297 mm) -4-ϋ an n ϋ ί βϋ ϋ n ί I · tm inn MM§ ϋ ϋ ϊ, a an «ϋ ϋ« ϋ nn an 1 1 (Please read the notes on the back before filling out this page) 479413 A7 B7 V. Points of the invention description (2) The scattered data is Y (tl), Y (t2), Y (t3), Y (t4) 'If it is required, for example, a certain position t 0 between the specimen points t 2 and t 3 ((Please first Read the notes on the back and fill in this page) Interpolation 値 Υ at a distance from t 2) ° Generally speaking, when using interpolation function to find the interpolation 値 y, you can first obtain the scattered data given値 'of the specimenization function at the interpolation position t 0, and then use this to perform the folding operation. Specifically, according to each specimen point of t1 to t4, the height of the beetle at the center position of the specimenization function is consistent. Add them all up. Furthermore, as time passes, the interpolation position t 〇 will move 'but the position corresponding to each specimen position will also change as time passes', so the interpolation 値 y (t 0) also changes continuously. Obtain a continuous analog signal that smoothly connects scattered data. However, the conventional D / A converter using the above-mentioned oversampling technique is because the stepped signal waveform obtained by interpolation is passed through a low-pass filter to generate a smooth analog signal, so there is an analog output The signal has a problem that its phase characteristics are deteriorated by a low-pass filter. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. At the same time, the above sine function is a function that converges to ± 0. Therefore, when the correct interpolation is required, one must find the sinc function of all the scattered data, and then Add up. In practice, however, due to the relationship of processing capacity or circuit size, the range of scattered data to be considered is limited for digital filter processing. Therefore, the interpolation interpolation obtained contains errors in removing the mantissa, and there is a problem that a correct interpolation interpolation cannot be obtained. In this way, the traditional D / Α converter in the application of the oversampling technology 'because -5- this paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 479413 Α7 Β7 V. Description of the invention (3) ( Please read the precautions on the back before filling this page.) The phase characteristics are degraded by the low-pass filter. At the same time, the digital filter using the sine function is used to remove the mantissa error. Therefore, there is a problem that the output waveforms corresponding to these are distorted and the quality of the output voice is deteriorated. The present invention has been made in order to solve this problem, and its purpose is to obtain an output waveform with little distortion so that it can improve the quality of output speech. The digital-analog converter of the present invention is obtained by supersampling and more than one moving average operation or folding operation to synthesize the digital data of the basic waveforms corresponding to the input n scattered data to each other, thereby obtaining After interpolating the digits of the above dispersed data, the digital data including the interpolated digits is transformed into an analog quantity. In other forms of the present invention, the digital data corresponding to the basic waveforms of the input n scattered data are synthesized with each other by oversampling and moving average calculation or folding operation, and the synthesized digital data is then moved. After averaging or folding calculation to obtain the interpolated digits of the above-mentioned scattered data, the digital data including the interpolated digits are converted into analog quantities. The form includes: a synthetic component that synthesizes the digital data corresponding to the basic waveforms of the input n scattered data with each other through a moving average operation or a folding operation; it is carried out in a plurality of segments, and For digital data, the input data is sampled at twice the frequency of the previous paragraph, the data obtained is added, and each of these data is shifted from a certain phase, and they are added to the output of the next stage. Sampling component; advance all the data obtained through the above-mentioned supersampling component-6-This paper size applies Chinese national standards CNS) A4 specification (210 X 297 mm) 479413 A7 B7 V. Description of the invention (4) Operation components for moving average calculation or folding operation; and Transforming each data obtained by the above operation components into D of analog quantity / A transform component. (Please read the precautions on the back before filling this page.) Other forms of the present invention include: digital data corresponding to the basic waveform of one of the n dispersed data input according to the reference frequency clock pulse, staggering the reference frequency clock with each other. The pulses are divided and added to synthesize the components for data synthesis; in a range of multiple segments, the digital data generated by the above-mentioned synthesis components are sampled at the frequency of twice the previous segment, and each of the data obtained is sampled. The data 値 and the data 値 which are staggered by half the clock pulse are added separately and output to the next-stage processing oversampling component; for each data 藉 obtained by the above-mentioned oversampling component, the above-mentioned oversampling Under the frequency clock pulse of the last segment of the component, each data is staggered by one clock pulse and added to perform a moving average operation or a folding operation; and each data obtained by the above operation component is converted into an analogy. Quantitative D / Α conversion component. Printed here by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, the above-mentioned composite component is provided with, for example, decentralized data that can be sequentially input according to the reference frequency clock pulses and sequentially delay n reference components of the reference frequency clock pulses; and Each data 输出 output from the n delay members is multiplied by each gain 对应 corresponding to the basic digital waveform. At the same time, the multiplication results are added and output to the multiply-add member of the supersampling member. At the same time, the above-mentioned supersampling component includes: for example, each piece of data of the digital data generated by the above-mentioned synthesis component, sampling with a clock pulse that is twice the frequency of the above-mentioned reference frequency, separately sampling each of the obtained data, and staggering this. Each piece of data divided by half a clock pulse is added as the first calculation component; the Chinese National Standard (CNS) A4 specification (210 X 297 mm) is applied to this paper size. Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs and Consumer Cooperatives 479413 A7 B7____ 5 5. Description of the invention (5) Each data obtained from the above-mentioned first operation means is sampled with clock pulses of 4 times the above reference frequency, and each of the obtained data is separated by a half clock pulse. A second operation means for adding the data; and each data obtained from the above 2. operation means is sampled with a clock pulse of 8 times the frequency of the reference frequency, and each of the data obtained is This is a third arithmetic component that is staggered by adding data of half a clock pulse. At the same time, the operation means includes, for example, a plurality of delay means for sequentially delaying the majority of the frequency clock pulses of the last stage of the oversampling means, respectively, of the digital data obtained by the oversampling means; and The output component is added and the output component is added. At the same time, the digital-analog conversion method of the present invention includes: by oversampling and more than one moving average operation or folding operation, the digital data corresponding to the basic waveforms of the input n scattered data are synthesized with each other, thereby obtaining A step of calculating the digital interpolation of the scattered data is performed; and a step of D / A conversion of converting each of the digital data including the interpolation of the data obtained by the above calculation into an analog quantity. Other forms of the present invention include: a synthetic step of synthesizing digital data corresponding to the basic waveforms of the input n scattered data by using moving average calculation or folding operation; and associatively moving the synthesized digital data An oversampling step of the oversampling of the averaging operation or the folding operation; a moving average operation or a folding operation on the data obtained by the above-mentioned oversampling to obtain a digital interpolation step of the scattered data; and, The digital data including the interpolated 求 obtained through the above calculation will be applied to the Chinese standard (CNS) A4 specification (210 X 297 mm). (Please read the precautions on the back before filling this page)

479413 A7 B7_ 五、發明說明(6 ) 値變換成類比量之D / A變換步驟。 (請先閱讀背面之注意事項再填寫本頁) 同時,本發明之內插裝置,係藉由超取樣及一次以上 之移動平均運算或折疊運算,將對應輸入之II個分散資料 之値之基本波形之數位資料相互加以合成,藉此求出對上 述分散資料之數位之內插値。 本發明之其他形態,係藉由移動平均運算或折疊運算 ,將對應輸入之η個分散資料之値之基本波形之數位資料 相互加以合成,對該合成之數位資料値進行超取樣,對藉 由此獲得之資料値再進行移動平均運算或折疊運算,而求 出對上述分散資料之數位之內插値。 經濟部智慧財產局員工消費合作社印製 依據如上述構成之本發明時,因爲僅藉由超取樣及移 動平均運算或折疊運算,將對應輸入之分散資料之基本波 形之數位資料相互加以合成之數位處理,便能夠獲得對原 來之分散資料之連續性內插値,因此將其D / Α變換之結果 便成爲平滑之類比信號。因此,可以不必像傳統配設樣品 保持電路或低通濾波器,可以抑制因濾波器造成之相位特 性之劣化。而且,本發明之從基本數位波形生成之函數係 有限台之標本化函數,因此可以減少獲得一個內插値所需 要之分散資料之數目,而且在減少應成爲處理對象之分散 資料數時,也可以使其不產生去除尾數之誤差。因此,可 以將輸出波形之失真抑制到最低限度。 依據上述各點,可以大幅度提昇輸出之類比信號之品 質。 本實施形態之D / A變換器不是使用數位濾波器進行超 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 479413 Λ7 B7 五、發明說明(7 ) 取樣後,通過樣品保持電路、低通濾波器生成類比信號, 而其特徵是在,應輸入之分散資料將對應標本化函數之基 本波形之數位資料相互加以合成,對所獲得之資料値執行 超取樣及移動平均運算或折疊運算(以後稱作褶積 (convolution)運算),藉此以數位方式求出各內插値後,生 成對應此之類比信號。 茲參照附圖詳細說明本實施形態之D / A變換器如下。 第3圖及第4圖係表示本實施形態之D / A變換器之架構圖 ,第5.圖〜第7圖係用以說明本實施形態之D / A變換器之 原理圖。首先參照上述第5圖〜第7圖說明D/A變換器之 原理。 第5圖係本實施形態使用之基本數位波形之說明圖。 第5圖所示之基本數位波形係以超取樣進行資料內插時使 用之標本化函數之基本。此基本數位波形係按基準脈衝之 每1時鐘脈衝(CK)使資料値作-1、1、8、8、1、- 1之 變化而作成。 在此,爲了要說明本實施形態之D / A變換動作之基本 原理,思考對第5圖之基本數位波形施加下述處理之情形 。首先,對如第5圖所示之基本波形之數位資料値,以兩 倍頻率之時鐘脈衝(2CK)進行取樣,而分別將所獲得之各樣 品値及將該等各錯開2CK之半個時鐘脈衝分(半相位)之各樣 品値予以相加,藉此以數位方式執行伴隨有兩段褶積 (convolution)運算之兩倍之超取樣。 接著,對此從第1次超取樣獲得之各資料値,再以兩 :---^--------裝--- (請先閱讀背面之注意事項再填寫本頁) 訂· 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS)A4規格(210 x 297公釐) -10 - 經濟部智慧財產局員工消費合作社印制π 479413 A7 B7___ 五、發明說明(8 ) 倍頻率之時鐘脈衝(4CK)進行取樣,而分別將所獲得之各樣 品値及將該等各錯開4CK之半個時鐘脈衝分(半相位)之各樣 品値予以相加,藉此,與第1次同樣執行伴隨有兩段褶積 運算之再兩倍之超取樣。 然後,對此從第2次超取樣獲得之各資料値,再以兩. 倍頻率之時鐘脈衝(8CK)進行取樣,而分別將所獲得之各樣 品値及將該等各錯開8CK之半個時鐘脈衝分(半相位)之各樣 品値予以相加,藉此,再執行1次伴隨有兩段褶積運算之 再兩倍之超取樣。 如此返覆進行兩倍之超取樣及兩段之褶積運算3次後 ,對第3次之褶積運算獲得之各資料値,以跟第3次同樣頻 率之時鐘脈衝(8CK),將各取樣値分別錯開1個時鐘脈衝, 執行8段之褶積運算。 第6圖係表示對第5圖之基本數位波形進行上述超取樣 與褶積運算之結果之圖。其中,第6圖(A)係表示,第1次 進行超取樣與褶積運算之結果。在第6圖(A),第1行之數 列表不’對第5圖所不之基本數位波形之資料値實施兩倍 超取樣之結果,第2行之數列表示,將第1行之各樣品値錯 開半相位分之結果。而且,第3行之數列係表示,在對應 之列間加算第1行之各樣品値與第2行之各樣品値之結果。 而第6圖(B)係表示,進行第2次之超取樣與褶積運算 之結果。在第6圖(B),第1行之數列表示,對由第1次之 超取樣與褶積運算所獲得之上述第6圖(A)之第3行所示資 料値進行兩倍超取樣之結果,第2行之數列表示,將第1行 本紙張尺度適用中國國家標準(CNS)A4規格(210 x 297公爱) (請先閱讀背面之注意事項再填寫本頁) 裝 479413 Λ7 ___B7____ 五、發明說明(9 ) ·,---;--------裝--- (請先閱讀背面之注意事項再填寫本頁) 之各樣品値錯開半相位分之結果。而且,第3行之數列係 表示,在對應之列間加算第1行之各樣品値與第2行之各樣 品値之結果。 而第6圖(C)係表示,進行第3次之超取樣與褶積運算 之結果。在第6圖(C),第1行之數列表示,對由第2次之 超取樣與褶積運算所獲得之上述第6圖(B)之第3行所示資 料値進行兩倍超取樣之結果,第2行之數列表示,將第1行 之各樣品値錯開半相位分之結果。而且,第3行之數列係 表示,在對應之列間加算第1行之各樣品値與第2行之各樣 品値之結果。再者,因圖面上之限制,一連串之數列係以 兩段構造表示之。 而第6圖(D)係表示進行8段褶積運算之結果。在第6 圖(D),第1行之數列表示,由第3次之超取樣與褶積運算 所獲得之上述第6圖(C)之第3行所示資料値,2〜8行之數 列表示,將第1行之各樣品値依序錯開半相位分之結果。 而且,第9行之數列係表示,在對應之列間加算第1〜8行 之各樣品値之結果。再者,這裡也是因圖面上之限制,以 兩段構造表示一連串之數列。 經濟部智慧財產局員工消費合作社印制β 將第6圖(D)之第9行所示之最終獲得之各樣品値加以 D / A變換時,將可獲得第7圖所示之波形函數之信號。此 第7圖所示之函數,係整個領域可作一次微分,沿橫軸之 標本位置t在1至65之間時具有〇以外之有限値,在其餘 之領域,其値全部都是〇之函數。 再者,函數之値在局部領域具有0以外之有限値’在 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公爱1 " 12 ' "" 經濟部智慧財產局員工消費合作社印製 479413 B7____ 五、發明說明(10) 其他領域爲0時稱作「有限台」。 而第7圖之函數,係僅在t = 3 3之標本點時取最大値 ,在t=l、17、49、65之4個標本點成爲〇爲其特徵 之標本化函數,通過獲得平滑之類比波形之信號所需要之 所有樣品點。 如此,第7圖所示之函數係標本化函數,係整個領域 可作一次微分,而且在標本位置t = 1、65會聚到〇之有限 台之函數。因此,使用第7圖之標本化函數取代第1圖所 示之傳統之sine函數,進行依據各分散資料之重疊,便 可以使用可微分1次之函數內插分散資料間之値。 但在本實施形態,依據各分散資料之重疊(合成),並非 在從第5圖之基本數位波形求出第7圖之標本化函數後執行 ,而是如使用第3圖及第4圖所後述,在進行上述超取樣及 褶積運算前之階段以數位方式爲之。因此,僅對實施各分 散資料之重疊之數位資料進行上述超取樣及褶積運算,便 可以立即獲得,與第2圖之重疊對應各分散資料大小之標 本化函數同等之結果。 傳統上使用之sine函數,係在±〇〇之標本點時會聚 成0之函數’因此欲求出正確之內插値時,必須對應至土 〇〇 之各分散資料,計算在內插位置之s i n c函數之値,使用 這些値進行折疊運算。對此,本實施形態所用之第7圖之 標本化函數在標本位置t = 1、6 5會聚到0,因此,只要考 慮t =1〜65之範圍內之分散資料便可。 因之,欲求出某一內插値時,只要考慮有限數之分散 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 2^7公釐) *---^----------------訂---------^^1' (請先閱讀背面之注意事項再填寫本頁) 479413 A7 B7 五、發明說明(11) (請先閱讀背面之注意事項再填寫本頁) 資料之値便可以,可以將處理量大幅度削減。而且’關於t =1〜65之範圍外之各分散資料,並不是本來應考慮而因考 量處理量或精準度而予以忽視,而是理論上沒有考慮之必 要,因此不會發生切除尾數所產生之誤差。 第3圖係表示本實施形態之D / A變換器之整体架構圖 。第3圖所示之D / A變換器係由數位波形產生部1 〇、褶積 運算部20及D / A變換部30所構成。上述數位波形產生部 10對應本發明之合成構件,褶積運算部20對應本發明之超 取樣構件及運算構件,D / A變換部30對應本發明之D / A 變換構件。 數位波形產生部1 0之架構可參照第4圖說明如下。而 褶積運算部20係如參照上述第6圖所作之說明,用以執行 超取樣及褶積運算,產生用以內插輸入數位波形產生部10 之分散資料間之各取樣點之數位資料値。而D / A變換部30 則用以將由褶積運算部20求得之數位資料値加以D / A變 換(在此並不執行如傳統之藉超取樣之內插)。 經濟部智慧財產局員工消費合作社印製 在上述褶積運算部20之架構,D型正反器(以下簡稱 D · FF)la係依兩倍頻率之時鐘脈衝(4CK)保持從數位波形 產生部1 0輸出之數位資料。並聯在此D · F F 1 a之 D · F F lb,也同樣依兩倍頻率之時鐘脈衝(4CK)保持從數 位波形產生部10輸出之數位資料。但這一邊是以上述4CK 之相位反轉之周期保持。 而加法器2係用以將上述兩個D · F F 1 a、1 b所保持 之數位資料値相加。由此等D · F F 1 a、1 b及加法器2構 -14- 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 479413 A7 B7 五、發明說明(12) 成本發明之第1運算構件,對數位波形產生部1 0輸出之數 位資料,執行兩倍之超取樣,及分別將由此獲得之各樣品 値及將其各錯開半相位之各樣品値相加之兩段之褶積運算( 參照第6圖(A))。 並聯在上述加法器2後段之兩個D · F F 3a、3b將由 加法器2輸出之數位資料,再依兩倍頻率之時鐘脈衝(8CK) 以相互錯開半相位之周期保持。而加法器4則將上述兩個 D · F F 3a、3b保持之數位資料値相加。 由此等D · F F 3a、3b及加法器4構成本發明之第2 運算構件,對第1段之褶積運算所獲得之數位資料,再執 行兩倍之超取樣,及分別將由此獲得之各樣品値及將其各 錯開半相位之各樣品値相加之兩段之褶積運算(參照第6圖 ⑻)。 並聯在上述加法器4後段之兩個D · F F 5a、5b將由 加法器4輸出之數位資料,再依兩倍頻率之時鐘脈衝(16CK) 以相互錯開半相位之周期保持。而加法器6則將上述兩個 D · F F 5a、5b保持之數位資料値相加。 由此等D· FF5a、5b及加法器6構成本發明之第3 運算構件,對第2段之褶積運算所獲得之數位資料,再執 行兩倍之超取樣,及分別將由此獲得之各樣品値及將其各 錯開半相位之各樣品値相加之兩段之褶積運算(參照第6圖 (C))。 如此返覆進行3次之兩倍之超取樣及兩段之褶積運算 ,而對由數位波形產生部10輸出之數位資料執行8倍之超 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) ---:-------#-裝--- (請先閱讀背面之注意事項再填寫本頁) · 經濟部智慧財產局員工消費合作社印製 -15- 經濟部智慧財產局員工消費合作社印制代 +/9413 --------B7_______ 五、發明說明(13) 取樣。褶積運算部20內之上述架構對應本發明之超取樣構 件’以下所述之其餘架構則對應本發明之運算構件。 附隨連接在上述加法器6之後段之8個D · F F 7a〜7h ’依16倍頻率之時鐘脈衝(16CK)將加法器6輸出之數位資 料分別延遲1個時鐘脈衝而依序加以保持。此等8個之 D · F F 7a〜7h對應本發明之延遲構件。而以下所述之其 餘架構則對應本發明之加法構件。 加法器8a及1 / 2乘法器9a將由D · F F 7g、7h保持 之數位資料値相加而乘以1 / 2倍。加法器8b及1 / 2乘法 器9b將由D · F F 7e、7f保持之數位資料値相加而乘以 1/2倍。加法器8c及1/2乘法器9c將由D· FF7c、7d 保持之數位資料値相加而乘以1 / 2倍。加法器8d及1 / 2 乘法器9d將由D · F F 7a、7b保持之數位資料値相加而乘 以1 / 2倍。 同時,加法器8e及1 / 2乘法器9e將由兩個1 / 2乘法 器9a、9b輸出之數位資料値相加而乘以1 / 2倍,加法器 8f及1/2乘法器9f將由兩個1 / 2乘法器9c、9d輸出之數 位資料値相加而乘以1 / 2倍,加法器8 g及1 / 2乘法器9 g 將由兩個1 / 2乘法器9e、9f輸出之數位資料値相加,將其 結果供給D / A變換部3 0。 藉由以上之D· FF7a〜7h、加法器8a〜8g及1/2乘 法器9 a〜9 f之架構,對上述施以1 6倍超取樣之數位資料, 在1 6倍頻率之時鐘脈衝(1 6 C K)之下執行對各樣品値分別錯 開1個時鐘脈衝而相加之8段之褶積運算(參照第6圖(D))。 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) -T6- (請先閱讀背面之注意事項再填寫本頁)479413 A7 B7_ V. Description of the invention (6) D / A conversion step of 値 conversion into analog quantity. (Please read the notes on the back before filling this page) At the same time, the interpolation device of the present invention is based on the basics of the II input of scattered data through oversampling and more than one moving average operation or folding operation. The digital data of the waveforms are synthesized with each other, thereby obtaining the interpolation of the digital data of the above-mentioned scattered data. In other forms of the present invention, digital data corresponding to the basic waveforms of the input n scattered data is synthesized by moving average calculation or folding operation, and the synthesized digital data is oversampled. The obtained data is then subjected to a moving average operation or a folding operation to obtain the interpolation of the digits of the above-mentioned scattered data. When the consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs prints the present invention constituted as described above, the digital data corresponding to the basic waveforms of the input dispersed data are synthesized with each other only by oversampling and moving average calculation or folding operation. Processing, we can obtain the continuous interpolation of the original scattered data, so the result of the D / Α transformation becomes a smooth analog signal. Therefore, it is not necessary to provide a sample holding circuit or a low-pass filter like the conventional one, and it is possible to suppress the deterioration of the phase characteristics caused by the filter. In addition, the function generated from the basic digital waveform of the present invention is a specimenized function of a finite station, so the number of scattered data required to obtain an interpolation frame can be reduced, and when the number of scattered data that should be processed is reduced, Can make it not produce the error that removes the mantissa. Therefore, distortion of the output waveform can be suppressed to a minimum. According to the above points, the quality of the analog signal of the output can be greatly improved. The D / A converter in this embodiment does not use a digital filter for ultra-paper size. Applicable to China National Standard (CNS) A4 (210 X 297 mm) 479413 Λ7 B7 V. Description of the invention (7) After sampling, pass the sample The holding circuit and low-pass filter generate analog signals. The characteristic is that the scattered data that should be input synthesize the digital data corresponding to the basic waveform of the specimen function, and perform supersampling and moving average operations on the obtained data. Or a folding operation (hereinafter referred to as a convolution operation), whereby each interpolation 値 is digitally obtained, and an analog signal corresponding to this is generated. The D / A converter of this embodiment will be described in detail with reference to the drawings. Figures 3 and 4 are diagrams showing the structure of the D / A converter of this embodiment, and Figures 5 to 7 are diagrams for explaining the principle of the D / A converter of this embodiment. First, the principle of the D / A converter will be described with reference to FIGS. 5 to 7 described above. Fig. 5 is an explanatory diagram of a basic digital waveform used in this embodiment. The basic digital waveform shown in Figure 5 is the basis of the specimenization function used in data interpolation by oversampling. This basic digital waveform is created by changing the data to -1, 1, 8, 8, 1, and -1 every clock pulse (CK) of the reference pulse. Here, in order to explain the basic principle of the D / A conversion operation of this embodiment, consider a case where the following processing is applied to the basic digital waveform of FIG. 5. First, the digital data 基本 of the basic waveform shown in Figure 5 is sampled with a clock pulse (2CK) of twice the frequency, and each of the obtained samples 値 is staggered by a half clock of 2CK. The pulses (half-phase) of each sample are summed, thereby performing digitally oversampling with twice the convolution operation with two stages. Next, I will use the two data obtained from the first oversampling, and then two: --- ^ -------- install --- (please read the precautions on the back before filling this page) · Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. The paper size applies to the Chinese National Standard (CNS) A4 (210 x 297 mm) -10-Printed by the Employees’ Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs π 479413 A7 B7___ Note (8) Sampling of clock pulses (4CK) with frequency multiples, and add each sample obtained, and add each sample divided by half clock pulses (half phase) staggered by 4CK, and add Therefore, twice the oversampling with the two-stage convolution operation is performed similarly to the first time. Then, the data 値 obtained from the second oversampling is sampled with two clock pulses (8CK) at a frequency twice, and each of the obtained samples 値 is staggered by a half of 8CK. The clock pulses (half-phase) are added to each sample, thereby performing one more double oversampling with two convolution operations. In this way, twice the oversampling and the two-stage convolution operation are performed three times, and then each data obtained by the third convolution operation is performed, and each clock pulse (8CK) with the same frequency as the third is used to The sampling frames are staggered by one clock pulse, and a convolution operation of 8 segments is performed. Fig. 6 is a diagram showing the results of performing the above-mentioned oversampling and convolution operation on the basic digital waveform of Fig. 5. Among them, Fig. 6 (A) shows the results of the first oversampling and convolution operation. In Figure 6 (A), the number list in the first row does not show the results of the double oversampling on the basic digital waveform data in Figure 5. The number in the second row indicates that The sample is staggered by the results of the half phase division. The sequence of the third row indicates the result of adding each sample 算 in the first row and each sample 値 in the second row between the corresponding columns. Figure 6 (B) shows the results of the second oversampling and convolution operation. In FIG. 6 (B), the first row of the sequence indicates that the data shown in the third row of FIG. 6 (A) obtained by the first oversampling and convolution operation is twice oversampled. As a result, the sequence of the second line indicates that the paper size of the first line applies the Chinese National Standard (CNS) A4 specification (210 x 297 public love) (Please read the precautions on the back before filling this page). 479413 Λ7 ___B7____ V. Description of the invention (9) ·, ------------- install --- (Please read the precautions on the back before filling in this page) The results of each sample are staggered. In addition, the sequence of the third row indicates the result of adding each sample 値 in the first row and each sample 行 in the second row between the corresponding columns. Figure 6 (C) shows the results of the third oversampling and convolution operation. In Figure 6 (C), the first row of the sequence indicates that the data shown in the third row of Figure 6 (B) obtained by the second oversampling and convolution operation is twice oversampled. As a result, the sequence in the second row shows the results obtained by staggering the samples in the first row by a half phase. In addition, the sequence of the third row indicates the result of adding each sample 値 in the first row and each sample 行 in the second row between the corresponding columns. Furthermore, due to the limitation on the drawing, a series of series is represented by a two-segment structure. Fig. 6 (D) shows the result of performing 8-stage convolution operation. In Figure 6 (D), the first row of the sequence shows the data shown in the third row of Figure 6 (C) obtained by the third oversampling and convolution operation. The sequence shows the results of sequentially shifting the samples in the first row by a half phase. The sequence of the 9th row shows the result of adding each sample 算 in the 1st to 8th row between the corresponding columns. In addition, here is also a series of sequences represented by a two-segment structure due to limitations in the drawing. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs β When the final sample obtained in line 9 of Figure 6 (D) is D / A transformed, the waveform function shown in Figure 7 can be obtained. signal. The function shown in Figure 7 is that the entire field can be differentiated once. The specimen position t along the horizontal axis has a finite value other than 0 when the sample position t is between 1 and 65. In the remaining fields, all of them are 0. function. In addition, the function has a limit other than 0 in local areas. 'The national paper (CNS) A4 specification (210 X 297 Public Love 1 " 12' " " " " " " " " " " " " Printed by the Consumer Cooperative 479413 B7____ V. Description of the invention (10) When other fields are 0, it is called "limited station". The function in Figure 7 is the maximum value only at the specimen point at t = 3 3, and at t = The four specimen points of l, 17, 49, and 65 become the specimenization function with 0 as its characteristic, and all the sample points required to obtain a smooth analog waveform signal are obtained. Thus, the function shown in FIG. 7 is the specimenization function. , Is a function that can be differentiated once in the entire field, and converges to a finite station of 0 at the specimen position t = 1, 65. Therefore, the specimen function shown in Fig. 7 is used instead of the traditional sine function shown in Fig. 1 to perform Based on the overlap of the scattered data, the difference between the scattered data can be interpolated using a function that can be differentiated once. However, in this embodiment, the overlap (synthesis) of the scattered data is not based on the basic digital waveform of Figure 5. Find Figure 7 The function is executed after the specimen is converted, but as described later in Figures 3 and 4, it is performed digitally before the above-mentioned oversampling and convolution operations. Therefore, only the overlapping digits of the scattered data are implemented. The data can be obtained immediately by performing the above-mentioned oversampling and convolution operation, and the result is equivalent to the specimenization function corresponding to the size of each scattered data in the overlap of Figure 2. The sine function traditionally used is at the specimen point of ± 〇〇 A function that converges to 0. Therefore, in order to obtain the correct interpolation 値, it is necessary to correspond to the scattered data of soil 00, calculate the 値 of the sinc function at the interpolation position, and use these 値 to perform the folding operation. In this regard, this implementation The specimenization function of Fig. 7 used in the morphology converges to 0 at the specimen position t = 1, 6 5. Therefore, it is only necessary to consider the scattered data in the range of t = 1 to 65. Therefore, to obtain a certain interpolation In the meantime, as long as a limited number of dispersions are considered, the paper size applies the Chinese National Standard (CNS) A4 specification (210 X 2 ^ 7 mm) * --- ^ --------------- -Order --------- ^^ 1 '(Please read the notes on the back before filling (This page) 479413 A7 B7 V. Description of the invention (11) (Please read the precautions on the back before filling in this page) The information can be used to greatly reduce the amount of processing. And 'About t = 1 ~ 65 range The scattered data outside is not supposed to be ignored and ignored due to the consideration of processing volume or accuracy, but it is not necessary in theory, so the error caused by cutting off the mantissa will not occur. Figure 3 shows this implementation The overall structure diagram of the D / A converter in the form. The D / A converter shown in FIG. 3 is composed of a digital waveform generation unit 10, a convolution operation unit 20, and a D / A conversion unit 30. The above-mentioned digital waveform generation section 10 corresponds to the synthesis means of the present invention, the convolution operation section 20 corresponds to the supersampling means and operation means of the present invention, and the D / A conversion section 30 corresponds to the D / A conversion means of the present invention. The structure of the digital waveform generation unit 10 can be explained with reference to FIG. 4 as follows. The convolution operation unit 20 is used to perform the oversampling and convolution operations as described with reference to FIG. 6 above to generate digital data 各 for each sampling point among the scattered data of the input digital waveform generation unit 10. The D / A conversion unit 30 is used to perform D / A conversion on the digital data obtained by the convolution operation unit 20 (the conventional interpolation by supersampling is not performed here). The consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs printed the structure of the above-mentioned convolution operation unit 20. The D-type flip-flop (hereinafter referred to as D · FF) la is maintained from the digital waveform generator by a clock pulse (4CK) with twice the frequency. 1 0 digital data output. D · F F lb in parallel with D · F F 1 a also holds the digital data output from the digital waveform generating unit 10 in accordance with the clock pulse (4CK) of twice the frequency. But this side is maintained with the period of phase inversion of 4CK mentioned above. The adder 2 is used to add the digital data held by the two D · F F 1 a and 1 b above. Therefore, D · FF 1 a, 1 b, and adder 2 structure -14- This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 479413 A7 B7 V. Description of the invention (12) Cost invention The first operation means performs two times of oversampling on the digital data output by the digital waveform generating section 10, and adds two samples to each sample thus obtained and each sample staggered by half of its phase. Convolution operation (see Figure 6 (A)). The two D · F F 3a, 3b connected in parallel at the rear stage of the above-mentioned adder 2 will hold the digital data output by the adder 2 and then hold the clock pulses (8CK) with twice the frequency at a period staggered from each other by half. The adder 4 adds the digital data 保持 held by the two D · F F 3a, 3b. Thus, D · FF 3a, 3b and the adder 4 constitute the second operation means of the present invention. The digital data obtained by the convolution operation in the first stage is then subjected to double oversampling. A convolution operation of each sample 段 and two pieces of samples 値 staggered by half of the phase (refer to FIG. 6). The two D · F F 5a and 5b connected in parallel at the rear stage of the above-mentioned adder 4 will hold the digital data output by the adder 4 and then hold the clocks (16CK) with twice the frequency with a period staggered from each other by half. The adder 6 adds the digital data 保持 held by the two D · F F 5a and 5b. In this way, D · FF5a, 5b and the adder 6 constitute the third operation means of the present invention. The digital data obtained by the convolution operation in the second stage is then double-supersampled, and each of the obtained A convolution operation of the sample 値 and the two steps of adding the samples 各 staggered by half of the phase (see FIG. 6 (C)). In this way, three times twice the oversampling and two-stage convolution calculations are performed, and the eight-fold super paper size is applied to the digital data output by the digital waveform generation unit 10. The Chinese national standard (CNS) A4 specification is applicable ( 210 X 297 mm) ---: ------- #-pack --- (Please read the notes on the back before filling this page) · Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs-15- Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs + / 9413 -------- B7_______ V. Description of Invention (13) Sampling. The above-mentioned structure in the convolution operation section 20 corresponds to the supersampling component of the present invention ', and the rest of the structures described below correspond to the operation component of the present invention. The eight D · F F 7a ~ 7h's connected to the subsequent section of the adder 6 are delayed by a clock pulse of 16 times the frequency (16CK), and are sequentially held by one clock pulse. These eight D · F F 7a to 7h correspond to the delay members of the present invention. The rest of the architecture described below corresponds to the addition component of the present invention. The adder 8a and the 1/2 multiplier 9a add the digital data held by D · F F 7g, 7h and multiply by 1/2. The adder 8b and the 1/2 multiplier 9b add the digital data held by D · F F 7e, 7f and multiply by 1/2. The adder 8c and the 1/2 multiplier 9c add the digital data held by D · FF7c, 7d and multiply by 1/2. The adder 8d and the 1/2 multiplier 9d add the digital data held by D · F F 7a, 7b and multiply by 1/2. At the same time, the adder 8e and the 1/2 multiplier 9e will add the digital data output from the two 1/2 multipliers 9a, 9b and multiply by 1/2. The adder 8f and the 1/2 multiplier 9f will be divided by two. The digital data output by the 1/2 multipliers 9c, 9d are added and multiplied by 1/2, the adder 8g and the 1/2 multiplier 9g will be the digital output by the two 1/2 multipliers 9e, 9f. The data is added up, and the result is supplied to the D / A conversion unit 30. With the above D · FF7a ~ 7h, adders 8a ~ 8g, and 1/2 multipliers 9a ~ 9f, the digital data with 16 times oversampling is applied to the clock pulses at 16 times the frequency (1 6 CK) A convolution operation of 8 segments is performed by staggering and adding 1 clock pulse to each sample (refer to FIG. 6 (D)). This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) -T6- (Please read the precautions on the back before filling this page)

479413479413

五、發明說明(1勺 D / A變換部30則對如此獲得之數位資料之各樣品値單純地 進行D / A變換,而連續輸出平滑之類比資料之信號波形。 ,---··--------裝--- (請先閱讀背面之注意事項再填寫本頁) 接著參照第4圖,說明上述數位波形產生部1 0之架構 。在第4圖,3個D · F F 1 1 a〜1 1 c依基準頻率之時鐘脈衝 (CK),將D / A變換對象之數位之分散資料分別延遲1個時 鐘脈衝,而依序加以保持。此等3個D · F F 1 1 a〜1 1 c對 應本發明之η個延遲構件。而由-1倍乘法器12a將上述 D · F F 11a所保持之資料値乘以-1,1倍乘法器13a將 上述D ·· F F 1 1 a所保持之資料値乘以1 (這時之資料値維 持不變)。 此等乘法器12a、13a之乘算結果,依基準頻率之時鐘 脈衝(CK)以1 / 2之作用比(duty ratio)由開關14a切換,選 擇性輸出到加法器1 6。此加法器1 6除了上述-1倍乘法器 12a或1倍乘法器13a之乘算結果之外,也輸入8倍乘法器 15之乘算結果,將此兩輸入相加而輸出。上述8倍乘法器 15將D · F F lib保持之資料値乘以8倍。 經濟部智慧財產局員工消費合作社印製 而-1倍乘法器1 2a將D · F F 1 1 c保持之資料値乘以 - 1,1倍乘法器1 3b將D · F F 1 1 c保持之資料値乘以1 ( 這時之資料値維持不變)。此等乘法器12b、13b之乘算結 果,依基準頻率之時鐘脈衝(CK)以1 / 2之作用比由開關 14b切換,選擇性輸出到D · F F 17a。 D · F F 17a將由開關14b選擇性輸出之上述-1倍乘法 器12a或1倍乘法器13a之乘算結果,依兩倍頻率之時鐘脈 衝(2CK)加以保持。而D · F F 17b則將由加法器16輸出之 ΤΓ 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 經濟部智慧財產局員工消費合作社印製 479413 A7 ____B7___ 五、發明說明(15) 相加結果,依兩倍頻率之時鐘脈衝(2CK)加以保持。加法器 18及D· FF19將由兩個D· FF17a、17b輸出之資料値 相加,依兩倍頻率之時鐘脈衝(2CK)加以保持後,輸出到第 3圖所示之下一段之摺積運算部20。 由於藉由如上述構成之數位波形產生部1 0處理D / A 變換對象之分散資料,而可獲得,對應各分散資料之大小 振幅調變第5圖所示之基本數位波形,再對該等之資料値 施加3段褶積運算之結果。如上述,本實施形態在求出一 個內插値時,在有狠台之標本化函數,只要考慮存在於具 有0以外之有限値之範圍內之分散資料即可,因此本例係 使用3個分散資料進行褶積運算。 第8圖表示上述數位波形產生部1 0之動作例。第8圖 (A) 係表示輸入數位波形產生部10之分散資料之一個例子’ 橫軸表示時間,縱軸(a〜f)表示分散資料之大小。第8圖 (B) 係表示依分散資料之大小(a〜f),振幅調變第5圖所示 之基本數位波形,再對該等施加褶積運算之情形。亦即’ 將縱方向排列之資料値相加而輸出。 將如上述之數位波形產生部1 0之數位摺積之運算結果 通過第3圖所示之褶積運算部20,便可以獲得將原來之分 散資料1 6倍超取樣之各內插値。D / A變換部30則對如此 獲得之數位資料之各樣品値單純地進行D / A變換,便可以 連續輸出,如依第7圖之標本化函數超取樣之平滑之類比 之信號波形。 如以上所詳述,依據本發明時,只是依輸入之分散資 本紙張尺度適用中國國家標準(CNS)A4規格(210 x 297公釐) -15^ " (請先閱讀背面之注意事項再填寫本頁)V. Description of the invention (1 spoon D / A conversion unit 30 simply performs D / A conversion on each sample of the digital data thus obtained, and continuously outputs smooth signal waveforms of analog data. -------- ------- Install --- (Please read the precautions on the back before filling out this page) Then refer to Figure 4 to explain the structure of the digital waveform generator 10 above. In Figure 4, 3 D · FF 1 1 a ~ 1 1 c Delays the scattered data of the digits of the D / A conversion object by 1 clock pulse according to the clock pulse (CK) of the reference frequency, and sequentially holds them. These 3 D · FF 1 1 a to 1 1 c correspond to the n delay members of the present invention. The -1 times multiplier 12a multiplies the data held by the above-mentioned D · FF 11 a by -1, and the 1 times multiplier 13 a divides the above D · · FF. The data held by 1 1 a is multiplied by 1 (the data at this time remains unchanged). The multiplication results of these multipliers 12a and 13a are based on the clock pulse (CK) of the reference frequency with an action ratio of 1/2 ( The duty ratio) is switched by the switch 14a, and is selectively output to the adder 16. This multiplier 16 is in addition to the multiplication result of the -1 times multiplier 12a or the 1 times multiplier 13a. In addition, the multiplication result of 8 times multiplier 15 is also input, and the two inputs are added to output. The above 8 times multiplier 15 multiplies the data held by D · FF lib by 8 times. Employees of Intellectual Property Bureau, Ministry of Economic Affairs Printed by a consumer cooperative and the -1 times multiplier 1 2a multiplies the data held by D · FF 1 1 c by -1, the 1 times multiplier 1 3b multiplies the data held by D · FF 1 1 c by 1 (at this time The data 値 remain unchanged.) The multiplication results of these multipliers 12b, 13b are switched by the switch 14b according to the clock pulse (CK) of the reference frequency at an action ratio of 1/2, and are selectively output to D · FF 17a. D · FF 17a will be selectively output by switch 14b, the multiplication result of the above -1 times multiplier 12a or 1 times multiplier 13a will be held by the clock pulse (2CK) with twice the frequency. D · FF 17b will be added by ΤΓ output by the device 16 This paper size is in accordance with China National Standard (CNS) A4 (210 X 297 mm). Printed by the Employees ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. Doubled clock pulse (2CK) is maintained. Adder 18 and D · FF 19 Add the data output from the two D · FF17a, 17b, and hold it with the clock pulse (2CK) with twice the frequency, and then output it to the deduction calculation unit 20 in the lower stage shown in Figure 3. The digital waveform generator 10 configured as described above can process the scattered data of the D / A conversion object and obtain it. The amplitude and amplitude of each scattered data are adjusted according to the basic digital waveform shown in Figure 5. The result of applying a 3-stage convolution operation. As described above, in the present embodiment, when an interpolation 値 is obtained, in the case where there is a rigorous function of the specimen, as long as the scattered data in a range with a finite 値 other than 0 can be considered, this example uses 3 Scattered data for convolution. Fig. 8 shows an example of the operation of the digital waveform generator 10. Fig. 8 (A) shows an example of the scattered data input to the digital waveform generation unit 10 'The horizontal axis represents time, and the vertical axis (a to f) represents the size of the scattered data. Fig. 8 (B) shows a case where the amplitude is adjusted according to the size (a to f) of the dispersed data, and the basic digital waveform shown in Fig. 5 is modulated, and then a convolution operation is applied to these. That is, ′ adds up the data arranged in the vertical direction to output. The result of the digital convolution of the digital waveform generation unit 10 as described above is passed through the convolution operation unit 20 shown in Fig. 3 to obtain each interpolation unit that oversamples the original dispersive data 16 times. The D / A conversion section 30 simply performs D / A conversion on each sample of the digital data thus obtained, and can continuously output, such as the smoothed analog signal waveform of oversampling according to the specimenization function of FIG. 7. As detailed above, in accordance with the present invention, the Chinese National Standard (CNS) A4 specification (210 x 297 mm) is only applied according to the input paper size of the dispersed capital paper. -15 ^ " (Please read the notes on the back before filling (This page)

經濟部智慧財產局員工消費合作社印製 479413 A7 B7___ 五、發明說明(16) 料,藉由褶積運算將對應標本化函數之基本波形之數位資 料相互合成,對所獲得之資料値執行超取樣及褶積運算’ 便能夠獲得連續之內插値,因此,不像以往配設樣品保持 電路或低通濾波器也可以,能夠抑制因濾波器造成之相位 特性之劣化。 同時,本實施形態之由基本數位波形生成之函數’係 在有限之標本位置會聚成〇之函數,因此可以使爲了求出1 個內插値所應考慮之分散資料之數目爲有限,可以減少處 理量。而且,因爲不會發生切除尾數造成之誤差’可以獲 得很少失真之輸出波形。藉此可以大幅度提昇輸出之類比 信號之品質。 同時,本實施形態之要獲得平滑之類比信號所需要之 連續性之內插値全是藉由數位處理而求得,因此,較之如 傳統之以類比方式處理時,處理量可以少很多,而且也有 適合大量生產之好處。 接著再使用第9圖,說明從對應第5圖之數位基本波形 之分散資料値(-1、1、8、8、1、— 1) / 8,藉η倍之超 取樣及褶積運算生成內插値之另一處理例子。再者,第9 圖係因圖面上之限制,表示進行4倍之超取樣之例子,但 也可以進行較此爲大之倍率(例如8倍,16倍,…-)之超取 樣。 在第9圖,最左邊之一列所示之一連串之數値列,係 對原來之分散資料値(-1、1、8、8、1、- 1) / 8進行4 倍之超取樣之値。而從最左邊向右4列分之數値列,係將 $紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) -19 - ~ ----j--------裝---- (請先閱讀背面之注意事項再填寫本頁) 訂i — 經濟部智慧財產局員工消費合作社印製 479413 A7 B7___ 五、發明說明(17) 最左邊之一列所示之數値列分別向下方移位1格者。第9圖 之列方向表示時間軸,所謂將數値列向下方移位,對應將 最左列所示之數値列慢慢延遲。 亦即,從左方數第2列之數値列,係將最左邊之一列 所示之數値列錯開4倍頻率之時鐘脈衝4CLK之1 / 4相位分 之數値列。而從左方數第3列之數値列,係將從左邊數第2 列所示之數値列錯開4倍頻率之時鐘脈衝4CLK之1 / 4相位 分之數値列,從左方數第4列之數値列,係將從左邊數第3 列所示之數値列再錯開4倍頻率之時鐘脈衝4CLK之1 / 4相 位份之數値列。 同時,從左方數第5列之數値列,係將對應第1〜4列 之各數値列之行相加而以4除之値。藉由此從左方數第5列 之處理,以數位方式執行伴隨4相之褶積運算之4倍之超取 樣。 從上述第5列向右4列分之數値列(左起第5〜8列之數 値列),係將第5列所示之數値列分別向下方移位1格者。 而從左方數第9列之數値列,係將第5〜8列之數値列之相 對應行相加而以4除之値。藉此對從左方數第9列之處理, 便能以數位方式執行伴隨4相之褶積運算之4倍之超取樣兩 次。 同時,從左方數第1 0列之數値列,係將第9列所示之 數値列分別向下方移位1格者。而從左方起第1 1歹ij (最右列 )之數値列,係將第9列之數値列與第10列之數値列之相對 應行相加而以2除之値。此最右列之數値列即是目的之內 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) -20 - _ (請先閱讀背面之注意事項再填寫本頁)Printed by the Employees' Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 479413 A7 B7___ V. Description of the invention (16) The digital data corresponding to the basic waveform of the specimenized function is synthesized by convolution operation, and the obtained data is oversampled And convolution operation 'can obtain continuous interpolation. Therefore, unlike the conventional configuration of a sample holding circuit or a low-pass filter, it is possible to suppress the deterioration of the phase characteristics caused by the filter. At the same time, the function 'generated from the basic digital waveform' of this embodiment is a function which converges to 0 at a limited sample position, so the number of scattered data to be considered in order to obtain an interpolation can be limited, which can reduce Processing capacity. Moreover, since the error caused by the trimming mantissa does not occur, an output waveform with little distortion can be obtained. This can greatly improve the quality of analog signals at the output. At the same time, the continuity interpolation required to obtain a smooth analog signal in this embodiment is all obtained through digital processing. Therefore, compared with the traditional analog processing, the processing volume can be much less. There are also benefits for mass production. Then use FIG. 9 to explain the scattered data from the digital basic waveform corresponding to FIG. 5 (-1, 1, 8, 8, 1, -1) / 8, which is generated by η times oversampling and convolution operations. Another processing example of interpolation. In addition, Figure 9 shows an example of 4 times oversampling due to the limitation on the drawing. However, it is also possible to carry out oversampling with a larger magnification (for example, 8 times, 16 times, ...-). In Figure 9, one of the series shown in the leftmost column is a series of 4 times oversampling the original scattered data (-1, 1, 8, 8, 1,-1) / 8. . From the far left to the right, the columns are divided into four columns. The $ paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) -19-~ ---- j ------ -Equipment ---- (Please read the precautions on the back before filling this page) Order i — Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 479413 A7 B7___ 5. Description of the invention (17) Each row is shifted downward by 1 space. The direction of the column in Fig. 9 indicates the time axis. The so-called shifting of the number series downwards corresponds to the delay of the number series shown in the leftmost column. That is, from the left column to the second column, the number column shown in the leftmost column is shifted from the quarter of the clock pulse 4CLK with a frequency of 4 times the frequency. The third column from the left column is staggered from the left column of the second column from the left column by 4 times the frequency of the clock pulse 4CLK. The number column in the fourth column is the number column in which the clock pulse 4CLK with 4 times the frequency is shifted from the number column shown in the third column from the left. At the same time, from the left column to the fifth column, the rows corresponding to the first to fourth columns are added and divided by 4. By performing the processing from the fifth column from the left on this, a four-times super sampling with a four-phase convolution operation is performed digitally. From the 5th column to the 4th column to the right (the 5th to 8th column from the left), the number column shown in the 5th column is shifted downward by 1 space. The 9th column from the left is the sum of the corresponding rows of the 5th to 8th columns and divided by 4. With this processing of the 9th column from the left, it is possible to digitally perform four times of oversampling with four-phase convolution operation. At the same time, from the left to the 10th column, the number shown in the 9th column is shifted downward by 1 space. From the left, the first 11 歹 ij (the rightmost column) number series is the sum of the corresponding rows of the 9th column and the 10th column and divide by 2. The rightmost column is within the purpose. The paper size applies the Chinese National Standard (CNS) A4 (210 X 297 mm) -20-_ (Please read the precautions on the back before filling this page)

479413 經濟部智慧財產局員工消費合作社印製 A7 B7 五、發明說明(18) 插値。 第1 0圖表示將此第9圖之最右列所示之最終獲得之數 値列曲線圖化者。具有如第丨〇圖所示之波形之函數’係在 全領域可微分1次,沿橫軸之標本位置t在丨至3 3間時’具 有〇以外之有限値,在其他領域時之値全爲〇之有限台之函 數。 同時,第10圖之函數,係具有僅在t = 17之標本點取 極大値,在t = 1、9、25、33之4個標本點其値變成0之 特徵之標本化函數,通過要獲得平滑之波形之資料所需要 之所有取樣點。 如此,第1 0圖之函數,係標本化函數,在全領域可微 分1次,且在標本位置t=l、33會聚成〇之有限台之函數 。因此,使用第1 0圖之標本化函數進行依據各分散資料之 重疊,則可使用可微分1次之函數內插分散資間之値。 內插時,只要考慮t = 1〜33範圍內之分散資料便可以 。因此,欲求出1個內插値時,只要考慮有限數之η個分散 資料之値便可以,能夠將處理量大幅度削減。而且,關於 t =1〜33之範圍外之各分散資料,並不是本來應考慮而因 考量處理量或精準度而予以忽視,而是理論上沒有考慮之 必要,因此不會發生切除尾數造成之誤差。因之,使用本 實施形態之資料內插手法時,可以獲得正確之內插値。 弟11圖係表不用以貫現上述第9圖所不之資料內插處 理之架構例子之方塊圖。第11圖所示之資料內插裝置係由 正規化記憶部2 1、相位移位部2 2、多數數位乘法器2 3 a〜 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公髮)479413 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Description of Invention (18) Insertion. Fig. 10 shows a graph obtained by arranging the finally obtained number shown in the rightmost column of Fig. 9. The function with the waveform as shown in Figure 丨 is' differentiable once in the whole field, and when the specimen position t along the horizontal axis is between 丨 and 33, it has a finite value other than 0, and in other fields 领域A function of a finite set of all zeros. At the same time, the function of Fig. 10 is a specimenization function with the feature of taking maximum 値 only at the specimen point at t = 17, and 値 becoming 0 at the four specimen points at t = 1, 9, 25, and 33. All sampling points needed to obtain smooth waveform data. In this way, the function in Fig. 10 is a specimenization function, which can be differentiated once in the whole field, and converges to a finite station of 0 at the specimen position t = 1, 33. Therefore, using the specimenization function of Fig. 10 to perform overlap based on each scattered data, a function that can be differentiated once can be used to interpolate the scattered data. When interpolating, just consider the scattered data in the range of t = 1 ~ 33. Therefore, in order to obtain one interpolation threshold, it is only necessary to consider a limited number of η scattered data, which can greatly reduce the processing amount. Moreover, the scattered data outside the range of t = 1 ~ 33 is not to be ignored due to consideration of the processing volume or accuracy, but is not necessary in theory, so it will not be caused by cutting off the mantissa. error. Therefore, when using the data interpolation method of this embodiment, a correct interpolation can be obtained. Figure 11 is a block diagram of a structure example that does not need to implement the data interpolation processing described in Figure 9 above. The data interpolation device shown in Fig. 11 is composed of a normalized memory unit 2 1. a phase shift unit 2 2. a majority digital multiplier 2 3 a ~ This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 Public)

2T •---.j--------裝--- (請先閱讀背面之注意事項再填寫本頁) 一5J· 479413 A7 B7 五、發明說明(19) 23d、多數數位加法器24a〜24c、及PLL電路25構成。 上述正規化資料記憶部2 1係如第9圖之最右列所示, 錯開4相記憶有正規化之資料列(數位基本波形被4倍超取 樣而藉由褶積運算正規化之資料列)。再者,對第5圖所示 之數位基本波形進行8倍或1 6倍之超取樣時,正規化記憶 部2 1記憶有數位基本波形被8倍或1 6倍超取樣而藉由褶積 運算正規化之資料列 記憶在此正規化資料記憶部2 1之4相之正規化資料, 係依據從PLL電路25供應之時鐘脈衝CLK,8CLK讀出, 分別供給4個數位乘法器23 a〜23d之一方之輸入端子。 而相位移位部22係進行將輸入之分散資料之相位錯開 4相之相位移位處理。由此相位移位部22生成之4相之分 散資料,係依據從PLL電路25供應之時鐘脈衝CLK, 8CLK而輸出,分別供給4個數位乘法器23a〜23d之另一方 之輸入端子。 上述4個數位乘法器23a〜23d係將從上述正規化記億 部2 1輸出之4相之正規化資料,及從相位移位部22輸出之 4相之分散資料,分別相乘。連接在此等之後段之3個數位 加法器24a〜24c將上述4個數位乘法器23a〜23d之相乘結 果全部相加而輸出。 此第1 1圖所示之架構,係將從第9圖所示之褶積運算 獲得之最右列之正規化資料預先記憶在ROM等之正規化資 料記憶部2 1。而將此正規化資料調變成對應輸入之分散資 料之値之波幅,再藉4相之褶積運算將由此獲得之資料加 本紙張尺度適用令國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製2T • ---. J -------- install --- (Please read the precautions on the back before filling out this page) 5J · 479413 A7 B7 V. Description of the invention (19) 23d, majority digit addition The devices 24a to 24c and the PLL circuit 25 are configured. The above-mentioned normalized data storage unit 21 is shown in the rightmost column of FIG. 9 and is staggered by 4 phases. The normalized data row is stored (the digital basic waveform is oversampled by 4 times and normalized by the convolution operation. ). When the digital basic waveform shown in FIG. 5 is oversampled by 8 or 16 times, the digital basic waveform stored in the normalization memory 21 is oversampled by 8 or 16 times and convolution is performed. The normalized data rows of the operation are stored in the normalized data of the 4th phase of the normalized data storage section 21, which are read out according to the clock pulses CLK and 8CLK supplied from the PLL circuit 25, and are respectively supplied to four digital multipliers 23a ~ 23d one of the input terminals. The phase shifting unit 22 performs a phase shifting process of shifting the phase of the input scattered data by four phases. The four-phase dispersion data generated by the phase shifting unit 22 is output based on the clock pulses CLK and 8CLK supplied from the PLL circuit 25, and is supplied to the other input terminals of the four digital multipliers 23a to 23d. The four digital multipliers 23a to 23d are multiplied by the normalized data of the four phases output from the normalization registering unit 21 and the scattered data of the four phases output from the phase shifting unit 22. The three digital adders 24a to 24c connected to these subsequent stages add all the multiplication results of the four digital multipliers 23a to 23d and output them. The structure shown in FIG. 11 is the normalized data in the rightmost column obtained from the convolution operation shown in FIG. 9 and stored in the normalized data storage unit 21 such as a ROM in advance. And this normalized data is adjusted to the corresponding volatility of the scattered data input, and then the 4-phase convolution operation is used to add the obtained data to this paper. The paper size applies the national standard (CNS) A4 specification (210 X 297 public). (%) (Please read the notes on the back before filling out this page) Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs

-22- 經濟部智慧財產局員工消費合作社印製 479413 A7 B7_____ 五、發明說明(2〇) 以合成而輸出。 也可以將輸入之分散資料之振幅値乘上第5圖所示之 數位基本波形,對所獲得之資料値在內插時進行如第9圖 所示之褶積運算,但構成如第1 1圖時,在實際內插時不必 執行第9圖之褶積運算,有能將內插處理高速化之好處。 再者,上述說明之實施形態只是表示實施本發明時之 具体化之一個例子,不能以此限制解釋本發明之技術範圍 。亦即,本發明在不脫離其精神,或其主要特徵之範圍內 ,能夠以各種形態實施。 例如,第3圖所示之褶積運算部20係進行3次之兩倍 超取樣,但本發明不受此次數之限制。同時是在這種合計8 倍之超取樣後進行8段之褶積運算,但此段數也不受此限 制。同時,進行這種超取樣及褶積運算之電路架構本身, 也不限定如第3圖所示之例子。而且,第4圖所示之數位波 形產生部10係執行3段之褶積運算,但本發明不限制此段 數。 同時,在上述第3圖之實施形態,由數位波形產生部 10及褶積運算部20求得之各內插値最後是由D / A變換部 30執行D / A變換,但也可以對上述求得之各內插値不做 D / A變換,而是供其他數位處理使用。亦即,也可以將不 設第3圖之D / A變換部3 0之架構利用作爲資料內插裝置。 而上述實施形態之數位基本波形爲-1、1、8、8、 1、- 1,但數位基本波形不限定如本例。亦即,只要是內 插函數是在全領域可微分1次,且在有限之標本位置會聚 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) ^23 -" ~~ (請先閱讀背面之注意事項再填寫本頁)-22- Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 479413 A7 B7_____ V. Description of Invention (2) is output by synthesis. It is also possible to multiply the amplitude 输入 of the input scattered data by the digital basic waveform shown in Figure 5 and perform convolution operations as shown in Figure 9 when interpolating the obtained data 値, but the structure is as shown in Figure 1 In the case of graphs, it is not necessary to perform the convolution operation of FIG. 9 during actual interpolation, which has the advantage that the interpolation process can be speeded up. In addition, the embodiment described above is only an example of a specific embodiment when the present invention is implemented, and the technical scope of the present invention should not be interpreted in this way. That is, the present invention can be implemented in various forms without departing from the spirit or main characteristics thereof. For example, the convolution operation unit 20 shown in Fig. 3 performs double oversampling three times, but the present invention is not limited to this number. At the same time, the convolution operation of 8 segments is performed after the total 8 times of oversampling, but the number of segments is not limited by this. At the same time, the circuit architecture itself for performing such oversampling and convolution operations is not limited to the example shown in FIG. 3. Further, the digital waveform generating unit 10 shown in Fig. 4 performs a convolution operation of three stages, but the present invention does not limit the number of stages. Meanwhile, in the embodiment of FIG. 3 described above, each interpolation 求 obtained by the digital waveform generation unit 10 and the convolution operation unit 20 is finally subjected to D / A conversion by the D / A conversion unit 30. The obtained interpolations do not perform D / A conversion, but are used for other digital processing. That is, a structure in which the D / A conversion section 30 of Fig. 3 is not provided may be used as a data interpolation device. The digital basic waveform in the above embodiment is -1, 1, 8, 8, 1, and -1, but the digital basic waveform is not limited to this example. That is, as long as the interpolation function is differentiable once in the entire field, and converges in a limited number of specimen positions, the paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) ^ 23-" ~~ (Please read the notes on the back before filling this page)

479413 Λ7 B7 五、發明說明(21) 成0之有限台之函數,則任何波形均可以。例如’兩邊部 分之權重取1或0而非-1也可以。中間部分之權重也可以 取8以外之値。無論如何,均可實現良好之曲線內插。 同時,以上所說明之本實施形態之D / A變換部及資料 內插裝置,是可以如上述以硬体構成,但也能以DSP或軟 体等來實現。例如以軟体實現時,本實施形態之裝置實際 上是以電腦之CPU或MPU、RAM、ROM等所構成’因記 憶在RAM或ROM之程式動作而實現。 因之,可以將可使電腦動作以發揮上述本實施形態之 機能之程式記錄在例如CD - ROM之記億媒体,而讀進電腦 便可以實現。這種記錄媒体除了 CD - ROM也可以使用軟碟 、硬碟、磁帶、光碟、光磁碟、DVD、非揮發性記憶卡等 。同時,也可以經由網際網路等將上述程式下載到電腦而 實現。 同時,不僅是由電腦執行所供應之程式而實現上述實 施形態之機能,該程式與在電腦內運作之0S(作業系統)或 其他應用軟体等共同實現上述實施形態之機能時,或所供 應之程式之全部或部分處理是由電腦之機能擴充板或機能 擴充單元執行而實現上述實施形態之機能時,這些程式仍 然包含在本發明之實施形態。 本發明係藉由抑制因低通濾波器造成之相位特性之劣 化,同時抑制內插時之切除尾數之誤差,藉此將輸出波形 之失真抑制在最低限度,對大幅度提高所輸出之類比語音 信號之品質非常有用。 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) ---Π--------裝--- (請先閱讀背面之注意事項再填寫本頁) 訂· 經濟部智慧財產局員工消費合作社印製 -24 - 479413 A7 B7 五、發明說明(22) 七:圖式之簡單說明 第1圖係sine函數之說明圖。 第2圖係內插動作之說明圖。 第3圖係表示本實施形態之D / A變換器之架構例子之 圖。 第4圖係表示第3圖中之數位波形產生部之架構例子之 圖。 第5.圖係表示本實施形態使用之基本數位波形之圖。 第6圖係說明褶積(convolution)運算部之動作例之圖。 第7圖係表示藉第6圖之褶積運算部從第5圖之基本數 位波形生成之函數之圖。 第8圖係說明第3圖中之數位波形產生部之動作用之圖 〇 第9圖係說明本實施形態之摺積運算部之其他動作例 用之圖。 第10圖係表示藉第9圖之褶積運算部從第5圖之基本 數位波形生成之函數之圖。 第1 1圖係表示資料內插裝置之其他架構例子之圖。 主要元件對照表 la、lb、3a、3b、5a、5b、7a〜7h 、11a 〜lie、17a、17b、19............D 型正反器(D · F F) 2、4、6、8a 〜8g、16、18............加法器 本紙張尺度適用中國國家標準(CNS)A4規格(210 x 297公釐) .·---^-------裝--- (請先閱讀背面之注意事項再填寫本頁) •ldl- · 經濟部智慧財產局員工消費合作社印製 479413 A7 B7 五、發明說明(23) 9a〜9f- — -.......1 / 2乘法器 10............數位波形產生部 12a、13a............乘法器 14a、14b............開關 15......-.....8倍乘法器 20 ............褶積運算部 21 ............正規化資料記憶部 22 ............相位移位部 23a〜23<1............數位乘法器 24a〜24c............數位加法器 25..........-PLL 電路 30...........D / A變換部 ------------^^-裝--- (請先閱讀背面之注意事項再填寫本頁) 訂· 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) -26-479413 Λ7 B7 V. Description of the invention (21) As a function of a finite station of 0, any waveform is acceptable. For example, the weights of both sides can be 1 or 0 instead of -1. The weight of the middle part can also take any value other than 8. In any case, good curve interpolation can be achieved. At the same time, the D / A conversion unit and the data interpolation device of the present embodiment described above can be configured by hardware as described above, but can also be implemented by a DSP or software. For example, when implemented in software, the device according to this embodiment is actually constituted by a computer's CPU or MPU, RAM, ROM, and the like ', and is realized by a program operation memorized in RAM or ROM. Therefore, a program that can operate a computer to exert the functions of the embodiment described above can be recorded in a CD-ROM medium such as CD-ROM, and read into a computer. In addition to CD-ROM, this recording medium can also use floppy disks, hard disks, magnetic tapes, optical disks, magneto-optical disks, DVDs, non-volatile memory cards, etc. At the same time, it can be realized by downloading the above program to a computer via the Internet or the like. At the same time, not only the computer executes the supplied program to realize the functions of the above-mentioned embodiment. When the program and the OS (operating system) or other application software operating in the computer jointly realize the functions of the above-mentioned embodiment, or the supplied When all or part of the processing of a program is executed by a function expansion board or a function expansion unit of a computer to implement the functions of the above-mentioned embodiments, these programs are still included in the embodiments of the present invention. The present invention suppresses the degradation of the phase characteristics caused by the low-pass filter, and at the same time suppresses the error of the cut-off number during interpolation, thereby suppressing the distortion of the output waveform to a minimum, and greatly improving the analog speech output. The quality of the signal is very useful. This paper size applies to China National Standard (CNS) A4 specification (210 X 297 mm) --- Π -------- install --- (Please read the precautions on the back before filling this page) Order · Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs-24-479413 A7 B7 V. Description of the invention (22) 7: Simple illustration of the diagram The first diagram is an explanatory diagram of the sine function. Fig. 2 is an explanatory diagram of the interpolation operation. Fig. 3 is a diagram showing an example of the structure of the D / A converter according to this embodiment. Fig. 4 is a diagram showing an example of the structure of the digital waveform generating section in Fig. 3. Fig. 5 is a diagram showing a basic digital waveform used in this embodiment. FIG. 6 is a diagram illustrating an operation example of a convolution operation unit. Fig. 7 is a diagram showing a function generated from the basic digital waveform of Fig. 5 by the convolution operation section of Fig. 6; Fig. 8 is a diagram for explaining the operation of the digital waveform generating section in Fig. 3; Fig. 9 is a diagram for explaining other operation examples of the convolution operation section of this embodiment. Fig. 10 is a diagram showing a function generated from the basic digital waveform of Fig. 5 by the convolution operation section of Fig. 9; FIG. 11 is a diagram showing another example of the architecture of the data interpolation device. Main components comparison table la, lb, 3a, 3b, 5a, 5b, 7a ~ 7h, 11a ~ lie, 17a, 17b, 19 ......... D type flip-flop (D · FF ) 2, 4, 6, 8a to 8g, 16, 18 ......... The paper size of the adder is applicable to the Chinese National Standard (CNS) A4 specification (210 x 297 mm). ·- -^ ------- Install --- (Please read the notes on the back before filling this page) • ldl- · Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 479413 A7 B7 V. Invention Description (23 ) 9a ~ 9f---.. 1/2 multiplier 10... Digital waveform generators 12a, 13a ..... .Multipliers 14a, 14b ......... Switch 15 ......-..... 8 times multiplier 20 ......... pleats Product operation unit 21 ......... Normalized data memory unit 22 ......... Phase shift units 23a to 23 < 1 .... ..... digital multipliers 24a ~ 24c ......... digital adder 25 .........- PLL circuit 30 ......... ..D / A Conversion Department ------------ ^^-install --- (please read the precautions on the back before filling this page) The paper size of the paper is applicable to China National Standard (CNS) A4 Specifications (210 X 297 mm) -26-

Claims (1)

479413 A8 B8 C8 D8 六、申請專利範圍 (請先閱讀背面之注意事硕再填寫本頁) 1. 一種數位-類比變換器,其特徵在於,藉由超取樣 及一次以上之移動平均運算或折疊運算,將對應輸入之η 個分散資料之値之基本波形之數位資料相互加以合成,藉 此求出對上述分散資料之數位之內插値後,將包含該內插 値之各數位資料値變換成類比量。 2. —種數位-類比變換器,其特徵在於,藉由超取樣 及移動平均運算或折疊運算,將對應輸入之η個分散資料 之値之基本波形之數位資料相互加以合成,對該合成之數 位資料値,再進行移動平均運算或折疊運算,求出對上述 分散資料之數位之內插値後,將包含該內插値之各數位資 料値變換成類比量。 3. —種數位-類比變換器,其特徵在於,具備有: 藉由移動平均運算或折疊運算,將對應輸入之η個分 散資料之値之基本波形之數位資料相互加以合成之合成構 件; 經濟部智慧財產局員工消費合作社印製 在數段範圍內進行,對藉由上述合成構件生成之數位 資料,以前段之兩倍之頻率對輸入之各資料値取樣,將獲 得之各資料値,及將此等錯開一定相位之各資料値分別相 加,而輸出到下一段之處理之超取樣構件; 對藉由上述超取樣構件取得之各資料値進行移動平均 運算或折疊運算之運算構件;以及, 將上述運算構件求得之各資料値變換成類比量之D / A 變換構件。 I 4 . 一種數位-類比變換器,其特徵在於,具備有: -27- 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) 479413 A8 B8 C8 D8 六、申請專利範圍 (請先閱讀背面之注意事項再填寫本頁) 將對應依照基準頻率時鐘脈衝輸入之η個分散資料之 値之基本波形之數位資料,分別相互錯開上述基準頻率時 鐘脈衝分而相加,以進行資料合成之合成構件; 在數段範圍內進行,對藉由上述合成構件生成之數位 資料,以前段之兩倍之頻率對輸入之各資料値取樣,將獲 得之各資料値,及將此等分別錯開半個時鐘脈衝分之各資 料値分別相加"而輸出到下一段之處理之超取樣構件; 對藉由上述超取樣構件取得之各資料値,在上述超取 樣構件之最後一段之頻率時鐘脈衝下,將各資料分別錯開 一個時鐘脈衝而相加,藉此進行移動平均運算或折疊運算 之運算構件;以及, 將上述運算構件求得之各資料値變換成類比量之D / A 變換構件。 5 ·如申請專利範圍第4項之數位-類比變換器,其特 i 徵在於,上述合成構件具備有:令依據上述基準頻率時鐘 脈衝順序輸入之分散資料,順序延遲上述基準頻率時鐘脈 衝分之η個延遲構件; 經濟部智慧財產局員工消費合作社印製 對從上述η個延遲構件輸出之各個資料値,分別乘上 對應基本數位波形之各增益値,同時,將各個乘算結果相 加而輸出到上述超取樣構件之乘加法構件。 6.如申請專利範圍第4項之數位-類比變換器,其特 徵在於,上述超取樣構成構件具備有: 對上述合成構件生成之數位資料之各資料値,以上述 基準頻率之兩倍頻率之時鐘脈衝取樣,分別將所獲得之各 本紙張尺度適用中國國家梂準(CNS ) Α4規格(210Χ297公釐) I 28 - ' 479413 A8 B8 C8 D8 經濟部智慧財產局員工消費合作社印製 夂、申請專利範圍 資料値及將此錯開半個時鐘脈衝分之各資料値相加之第1 運算構件; 對由上述第1運算構件獲得之各資料値,以上述基準 頻率之4倍頻率之時鐘脈衝取樣,分別將所獲得之各資料 値及將此錯開半個時鐘脈衝分之各資料値相加之第2運算 構件;以及, 對由上述第2運算構件獲得之各資料値,以上述基準 頻率之8倍頻率之時鐘脈衝取樣,分別將所獲得之各資料 値及將此錯開半個時鐘脈衝分之各資料値相加之第3運算 構件。 7. 如申請專利範圍第3項之數位-類比變換器,其特 徵在於,上述運算構件具備有:將藉由上述超取樣構件獲 得之數位資料,分別順序延遲上述超取樣構件之最後段之 頻率時鐘脈衝分之多數延遲構件;以及, 將上述多數延遲構件之輸出分別相加而輸出之加法構 件。 8. —種數位-類比變換方法’其特徵在於’含有: 藉由超取樣及一次以上之移動平均運算或折疊運算, 將對應輸入之η個分散資料之値之基本波形之數位資料相 互加以合成,藉此求出對上述分散資料之數位之內插値之 運算步驟;以及, 將包含藉由上述運算求得之內插値之各數位資料値變 換成類比量之D / Α變換步驟。 9. 一種數位-類比變換方法’其特徵在於’含有: (請先閱讀背面之注意事項再填寫本頁) k裝· 、1T. 本紙張尺度適用中國國家梂準(CNS)Α4規格(2ΐ〇χ297公釐) -29- 479413 A8 B8 C8 D8 六、申請專利範圍 藉由移動平均運算或折疊運算,將對應輸入之η個分 散資料之値之基本波形之數位資料相互加以合成之合成步 驟; 對該合成之數位資料値,再進行伴隨移動平均運算或 折疊運算之超取樣之超取樣步驟; 對藉由上述超取樣獲得之資料値,再進行移動平均運 算或折疊運算,而求出對上述分散資料之數位內插値之運 算步驟;以及, 將包含藉由上述運算求得之內插値之各數位資料値變 換成類比D / Α變換步驟。 ίο.Ηϋ眞料內插裝置,其特徵在於,藉由超取樣及- !_ 次以上之平均運算或折疊運算,將對應輸入之η個分 .....1 散資料之値之基本波形之數位資料相互加以合成,藉此求 出對上述資料之數位之內插値。 11. 經濟部智慧財產局員工消費合作社印製 料內插裝置,其特徵在於,藉由移動平均運 算或折疊Ϊ#,將對應輸入之η個分散資料之値之基本波 形之數位資料相互加以合成,對該合成之數位資料値進行 超取樣,對藉由此獲得之資料値,再進行移動平均運算或 折疊運算,而求出對上述分散資料之數位之內插値。 -30- (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS ) A#規格(21〇χ297公釐)479413 A8 B8 C8 D8 6. Scope of patent application (please read the cautions on the back before filling this page) 1. A digital-to-analog converter, characterized by oversampling and more than one moving average calculation or folding The operation is to synthesize the digital data corresponding to the basic waveforms of the input n scattered data, so as to obtain the digital interpolation of the scattered data, and then transform each digital data including the interpolated data. By analogy. 2. —A kind of digital-analog converter, which is characterized in that by oversampling and moving average operation or folding operation, digital data corresponding to the basic waveforms of the input n scattered data are synthesized with each other, The digital data 値 is then subjected to a moving average operation or a folding operation to obtain the interpolated 値 of the digits of the above-mentioned scattered data, and then the digital data 包含 containing the interpolated 値 is converted into an analog quantity. 3. —A kind of digital-analog converter, which is characterized by: having a synthetic component that synthesizes digital data of basic waveforms corresponding to the input n scattered data to each other by moving average operation or folding operation; economical; The Intellectual Property Bureau employee consumer cooperative prints within a few segments, sampling the digital data generated by the above-mentioned synthetic component, twice the frequency of the previous segment, sampling the input data, and obtaining the data, and Add each of these pieces of data out of a certain phase, and output them to the supersampling means for processing in the next paragraph; an arithmetic means for performing a moving average operation or a folding operation on each of the data obtained by the above-mentioned supersampling means; and , Each data obtained by the above-mentioned operation means is transformed into a D / A conversion means of analog quantity. I 4. A digital-to-analog converter, which is characterized by: -27- This paper size applies Chinese National Standard (CNS) A4 specification (210X297 mm) 479413 A8 B8 C8 D8 6. Scope of patent application (please first (Read the precautions on the back and fill in this page again.) The digital data corresponding to the basic waveforms of the η scattered data input according to the reference frequency clock pulses will be separated from each other and added to the reference frequency clock pulses for data synthesis. Synthesizing components; within a few segments, the digital data generated by the above-mentioned synthetic components is sampled from the input data 两倍 twice the frequency of the previous paragraph, each data 値 will be obtained, and these are staggered by half respectively The data of each clock pulse 値 are summed separately and output to the supersampling means of the next stage processing; For each data obtained by the supersampling means 値, the clock pulse at the frequency of the last stage of the supersampling means Next, each data is staggered by one clock pulse and added to perform a moving average or folding operation. And, each of said operation member information obtained is converted into analog Zhi amounts of D / A conversion member. 5. If the digital-to-analog converter in item 4 of the scope of patent application, the special feature is that the synthetic component is provided with: the scattered data input in accordance with the reference frequency clock pulse sequence is sequentially delayed sequentially by one minute η delay components; The Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs prints each data 从 output from the above η delay components, multiplies each gain 对应 corresponding to the basic digital waveform, and adds the multiplication results The multiply-add component that is output to the supersampling component. 6. The digital-to-analog converter according to item 4 of the scope of patent application, characterized in that the above-mentioned supersampling component is provided with: each of the digital data generated by the above-mentioned composite component; Clock pulse sampling, each paper size obtained is applicable to China National Standards (CNS) A4 specifications (210 × 297 mm) I 28-'479413 A8 B8 C8 D8 Patent range data and the first calculation component that adds the data staggered by half a clock pulse; each data obtained from the first calculation component is sampled with a clock pulse that is 4 times the reference frequency A second operation component that adds each of the obtained data and each data that is staggered by half a clock pulse; and, for each data obtained by the second operation component, the Clock pulse sampling at 8 times the frequency, and the third operation means for adding the obtained data and the data separated by half a clock pulse separately.7. For example, the digital-to-analog converter of the third scope of the patent application, characterized in that the computing means is provided with: the digital data obtained by the supersampling means are sequentially delayed in the frequency of the last stage of the supersampling means, respectively. The majority of the delay means of the clock pulses; and an addition means which outputs the above-mentioned majority of the delay means, respectively, and outputs. 8. —A kind of digital-analog conversion method 'characterized in that' contains: by oversampling and more than one moving average operation or folding operation, the digital data corresponding to the basic waveforms of the input n scattered data are synthesized with each other In order to obtain the calculation steps of the interpolated digits of the above-mentioned scattered data; and the D / A conversion step of converting each digital data 包含 including the interpolated 値 obtained by the above-mentioned operations into an analog quantity. 9. A digital-analog conversion method 'characterized by' contains: (Please read the precautions on the reverse side before filling out this page) k-pack ·, 1T. This paper size applies to China National Standard (CNS) Α4 specification (2ΐ〇 χ297 mm) -29- 479413 A8 B8 C8 D8 VI. Patent application range The synthetic steps of synthesizing the digital data of the basic waveforms corresponding to the input n scattered data by using moving average calculation or folding operation; The synthesized digital data 値 is then subjected to an oversampling step accompanied by a moving average operation or a folding operation; for the data 藉 obtained by the above oversampling, a moving average operation or a folding operation is performed to obtain the above-mentioned dispersion. A step of calculating the digital interpolation of the data; and transforming each of the digital data including the interpolation obtained by the above-mentioned operation into an analog D / A conversion step. ίο.Ηϋ 眞 The material interpolation device is characterized in that, by oversampling and averaging operation or folding operation more than-! _ times, it will correspond to the input η points ... 1 basic waveform of scattered data The digital data are combined with each other to obtain the digital interpolation of the above data. 11. The printed material interpolating device for the consumer cooperative of employees of the Intellectual Property Bureau of the Ministry of Economic Affairs is characterized in that, by moving average calculation or folding 输入 #, digital data corresponding to the basic waveforms of the η dispersed data input are combined with each other , Supersampling the synthesized digital data 値, and then performing moving average operation or folding operation on the data 由此 thus obtained, to obtain the interpolation digits of the above-mentioned scattered data. -30- (Please read the notes on the back before filling in this page) The paper size is applicable to the Chinese National Standard (CNS) A # specification (21〇297 mm)
TW090105607A 1999-06-18 2001-03-09 D/A converter, its method, and the data interpolation device TW479413B (en)

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