WO2002071619A1

WO2002071619A1 - Digital-analog converter and converting method, data interpolator

Info

Publication number: WO2002071619A1
Application number: PCT/JP2001/001559
Authority: WO
Inventors: Yukio Koyanagi
Original assignee: Sakai, Yasue
Priority date: 2001-03-01
Filing date: 2001-03-01
Publication date: 2002-09-12

Abstract

A digital-analog converter comprising a digital waveform generating section (10) for combining items of digital data of a basic waveform generated depending on the value of input discrete data by convolution, a section (20) for performing oversampling and convolution of the output from the digital waveform generating section (10), and a section (30) for performing D/A conversion of the output from the convolution section (20). A basic digital waveform is subjected to amplitude modulation depending the discrete data and combined by convolution and then continuous interpolation values are obtained simply through oversampling and convolution. Conventional low-pass filter can be eliminated and deterioration of phase characteristics due to a filter is suppressed.

Description

Description Digital conversion analog converter and method, data interpolation device

The present invention relates to a digital-to-analog converter (D / A converter) and method for converting discrete digital data into a continuous analog signal, and further to a data interpolation device, and in particular, to DZA conversion of audio data. It is suitable for use in applications such as: Background art

In recent digital audio devices, such as CD (compact disk) players and DVD (digital video disk) players, oversampling technology is used to obtain continuous analog audio signals from discrete digital audio data. A DZA converter to which is applied is used.

In such a D / A converter, a digital filter is generally used to interpolate between digital data input discretely and increase the sampling frequency in a pseudo manner. After generating a staircase signal waveform by holding it with a sample hold circuit, it passes it through a low-pass filter to output a smooth analog audio signal. Normally, data interpolation by a digital filter included in the DZA converter is performed using a sampling function called a sinc function. FIG. 1 is an explanatory diagram of the sinc function. The sinc function appears when the Dirac delta function is inverse-Fourier-transformed, and is defined as sin (πft) / (7tft), where f is the sampling frequency. This sinc function Has a value of 1 only at the sample point at t = 0, and a value of 0 at all other sample points.

FIG. 2 is a diagram showing a relationship between discrete data and an interpolated value therebetween. For example, a smoothly changing analog audio signal is sampled at fixed time intervals, and by quantizing this, discrete audio data as sample data can be obtained. The DZA converter inputs such discrete digital audio data, and outputs a continuous analog audio signal connecting the discrete digital audio data by interpolation using the sinc function.

In FIG. 2, the discrete data values at the equally spaced sampling points t 1, t 2, t 3, and t 4 are represented by Y (tl), Y (t 2), Y (t 3), and Y (t 4 For example, consider a case where an interpolated value y corresponding to a predetermined position t 0 (a distance a from t 2) between sample points t 2 and t 3 is obtained.

In general, in order to obtain the interpolated value y using a sampling function, the value of the sampling function at the interpolation position t 0 for each given piece of scattered data may be obtained, and the convolution operation may be performed using this. . Specifically, for each of the sample points tl to t 4, the peak height at the center position of the sampling function is matched, and the value of the sampling function at each interpolation position t 0 at this time (indicated by the X mark) ) And add them all.

Note that the interpolation position t0 moves with the lapse of time, but since the level corresponding to each sample position also changes with the lapse of time, the interpolation value y (t0) also changes continuously, and Can be obtained as a continuous analog signal.

However, in the conventional A-converter using the above-mentioned oversampling technique, a step-like signal waveform obtained by interpolation is passed through a low-pass filter to generate a smooth analog signal. The problem is that the phase characteristic is deteriorated by the low-pass filter. Was.

In addition, since the sinc function described above is a function that converges to 0 at ± ∞, it is necessary to calculate and add the value of the sinc function for all discrete data in order to obtain an accurate interpolation value. However, in practice, digital filter processing was performed by limiting the range of discrete data to be considered due to the processing capacity and circuit scale. For this reason, the obtained interpolated value includes a truncation error, and there is a problem that an accurate interpolated value cannot be obtained.

As described above, in the conventional DZA converter to which the over-sampling technique is applied, the phase characteristic deteriorates due to passing through the mouth-pass filter, and the digital filter to which the sinc function is applied is used. A truncation error occurred. As a result, there is a problem that the output waveforms corresponding to these are distorted, and the quality of the output voice is degraded.

The present invention has been made to solve such a problem, and an object of the present invention is to obtain an output waveform with little distortion and improve the quality of output sound. Disclosure of the invention

The digital-to-analog converter of the present invention converts digital data of a basic waveform corresponding to the value of n discrete data to be input into an oversampling and one or more moving average calculations or convolution calculations. After obtaining a digital interpolation value for the discrete data by combining the digital data, the digital data values including the interpolation value are converted into analog quantities.

In another aspect of the present invention, digital data of a basic waveform corresponding to the values of n discrete data to be input are combined by oversampling and moving average calculation or convolution calculation, and the combined digital data value After performing a moving average operation or a convolution operation on the digital data to obtain a digital interpolation value for the discrete data, each digital data value including the interpolation value is converted into an analog amount.

According to another aspect of the present invention, there is provided a synthesizing unit for synthesizing digital data of a basic waveform corresponding to the values of n discrete data to be inputted by a moving average operation or a convolution operation, For each day, each input data value is sampled at twice the frequency of the previous stage, and each obtained data value is shifted by a predetermined phase to each obtained data value. Oversampling means for performing processing of adding and outputting to the next stage over several stages, and an arithmetic means for performing a moving average operation or a convolution operation on each data value obtained by the oversampling means. And DZA conversion means for converting each data value obtained by the calculation means into an analog quantity.

In another embodiment of the present invention, digital synthesis is performed by shifting digital data of a basic waveform corresponding to the value of n discrete data inputted according to a reference frequency clock while shifting the digital data by the reference frequency clock. And synthesizing the digital data generated by the synthesizing means, sampling each input data value with a frequency clock that is twice as high as that of the previous stage, and obtaining each obtained data value and it. Oversampling means that performs processing of adding each data value shifted by half a clock and outputting the result to the next stage over several stages, and processing of each data value obtained by the oversampling unit. The moving average is calculated by adding each data value by shifting it by one clock under the frequency clock of the last stage of the oversampling means. Other includes calculating means for performing a convolution calculation process, a DZA conversion means to convert the analog quantity of each data value obtained by the calculating means. Here, the synthesizing means includes, for example, n delay means for sequentially delaying discrete data sequentially input according to the reference frequency clock by the reference frequency clock, and output signals from the n delay means, respectively. Multiplying means for multiplying each of the data values by a gain value corresponding to the basic digital waveform, adding the respective multiplication results, and outputting the result to the oversampling means.

Further, the oversampling unit samples, for example, each data value of the digital data generated by the synthesizing unit with a clock having a frequency twice as high as the reference frequency, and obtains each obtained data. A first arithmetic means for adding the value and each data value shifted by half a clock, respectively, and for each data value obtained by the first arithmetic means, four times the reference frequency. Second arithmetic means for performing sampling with a clock having a frequency and adding each data value obtained and a data value obtained by shifting the data value by a half clock; and each data value obtained by the second arithmetic means. A third operation in which the value is sampled with a clock having a frequency eight times the reference frequency described above, and the obtained data value and a data value obtained by shifting the data value by a half clock are added. And a stage.

Further, the arithmetic means includes, for example, a plurality of delay means for sequentially delaying the digital data obtained by the oversampling means by the frequency clock of the last stage of the oversampling means, and the plurality of delay means. Adding means for adding and outputting the outputs from the means. In addition, the digital-to-analog conversion method of the present invention provides oversampling and one or more moving average calculations or convolutions of digital data of a basic waveform corresponding to the values of n pieces of input scattered data. An arithmetic step of obtaining a digital interpolation value for the discrete data by combining by arithmetic operation; and a digital data including the interpolation value obtained by the arithmetic operation. —A DZA conversion step of converting the evening value into an analog quantity.

In another aspect of the present invention, a combining step of combining digital data of a basic waveform according to the values of n discrete data to be inputted by a moving average operation or a convolution operation, and the combined digital data value By performing an oversampling operation involving a moving average operation or a convolution operation on the data, and further performing a moving average operation or a convolution operation on the data values obtained by the oversampling operation. A calculating step of obtaining a digital interpolation value for the discrete data; and a D / A conversion step of converting each digital data value including the interpolation value obtained by the calculation into an analog amount.

Further, the data interpolation device of the present invention combines digital data of a basic waveform corresponding to the values of n discrete data to be inputted by oversampling and one or more moving average calculations or convolution calculations. Thus, a digital interpolation value for the discrete data is obtained.

In another aspect of the present invention, digital data of a basic waveform corresponding to the values of n discrete data to be input are combined by a moving average operation or a convolution operation, and the combined digital data value is calculated. Oversampling is performed, and a moving average calculation or a convolution calculation is further performed on the obtained data value to obtain a digital interpolation value for the discrete data.

According to the present invention configured as described above, only digital processing of combining digital data of a basic waveform according to input discrete data by oversampling and moving average calculation or convolution calculation is performed.

, Since a continuous interpolated value is obtained for the original discrete data, The result of the A conversion is a smooth analog signal. As a result, it is not necessary to provide a sample-hold circuit and a low-pass filter as in the related art, and it is possible to suppress the deterioration of the phase characteristic due to the filtering. Furthermore, in the present invention, since the function generated from the basic digital waveform is a finite-order sampling function, the number of discrete data required to obtain one interpolated value can be reduced, and furthermore, the processing Even when the number of discrete data to be targeted is reduced, a truncation error can be prevented. Therefore, distortion of the output waveform can be minimized.

From the above, the quality of the output analog audio signal can be significantly improved. BRIEF DESCRIPTION OF THE FIGURES

FIG. 1 is an explanatory diagram of the sine function.

FIG. 2 is an explanatory diagram of the interpolation operation.

FIG. 3 is a diagram illustrating a configuration example of the D / A converter according to the present embodiment. FIG. 4 is a diagram showing a configuration example of a digital waveform generator in FIG.

FIG. 5 is a diagram showing a basic digital waveform used in the present embodiment.

FIG. 6 is a diagram for explaining an operation example of the compensation operation unit of the present embodiment.

FIG. 7 is a diagram showing a function generated from the basic digital waveform of FIG. 5 by the composition operation of FIG.

FIG. 8 is a diagram for explaining the operation of the digital waveform generator in FIG.

FIG. 9 is a diagram for explaining another operation example of the compensation operation unit of the present embodiment.

FIG. 10 shows the digital base of FIG. 5 obtained by the compensation operation of FIG. FIG. 3 is a diagram illustrating a function generated from the present waveform.

FIG. 11 is a diagram illustrating another configuration example of the data interpolation device. BEST MODE FOR CARRYING OUT THE INVENTION

The DZA converter of the present embodiment does not generate an analog signal through a sample-and-hold circuit and a low-pass filter after performing oversampling using a digital filter, but according to input discrete data. The digital data of the basic waveform corresponding to the sampling function are synthesized, and the obtained data is oversampled and a moving average operation or a convolution operation (hereinafter, referred to as a “composition operation”). The characteristic is that each interpolation value is digitally obtained by executing the above, and then an analog signal corresponding to this is generated.

Hereinafter, the D / A converter of the present embodiment will be described in detail with reference to the drawings. FIGS. 3 and 4 are diagrams illustrating the configuration of the D / A converter according to the present embodiment, and FIGS. 5 to 7 are diagrams illustrating the principle of the D / A conversion according to the present embodiment. First, the principle of the DZA conversion will be described with reference to FIGS.

FIG. 5 is an explanatory diagram of a basic digital waveform used in the present embodiment. The basic digital waveform shown in Fig. 5 is the basis of the sampling function used when performing data interpolation by oversampling. This basic digital waveform was created by changing the data value to –1, 1, 8, 8, 8, 1, 11 every clock (CK) of the reference frequency.

Here, in order to explain the basic principle of the D / A conversion operation according to the present embodiment, consider a case where the following processing is performed on the basic digital waveform itself shown in FIG.

First, double the frequency of the digital data value of the basic waveform as shown in Fig. 5. Sampling is performed using the clock of the wave number (2CK), and each obtained sample value is added to each sample value shifted by 2CΚ half clock (half phase), thereby obtaining a two-stage compo- sition. Digitally perform double oversampling with usage computation.

Next, each data value obtained by the first oversampling is sampled with a clock (4 CΚ) of twice the frequency, and each obtained sample value and 4 CΚ are sampled. By adding each sample value shifted by half a clock (half phase) of the above, further double sampling with a two-stage compilation operation is performed in the same way as the first time.

Further, each data value obtained by the second oversampling is further sampled with a clock having a frequency twice as high (8 CΚ), and the obtained sample value and the half clock of 8 CK are obtained. (Semi-phase) By adding each sample value shifted by half, another double sampling with a two-stage compilation operation is performed once more.

In this way, after performing twice the oversampling and the two-stage compensation operation three times, each data value obtained by the third compensation operation is the same as the third one. An 8-stage compilation operation is performed by shifting each sample value by one clock at a frequency clock (8CΚ).

FIG. 6 is a diagram illustrating a result of performing the above-described oversampling and the computation calculation on the basic digital waveform of FIG. Among them, Fig. 6 (A) shows the result of the first oversampling and the compensation operation. In FIG. 6 (A), the first row of the number sequence is twice as large as the data value of the basic digital waveform shown in FIG. Are shown, and the numerical sequence in the second row indicates the result of shifting each sample value in the first row by a half phase. Further, the third row of numbers shows the result of adding each sample value of the first row and each sample value of the second row between the corresponding columns.

Further, FIG. 6 (B) shows the result of performing the second sampling and the compensation operation for the second time. In FIG. 6 (B), the sequence in the first row is different from the data set shown in the third row in FIG. 6 (A) obtained by the first oversampling and the compensation operation. Shows the result of sampling twice, and the second row shows the result of shifting each sample value in the first row by half a phase. Further, the third row of the sequence shows the result of adding each sample value of the first row and each sample value of the second row between the corresponding columns.

Further, FIG. 6 (C) shows the result of performing the third sampling and the compilation operation for the third time. In FIG. 6 (C), the sequence in the first row is 2 times the data value shown in the third row in FIG. 6 (B) obtained by the second oversampling and the composition operation. The result of double over-sampling is shown, and the sequence in the second row is the result of shifting each sample value in the first row by half a phase. Further, the third row of the sequence shows the result of adding each sample value of the first row and each sample value of the second row between the corresponding columns. Here, for convenience of the drawing, a series of numbers is shown in a two-stage configuration.

Further, FIG. 6 (D) shows the result of performing an eight-stage compensation operation. In FIG. 6 (D), the first row of the sequence is the data value itself shown in the third row of FIG. 6 (C) obtained by the third oversampling and the composition operation. , And the columns in rows 2 through 8 show the result of sequentially shifting each sample value in the first row by one clock. I have. Further, the ninth row of the number sequence indicates the result of adding the sample values of the first to eighth rows between the corresponding columns. Here, for convenience of the drawing, a series of numerical sequences are shown in a two-stage configuration.

When the finally obtained sample values shown in the ninth row of FIG. 6 (D) are D / A converted, a signal of a waveform function as shown in FIG. 7 is obtained. The function shown in Fig. 7 is once differentiable over the whole area, has a finite value other than 0 when the sample position t along the horizontal axis is between 1 and 65, and Is a function whose value is all .0 in the area of.

A case where the value of a function has a finite value other than 0 in a local area and becomes 0 in other areas is referred to as “finite base”.

In addition, the function shown in Fig. 7 has a maximum value only at the sample points of t = 33, and becomes zero at four sample points of t = l, 17, 49, and 65. Function, which passes through all the sample points necessary to obtain a smooth analog waveform signal.

Thus, the function shown in Fig. 7 is a sampling function that is differentiable once over the entire range, and is a finite-based function that converges to 0 at the sampling position t = l, 65. Therefore, by performing superposition based on each discrete data using the sampling function of Fig. 7 instead of the conventional sinc function shown in Fig. 1, a function that can differentiate once between the discrete data is used. It is possible to compensate.

However, in this embodiment, superposition (synthesis) based on each discrete data is not performed after obtaining the sampling function as shown in FIG. 7 from the basic digital waveform in FIG. 5, but in FIG. 3 and FIG. As will be described later, this is performed digitally at a stage before the above-described oversampling and composition operation are performed. Therefore, over-sampling and compo- By simply performing the computation, a result equivalent to superimposing the sampling function according to the size of each discrete data as shown in Fig. 2 can be obtained immediately. The sinc function used conventionally is a function that converges to 0 at t = ± ∞ sample points, so when trying to find the interpolation value accurately, the sinc function corresponds to each discrete data up to t = ± ∞. It was necessary to calculate the value of the sinc function at the interpolation position and use this to perform the convolution operation. On the other hand, the sampling function of FIG. 7 used in the present embodiment converges to 0 at the sampling points of t = 1 and 65, so that only the discrete data within the range of t = 1 to 65 is used. Just take it into account. Therefore, when obtaining a certain interpolated value, only a limited number of discrete data values need to be considered, and the processing amount can be greatly reduced. Moreover, discrete data outside the range of t = l to 65 should be considered originally, but are not neglected in consideration of the processing amount, accuracy, etc., and need to be considered theoretically. There is no truncation error.

FIG. 3 is a diagram showing the overall configuration of the D / A converter according to the present embodiment. The D / A converter shown in FIG. 3 includes a digital waveform generator 10, a component operation unit 20, and a DZA converter 30. The digital waveform generating section 10 corresponds to the synthesizing means of the present invention, the composition calculating section 20 corresponds to the oversampling means and the calculating means of the present invention, and the DZA converting section 30 corresponds to the present invention. Corresponds to DZA conversion means. The configuration of the digital waveform generator 10 will be described later with reference to FIG. Further, the compilation operation unit 20 executes the oversampling and the composition operation as described with reference to FIG. 6 above, and executes the discrete data input to the digital waveform generation unit 10. It generates digital data values at each sample point to interpolate between them. Further, the DZA conversion unit 30 converts each digital data obtained by the —D / A conversion of data values (interpolation by over sampling as in the past is not performed here).

In the configuration of the above-described composition operation unit 20, the D-type flip-flop (hereinafter, abbreviated as DFF) 1a is a digital flip-flop that amplifies the digital data output from the digital waveform generation unit 10 by a frequency twice as high. Hold according to the clock (4CK). The D · FF1b connected in parallel to the D · FF1a also holds the digital data output from the digital waveform generator 10 according to a clock (4CK) having a double frequency. However, here, data is retained at the cycle inverted by 4CK above.

Further, the adder 2 adds the digital data values held in the above two D'FFla and lb. The D · FF 1 a, 1 b and the adder 2 constitute the first arithmetic means of the present invention, and the digital data output from the digital waveform generator 10 is doubled. A two-stage composition operation is performed, in which one sampling is performed and each sample value obtained by this is added to each sample value shifted by half a phase (see Fig. 6 (A)). .

The two DFFs 3a and 3b connected in parallel at the subsequent stage of the adder 2 convert the digital data output from the adder 2 into a half-phase with each other according to a clock having a double frequency (8 CK). Hold at a shifted cycle. The adder 4 adds the digital data values held in the above two D · FF 3a and 3b.

The D · FFs 3a and 3b and the adder 4 constitute the second arithmetic means of the present invention. The digital arithmetic unit obtained by the first-stage compensation operation further includes A double-stage oversampling and a two-stage compensation operation of adding each sample value obtained by this and each sample value shifted by half a phase are executed (Fig. 6). (B ))).

The two DFFs 5a and 5b connected in parallel at the subsequent stage of the adder 4 convert the digital data output from the adder 4 according to the clock (16 CK) of a double frequency. They are held at a period shifted by half a phase from each other. The adder 6 adds the digital data values held in the two D · FFs 5a and 5b.

The D. FFs 5a and 5b and the adder 6 constitute the third arithmetic means of the present invention, and the digital data obtained by the second-stage compensation operation is further reduced by two. Double oversampling and a two-stage compensation operation of adding each sample value obtained by the oversampling and each sample value shifted by half a phase are performed (Fig. 6 (C ))).

In this way, by repeating twice the oversampling and the two-stage compilation operation three times, the digital data output from the digital waveform generator 10 is multiplied by eight times. Oversampling has been performed. The above-described configuration in the compensation operation unit 20 corresponds to the oversampling unit of the present invention, and the remaining configuration described below corresponds to the arithmetic unit of the present invention.

The eight DFFs 7a to 7h cascaded after the adder 6 convert the digital data output from the adder 6 one clock at a time according to a 16-times frequency clock (16 CK). Hold sequentially with delay. These eight 0 ′ 7 & to 711 correspond to a plurality of delay means of the present invention. Further, the remaining configuration described below corresponds to the adding means of the present invention.

The adder 8a and the 12 multiplier 9a add the digital data values held in the D * FFs 7g and 7h to each other and multiply them by 1Z2. The adder 8b and the 1/2 multiplier 9b output the digital data held in the DFFs 7e and 7f. Add the evening value to each other and multiply by 1 to 2 times. The adder 8 c and the 乗算 multiplier 9 c add the digital data values held in the D · FFs 7 c and 7 d to each other and 1 times the digital data values. The adder 8d and the 12 multiplier 9d add the digital data values held in the DFFs 7a and 7b to each other and multiply them by 1/2.

The adder 8 e and the 2 multiplier 9 e add the digital data values output from the two 1 × 2 multipliers 9 a and 9 b to each other and multiply by 12 to obtain an adder 8 f and The 12 multiplier 9f adds the digital data values output from the two 1/2 multipliers 9c and 9d to each other and multiplies them by 172. Further, the adder 8 g adds the digital data values output from the two 2 multipliers 9 e and 9 f to each other, and supplies the result to the DZA converter 30.

With the above configuration of DFF 7a to 7h, adders 8a to 8g, and 1/2 multipliers 9a to 9f, the digital data subjected to the above 16 times over sampling is performed. Then, an 8-stage convolution operation is performed in which each sample value is shifted by one clock and added under a clock of 16 times the frequency (16 CK) (see FIG. 6 (D)). The DZA conversion unit 30 continuously outputs a smooth analog signal waveform by simply performing D / A conversion on each sample value of the digital data thus obtained. Next, the configuration of the digital waveform generator 10 will be described with reference to FIG. In FIG. 4, three D · FF 11 a to 11 c sequentially hold digital discrete data to be subjected to D / A conversion while delaying one digital clock at a time in accordance with a reference frequency clock (CK). These three D · FF11a to llc correspond to the n delay means of the present invention. Also, the 1 × multiplier 1 2 a multiplies the data value held in D.FF 11 a by _ 1 and the 1 × multiplier 13 a is held in D × FF 11 a. Multiply the data value (In this case, the data values remain the same).

The result of multiplication by these multipliers 12a and 13a is switched by switch 14a at a duty ratio of 1/2 according to the reference frequency clock (CK), and is selected by adder 16 Is output. The adder 16 receives not only the multiplication result of the 1 × multiplier 1 2 a or the 1 × multiplier 13 a but also the multiplication result of the 8 × multiplier 15. Is added and output. The octuple multiplier 15 multiplies the data value held in DF11b by eight.

Also, — 1-time multiplier 1 2 b multiplies the data value held in D ′ FF 11 c by _ 1, and 1-time multiplier 13 b multiplies the data value held in D · FF 11 c by Multiply the value overnight (in this case, the data value remains the same). The result of the multiplication by these multipliers 12 b and 13 b is switched by switch 14 b at a duty ratio of 1/2 according to the clock (CK) of the reference frequency, and is selectively output to D • FF 17 a. Is output.

The D · FF 17a outputs the result of the multiplication by the one-time multiplier 12a or the one-time multiplier 13a selectively output by the switch 14b to a double-frequency clock ( 2 CK). Further, D ′ FF 17 b holds the addition result output from the adder 16 in accordance with a double frequency clock (2CK). The adder 18 and the D. FF 19 add the data values output from the two D 'FFs 17a and 17b to each other and hold the data values according to a clock having a double frequency (2CK). Then, the signal is output to the next stage of the computation unit 20 shown in FIG.

By processing the discrete data to be D / A converted by the digital waveform generator 10 configured as described above, the basic digital waveform shown in FIG. 5 is amplitude-modulated according to the size of each discrete data, Furthermore, the result of performing a three-stage composition operation on these data values is obtained. Above As described above, in the present embodiment, when obtaining one interpolated value, only the discrete data existing within a range having a finite value other than 0 in the sampling function of finite units need to be considered, so that In this example, a compositing operation is performed using three discrete data.

FIG. 8 is a diagram showing an operation example of the digital waveform generator 10. FIG. 8 (A) is a diagram showing an example of discrete data input to the digital waveform generator 10. The horizontal axis indicates time, and the vertical axis (a to f) indicates the size of the discrete data. Is shown. FIG. 8 (B) is a diagram showing how the basic digital waveform shown in FIG. 5 is amplitude-modulated according to the size (a to f) of the scattered data, and is subjected to a composition operation. That is, data values arranged in the vertical direction are added and output.

By passing the result of the digital computation performed by the digital waveform generator 10 as described above to the computation operator 20 shown in FIG. 3, the original discrete data is increased by 16 times. Each interpolated interpolated value is obtained. The DZA conversion unit 30 simply performs D / A conversion on the digital data including the respective interpolated values obtained in this manner, and performs smoothing such as oversampling based on the standardization function of FIG. It is possible to output various analog signal waveforms continuously.

As described in detail above, according to the present embodiment, digital data of a basic waveform corresponding to a sampling function are synthesized by a composition operation according to the input discrete data, and obtained. A continuous interpolated value can be obtained simply by performing an oversampling and a composition operation on the data value, eliminating the need for a sample-and-hold circuit and a single-pass filter as in the past. Thus, the deterioration of the phase characteristics due to the filter can be suppressed.

The function generated from the basic digital waveform of the present embodiment is a finite It is a finite sampling function that converges to 0 at the sampling position, and is a function that can be differentiated once, so that the number of discrete data to be considered to find one interpolation value can be finite, The processing amount can be reduced. Moreover, since no truncation error occurs, an output waveform with little distortion can be obtained. As a result, the quality of the output analog audio signal can be significantly improved.

Further, in the present embodiment, since all continuous interpolation values necessary for obtaining a smooth analog signal are obtained by digital processing, the processing amount is smaller than in the conventional case where analog processing is performed. It has the advantage that it requires much less and is also suitable for mass production by IC.

Next, using FIG. 9, the discrete sampling values (11, 1, 8, 8, 1, 1, 11) corresponding to the digital basic waveform in FIG. Another example of processing for generating an interpolated value by means of a compiling operation will be described. Note that FIG. 9 shows an example in which oversampling of 4 times is performed for the sake of drawing. However, oversampling of a larger magnification (for example, 8 times, 16 times,...) Is performed. Is also good.

In Fig. 9, the series of numerical values shown in the leftmost column are four times the number of original discrete data (11, 1, 8, 8, 1, 1, 11) / 8. This is the value after the pulling. Also, the numerical sequence of four columns from left to right is the numerical sequence shown in the leftmost column shifted down one by one. The column direction in Fig. 9 shows the time axis. Shifting the numerical sequence downward corresponds to gradually delaying the numerical sequence shown in the leftmost column.

That is, the second numerical sequence from the left indicates that the numerical sequence shown in the leftmost column is shifted by 1/4 phase of the 4 × frequency clock 4 CLK. The third numerical column from the left is shown in the second column from the left. The numerical sequence that is shifted by 1/4 phase of CLK 4 from the numerical sequence that is quadrupled, and the numerical sequence that is the fourth column from the left is the numerical sequence that is shown in the third column from the left is the quadruple frequency clock 4. This shows that the numerical sequence is further shifted by one to four phases of CLK.

The fifth numerical column from the left is a value obtained by adding each of the first to fourth numerical columns by the corresponding row and dividing by four. By the processing in the fifth column from the left, a four-fold oversampling involving a four-phase com- plication operation is performed digitally.

From the fifth column to the right, the four numeric columns (the five to eight numeric columns from the left) are the numeric columns shown in the fifth column shifted down one by one. It is. The ninth column from the left is the value obtained by adding each of the fifth to eighth columns in the corresponding row and dividing by 4. By processing up to the ninth column from the left, four times oversampling with four-phase compensation operation is performed digitally twice.

The 10th numerical sequence from the left is the numerical sequence shown in the ninth column shifted down by one. Also, the numeric column in the 11th column (the rightmost column) from the left is the value obtained by adding the numeric column in the ninth column and the numeric column in the 10th column by the corresponding rows and dividing by 2. It is. This rightmost numerical sequence is the target interpolation value.

Fig. 10 is a graph of the finally obtained numerical sequence shown in the rightmost column of Fig. 9. The function having a waveform as shown in Fig. 10 is differentiable once in the entire region, and returns a finite value other than 0 when the sample position t along the horizontal axis is between 1 and 33. It is a finite function whose value is 0 in all other regions.

In addition, the function in Fig. 10 takes the local maximum only at the sample points of t = l7, and the value is 0 at the four sample points of t = 1, 9, 25, 33. It has a sampling function and passes all the sample points necessary to obtain smooth waveform data.

Thus, the function shown in Fig. 10 is a sampling function, which is differentiable once in the whole area, and is a finite function that converges to 0 at the sampling position t = l, 33. Therefore, by superimposing based on each discrete data using the sampling function of FIG. 10, it is possible to interpolate the value between the discrete data using a function that can be differentiated once.

In this interpolation, only discrete data in the range of t = 1 to 33 need be taken into account. Therefore, when obtaining a certain interpolated value, only a limited number of n discrete data values need to be considered, and the processing amount can be greatly reduced. Moreover, discrete data outside the range of t = 1 to 33 should be considered originally, but are not neglected in consideration of the processing amount, accuracy, etc., and need to be considered theoretically. There is no truncation error. Therefore, if the data interpolation method of the present embodiment is used, an accurate interpolated value can be obtained.

FIG. 11 is a block diagram showing a configuration example for realizing the data interpolation processing shown in FIG. The data interpolation device shown in FIG. 11 includes a normalized data storage unit 21, a phase shift unit 22, a plurality of digital multipliers 23 a to 23 d, and a plurality of digital adders 24. a to 24 c and a PLL circuit 25.

The normalized data storage unit 21 stores a normalized data sequence (the digital basic waveform is oversampled by a factor of 4 as shown in the rightmost column of FIG. 9 and normalized by a compiling operation). Data sequence) is stored in a manner shifted to four phases. When performing an oversampling such as 8 times or 16 times the digital basic waveform shown in Fig. 5, the normalized data storage unit 21 stores the digital basic waveform at 8 times or 16 times. Over one sun A data string that has been printed and normalized by the compilation operation is stored.

The four-phase normalized data stored in the normalized data storage unit 21 is read out according to clocks CLK and 8 CLK supplied from the PLL circuit 25, and each of the four digital multipliers 23a to 23 It is supplied to one input terminal of d.

Further, the phase shift unit 22 performs a phase shift process of shifting the phase of the input discrete data to four phases. The four-phase discrete data generated by the phase shift unit 22 is output according to the clock signals 1 ^ and 8 CLK supplied from the PLL circuit 25, and each of the four digital multipliers 23a to 23 3d is supplied to the other input terminal.

The four digital multipliers 23a to 23d store the four-phase normalized data output from the normalized data storage unit 21 and the four-phase normalized data output from the phase shift unit 22. Multiply by discrete data. The three digital adders 24a to 24c connected at the subsequent stage add and output all the multiplication results of the four digital multipliers 23a to 23d.

In the configuration shown in FIG. 11, the rightmost column of normalized data obtained by the composition operation shown in FIG. 9 is stored in advance in the normalized data storage unit 21 such as a ROM. . Then, the normalized data is modulated into an amplitude corresponding to the value of the input discrete data, and the obtained data is synthesized and output by a four-phase composition operation.

The digital fundamental waveform shown in Fig. 5 is multiplied by the amplitude value of the input discrete data, and the resulting data value is subjected to a interpolation operation as shown in Fig. 9 during interpolation. However, in the case of the configuration as shown in Fig. 11, when performing the interpolation, It has the advantage that the interpolation itself does not need to be performed and the interpolation process can be sped up.

The above-described embodiment is merely an example of embodying the present invention, and should not be construed as limiting the technical scope of the present invention. It is. That is, the present invention can be embodied in various forms without departing from its spirit or its main features. '

For example, in the compensation operation unit 20 shown in FIG. 3, double oversampling is performed three times, but the present invention is not limited to this number. In addition, after such a total of eight times over-sampling, an eight-stage compilation operation is performed, but the number of stages is not limited to this. Further, the circuit configuration itself for performing such oversampling and compilation operation is not limited to the example shown in FIG. Furthermore, although the digital waveform generator 10 shown in FIG. 4 performs three-stage computational operations, the present invention is not limited to this number of stages. Further, in the embodiment of FIG. 3 described above, each of the interpolated values obtained by the digital waveform generator 10 and the component calculator 20 is finally D / A converted by the DZA converter 30. However, the obtained interpolated values may be used for other digital processing without DZA conversion. That is, the configuration excluding the DZA converter 30 in FIG. 3 can be used as a data interpolation device.

Further, in the above embodiment, the digital basic waveform is set to -1, 1, 8, 8, 1, -1. However, the digital basic waveform is not limited to this example. In other words, any waveform can be used as long as the obtained interpolation function can be differentiated once in the entire region and is a finite-level function that converges to 0 at a finite sample position. For example, the weights on both sides are 1 or 0 instead of 1 It is good. Also, the weight in the middle part may be set to a value other than 8. In any case, good curve interpolation can be realized.

Also, the D / A converter and the data interpolation device according to the present embodiment described above can be configured by hardware as described above, or can be realized by DSP software and the like. Is possible. For example, when implemented by software, the device of the present embodiment is actually configured by a computer CPU or MPU, RAM, ROM, etc., and can be implemented by operating a program stored in RAM or ROM. .

Therefore, the present invention can be realized by recording a program for causing a computer to perform the functions of the above-described embodiment on a recording medium such as a CD-R〇M and reading the program in the evening. As this recording medium, besides CD-ROM, a floppy disk, hard disk, magnetic tape, optical disk, magneto-optical disk, DVD, nonvolatile memory card, etc. may be used. it can. Further, it can also be realized by downloading the above program to a computer via a network such as the Internet. In addition, not only the functions of the above-described embodiments are realized by the computer executing the supplied program, but also the OS (operating system) or another application running on the computer. In the case where the functions of the above-described embodiment are realized in cooperation with a case software or the like, or all or a part of the processing of the supplied program is performed by a function expansion board or a function expansion unit of a computer. Such a program is also included in the embodiments of the present invention when the functions of the above-described embodiments are implemented by being performed. Industrial applicability

The present invention reduces the distortion of the output waveform by suppressing the degradation of the phase characteristic due to the one-pass filter and suppressing the truncation error at the time of interpolation. This is useful for minimizing the output and significantly improving the quality of the output analog audio signal.

Claims

Range of request

1. The digital data of the basic waveform corresponding to the values of the n discrete data to be input are combined by oversampling and one or more moving average calculations or convolution calculations to obtain the discrete data. A digital-to-analog converter characterized in that after obtaining a digital interpolation value, each digital data value including the interpolation value is converted into an analog quantity.

2. Digital data of the basic waveform corresponding to the values of the n discrete data to be input are combined by over sampling and moving average calculation or convolution operation, and the combined digital data value is further processed. After obtaining a digital interpolation value for the discrete data by performing a moving average calculation or a convolution calculation, each digital data value including the interpolation value is converted into an analog amount. Analog converter.

3. Synthesizing means for synthesizing digital data of the basic waveform according to the values of the n discrete data to be inputted by a moving average operation or a convolution operation.

The digital data generated by the synthesizing means, at a frequency _twice the respective data value in comparison with the preceding input sampling Ngushi, resulting each data value and the data value it has shifted by a predetermined phase amount Oversampling means for performing processing of adding several times to each other and outputting the result to the next stage over several stages.

An arithmetic means for performing a moving average operation or a convolution operation on each data value obtained by the over sampling means; and a D means for converting each data value obtained by the arithmetic means into an analog quantity. A digital-to-analog converter comprising A conversion means.

4. Synthesizing means for synthesizing data by shifting the digital data of the basic waveform corresponding to the value of the n discrete data input according to the reference frequency clock while shifting the digital data by the reference frequency clock, and

For the digital data generated by the synthesizing means, each input data value is sampled with twice the frequency clock as compared to the previous stage, and each obtained data value is shifted by half a clock. Oversampling means for performing a process of adding each value and outputting the result to the next stage over several stages;

Moving average calculation or convolution is performed by adding each data value shifted by one clock under the last stage frequency clock of the oversampling means to each data value obtained by the oversampling means. Arithmetic means for performing arithmetic processing;

A digital-to-analog converter comprising: a DZA converter for converting each data value obtained by the arithmetic means into an analog quantity.

5. The synthesizing means includes: n delay means for sequentially delaying discrete data sequentially input according to the reference frequency clock by the reference frequency clock;

Each data value output from the n delay means is multiplied by each gain value corresponding to the basic digital waveform, and the respective multiplication results are added and output to the over sampling means. 5. The digital analog converter according to claim 4, further comprising: multiplying and adding means.

6. The oversampling unit samples each data value of the digital data generated by the synthesizing unit with a clock having a frequency twice as high as the reference frequency, and obtains each obtained data value and the data value. Half black A first calculating means for adding each data value shifted by the same clock, and a sampling of each data value obtained by the first calculating means with a clock having a frequency four times the reference frequency. A second arithmetic means for performing calculation and adding each obtained data value and each data value obtained by shifting the data value by a half clock,

Sampling is performed on each data value obtained by the second arithmetic means with a clock having a frequency eight times the reference frequency, and each obtained data value is shifted by half a clock. 5. The digital-to-analog converter according to claim 4, further comprising: third calculating means for adding each of the data values obtained from the digital-to-analog conversion.

7. The arithmetic means includes a plurality of delay means for sequentially delaying the digital data obtained by the oversampling means by the frequency clock of the last stage of the oversampling means,

4. The digital-to-analog converter according to claim 3, further comprising an adder that adds and outputs the outputs from the plurality of delay units.

8. The digital data of the basic waveform corresponding to the values of the n discrete data to be input are synthesized by over-sampling and one or more moving average calculations or convolution calculations. An operation step for obtaining an interpolation value of digital,

A digital / analog conversion method for converting each digital data value including the interpolated value obtained by the above calculation into an analog amount.

9. A combining step of combining digital data of the basic waveform according to the values of the n discrete data to be input by a moving average operation or a convolution operation; An oversampling step of performing oversampling with a moving average operation or a convolution operation on the combined digital data values;

An operation step of obtaining a digital interpolation value for the discrete data by further performing a moving average operation or a convolution operation on the data value obtained by the oversampling;

A DZA conversion step of converting each digital data value including the interpolated value obtained by the above calculation into an analog amount.

10. The digital data of the basic waveform corresponding to the values of the n discrete data to be input are synthesized by oversampling and one or more moving average calculations or convolution calculations. A data interpolation device for obtaining a digital interpolation value

1 1. Digital data of the basic waveform according to the value of the n discrete data to be input are synthesized by moving average calculation or convolution operation, and oversampling is performed on the synthesized digital data value. A data interpolating device for obtaining a digital interpolation value for the discrete data by further performing a moving average operation or a convolution operation on the obtained data.